1 /* SPDX-License-Identifier: ISC */ 2 /* Copyright (C) 2020 MediaTek Inc. */ 3 4 #ifndef __MT7915_H 5 #define __MT7915_H 6 7 #include <linux/interrupt.h> 8 #include <linux/ktime.h> 9 #include "../mt76.h" 10 #include "regs.h" 11 12 #define MT7915_MAX_INTERFACES 4 13 #define MT7915_MAX_WMM_SETS 4 14 #define MT7915_WTBL_SIZE 288 15 #define MT7915_WTBL_RESERVED (MT7915_WTBL_SIZE - 1) 16 #define MT7915_WTBL_STA (MT7915_WTBL_RESERVED - \ 17 MT7915_MAX_INTERFACES) 18 19 #define MT7915_WATCHDOG_TIME (HZ / 10) 20 #define MT7915_RESET_TIMEOUT (30 * HZ) 21 22 #define MT7915_TX_RING_SIZE 2048 23 #define MT7915_TX_MCU_RING_SIZE 256 24 #define MT7915_TX_FWDL_RING_SIZE 128 25 26 #define MT7915_RX_RING_SIZE 1536 27 #define MT7915_RX_MCU_RING_SIZE 512 28 29 #define MT7915_FIRMWARE_WA "mediatek/mt7915_wa.bin" 30 #define MT7915_FIRMWARE_WM "mediatek/mt7915_wm.bin" 31 #define MT7915_ROM_PATCH "mediatek/mt7915_rom_patch.bin" 32 33 #define MT7915_EEPROM_SIZE 3584 34 #define MT7915_TOKEN_SIZE 8192 35 36 #define MT7915_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */ 37 #define MT7915_CFEND_RATE_11B 0x03 /* 11B LP, 11M */ 38 #define MT7915_5G_RATE_DEFAULT 0x4b /* OFDM 6M */ 39 #define MT7915_2G_RATE_DEFAULT 0x0 /* CCK 1M */ 40 41 #define MT7915_SKU_RATE_NUM 161 42 #define MT7915_SKU_MAX_DELTA_IDX MT7915_SKU_RATE_NUM 43 #define MT7915_SKU_TABLE_SIZE (MT7915_SKU_RATE_NUM + 1) 44 45 struct mt7915_vif; 46 struct mt7915_sta; 47 struct mt7915_dfs_pulse; 48 struct mt7915_dfs_pattern; 49 50 enum mt7915_txq_id { 51 MT7915_TXQ_FWDL = 16, 52 MT7915_TXQ_MCU_WM, 53 MT7915_TXQ_BAND0, 54 MT7915_TXQ_BAND1, 55 MT7915_TXQ_MCU_WA, 56 }; 57 58 enum mt7915_rxq_id { 59 MT7915_RXQ_BAND0 = 0, 60 MT7915_RXQ_BAND1, 61 MT7915_RXQ_MCU_WM = 0, 62 MT7915_RXQ_MCU_WA, 63 }; 64 65 enum mt7915_ampdu_state { 66 MT7915_AGGR_STOP, 67 MT7915_AGGR_PROGRESS, 68 MT7915_AGGR_START, 69 MT7915_AGGR_OPERATIONAL 70 }; 71 72 struct mt7915_sta_stats { 73 struct rate_info prob_rate; 74 struct rate_info tx_rate; 75 76 unsigned long per; 77 unsigned long changed; 78 unsigned long jiffies; 79 }; 80 81 struct mt7915_sta { 82 struct mt76_wcid wcid; /* must be first */ 83 84 struct mt7915_vif *vif; 85 86 struct list_head poll_list; 87 u32 airtime_ac[8]; 88 89 struct mt7915_sta_stats stats; 90 struct work_struct stats_work; 91 92 spinlock_t ampdu_lock; 93 enum mt7915_ampdu_state ampdu_state[IEEE80211_NUM_TIDS]; 94 }; 95 96 struct mt7915_vif { 97 u16 idx; 98 u8 omac_idx; 99 u8 band_idx; 100 u8 wmm_idx; 101 102 struct { 103 u16 cw_min; 104 u16 cw_max; 105 u16 txop; 106 u8 aifs; 107 } wmm[IEEE80211_NUM_ACS]; 108 109 struct mt7915_sta sta; 110 struct mt7915_dev *dev; 111 }; 112 113 struct mib_stats { 114 u16 ack_fail_cnt; 115 u16 fcs_err_cnt; 116 u16 rts_cnt; 117 u16 rts_retries_cnt; 118 u16 ba_miss_cnt; 119 }; 120 121 struct mt7915_phy { 122 struct mt76_phy *mt76; 123 struct mt7915_dev *dev; 124 125 struct ieee80211_sband_iftype_data iftype[2][NUM_NL80211_IFTYPES]; 126 127 u32 rxfilter; 128 u32 vif_mask; 129 u32 omac_mask; 130 131 u16 noise; 132 u16 chainmask; 133 134 s16 coverage_class; 135 u8 slottime; 136 137 u8 rdd_state; 138 int dfs_state; 139 140 __le32 rx_ampdu_ts; 141 u32 ampdu_ref; 142 143 struct mib_stats mib; 144 145 struct delayed_work mac_work; 146 u8 mac_work_count; 147 }; 148 149 struct mt7915_dev { 150 union { /* must be first */ 151 struct mt76_dev mt76; 152 struct mt76_phy mphy; 153 }; 154 155 struct mt7915_phy phy; 156 157 u16 chainmask; 158 159 struct work_struct init_work; 160 struct work_struct reset_work; 161 wait_queue_head_t reset_wait; 162 u32 reset_state; 163 164 struct list_head sta_poll_list; 165 spinlock_t sta_poll_lock; 166 167 u32 hw_pattern; 168 169 spinlock_t token_lock; 170 struct idr token; 171 172 s8 **rate_power; /* TODO: use mt76_rate_power */ 173 174 bool fw_debug; 175 }; 176 177 enum { 178 HW_BSSID_0 = 0x0, 179 HW_BSSID_1, 180 HW_BSSID_2, 181 HW_BSSID_3, 182 HW_BSSID_MAX, 183 EXT_BSSID_START = 0x10, 184 EXT_BSSID_1, 185 EXT_BSSID_2, 186 EXT_BSSID_3, 187 EXT_BSSID_4, 188 EXT_BSSID_5, 189 EXT_BSSID_6, 190 EXT_BSSID_7, 191 EXT_BSSID_8, 192 EXT_BSSID_9, 193 EXT_BSSID_10, 194 EXT_BSSID_11, 195 EXT_BSSID_12, 196 EXT_BSSID_13, 197 EXT_BSSID_14, 198 EXT_BSSID_15, 199 EXT_BSSID_END 200 }; 201 202 enum { 203 MT_RX_SEL0, 204 MT_RX_SEL1, 205 }; 206 207 enum mt7915_rdd_cmd { 208 RDD_STOP, 209 RDD_START, 210 RDD_DET_MODE, 211 RDD_RADAR_EMULATE, 212 RDD_START_TXQ = 20, 213 RDD_CAC_START = 50, 214 RDD_CAC_END, 215 RDD_NORMAL_START, 216 RDD_DISABLE_DFS_CAL, 217 RDD_PULSE_DBG, 218 RDD_READ_PULSE, 219 RDD_RESUME_BF, 220 RDD_IRQ_OFF, 221 }; 222 223 enum { 224 RATE_CTRL_RU_INFO, 225 RATE_CTRL_FIXED_RATE_INFO, 226 RATE_CTRL_DUMP_INFO, 227 RATE_CTRL_MU_INFO, 228 }; 229 230 static inline struct mt7915_phy * 231 mt7915_hw_phy(struct ieee80211_hw *hw) 232 { 233 struct mt76_phy *phy = hw->priv; 234 235 return phy->priv; 236 } 237 238 static inline struct mt7915_dev * 239 mt7915_hw_dev(struct ieee80211_hw *hw) 240 { 241 struct mt76_phy *phy = hw->priv; 242 243 return container_of(phy->dev, struct mt7915_dev, mt76); 244 } 245 246 static inline struct mt7915_phy * 247 mt7915_ext_phy(struct mt7915_dev *dev) 248 { 249 struct mt76_phy *phy = dev->mt76.phy2; 250 251 if (!phy) 252 return NULL; 253 254 return phy->priv; 255 } 256 257 static inline void 258 mt7915_set_aggr_state(struct mt7915_sta *msta, u8 tid, 259 enum mt7915_ampdu_state state) 260 { 261 spin_lock_bh(&msta->ampdu_lock); 262 msta->ampdu_state[tid] = state; 263 spin_unlock_bh(&msta->ampdu_lock); 264 } 265 266 extern const struct ieee80211_ops mt7915_ops; 267 extern struct pci_driver mt7915_pci_driver; 268 269 u32 mt7915_reg_map(struct mt7915_dev *dev, u32 addr); 270 271 int mt7915_register_device(struct mt7915_dev *dev); 272 void mt7915_unregister_device(struct mt7915_dev *dev); 273 int mt7915_register_ext_phy(struct mt7915_dev *dev); 274 void mt7915_unregister_ext_phy(struct mt7915_dev *dev); 275 int mt7915_eeprom_init(struct mt7915_dev *dev); 276 u32 mt7915_eeprom_read(struct mt7915_dev *dev, u32 offset); 277 int mt7915_eeprom_get_target_power(struct mt7915_dev *dev, 278 struct ieee80211_channel *chan, 279 u8 chain_idx); 280 void mt7915_eeprom_init_sku(struct mt7915_dev *dev); 281 int mt7915_dma_init(struct mt7915_dev *dev); 282 void mt7915_dma_prefetch(struct mt7915_dev *dev); 283 void mt7915_dma_cleanup(struct mt7915_dev *dev); 284 int mt7915_mcu_init(struct mt7915_dev *dev); 285 int mt7915_mcu_add_dev_info(struct mt7915_dev *dev, 286 struct ieee80211_vif *vif, bool enable); 287 int mt7915_mcu_add_bss_info(struct mt7915_phy *phy, 288 struct ieee80211_vif *vif, int enable); 289 int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif, 290 struct ieee80211_sta *sta, bool enable); 291 int mt7915_mcu_add_sta_adv(struct mt7915_dev *dev, struct ieee80211_vif *vif, 292 struct ieee80211_sta *sta, bool enable); 293 int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev, 294 struct ieee80211_ampdu_params *params, 295 bool add); 296 int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev, 297 struct ieee80211_ampdu_params *params, 298 bool add); 299 int mt7915_mcu_add_key(struct mt7915_dev *dev, struct ieee80211_vif *vif, 300 struct mt7915_sta *msta, struct ieee80211_key_conf *key, 301 enum set_key_cmd cmd); 302 int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 303 int enable); 304 int mt7915_mcu_add_obss_spr(struct mt7915_dev *dev, struct ieee80211_vif *vif, 305 bool enable); 306 int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif, 307 struct ieee80211_sta *sta); 308 int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif, 309 struct ieee80211_sta *sta); 310 int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd); 311 int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif); 312 int mt7915_mcu_set_fixed_rate(struct mt7915_dev *dev, 313 struct ieee80211_sta *sta, u32 rate); 314 int mt7915_mcu_set_eeprom(struct mt7915_dev *dev); 315 int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset); 316 int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band, bool enable, 317 bool hdr_trans); 318 int mt7915_mcu_set_scs(struct mt7915_dev *dev, u8 band, bool enable); 319 int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band); 320 int mt7915_mcu_set_rts_thresh(struct mt7915_phy *phy, u32 val); 321 int mt7915_mcu_set_pm(struct mt7915_dev *dev, int band, int enter); 322 int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable); 323 int mt7915_mcu_set_sku(struct mt7915_phy *phy); 324 int mt7915_mcu_set_txbf_type(struct mt7915_dev *dev); 325 int mt7915_mcu_set_txbf_sounding(struct mt7915_dev *dev); 326 int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val); 327 int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev, 328 const struct mt7915_dfs_pulse *pulse); 329 int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index, 330 const struct mt7915_dfs_pattern *pattern); 331 int mt7915_mcu_get_rate_info(struct mt7915_dev *dev, u32 cmd, u16 wlan_idx); 332 int mt7915_mcu_get_temperature(struct mt7915_dev *dev, int index); 333 int mt7915_mcu_rdd_cmd(struct mt7915_dev *dev, enum mt7915_rdd_cmd cmd, 334 u8 index, u8 rx_sel, u8 val); 335 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 ctrl); 336 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level); 337 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb); 338 void mt7915_mcu_exit(struct mt7915_dev *dev); 339 340 static inline bool is_mt7915(struct mt76_dev *dev) 341 { 342 return mt76_chip(dev) == 0x7915; 343 } 344 345 static inline void mt7915_irq_enable(struct mt7915_dev *dev, u32 mask) 346 { 347 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, 0, mask); 348 } 349 350 static inline void mt7915_irq_disable(struct mt7915_dev *dev, u32 mask) 351 { 352 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0); 353 } 354 355 static inline u32 356 mt7915_reg_map_l1(struct mt7915_dev *dev, u32 addr) 357 { 358 u32 offset = FIELD_GET(MT_HIF_REMAP_L1_OFFSET, addr); 359 u32 base = FIELD_GET(MT_HIF_REMAP_L1_BASE, addr); 360 361 mt76_rmw_field(dev, MT_HIF_REMAP_L1, MT_HIF_REMAP_L1_MASK, base); 362 /* use read to push write */ 363 mt76_rr(dev, MT_HIF_REMAP_L1); 364 365 return MT_HIF_REMAP_BASE_L1 + offset; 366 } 367 368 static inline u32 369 mt7915_l1_rr(struct mt7915_dev *dev, u32 addr) 370 { 371 return mt76_rr(dev, mt7915_reg_map_l1(dev, addr)); 372 } 373 374 static inline void 375 mt7915_l1_wr(struct mt7915_dev *dev, u32 addr, u32 val) 376 { 377 mt76_wr(dev, mt7915_reg_map_l1(dev, addr), val); 378 } 379 380 static inline u32 381 mt7915_l1_rmw(struct mt7915_dev *dev, u32 addr, u32 mask, u32 val) 382 { 383 val |= mt7915_l1_rr(dev, addr) & ~mask; 384 mt7915_l1_wr(dev, addr, val); 385 386 return val; 387 } 388 389 #define mt7915_l1_set(dev, addr, val) mt7915_l1_rmw(dev, addr, 0, val) 390 #define mt7915_l1_clear(dev, addr, val) mt7915_l1_rmw(dev, addr, val, 0) 391 392 static inline u32 393 mt7915_reg_map_l2(struct mt7915_dev *dev, u32 addr) 394 { 395 u32 offset = FIELD_GET(MT_HIF_REMAP_L2_OFFSET, addr); 396 u32 base = FIELD_GET(MT_HIF_REMAP_L2_BASE, addr); 397 398 mt76_rmw_field(dev, MT_HIF_REMAP_L2, MT_HIF_REMAP_L2_MASK, base); 399 /* use read to push write */ 400 mt76_rr(dev, MT_HIF_REMAP_L2); 401 402 return MT_HIF_REMAP_BASE_L2 + offset; 403 } 404 405 static inline u32 406 mt7915_l2_rr(struct mt7915_dev *dev, u32 addr) 407 { 408 return mt76_rr(dev, mt7915_reg_map_l2(dev, addr)); 409 } 410 411 static inline void 412 mt7915_l2_wr(struct mt7915_dev *dev, u32 addr, u32 val) 413 { 414 mt76_wr(dev, mt7915_reg_map_l2(dev, addr), val); 415 } 416 417 static inline u32 418 mt7915_l2_rmw(struct mt7915_dev *dev, u32 addr, u32 mask, u32 val) 419 { 420 val |= mt7915_l2_rr(dev, addr) & ~mask; 421 mt7915_l2_wr(dev, addr, val); 422 423 return val; 424 } 425 426 #define mt7915_l2_set(dev, addr, val) mt7915_l2_rmw(dev, addr, 0, val) 427 #define mt7915_l2_clear(dev, addr, val) mt7915_l2_rmw(dev, addr, val, 0) 428 429 bool mt7915_mac_wtbl_update(struct mt7915_dev *dev, int idx, u32 mask); 430 void mt7915_mac_reset_counters(struct mt7915_phy *phy); 431 void mt7915_mac_cca_stats_reset(struct mt7915_phy *phy); 432 void mt7915_mac_sta_poll(struct mt7915_dev *dev); 433 void mt7915_mac_write_txwi(struct mt7915_dev *dev, __le32 *txwi, 434 struct sk_buff *skb, struct mt76_wcid *wcid, 435 struct ieee80211_key_conf *key, bool beacon); 436 void mt7915_mac_set_timing(struct mt7915_phy *phy); 437 int mt7915_mac_fill_rx(struct mt7915_dev *dev, struct sk_buff *skb); 438 void mt7915_mac_tx_free(struct mt7915_dev *dev, struct sk_buff *skb); 439 int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, 440 struct ieee80211_sta *sta); 441 void mt7915_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 442 struct ieee80211_sta *sta); 443 void mt7915_mac_work(struct work_struct *work); 444 void mt7915_mac_reset_work(struct work_struct *work); 445 void mt7915_mac_sta_stats_work(struct work_struct *work); 446 int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 447 enum mt76_txq_id qid, struct mt76_wcid *wcid, 448 struct ieee80211_sta *sta, 449 struct mt76_tx_info *tx_info); 450 void mt7915_tx_complete_skb(struct mt76_dev *mdev, enum mt76_txq_id qid, 451 struct mt76_queue_entry *e); 452 void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 453 struct sk_buff *skb); 454 void mt7915_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps); 455 void mt7915_stats_work(struct work_struct *work); 456 void mt7915_txp_skb_unmap(struct mt76_dev *dev, 457 struct mt76_txwi_cache *txwi); 458 int mt76_dfs_start_rdd(struct mt7915_dev *dev, bool force); 459 int mt7915_dfs_init_radar_detector(struct mt7915_phy *phy); 460 void mt7915_set_stream_he_caps(struct mt7915_phy *phy); 461 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy); 462 void mt7915_update_channel(struct mt76_dev *mdev); 463 int mt7915_init_debugfs(struct mt7915_dev *dev); 464 #ifdef CONFIG_MAC80211_DEBUGFS 465 void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 466 struct ieee80211_sta *sta, struct dentry *dir); 467 #endif 468 469 #endif 470