1 /* SPDX-License-Identifier: ISC */ 2 /* Copyright (C) 2020 MediaTek Inc. */ 3 4 #ifndef __MT7915_H 5 #define __MT7915_H 6 7 #include <linux/interrupt.h> 8 #include <linux/ktime.h> 9 #include "../mt76.h" 10 #include "regs.h" 11 12 #define MT7915_MAX_INTERFACES 4 13 #define MT7915_MAX_WMM_SETS 4 14 #define MT7915_WTBL_SIZE 288 15 #define MT7915_WTBL_RESERVED (MT7915_WTBL_SIZE - 1) 16 #define MT7915_WTBL_STA (MT7915_WTBL_RESERVED - \ 17 MT7915_MAX_INTERFACES) 18 19 #define MT7915_WATCHDOG_TIME (HZ / 10) 20 #define MT7915_RESET_TIMEOUT (30 * HZ) 21 22 #define MT7915_TX_RING_SIZE 2048 23 #define MT7915_TX_MCU_RING_SIZE 256 24 #define MT7915_TX_FWDL_RING_SIZE 128 25 26 #define MT7915_RX_RING_SIZE 1536 27 #define MT7915_RX_MCU_RING_SIZE 512 28 29 #define MT7915_FIRMWARE_WA "mediatek/mt7915_wa.bin" 30 #define MT7915_FIRMWARE_WM "mediatek/mt7915_wm.bin" 31 #define MT7915_ROM_PATCH "mediatek/mt7915_rom_patch.bin" 32 33 #define MT7915_EEPROM_SIZE 3584 34 #define MT7915_TOKEN_SIZE 8192 35 36 #define MT7915_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */ 37 #define MT7915_CFEND_RATE_11B 0x03 /* 11B LP, 11M */ 38 #define MT7915_5G_RATE_DEFAULT 0x4b /* OFDM 6M */ 39 #define MT7915_2G_RATE_DEFAULT 0x0 /* CCK 1M */ 40 41 #define MT7915_SKU_RATE_NUM 161 42 #define MT7915_SKU_MAX_DELTA_IDX MT7915_SKU_RATE_NUM 43 #define MT7915_SKU_TABLE_SIZE (MT7915_SKU_RATE_NUM + 1) 44 45 struct mt7915_vif; 46 struct mt7915_sta; 47 struct mt7915_dfs_pulse; 48 struct mt7915_dfs_pattern; 49 50 enum mt7915_txq_id { 51 MT7915_TXQ_FWDL = 16, 52 MT7915_TXQ_MCU_WM, 53 MT7915_TXQ_BAND0, 54 MT7915_TXQ_BAND1, 55 MT7915_TXQ_MCU_WA, 56 }; 57 58 enum mt7915_rxq_id { 59 MT7915_RXQ_BAND0 = 0, 60 MT7915_RXQ_BAND1, 61 MT7915_RXQ_MCU_WM = 0, 62 MT7915_RXQ_MCU_WA, 63 }; 64 65 enum mt7915_ampdu_state { 66 MT7915_AGGR_STOP, 67 MT7915_AGGR_PROGRESS, 68 MT7915_AGGR_START, 69 MT7915_AGGR_OPERATIONAL 70 }; 71 72 struct mt7915_sta_stats { 73 struct rate_info prob_rate; 74 struct rate_info tx_rate; 75 76 unsigned long per; 77 unsigned long changed; 78 unsigned long jiffies; 79 }; 80 81 struct mt7915_sta { 82 struct mt76_wcid wcid; /* must be first */ 83 84 struct mt7915_vif *vif; 85 86 struct list_head poll_list; 87 u32 airtime_ac[8]; 88 89 struct mt7915_sta_stats stats; 90 struct work_struct stats_work; 91 92 spinlock_t ampdu_lock; 93 enum mt7915_ampdu_state ampdu_state[IEEE80211_NUM_TIDS]; 94 }; 95 96 struct mt7915_vif { 97 u16 idx; 98 u8 omac_idx; 99 u8 band_idx; 100 u8 wmm_idx; 101 102 struct mt7915_sta sta; 103 struct mt7915_dev *dev; 104 105 struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS]; 106 }; 107 108 struct mib_stats { 109 u16 ack_fail_cnt; 110 u16 fcs_err_cnt; 111 u16 rts_cnt; 112 u16 rts_retries_cnt; 113 u16 ba_miss_cnt; 114 }; 115 116 struct mt7915_phy { 117 struct mt76_phy *mt76; 118 struct mt7915_dev *dev; 119 120 struct ieee80211_sband_iftype_data iftype[2][NUM_NL80211_IFTYPES]; 121 122 u32 rxfilter; 123 u32 omac_mask; 124 125 u16 noise; 126 u16 chainmask; 127 128 s16 coverage_class; 129 u8 slottime; 130 131 u8 rdd_state; 132 int dfs_state; 133 134 __le32 rx_ampdu_ts; 135 u32 ampdu_ref; 136 137 struct mib_stats mib; 138 139 struct delayed_work mac_work; 140 u8 mac_work_count; 141 }; 142 143 struct mt7915_dev { 144 union { /* must be first */ 145 struct mt76_dev mt76; 146 struct mt76_phy mphy; 147 }; 148 149 struct mt7915_phy phy; 150 151 u16 chainmask; 152 153 struct work_struct init_work; 154 struct work_struct reset_work; 155 wait_queue_head_t reset_wait; 156 u32 reset_state; 157 158 struct list_head sta_poll_list; 159 spinlock_t sta_poll_lock; 160 161 u32 hw_pattern; 162 163 spinlock_t token_lock; 164 struct idr token; 165 166 s8 **rate_power; /* TODO: use mt76_rate_power */ 167 168 bool fw_debug; 169 }; 170 171 enum { 172 HW_BSSID_0 = 0x0, 173 HW_BSSID_1, 174 HW_BSSID_2, 175 HW_BSSID_3, 176 HW_BSSID_MAX, 177 EXT_BSSID_START = 0x10, 178 EXT_BSSID_1, 179 EXT_BSSID_2, 180 EXT_BSSID_3, 181 EXT_BSSID_4, 182 EXT_BSSID_5, 183 EXT_BSSID_6, 184 EXT_BSSID_7, 185 EXT_BSSID_8, 186 EXT_BSSID_9, 187 EXT_BSSID_10, 188 EXT_BSSID_11, 189 EXT_BSSID_12, 190 EXT_BSSID_13, 191 EXT_BSSID_14, 192 EXT_BSSID_15, 193 EXT_BSSID_END 194 }; 195 196 enum { 197 MT_LMAC_AC00, 198 MT_LMAC_AC01, 199 MT_LMAC_AC02, 200 MT_LMAC_AC03, 201 MT_LMAC_ALTX0 = 0x10, 202 MT_LMAC_BMC0, 203 MT_LMAC_BCN0, 204 }; 205 206 enum { 207 MT_RX_SEL0, 208 MT_RX_SEL1, 209 }; 210 211 enum mt7915_rdd_cmd { 212 RDD_STOP, 213 RDD_START, 214 RDD_DET_MODE, 215 RDD_RADAR_EMULATE, 216 RDD_START_TXQ = 20, 217 RDD_CAC_START = 50, 218 RDD_CAC_END, 219 RDD_NORMAL_START, 220 RDD_DISABLE_DFS_CAL, 221 RDD_PULSE_DBG, 222 RDD_READ_PULSE, 223 RDD_RESUME_BF, 224 RDD_IRQ_OFF, 225 }; 226 227 enum { 228 RATE_CTRL_RU_INFO, 229 RATE_CTRL_FIXED_RATE_INFO, 230 RATE_CTRL_DUMP_INFO, 231 RATE_CTRL_MU_INFO, 232 }; 233 234 static inline struct mt7915_phy * 235 mt7915_hw_phy(struct ieee80211_hw *hw) 236 { 237 struct mt76_phy *phy = hw->priv; 238 239 return phy->priv; 240 } 241 242 static inline struct mt7915_dev * 243 mt7915_hw_dev(struct ieee80211_hw *hw) 244 { 245 struct mt76_phy *phy = hw->priv; 246 247 return container_of(phy->dev, struct mt7915_dev, mt76); 248 } 249 250 static inline struct mt7915_phy * 251 mt7915_ext_phy(struct mt7915_dev *dev) 252 { 253 struct mt76_phy *phy = dev->mt76.phy2; 254 255 if (!phy) 256 return NULL; 257 258 return phy->priv; 259 } 260 261 static inline u8 mt7915_lmac_mapping(struct mt7915_dev *dev, u8 ac) 262 { 263 static const u8 lmac_queue_map[] = { 264 [IEEE80211_AC_BK] = MT_LMAC_AC00, 265 [IEEE80211_AC_BE] = MT_LMAC_AC01, 266 [IEEE80211_AC_VI] = MT_LMAC_AC02, 267 [IEEE80211_AC_VO] = MT_LMAC_AC03, 268 }; 269 270 if (WARN_ON_ONCE(ac >= ARRAY_SIZE(lmac_queue_map))) 271 return MT_LMAC_AC01; /* BE */ 272 273 return lmac_queue_map[ac]; 274 } 275 276 static inline void 277 mt7915_set_aggr_state(struct mt7915_sta *msta, u8 tid, 278 enum mt7915_ampdu_state state) 279 { 280 spin_lock_bh(&msta->ampdu_lock); 281 msta->ampdu_state[tid] = state; 282 spin_unlock_bh(&msta->ampdu_lock); 283 } 284 285 extern const struct ieee80211_ops mt7915_ops; 286 extern struct pci_driver mt7915_pci_driver; 287 288 u32 mt7915_reg_map(struct mt7915_dev *dev, u32 addr); 289 290 int mt7915_register_device(struct mt7915_dev *dev); 291 void mt7915_unregister_device(struct mt7915_dev *dev); 292 int mt7915_register_ext_phy(struct mt7915_dev *dev); 293 void mt7915_unregister_ext_phy(struct mt7915_dev *dev); 294 int mt7915_eeprom_init(struct mt7915_dev *dev); 295 u32 mt7915_eeprom_read(struct mt7915_dev *dev, u32 offset); 296 int mt7915_eeprom_get_target_power(struct mt7915_dev *dev, 297 struct ieee80211_channel *chan, 298 u8 chain_idx); 299 void mt7915_eeprom_init_sku(struct mt7915_dev *dev); 300 int mt7915_dma_init(struct mt7915_dev *dev); 301 void mt7915_dma_prefetch(struct mt7915_dev *dev); 302 void mt7915_dma_cleanup(struct mt7915_dev *dev); 303 int mt7915_mcu_init(struct mt7915_dev *dev); 304 int mt7915_mcu_add_dev_info(struct mt7915_dev *dev, 305 struct ieee80211_vif *vif, bool enable); 306 int mt7915_mcu_add_bss_info(struct mt7915_phy *phy, 307 struct ieee80211_vif *vif, int enable); 308 int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif, 309 struct ieee80211_sta *sta, bool enable); 310 int mt7915_mcu_add_sta_adv(struct mt7915_dev *dev, struct ieee80211_vif *vif, 311 struct ieee80211_sta *sta, bool enable); 312 int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev, 313 struct ieee80211_ampdu_params *params, 314 bool add); 315 int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev, 316 struct ieee80211_ampdu_params *params, 317 bool add); 318 int mt7915_mcu_add_key(struct mt7915_dev *dev, struct ieee80211_vif *vif, 319 struct mt7915_sta *msta, struct ieee80211_key_conf *key, 320 enum set_key_cmd cmd); 321 int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 322 int enable); 323 int mt7915_mcu_add_obss_spr(struct mt7915_dev *dev, struct ieee80211_vif *vif, 324 bool enable); 325 int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif, 326 struct ieee80211_sta *sta); 327 int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif, 328 struct ieee80211_sta *sta); 329 int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd); 330 int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif); 331 int mt7915_mcu_set_fixed_rate(struct mt7915_dev *dev, 332 struct ieee80211_sta *sta, u32 rate); 333 int mt7915_mcu_set_eeprom(struct mt7915_dev *dev); 334 int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset); 335 int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band, bool enable, 336 bool hdr_trans); 337 int mt7915_mcu_set_scs(struct mt7915_dev *dev, u8 band, bool enable); 338 int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band); 339 int mt7915_mcu_set_rts_thresh(struct mt7915_phy *phy, u32 val); 340 int mt7915_mcu_set_pm(struct mt7915_dev *dev, int band, int enter); 341 int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable); 342 int mt7915_mcu_set_sku(struct mt7915_phy *phy); 343 int mt7915_mcu_set_txbf_type(struct mt7915_dev *dev); 344 int mt7915_mcu_set_txbf_sounding(struct mt7915_dev *dev); 345 int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val); 346 int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev, 347 const struct mt7915_dfs_pulse *pulse); 348 int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index, 349 const struct mt7915_dfs_pattern *pattern); 350 int mt7915_mcu_get_rate_info(struct mt7915_dev *dev, u32 cmd, u16 wlan_idx); 351 int mt7915_mcu_get_temperature(struct mt7915_dev *dev, int index); 352 int mt7915_mcu_rdd_cmd(struct mt7915_dev *dev, enum mt7915_rdd_cmd cmd, 353 u8 index, u8 rx_sel, u8 val); 354 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 ctrl); 355 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level); 356 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb); 357 void mt7915_mcu_exit(struct mt7915_dev *dev); 358 359 static inline bool is_mt7915(struct mt76_dev *dev) 360 { 361 return mt76_chip(dev) == 0x7915; 362 } 363 364 static inline void mt7915_irq_enable(struct mt7915_dev *dev, u32 mask) 365 { 366 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, 0, mask); 367 } 368 369 static inline void mt7915_irq_disable(struct mt7915_dev *dev, u32 mask) 370 { 371 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0); 372 } 373 374 static inline u32 375 mt7915_reg_map_l1(struct mt7915_dev *dev, u32 addr) 376 { 377 u32 offset = FIELD_GET(MT_HIF_REMAP_L1_OFFSET, addr); 378 u32 base = FIELD_GET(MT_HIF_REMAP_L1_BASE, addr); 379 380 mt76_rmw_field(dev, MT_HIF_REMAP_L1, MT_HIF_REMAP_L1_MASK, base); 381 /* use read to push write */ 382 mt76_rr(dev, MT_HIF_REMAP_L1); 383 384 return MT_HIF_REMAP_BASE_L1 + offset; 385 } 386 387 static inline u32 388 mt7915_l1_rr(struct mt7915_dev *dev, u32 addr) 389 { 390 return mt76_rr(dev, mt7915_reg_map_l1(dev, addr)); 391 } 392 393 static inline void 394 mt7915_l1_wr(struct mt7915_dev *dev, u32 addr, u32 val) 395 { 396 mt76_wr(dev, mt7915_reg_map_l1(dev, addr), val); 397 } 398 399 static inline u32 400 mt7915_l1_rmw(struct mt7915_dev *dev, u32 addr, u32 mask, u32 val) 401 { 402 val |= mt7915_l1_rr(dev, addr) & ~mask; 403 mt7915_l1_wr(dev, addr, val); 404 405 return val; 406 } 407 408 #define mt7915_l1_set(dev, addr, val) mt7915_l1_rmw(dev, addr, 0, val) 409 #define mt7915_l1_clear(dev, addr, val) mt7915_l1_rmw(dev, addr, val, 0) 410 411 static inline u32 412 mt7915_reg_map_l2(struct mt7915_dev *dev, u32 addr) 413 { 414 u32 offset = FIELD_GET(MT_HIF_REMAP_L2_OFFSET, addr); 415 u32 base = FIELD_GET(MT_HIF_REMAP_L2_BASE, addr); 416 417 mt76_rmw_field(dev, MT_HIF_REMAP_L2, MT_HIF_REMAP_L2_MASK, base); 418 /* use read to push write */ 419 mt76_rr(dev, MT_HIF_REMAP_L2); 420 421 return MT_HIF_REMAP_BASE_L2 + offset; 422 } 423 424 static inline u32 425 mt7915_l2_rr(struct mt7915_dev *dev, u32 addr) 426 { 427 return mt76_rr(dev, mt7915_reg_map_l2(dev, addr)); 428 } 429 430 static inline void 431 mt7915_l2_wr(struct mt7915_dev *dev, u32 addr, u32 val) 432 { 433 mt76_wr(dev, mt7915_reg_map_l2(dev, addr), val); 434 } 435 436 static inline u32 437 mt7915_l2_rmw(struct mt7915_dev *dev, u32 addr, u32 mask, u32 val) 438 { 439 val |= mt7915_l2_rr(dev, addr) & ~mask; 440 mt7915_l2_wr(dev, addr, val); 441 442 return val; 443 } 444 445 #define mt7915_l2_set(dev, addr, val) mt7915_l2_rmw(dev, addr, 0, val) 446 #define mt7915_l2_clear(dev, addr, val) mt7915_l2_rmw(dev, addr, val, 0) 447 448 bool mt7915_mac_wtbl_update(struct mt7915_dev *dev, int idx, u32 mask); 449 void mt7915_mac_reset_counters(struct mt7915_phy *phy); 450 void mt7915_mac_cca_stats_reset(struct mt7915_phy *phy); 451 void mt7915_mac_sta_poll(struct mt7915_dev *dev); 452 void mt7915_mac_write_txwi(struct mt7915_dev *dev, __le32 *txwi, 453 struct sk_buff *skb, struct mt76_wcid *wcid, 454 struct ieee80211_key_conf *key, bool beacon); 455 void mt7915_mac_set_timing(struct mt7915_phy *phy); 456 int mt7915_mac_fill_rx(struct mt7915_dev *dev, struct sk_buff *skb); 457 void mt7915_mac_tx_free(struct mt7915_dev *dev, struct sk_buff *skb); 458 int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, 459 struct ieee80211_sta *sta); 460 void mt7915_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 461 struct ieee80211_sta *sta); 462 void mt7915_mac_work(struct work_struct *work); 463 void mt7915_mac_reset_work(struct work_struct *work); 464 void mt7915_mac_sta_stats_work(struct work_struct *work); 465 int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 466 enum mt76_txq_id qid, struct mt76_wcid *wcid, 467 struct ieee80211_sta *sta, 468 struct mt76_tx_info *tx_info); 469 void mt7915_tx_complete_skb(struct mt76_dev *mdev, enum mt76_txq_id qid, 470 struct mt76_queue_entry *e); 471 void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 472 struct sk_buff *skb); 473 void mt7915_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps); 474 void mt7915_stats_work(struct work_struct *work); 475 void mt7915_txp_skb_unmap(struct mt76_dev *dev, 476 struct mt76_txwi_cache *txwi); 477 int mt76_dfs_start_rdd(struct mt7915_dev *dev, bool force); 478 int mt7915_dfs_init_radar_detector(struct mt7915_phy *phy); 479 void mt7915_set_stream_he_caps(struct mt7915_phy *phy); 480 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy); 481 void mt7915_update_channel(struct mt76_dev *mdev); 482 int mt7915_init_debugfs(struct mt7915_dev *dev); 483 #ifdef CONFIG_MAC80211_DEBUGFS 484 void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 485 struct ieee80211_sta *sta, struct dentry *dir); 486 #endif 487 488 #endif 489