1 /* SPDX-License-Identifier: ISC */ 2 /* Copyright (C) 2020 MediaTek Inc. */ 3 4 #ifndef __MT7915_H 5 #define __MT7915_H 6 7 #include <linux/interrupt.h> 8 #include <linux/ktime.h> 9 #include "../mt76_connac.h" 10 #include "regs.h" 11 12 #define MT7915_MAX_INTERFACES 19 13 #define MT7915_MAX_WMM_SETS 4 14 #define MT7915_WTBL_SIZE 288 15 #define MT7916_WTBL_SIZE 544 16 #define MT7915_WTBL_RESERVED (mt7915_wtbl_size(dev) - 1) 17 #define MT7915_WTBL_STA (MT7915_WTBL_RESERVED - \ 18 MT7915_MAX_INTERFACES) 19 20 #define MT7915_WATCHDOG_TIME (HZ / 10) 21 #define MT7915_RESET_TIMEOUT (30 * HZ) 22 23 #define MT7915_TX_RING_SIZE 2048 24 #define MT7915_TX_MCU_RING_SIZE 256 25 #define MT7915_TX_FWDL_RING_SIZE 128 26 27 #define MT7915_RX_RING_SIZE 1536 28 #define MT7915_RX_MCU_RING_SIZE 512 29 30 #define MT7915_FIRMWARE_WA "mediatek/mt7915_wa.bin" 31 #define MT7915_FIRMWARE_WM "mediatek/mt7915_wm.bin" 32 #define MT7915_ROM_PATCH "mediatek/mt7915_rom_patch.bin" 33 34 #define MT7916_FIRMWARE_WA "mediatek/mt7916_wa.bin" 35 #define MT7916_FIRMWARE_WM "mediatek/mt7916_wm.bin" 36 #define MT7916_ROM_PATCH "mediatek/mt7916_rom_patch.bin" 37 38 #define MT7986_FIRMWARE_WA "mediatek/mt7986_wa.bin" 39 #define MT7986_FIRMWARE_WM "mediatek/mt7986_wm.bin" 40 #define MT7986_FIRMWARE_WM_MT7975 "mediatek/mt7986_wm_mt7975.bin" 41 #define MT7986_ROM_PATCH "mediatek/mt7986_rom_patch.bin" 42 #define MT7986_ROM_PATCH_MT7975 "mediatek/mt7986_rom_patch_mt7975.bin" 43 44 #define MT7915_EEPROM_DEFAULT "mediatek/mt7915_eeprom.bin" 45 #define MT7915_EEPROM_DEFAULT_DBDC "mediatek/mt7915_eeprom_dbdc.bin" 46 #define MT7916_EEPROM_DEFAULT "mediatek/mt7916_eeprom.bin" 47 #define MT7986_EEPROM_MT7975_DEFAULT "mediatek/mt7986_eeprom_mt7975.bin" 48 #define MT7986_EEPROM_MT7975_DUAL_DEFAULT "mediatek/mt7986_eeprom_mt7975_dual.bin" 49 #define MT7986_EEPROM_MT7976_DEFAULT "mediatek/mt7986_eeprom_mt7976.bin" 50 #define MT7986_EEPROM_MT7976_DEFAULT_DBDC "mediatek/mt7986_eeprom_mt7976_dbdc.bin" 51 #define MT7986_EEPROM_MT7976_DUAL_DEFAULT "mediatek/mt7986_eeprom_mt7976_dual.bin" 52 53 #define MT7915_EEPROM_SIZE 3584 54 #define MT7916_EEPROM_SIZE 4096 55 56 #define MT7915_EEPROM_BLOCK_SIZE 16 57 #define MT7915_TOKEN_SIZE 8192 58 59 #define MT7915_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */ 60 #define MT7915_CFEND_RATE_11B 0x03 /* 11B LP, 11M */ 61 62 #define MT7915_THERMAL_THROTTLE_MAX 100 63 #define MT7915_CDEV_THROTTLE_MAX 99 64 65 #define MT7915_SKU_RATE_NUM 161 66 67 #define MT7915_MAX_TWT_AGRT 16 68 #define MT7915_MAX_STA_TWT_AGRT 8 69 #define MT7915_MIN_TWT_DUR 64 70 #define MT7915_MAX_QUEUE (__MT_RXQ_MAX + __MT_MCUQ_MAX + 2) 71 72 struct mt7915_vif; 73 struct mt7915_sta; 74 struct mt7915_dfs_pulse; 75 struct mt7915_dfs_pattern; 76 77 enum mt7915_txq_id { 78 MT7915_TXQ_FWDL = 16, 79 MT7915_TXQ_MCU_WM, 80 MT7915_TXQ_BAND0, 81 MT7915_TXQ_BAND1, 82 MT7915_TXQ_MCU_WA, 83 }; 84 85 enum mt7915_rxq_id { 86 MT7915_RXQ_BAND0 = 0, 87 MT7915_RXQ_BAND1, 88 MT7915_RXQ_MCU_WM = 0, 89 MT7915_RXQ_MCU_WA, 90 MT7915_RXQ_MCU_WA_EXT, 91 }; 92 93 enum mt7916_rxq_id { 94 MT7916_RXQ_MCU_WM = 0, 95 MT7916_RXQ_MCU_WA, 96 MT7916_RXQ_MCU_WA_MAIN, 97 MT7916_RXQ_MCU_WA_EXT, 98 MT7916_RXQ_BAND0, 99 MT7916_RXQ_BAND1, 100 }; 101 102 struct mt7915_twt_flow { 103 struct list_head list; 104 u64 start_tsf; 105 u64 tsf; 106 u32 duration; 107 u16 wcid; 108 __le16 mantissa; 109 u8 exp; 110 u8 table_id; 111 u8 id; 112 u8 protection:1; 113 u8 flowtype:1; 114 u8 trigger:1; 115 u8 sched:1; 116 }; 117 118 struct mt7915_sta { 119 struct mt76_wcid wcid; /* must be first */ 120 121 struct mt7915_vif *vif; 122 123 struct list_head poll_list; 124 struct list_head rc_list; 125 u32 airtime_ac[8]; 126 127 unsigned long changed; 128 unsigned long jiffies; 129 unsigned long ampdu_state; 130 131 struct mt76_sta_stats stats; 132 133 struct mt76_connac_sta_key_conf bip; 134 135 struct { 136 u8 flowid_mask; 137 struct mt7915_twt_flow flow[MT7915_MAX_STA_TWT_AGRT]; 138 } twt; 139 }; 140 141 struct mt7915_vif_cap { 142 bool ht_ldpc:1; 143 bool vht_ldpc:1; 144 bool he_ldpc:1; 145 bool vht_su_ebfer:1; 146 bool vht_su_ebfee:1; 147 bool vht_mu_ebfer:1; 148 bool vht_mu_ebfee:1; 149 bool he_su_ebfer:1; 150 bool he_su_ebfee:1; 151 bool he_mu_ebfer:1; 152 }; 153 154 struct mt7915_vif { 155 struct mt76_vif mt76; /* must be first */ 156 157 struct mt7915_vif_cap cap; 158 struct mt7915_sta sta; 159 struct mt7915_phy *phy; 160 161 struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS]; 162 struct cfg80211_bitrate_mask bitrate_mask; 163 }; 164 165 /* per-phy stats. */ 166 struct mib_stats { 167 u32 ack_fail_cnt; 168 u32 fcs_err_cnt; 169 u32 rts_cnt; 170 u32 rts_retries_cnt; 171 u32 ba_miss_cnt; 172 u32 tx_bf_cnt; 173 u32 tx_mu_mpdu_cnt; 174 u32 tx_mu_acked_mpdu_cnt; 175 u32 tx_su_acked_mpdu_cnt; 176 u32 tx_bf_ibf_ppdu_cnt; 177 u32 tx_bf_ebf_ppdu_cnt; 178 179 u32 tx_bf_rx_fb_all_cnt; 180 u32 tx_bf_rx_fb_he_cnt; 181 u32 tx_bf_rx_fb_vht_cnt; 182 u32 tx_bf_rx_fb_ht_cnt; 183 184 u32 tx_bf_rx_fb_bw; /* value of last sample, not cumulative */ 185 u32 tx_bf_rx_fb_nc_cnt; 186 u32 tx_bf_rx_fb_nr_cnt; 187 u32 tx_bf_fb_cpl_cnt; 188 u32 tx_bf_fb_trig_cnt; 189 190 u32 tx_ampdu_cnt; 191 u32 tx_stop_q_empty_cnt; 192 u32 tx_mpdu_attempts_cnt; 193 u32 tx_mpdu_success_cnt; 194 u32 tx_pkt_ebf_cnt; 195 u32 tx_pkt_ibf_cnt; 196 197 u32 tx_rwp_fail_cnt; 198 u32 tx_rwp_need_cnt; 199 200 /* rx stats */ 201 u32 rx_fifo_full_cnt; 202 u32 channel_idle_cnt; 203 u32 rx_vector_mismatch_cnt; 204 u32 rx_delimiter_fail_cnt; 205 u32 rx_len_mismatch_cnt; 206 u32 rx_mpdu_cnt; 207 u32 rx_ampdu_cnt; 208 u32 rx_ampdu_bytes_cnt; 209 u32 rx_ampdu_valid_subframe_cnt; 210 u32 rx_ampdu_valid_subframe_bytes_cnt; 211 u32 rx_pfdrop_cnt; 212 u32 rx_vec_queue_overflow_drop_cnt; 213 u32 rx_ba_cnt; 214 215 u32 tx_amsdu[8]; 216 u32 tx_amsdu_cnt; 217 }; 218 219 struct mt7915_hif { 220 struct list_head list; 221 222 struct device *dev; 223 void __iomem *regs; 224 int irq; 225 }; 226 227 struct mt7915_phy { 228 struct mt76_phy *mt76; 229 struct mt7915_dev *dev; 230 231 struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 232 233 struct ieee80211_vif *monitor_vif; 234 235 struct thermal_cooling_device *cdev; 236 u8 cdev_state; 237 u8 throttle_state; 238 u32 throttle_temp[2]; /* 0: critical high, 1: maximum */ 239 240 u32 rxfilter; 241 u64 omac_mask; 242 u8 band_idx; 243 244 u16 noise; 245 246 s16 coverage_class; 247 u8 slottime; 248 249 u8 rdd_state; 250 251 u32 trb_ts; 252 253 u32 rx_ampdu_ts; 254 u32 ampdu_ref; 255 256 struct mib_stats mib; 257 struct mt76_channel_state state_ts; 258 259 #ifdef CONFIG_NL80211_TESTMODE 260 struct { 261 u32 *reg_backup; 262 263 s32 last_freq_offset; 264 u8 last_rcpi[4]; 265 s8 last_ib_rssi[4]; 266 s8 last_wb_rssi[4]; 267 u8 last_snr; 268 269 u8 spe_idx; 270 } test; 271 #endif 272 }; 273 274 struct mt7915_dev { 275 union { /* must be first */ 276 struct mt76_dev mt76; 277 struct mt76_phy mphy; 278 }; 279 280 struct mt7915_hif *hif2; 281 struct mt7915_reg_desc reg; 282 u8 q_id[MT7915_MAX_QUEUE]; 283 u32 q_int_mask[MT7915_MAX_QUEUE]; 284 u32 wfdma_mask; 285 286 const struct mt76_bus_ops *bus_ops; 287 struct tasklet_struct irq_tasklet; 288 struct mt7915_phy phy; 289 290 /* monitor rx chain configured channel */ 291 struct cfg80211_chan_def rdd2_chandef; 292 struct mt7915_phy *rdd2_phy; 293 294 u16 chainmask; 295 u16 chainshift; 296 u32 hif_idx; 297 298 struct work_struct init_work; 299 struct work_struct rc_work; 300 struct work_struct reset_work; 301 wait_queue_head_t reset_wait; 302 u32 reset_state; 303 304 struct list_head sta_rc_list; 305 struct list_head sta_poll_list; 306 struct list_head twt_list; 307 spinlock_t sta_poll_lock; 308 309 u32 hw_pattern; 310 311 bool dbdc_support; 312 bool flash_mode; 313 bool muru_debug; 314 bool ibf; 315 316 struct dentry *debugfs_dir; 317 struct rchan *relay_fwlog; 318 319 void *cal; 320 321 struct { 322 u8 debug_wm; 323 u8 debug_wa; 324 u8 debug_bin; 325 } fw; 326 327 struct { 328 u16 table_mask; 329 u8 n_agrt; 330 } twt; 331 332 struct reset_control *rstc; 333 void __iomem *dcm; 334 void __iomem *sku; 335 }; 336 337 enum { 338 WFDMA0 = 0x0, 339 WFDMA1, 340 WFDMA_EXT, 341 __MT_WFDMA_MAX, 342 }; 343 344 enum { 345 MT_CTX0, 346 MT_HIF0 = 0x0, 347 348 MT_LMAC_AC00 = 0x0, 349 MT_LMAC_AC01, 350 MT_LMAC_AC02, 351 MT_LMAC_AC03, 352 MT_LMAC_ALTX0 = 0x10, 353 MT_LMAC_BMC0, 354 MT_LMAC_BCN0, 355 MT_LMAC_PSMP0, 356 }; 357 358 enum { 359 MT_RX_SEL0, 360 MT_RX_SEL1, 361 MT_RX_SEL2, /* monitor chain */ 362 }; 363 364 enum mt7915_rdd_cmd { 365 RDD_STOP, 366 RDD_START, 367 RDD_DET_MODE, 368 RDD_RADAR_EMULATE, 369 RDD_START_TXQ = 20, 370 RDD_CAC_START = 50, 371 RDD_CAC_END, 372 RDD_NORMAL_START, 373 RDD_DISABLE_DFS_CAL, 374 RDD_PULSE_DBG, 375 RDD_READ_PULSE, 376 RDD_RESUME_BF, 377 RDD_IRQ_OFF, 378 }; 379 380 static inline struct mt7915_phy * 381 mt7915_hw_phy(struct ieee80211_hw *hw) 382 { 383 struct mt76_phy *phy = hw->priv; 384 385 return phy->priv; 386 } 387 388 static inline struct mt7915_dev * 389 mt7915_hw_dev(struct ieee80211_hw *hw) 390 { 391 struct mt76_phy *phy = hw->priv; 392 393 return container_of(phy->dev, struct mt7915_dev, mt76); 394 } 395 396 static inline struct mt7915_phy * 397 mt7915_ext_phy(struct mt7915_dev *dev) 398 { 399 struct mt76_phy *phy = dev->mt76.phy2; 400 401 if (!phy) 402 return NULL; 403 404 return phy->priv; 405 } 406 407 static inline u32 mt7915_check_adie(struct mt7915_dev *dev, bool sku) 408 { 409 u32 mask = sku ? MT_CONNINFRA_SKU_MASK : MT_ADIE_TYPE_MASK; 410 411 if (!is_mt7986(&dev->mt76)) 412 return 0; 413 414 return mt76_rr(dev, MT_CONNINFRA_SKU_DEC_ADDR) & mask; 415 } 416 417 extern const struct ieee80211_ops mt7915_ops; 418 extern const struct mt76_testmode_ops mt7915_testmode_ops; 419 extern struct pci_driver mt7915_pci_driver; 420 extern struct pci_driver mt7915_hif_driver; 421 extern struct platform_driver mt7986_wmac_driver; 422 423 #ifdef CONFIG_MT7986_WMAC 424 int mt7986_wmac_enable(struct mt7915_dev *dev); 425 void mt7986_wmac_disable(struct mt7915_dev *dev); 426 #else 427 static inline int mt7986_wmac_enable(struct mt7915_dev *dev) 428 { 429 return 0; 430 } 431 432 static inline void mt7986_wmac_disable(struct mt7915_dev *dev) 433 { 434 } 435 #endif 436 struct mt7915_dev *mt7915_mmio_probe(struct device *pdev, 437 void __iomem *mem_base, u32 device_id); 438 void mt7915_wfsys_reset(struct mt7915_dev *dev); 439 irqreturn_t mt7915_irq_handler(int irq, void *dev_instance); 440 u64 __mt7915_get_tsf(struct ieee80211_hw *hw, struct mt7915_vif *mvif); 441 u32 mt7915_wed_init_buf(void *ptr, dma_addr_t phys, int token_id); 442 443 int mt7915_register_device(struct mt7915_dev *dev); 444 void mt7915_unregister_device(struct mt7915_dev *dev); 445 int mt7915_eeprom_init(struct mt7915_dev *dev); 446 void mt7915_eeprom_parse_hw_cap(struct mt7915_dev *dev, 447 struct mt7915_phy *phy); 448 int mt7915_eeprom_get_target_power(struct mt7915_dev *dev, 449 struct ieee80211_channel *chan, 450 u8 chain_idx); 451 s8 mt7915_eeprom_get_power_delta(struct mt7915_dev *dev, int band); 452 int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2); 453 void mt7915_dma_prefetch(struct mt7915_dev *dev); 454 void mt7915_dma_cleanup(struct mt7915_dev *dev); 455 int mt7915_mcu_init(struct mt7915_dev *dev); 456 int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev, 457 struct mt7915_vif *mvif, 458 struct mt7915_twt_flow *flow, 459 int cmd); 460 int mt7915_mcu_add_dev_info(struct mt7915_phy *phy, 461 struct ieee80211_vif *vif, bool enable); 462 int mt7915_mcu_add_bss_info(struct mt7915_phy *phy, 463 struct ieee80211_vif *vif, int enable); 464 int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif, 465 struct ieee80211_sta *sta, bool enable); 466 int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev, 467 struct ieee80211_ampdu_params *params, 468 bool add); 469 int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev, 470 struct ieee80211_ampdu_params *params, 471 bool add); 472 int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif, 473 struct cfg80211_he_bss_color *he_bss_color); 474 int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 475 int enable, u32 changed); 476 int mt7915_mcu_add_obss_spr(struct mt7915_dev *dev, struct ieee80211_vif *vif, 477 bool enable); 478 int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif, 479 struct ieee80211_sta *sta, bool changed); 480 int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif, 481 struct ieee80211_sta *sta); 482 int mt7915_set_channel(struct mt7915_phy *phy); 483 int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd); 484 int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif); 485 int mt7915_mcu_update_edca(struct mt7915_dev *dev, void *req); 486 int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev, 487 struct ieee80211_vif *vif, 488 struct ieee80211_sta *sta, 489 void *data, u32 field); 490 int mt7915_mcu_set_eeprom(struct mt7915_dev *dev); 491 int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset); 492 int mt7915_mcu_get_eeprom_free_block(struct mt7915_dev *dev, u8 *block_num); 493 int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band, bool enable, 494 bool hdr_trans); 495 int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode, 496 u8 en); 497 int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band); 498 int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable); 499 int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy); 500 int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len); 501 int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action); 502 int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val); 503 int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev, 504 const struct mt7915_dfs_pulse *pulse); 505 int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index, 506 const struct mt7915_dfs_pattern *pattern); 507 int mt7915_mcu_set_muru_ctrl(struct mt7915_dev *dev, u32 cmd, u32 val); 508 int mt7915_mcu_apply_group_cal(struct mt7915_dev *dev); 509 int mt7915_mcu_apply_tx_dpd(struct mt7915_phy *phy); 510 int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch); 511 int mt7915_mcu_get_temperature(struct mt7915_phy *phy); 512 int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state); 513 int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif, 514 struct ieee80211_sta *sta, struct rate_info *rate); 515 int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy, 516 struct cfg80211_chan_def *chandef); 517 int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set); 518 int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3); 519 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl); 520 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level); 521 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb); 522 void mt7915_mcu_exit(struct mt7915_dev *dev); 523 524 static inline u16 mt7915_wtbl_size(struct mt7915_dev *dev) 525 { 526 return is_mt7915(&dev->mt76) ? MT7915_WTBL_SIZE : MT7916_WTBL_SIZE; 527 } 528 529 static inline u16 mt7915_eeprom_size(struct mt7915_dev *dev) 530 { 531 return is_mt7915(&dev->mt76) ? MT7915_EEPROM_SIZE : MT7916_EEPROM_SIZE; 532 } 533 534 void mt7915_dual_hif_set_irq_mask(struct mt7915_dev *dev, bool write_reg, 535 u32 clear, u32 set); 536 537 static inline void mt7915_irq_enable(struct mt7915_dev *dev, u32 mask) 538 { 539 if (dev->hif2) 540 mt7915_dual_hif_set_irq_mask(dev, false, 0, mask); 541 else 542 mt76_set_irq_mask(&dev->mt76, 0, 0, mask); 543 544 tasklet_schedule(&dev->irq_tasklet); 545 } 546 547 static inline void mt7915_irq_disable(struct mt7915_dev *dev, u32 mask) 548 { 549 if (dev->hif2) 550 mt7915_dual_hif_set_irq_mask(dev, true, mask, 0); 551 else 552 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0); 553 } 554 555 u32 mt7915_mac_wtbl_lmac_addr(struct mt7915_dev *dev, u16 wcid, u8 dw); 556 bool mt7915_mac_wtbl_update(struct mt7915_dev *dev, int idx, u32 mask); 557 void mt7915_mac_reset_counters(struct mt7915_phy *phy); 558 void mt7915_mac_cca_stats_reset(struct mt7915_phy *phy); 559 void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool ext_phy); 560 void mt7915_mac_write_txwi(struct mt7915_dev *dev, __le32 *txwi, 561 struct sk_buff *skb, struct mt76_wcid *wcid, int pid, 562 struct ieee80211_key_conf *key, u32 changed); 563 void mt7915_mac_set_timing(struct mt7915_phy *phy); 564 int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, 565 struct ieee80211_sta *sta); 566 void mt7915_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 567 struct ieee80211_sta *sta); 568 void mt7915_mac_work(struct work_struct *work); 569 void mt7915_mac_reset_work(struct work_struct *work); 570 void mt7915_mac_sta_rc_work(struct work_struct *work); 571 void mt7915_mac_update_stats(struct mt7915_phy *phy); 572 void mt7915_mac_twt_teardown_flow(struct mt7915_dev *dev, 573 struct mt7915_sta *msta, 574 u8 flowid); 575 void mt7915_mac_add_twt_setup(struct ieee80211_hw *hw, 576 struct ieee80211_sta *sta, 577 struct ieee80211_twt_setup *twt); 578 int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 579 enum mt76_txq_id qid, struct mt76_wcid *wcid, 580 struct ieee80211_sta *sta, 581 struct mt76_tx_info *tx_info); 582 void mt7915_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e); 583 void mt7915_tx_token_put(struct mt7915_dev *dev); 584 void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 585 struct sk_buff *skb); 586 bool mt7915_rx_check(struct mt76_dev *mdev, void *data, int len); 587 void mt7915_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps); 588 void mt7915_stats_work(struct work_struct *work); 589 int mt76_dfs_start_rdd(struct mt7915_dev *dev, bool force); 590 int mt7915_dfs_init_radar_detector(struct mt7915_phy *phy); 591 void mt7915_set_stream_he_caps(struct mt7915_phy *phy); 592 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy); 593 void mt7915_update_channel(struct mt76_phy *mphy); 594 int mt7915_mcu_muru_debug_set(struct mt7915_dev *dev, bool enable); 595 int mt7915_mcu_muru_debug_get(struct mt7915_phy *phy, void *ms); 596 int mt7915_init_debugfs(struct mt7915_phy *phy); 597 void mt7915_debugfs_rx_fw_monitor(struct mt7915_dev *dev, const void *data, int len); 598 bool mt7915_debugfs_rx_log(struct mt7915_dev *dev, const void *data, int len); 599 #ifdef CONFIG_MAC80211_DEBUGFS 600 void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 601 struct ieee80211_sta *sta, struct dentry *dir); 602 #endif 603 604 #endif 605