1 /* SPDX-License-Identifier: ISC */
2 /* Copyright (C) 2020 MediaTek Inc. */
3 
4 #ifndef __MT7915_MAC_H
5 #define __MT7915_MAC_H
6 
7 #include "../mt76_connac2_mac.h"
8 
9 #define MT_CT_PARSE_LEN			72
10 #define MT_CT_DMA_BUF_NUM		2
11 
12 #define MT_RXD0_LENGTH			GENMASK(15, 0)
13 #define MT_RXD0_PKT_TYPE		GENMASK(31, 27)
14 
15 #define MT_RXD0_NORMAL_ETH_TYPE_OFS	GENMASK(22, 16)
16 #define MT_RXD0_NORMAL_IP_SUM		BIT(23)
17 #define MT_RXD0_NORMAL_UDP_TCP_SUM	BIT(24)
18 
19 enum rx_pkt_type {
20 	PKT_TYPE_TXS,
21 	PKT_TYPE_TXRXV,
22 	PKT_TYPE_NORMAL,
23 	PKT_TYPE_RX_DUP_RFB,
24 	PKT_TYPE_RX_TMR,
25 	PKT_TYPE_RETRIEVE,
26 	PKT_TYPE_TXRX_NOTIFY,
27 	PKT_TYPE_RX_EVENT,
28 	PKT_TYPE_RX_FW_MONITOR = 0x0c,
29 	PKT_TYPE_TXRX_NOTIFY_V0 = 0x18,
30 };
31 
32 #define MT_TX_FREE_VER			GENMASK(18, 16)
33 #define MT_TX_FREE_MSDU_CNT		GENMASK(9, 0)
34 #define MT_TX_FREE_MSDU_CNT_V0	GENMASK(6, 0)
35 #define MT_TX_FREE_WLAN_ID		GENMASK(23, 14)
36 #define MT_TX_FREE_LATENCY		GENMASK(12, 0)
37 /* 0: success, others: dropped */
38 #define MT_TX_FREE_MSDU_ID		GENMASK(30, 16)
39 #define MT_TX_FREE_PAIR			BIT(31)
40 #define MT_TX_FREE_MPDU_HEADER		BIT(30)
41 #define MT_TX_FREE_MSDU_ID_V3		GENMASK(14, 0)
42 
43 /* will support this field in further revision */
44 #define MT_TX_FREE_RATE			GENMASK(13, 0)
45 
46 #define MT_TXS5_F0_FINAL_MPDU		BIT(31)
47 #define MT_TXS5_F0_QOS			BIT(30)
48 #define MT_TXS5_F0_TX_COUNT		GENMASK(29, 25)
49 #define MT_TXS5_F0_FRONT_TIME		GENMASK(24, 0)
50 #define MT_TXS5_F1_MPDU_TX_COUNT	GENMASK(31, 24)
51 #define MT_TXS5_F1_MPDU_TX_BYTES	GENMASK(23, 0)
52 
53 #define MT_TXS6_F0_NOISE_3		GENMASK(31, 24)
54 #define MT_TXS6_F0_NOISE_2		GENMASK(23, 16)
55 #define MT_TXS6_F0_NOISE_1		GENMASK(15, 8)
56 #define MT_TXS6_F0_NOISE_0		GENMASK(7, 0)
57 #define MT_TXS6_F1_MPDU_FAIL_COUNT	GENMASK(31, 24)
58 #define MT_TXS6_F1_MPDU_FAIL_BYTES	GENMASK(23, 0)
59 
60 #define MT_TXS7_F0_RCPI_3		GENMASK(31, 24)
61 #define MT_TXS7_F0_RCPI_2		GENMASK(23, 16)
62 #define MT_TXS7_F0_RCPI_1		GENMASK(15, 8)
63 #define MT_TXS7_F0_RCPI_0		GENMASK(7, 0)
64 #define MT_TXS7_F1_MPDU_RETRY_COUNT	GENMASK(31, 24)
65 #define MT_TXS7_F1_MPDU_RETRY_BYTES	GENMASK(23, 0)
66 
67 struct mt7915_dfs_pulse {
68 	u32 max_width;		/* us */
69 	int max_pwr;		/* dbm */
70 	int min_pwr;		/* dbm */
71 	u32 min_stgr_pri;	/* us */
72 	u32 max_stgr_pri;	/* us */
73 	u32 min_cr_pri;		/* us */
74 	u32 max_cr_pri;		/* us */
75 };
76 
77 struct mt7915_dfs_pattern {
78 	u8 enb;
79 	u8 stgr;
80 	u8 min_crpn;
81 	u8 max_crpn;
82 	u8 min_crpr;
83 	u8 min_pw;
84 	u32 min_pri;
85 	u32 max_pri;
86 	u8 max_pw;
87 	u8 min_crbn;
88 	u8 max_crbn;
89 	u8 min_stgpn;
90 	u8 max_stgpn;
91 	u8 min_stgpr;
92 	u8 rsv[2];
93 	u32 min_stgpr_diff;
94 } __packed;
95 
96 struct mt7915_dfs_radar_spec {
97 	struct mt7915_dfs_pulse pulse_th;
98 	struct mt7915_dfs_pattern radar_pattern[16];
99 };
100 
101 #endif
102