1 // SPDX-License-Identifier: ISC
2 /*
3  * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
4  */
5 
6 #include <linux/module.h>
7 #include <linux/of.h>
8 #include <asm/unaligned.h>
9 #include "mt76x2.h"
10 #include "eeprom.h"
11 
12 #define EE_FIELD(_name, _value) [MT_EE_##_name] = (_value) | 1
13 
14 static int
15 mt76x2_eeprom_get_macaddr(struct mt76x02_dev *dev)
16 {
17 	void *src = dev->mt76.eeprom.data + MT_EE_MAC_ADDR;
18 
19 	memcpy(dev->mphy.macaddr, src, ETH_ALEN);
20 	return 0;
21 }
22 
23 static bool
24 mt76x2_has_cal_free_data(struct mt76x02_dev *dev, u8 *efuse)
25 {
26 	u16 *efuse_w = (u16 *)efuse;
27 
28 	if (efuse_w[MT_EE_NIC_CONF_0] != 0)
29 		return false;
30 
31 	if (efuse_w[MT_EE_XTAL_TRIM_1] == 0xffff)
32 		return false;
33 
34 	if (efuse_w[MT_EE_TX_POWER_DELTA_BW40] != 0)
35 		return false;
36 
37 	if (efuse_w[MT_EE_TX_POWER_0_START_2G] == 0xffff)
38 		return false;
39 
40 	if (efuse_w[MT_EE_TX_POWER_0_GRP3_TX_POWER_DELTA] != 0)
41 		return false;
42 
43 	if (efuse_w[MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE] == 0xffff)
44 		return false;
45 
46 	return true;
47 }
48 
49 static void
50 mt76x2_apply_cal_free_data(struct mt76x02_dev *dev, u8 *efuse)
51 {
52 #define GROUP_5G(_id)							   \
53 	MT_EE_TX_POWER_0_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id),	   \
54 	MT_EE_TX_POWER_0_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id) + 1, \
55 	MT_EE_TX_POWER_1_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id),	   \
56 	MT_EE_TX_POWER_1_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id) + 1
57 
58 	static const u8 cal_free_bytes[] = {
59 		MT_EE_XTAL_TRIM_1,
60 		MT_EE_TX_POWER_EXT_PA_5G + 1,
61 		MT_EE_TX_POWER_0_START_2G,
62 		MT_EE_TX_POWER_0_START_2G + 1,
63 		MT_EE_TX_POWER_1_START_2G,
64 		MT_EE_TX_POWER_1_START_2G + 1,
65 		GROUP_5G(0),
66 		GROUP_5G(1),
67 		GROUP_5G(2),
68 		GROUP_5G(3),
69 		GROUP_5G(4),
70 		GROUP_5G(5),
71 		MT_EE_RF_2G_TSSI_OFF_TXPOWER,
72 		MT_EE_RF_2G_RX_HIGH_GAIN + 1,
73 		MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN,
74 		MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN + 1,
75 		MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN,
76 		MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN + 1,
77 		MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN,
78 		MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN + 1,
79 	};
80 	struct device_node *np = dev->mt76.dev->of_node;
81 	u8 *eeprom = dev->mt76.eeprom.data;
82 	u8 prev_grp0[4] = {
83 		eeprom[MT_EE_TX_POWER_0_START_5G],
84 		eeprom[MT_EE_TX_POWER_0_START_5G + 1],
85 		eeprom[MT_EE_TX_POWER_1_START_5G],
86 		eeprom[MT_EE_TX_POWER_1_START_5G + 1]
87 	};
88 	u16 val;
89 	int i;
90 
91 	if (!np || !of_property_read_bool(np, "mediatek,eeprom-merge-otp"))
92 		return;
93 
94 	if (!mt76x2_has_cal_free_data(dev, efuse))
95 		return;
96 
97 	for (i = 0; i < ARRAY_SIZE(cal_free_bytes); i++) {
98 		int offset = cal_free_bytes[i];
99 
100 		eeprom[offset] = efuse[offset];
101 	}
102 
103 	if (!(efuse[MT_EE_TX_POWER_0_START_5G] |
104 	      efuse[MT_EE_TX_POWER_0_START_5G + 1]))
105 		memcpy(eeprom + MT_EE_TX_POWER_0_START_5G, prev_grp0, 2);
106 	if (!(efuse[MT_EE_TX_POWER_1_START_5G] |
107 	      efuse[MT_EE_TX_POWER_1_START_5G + 1]))
108 		memcpy(eeprom + MT_EE_TX_POWER_1_START_5G, prev_grp0 + 2, 2);
109 
110 	val = get_unaligned_le16(efuse + MT_EE_BT_RCAL_RESULT);
111 	if (val != 0xffff)
112 		eeprom[MT_EE_BT_RCAL_RESULT] = val & 0xff;
113 
114 	val = get_unaligned_le16(efuse + MT_EE_BT_VCDL_CALIBRATION);
115 	if (val != 0xffff)
116 		eeprom[MT_EE_BT_VCDL_CALIBRATION + 1] = val >> 8;
117 
118 	val = get_unaligned_le16(efuse + MT_EE_BT_PMUCFG);
119 	if (val != 0xffff)
120 		eeprom[MT_EE_BT_PMUCFG] = val & 0xff;
121 }
122 
123 static int mt76x2_check_eeprom(struct mt76x02_dev *dev)
124 {
125 	u16 val = get_unaligned_le16(dev->mt76.eeprom.data);
126 
127 	if (!val)
128 		val = get_unaligned_le16(dev->mt76.eeprom.data + MT_EE_PCI_ID);
129 
130 	switch (val) {
131 	case 0x7662:
132 	case 0x7612:
133 		return 0;
134 	default:
135 		dev_err(dev->mt76.dev, "EEPROM data check failed: %04x\n", val);
136 		return -EINVAL;
137 	}
138 }
139 
140 static int
141 mt76x2_eeprom_load(struct mt76x02_dev *dev)
142 {
143 	void *efuse;
144 	bool found;
145 	int ret;
146 
147 	ret = mt76_eeprom_init(&dev->mt76, MT7662_EEPROM_SIZE);
148 	if (ret < 0)
149 		return ret;
150 
151 	found = ret;
152 	if (found)
153 		found = !mt76x2_check_eeprom(dev);
154 
155 	dev->mt76.otp.data = devm_kzalloc(dev->mt76.dev, MT7662_EEPROM_SIZE,
156 					  GFP_KERNEL);
157 	dev->mt76.otp.size = MT7662_EEPROM_SIZE;
158 	if (!dev->mt76.otp.data)
159 		return -ENOMEM;
160 
161 	efuse = dev->mt76.otp.data;
162 
163 	if (mt76x02_get_efuse_data(dev, 0, efuse, MT7662_EEPROM_SIZE,
164 				   MT_EE_READ))
165 		goto out;
166 
167 	if (found) {
168 		mt76x2_apply_cal_free_data(dev, efuse);
169 	} else {
170 		/* FIXME: check if efuse data is complete */
171 		found = true;
172 		memcpy(dev->mt76.eeprom.data, efuse, MT7662_EEPROM_SIZE);
173 	}
174 
175 out:
176 	if (!found)
177 		return -ENOENT;
178 
179 	return 0;
180 }
181 
182 static void
183 mt76x2_set_rx_gain_group(struct mt76x02_dev *dev, u8 val)
184 {
185 	s8 *dest = dev->cal.rx.high_gain;
186 
187 	if (!mt76x02_field_valid(val)) {
188 		dest[0] = 0;
189 		dest[1] = 0;
190 		return;
191 	}
192 
193 	dest[0] = mt76x02_sign_extend(val, 4);
194 	dest[1] = mt76x02_sign_extend(val >> 4, 4);
195 }
196 
197 static void
198 mt76x2_set_rssi_offset(struct mt76x02_dev *dev, int chain, u8 val)
199 {
200 	s8 *dest = dev->cal.rx.rssi_offset;
201 
202 	if (!mt76x02_field_valid(val)) {
203 		dest[chain] = 0;
204 		return;
205 	}
206 
207 	dest[chain] = mt76x02_sign_extend_optional(val, 7);
208 }
209 
210 static enum mt76x2_cal_channel_group
211 mt76x2_get_cal_channel_group(int channel)
212 {
213 	if (channel >= 184 && channel <= 196)
214 		return MT_CH_5G_JAPAN;
215 	if (channel <= 48)
216 		return MT_CH_5G_UNII_1;
217 	if (channel <= 64)
218 		return MT_CH_5G_UNII_2;
219 	if (channel <= 114)
220 		return MT_CH_5G_UNII_2E_1;
221 	if (channel <= 144)
222 		return MT_CH_5G_UNII_2E_2;
223 	return MT_CH_5G_UNII_3;
224 }
225 
226 static u8
227 mt76x2_get_5g_rx_gain(struct mt76x02_dev *dev, u8 channel)
228 {
229 	enum mt76x2_cal_channel_group group;
230 
231 	group = mt76x2_get_cal_channel_group(channel);
232 	switch (group) {
233 	case MT_CH_5G_JAPAN:
234 		return mt76x02_eeprom_get(dev,
235 					  MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN);
236 	case MT_CH_5G_UNII_1:
237 		return mt76x02_eeprom_get(dev,
238 					  MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN) >> 8;
239 	case MT_CH_5G_UNII_2:
240 		return mt76x02_eeprom_get(dev,
241 					  MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN);
242 	case MT_CH_5G_UNII_2E_1:
243 		return mt76x02_eeprom_get(dev,
244 					  MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN) >> 8;
245 	case MT_CH_5G_UNII_2E_2:
246 		return mt76x02_eeprom_get(dev,
247 					  MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN);
248 	default:
249 		return mt76x02_eeprom_get(dev,
250 					  MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN) >> 8;
251 	}
252 }
253 
254 void mt76x2_read_rx_gain(struct mt76x02_dev *dev)
255 {
256 	struct ieee80211_channel *chan = dev->mphy.chandef.chan;
257 	int channel = chan->hw_value;
258 	s8 lna_5g[3], lna_2g;
259 	bool use_lna;
260 	u8 lna = 0;
261 	u16 val;
262 
263 	if (chan->band == NL80211_BAND_2GHZ)
264 		val = mt76x02_eeprom_get(dev, MT_EE_RF_2G_RX_HIGH_GAIN) >> 8;
265 	else
266 		val = mt76x2_get_5g_rx_gain(dev, channel);
267 
268 	mt76x2_set_rx_gain_group(dev, val);
269 
270 	mt76x02_get_rx_gain(dev, chan->band, &val, &lna_2g, lna_5g);
271 	mt76x2_set_rssi_offset(dev, 0, val);
272 	mt76x2_set_rssi_offset(dev, 1, val >> 8);
273 
274 	dev->cal.rx.mcu_gain =  (lna_2g & 0xff);
275 	dev->cal.rx.mcu_gain |= (lna_5g[0] & 0xff) << 8;
276 	dev->cal.rx.mcu_gain |= (lna_5g[1] & 0xff) << 16;
277 	dev->cal.rx.mcu_gain |= (lna_5g[2] & 0xff) << 24;
278 
279 	val = mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_1);
280 	if (chan->band == NL80211_BAND_2GHZ)
281 		use_lna = !(val & MT_EE_NIC_CONF_1_LNA_EXT_2G);
282 	else
283 		use_lna = !(val & MT_EE_NIC_CONF_1_LNA_EXT_5G);
284 
285 	if (use_lna)
286 		lna = mt76x02_get_lna_gain(dev, &lna_2g, lna_5g, chan);
287 
288 	dev->cal.rx.lna_gain = mt76x02_sign_extend(lna, 8);
289 }
290 EXPORT_SYMBOL_GPL(mt76x2_read_rx_gain);
291 
292 void mt76x2_get_rate_power(struct mt76x02_dev *dev, struct mt76x02_rate_power *t,
293 			   struct ieee80211_channel *chan)
294 {
295 	bool is_5ghz;
296 	u16 val;
297 
298 	is_5ghz = chan->band == NL80211_BAND_5GHZ;
299 
300 	memset(t, 0, sizeof(*t));
301 
302 	val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_CCK);
303 	t->cck[0] = t->cck[1] = mt76x02_rate_power_val(val);
304 	t->cck[2] = t->cck[3] = mt76x02_rate_power_val(val >> 8);
305 
306 	if (is_5ghz)
307 		val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_OFDM_5G_6M);
308 	else
309 		val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_OFDM_2G_6M);
310 	t->ofdm[0] = t->ofdm[1] = mt76x02_rate_power_val(val);
311 	t->ofdm[2] = t->ofdm[3] = mt76x02_rate_power_val(val >> 8);
312 
313 	if (is_5ghz)
314 		val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_OFDM_5G_24M);
315 	else
316 		val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_OFDM_2G_24M);
317 	t->ofdm[4] = t->ofdm[5] = mt76x02_rate_power_val(val);
318 	t->ofdm[6] = t->ofdm[7] = mt76x02_rate_power_val(val >> 8);
319 
320 	val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_HT_MCS0);
321 	t->ht[0] = t->ht[1] = mt76x02_rate_power_val(val);
322 	t->ht[2] = t->ht[3] = mt76x02_rate_power_val(val >> 8);
323 
324 	val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_HT_MCS4);
325 	t->ht[4] = t->ht[5] = mt76x02_rate_power_val(val);
326 	t->ht[6] = t->ht[7] = mt76x02_rate_power_val(val >> 8);
327 
328 	val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_HT_MCS8);
329 	t->ht[8] = t->ht[9] = mt76x02_rate_power_val(val);
330 	t->ht[10] = t->ht[11] = mt76x02_rate_power_val(val >> 8);
331 
332 	val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_HT_MCS12);
333 	t->ht[12] = t->ht[13] = mt76x02_rate_power_val(val);
334 	t->ht[14] = t->ht[15] = mt76x02_rate_power_val(val >> 8);
335 
336 	val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_VHT_MCS8);
337 	if (!is_5ghz)
338 		val >>= 8;
339 	t->vht[0] = t->vht[1] = mt76x02_rate_power_val(val >> 8);
340 }
341 EXPORT_SYMBOL_GPL(mt76x2_get_rate_power);
342 
343 static void
344 mt76x2_get_power_info_2g(struct mt76x02_dev *dev,
345 			 struct mt76x2_tx_power_info *t,
346 			 struct ieee80211_channel *chan,
347 			 int chain, int offset)
348 {
349 	int channel = chan->hw_value;
350 	int delta_idx;
351 	u8 data[6];
352 	u16 val;
353 
354 	if (channel < 6)
355 		delta_idx = 3;
356 	else if (channel < 11)
357 		delta_idx = 4;
358 	else
359 		delta_idx = 5;
360 
361 	mt76x02_eeprom_copy(dev, offset, data, sizeof(data));
362 
363 	t->chain[chain].tssi_slope = data[0];
364 	t->chain[chain].tssi_offset = data[1];
365 	t->chain[chain].target_power = data[2];
366 	t->chain[chain].delta =
367 		mt76x02_sign_extend_optional(data[delta_idx], 7);
368 
369 	val = mt76x02_eeprom_get(dev, MT_EE_RF_2G_TSSI_OFF_TXPOWER);
370 	t->target_power = val >> 8;
371 }
372 
373 static void
374 mt76x2_get_power_info_5g(struct mt76x02_dev *dev,
375 			 struct mt76x2_tx_power_info *t,
376 			 struct ieee80211_channel *chan,
377 			 int chain, int offset)
378 {
379 	int channel = chan->hw_value;
380 	enum mt76x2_cal_channel_group group;
381 	int delta_idx;
382 	u16 val;
383 	u8 data[5];
384 
385 	group = mt76x2_get_cal_channel_group(channel);
386 	offset += group * MT_TX_POWER_GROUP_SIZE_5G;
387 
388 	if (channel >= 192)
389 		delta_idx = 4;
390 	else if (channel >= 184)
391 		delta_idx = 3;
392 	else if (channel < 44)
393 		delta_idx = 3;
394 	else if (channel < 52)
395 		delta_idx = 4;
396 	else if (channel < 58)
397 		delta_idx = 3;
398 	else if (channel < 98)
399 		delta_idx = 4;
400 	else if (channel < 106)
401 		delta_idx = 3;
402 	else if (channel < 116)
403 		delta_idx = 4;
404 	else if (channel < 130)
405 		delta_idx = 3;
406 	else if (channel < 149)
407 		delta_idx = 4;
408 	else if (channel < 157)
409 		delta_idx = 3;
410 	else
411 		delta_idx = 4;
412 
413 	mt76x02_eeprom_copy(dev, offset, data, sizeof(data));
414 
415 	t->chain[chain].tssi_slope = data[0];
416 	t->chain[chain].tssi_offset = data[1];
417 	t->chain[chain].target_power = data[2];
418 	t->chain[chain].delta =
419 		mt76x02_sign_extend_optional(data[delta_idx], 7);
420 
421 	val = mt76x02_eeprom_get(dev, MT_EE_RF_2G_RX_HIGH_GAIN);
422 	t->target_power = val & 0xff;
423 }
424 
425 void mt76x2_get_power_info(struct mt76x02_dev *dev,
426 			   struct mt76x2_tx_power_info *t,
427 			   struct ieee80211_channel *chan)
428 {
429 	u16 bw40, bw80;
430 
431 	memset(t, 0, sizeof(*t));
432 
433 	bw40 = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_DELTA_BW40);
434 	bw80 = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_DELTA_BW80);
435 
436 	if (chan->band == NL80211_BAND_5GHZ) {
437 		bw40 >>= 8;
438 		mt76x2_get_power_info_5g(dev, t, chan, 0,
439 					 MT_EE_TX_POWER_0_START_5G);
440 		mt76x2_get_power_info_5g(dev, t, chan, 1,
441 					 MT_EE_TX_POWER_1_START_5G);
442 	} else {
443 		mt76x2_get_power_info_2g(dev, t, chan, 0,
444 					 MT_EE_TX_POWER_0_START_2G);
445 		mt76x2_get_power_info_2g(dev, t, chan, 1,
446 					 MT_EE_TX_POWER_1_START_2G);
447 	}
448 
449 	if (mt76x2_tssi_enabled(dev) ||
450 	    !mt76x02_field_valid(t->target_power))
451 		t->target_power = t->chain[0].target_power;
452 
453 	t->delta_bw40 = mt76x02_rate_power_val(bw40);
454 	t->delta_bw80 = mt76x02_rate_power_val(bw80);
455 }
456 EXPORT_SYMBOL_GPL(mt76x2_get_power_info);
457 
458 int mt76x2_get_temp_comp(struct mt76x02_dev *dev, struct mt76x2_temp_comp *t)
459 {
460 	enum nl80211_band band = dev->mphy.chandef.chan->band;
461 	u16 val, slope;
462 	u8 bounds;
463 
464 	memset(t, 0, sizeof(*t));
465 
466 	if (!mt76x2_temp_tx_alc_enabled(dev))
467 		return -EINVAL;
468 
469 	if (!mt76x02_ext_pa_enabled(dev, band))
470 		return -EINVAL;
471 
472 	val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_EXT_PA_5G) >> 8;
473 	t->temp_25_ref = val & 0x7f;
474 	if (band == NL80211_BAND_5GHZ) {
475 		slope = mt76x02_eeprom_get(dev, MT_EE_RF_TEMP_COMP_SLOPE_5G);
476 		bounds = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_EXT_PA_5G);
477 	} else {
478 		slope = mt76x02_eeprom_get(dev, MT_EE_RF_TEMP_COMP_SLOPE_2G);
479 		bounds = mt76x02_eeprom_get(dev,
480 					    MT_EE_TX_POWER_DELTA_BW80) >> 8;
481 	}
482 
483 	t->high_slope = slope & 0xff;
484 	t->low_slope = slope >> 8;
485 	t->lower_bound = 0 - (bounds & 0xf);
486 	t->upper_bound = (bounds >> 4) & 0xf;
487 
488 	return 0;
489 }
490 EXPORT_SYMBOL_GPL(mt76x2_get_temp_comp);
491 
492 int mt76x2_eeprom_init(struct mt76x02_dev *dev)
493 {
494 	int ret;
495 
496 	ret = mt76x2_eeprom_load(dev);
497 	if (ret)
498 		return ret;
499 
500 	mt76x02_eeprom_parse_hw_cap(dev);
501 	mt76x2_eeprom_get_macaddr(dev);
502 	mt76_eeprom_override(&dev->mphy);
503 	dev->mphy.macaddr[0] &= ~BIT(1);
504 
505 	return 0;
506 }
507 EXPORT_SYMBOL_GPL(mt76x2_eeprom_init);
508 
509 MODULE_LICENSE("Dual BSD/GPL");
510