1 /* 2 * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl> 3 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name> 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <linux/module.h> 19 #include "mt76x02.h" 20 21 #define CCK_RATE(_idx, _rate) { \ 22 .bitrate = _rate, \ 23 .flags = IEEE80211_RATE_SHORT_PREAMBLE, \ 24 .hw_value = (MT_PHY_TYPE_CCK << 8) | _idx, \ 25 .hw_value_short = (MT_PHY_TYPE_CCK << 8) | (8 + _idx), \ 26 } 27 28 #define OFDM_RATE(_idx, _rate) { \ 29 .bitrate = _rate, \ 30 .hw_value = (MT_PHY_TYPE_OFDM << 8) | _idx, \ 31 .hw_value_short = (MT_PHY_TYPE_OFDM << 8) | _idx, \ 32 } 33 34 struct ieee80211_rate mt76x02_rates[] = { 35 CCK_RATE(0, 10), 36 CCK_RATE(1, 20), 37 CCK_RATE(2, 55), 38 CCK_RATE(3, 110), 39 OFDM_RATE(0, 60), 40 OFDM_RATE(1, 90), 41 OFDM_RATE(2, 120), 42 OFDM_RATE(3, 180), 43 OFDM_RATE(4, 240), 44 OFDM_RATE(5, 360), 45 OFDM_RATE(6, 480), 46 OFDM_RATE(7, 540), 47 }; 48 EXPORT_SYMBOL_GPL(mt76x02_rates); 49 50 static const struct ieee80211_iface_limit mt76x02_if_limits[] = { 51 { 52 .max = 1, 53 .types = BIT(NL80211_IFTYPE_ADHOC) 54 }, { 55 .max = 8, 56 .types = BIT(NL80211_IFTYPE_STATION) | 57 #ifdef CONFIG_MAC80211_MESH 58 BIT(NL80211_IFTYPE_MESH_POINT) | 59 #endif 60 BIT(NL80211_IFTYPE_AP) 61 }, 62 }; 63 64 static const struct ieee80211_iface_combination mt76x02_if_comb[] = { 65 { 66 .limits = mt76x02_if_limits, 67 .n_limits = ARRAY_SIZE(mt76x02_if_limits), 68 .max_interfaces = 8, 69 .num_different_channels = 1, 70 .beacon_int_infra_match = true, 71 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) | 72 BIT(NL80211_CHAN_WIDTH_20) | 73 BIT(NL80211_CHAN_WIDTH_40) | 74 BIT(NL80211_CHAN_WIDTH_80), 75 } 76 }; 77 78 static void 79 mt76x02_led_set_config(struct mt76_dev *mdev, u8 delay_on, 80 u8 delay_off) 81 { 82 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, 83 mt76); 84 u32 val; 85 86 val = MT_LED_STATUS_DURATION(0xff) | 87 MT_LED_STATUS_OFF(delay_off) | 88 MT_LED_STATUS_ON(delay_on); 89 90 mt76_wr(dev, MT_LED_S0(mdev->led_pin), val); 91 mt76_wr(dev, MT_LED_S1(mdev->led_pin), val); 92 93 val = MT_LED_CTRL_REPLAY(mdev->led_pin) | 94 MT_LED_CTRL_KICK(mdev->led_pin); 95 if (mdev->led_al) 96 val |= MT_LED_CTRL_POLARITY(mdev->led_pin); 97 mt76_wr(dev, MT_LED_CTRL, val); 98 } 99 100 static int 101 mt76x02_led_set_blink(struct led_classdev *led_cdev, 102 unsigned long *delay_on, 103 unsigned long *delay_off) 104 { 105 struct mt76_dev *mdev = container_of(led_cdev, struct mt76_dev, 106 led_cdev); 107 u8 delta_on, delta_off; 108 109 delta_off = max_t(u8, *delay_off / 10, 1); 110 delta_on = max_t(u8, *delay_on / 10, 1); 111 112 mt76x02_led_set_config(mdev, delta_on, delta_off); 113 114 return 0; 115 } 116 117 static void 118 mt76x02_led_set_brightness(struct led_classdev *led_cdev, 119 enum led_brightness brightness) 120 { 121 struct mt76_dev *mdev = container_of(led_cdev, struct mt76_dev, 122 led_cdev); 123 124 if (!brightness) 125 mt76x02_led_set_config(mdev, 0, 0xff); 126 else 127 mt76x02_led_set_config(mdev, 0xff, 0); 128 } 129 130 void mt76x02_init_device(struct mt76x02_dev *dev) 131 { 132 struct ieee80211_hw *hw = mt76_hw(dev); 133 struct wiphy *wiphy = hw->wiphy; 134 135 INIT_DELAYED_WORK(&dev->mac_work, mt76x02_mac_work); 136 137 hw->queues = 4; 138 hw->max_rates = 1; 139 hw->max_report_rates = 7; 140 hw->max_rate_tries = 1; 141 hw->extra_tx_headroom = 2; 142 143 wiphy->interface_modes = 144 BIT(NL80211_IFTYPE_STATION) | 145 #ifdef CONFIG_MAC80211_MESH 146 BIT(NL80211_IFTYPE_MESH_POINT) | 147 #endif 148 BIT(NL80211_IFTYPE_ADHOC); 149 150 if (mt76_is_usb(dev)) { 151 hw->extra_tx_headroom += sizeof(struct mt76x02_txwi) + 152 MT_DMA_HDR_LEN; 153 } else { 154 INIT_DELAYED_WORK(&dev->wdt_work, mt76x02_wdt_work); 155 156 mt76x02_dfs_init_detector(dev); 157 158 wiphy->reg_notifier = mt76x02_regd_notifier; 159 wiphy->iface_combinations = mt76x02_if_comb; 160 wiphy->n_iface_combinations = ARRAY_SIZE(mt76x02_if_comb); 161 wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP); 162 wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH; 163 164 /* init led callbacks */ 165 if (IS_ENABLED(CONFIG_MT76_LEDS)) { 166 dev->mt76.led_cdev.brightness_set = 167 mt76x02_led_set_brightness; 168 dev->mt76.led_cdev.blink_set = mt76x02_led_set_blink; 169 } 170 } 171 172 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS); 173 174 hw->sta_data_size = sizeof(struct mt76x02_sta); 175 hw->vif_data_size = sizeof(struct mt76x02_vif); 176 177 ieee80211_hw_set(hw, SUPPORTS_HT_CCK_RATES); 178 ieee80211_hw_set(hw, SUPPORTS_REORDERING_BUFFER); 179 180 dev->mt76.global_wcid.idx = 255; 181 dev->mt76.global_wcid.hw_key_idx = -1; 182 dev->slottime = 9; 183 184 if (is_mt76x2(dev)) { 185 dev->mt76.sband_2g.sband.ht_cap.cap |= 186 IEEE80211_HT_CAP_LDPC_CODING; 187 dev->mt76.sband_5g.sband.ht_cap.cap |= 188 IEEE80211_HT_CAP_LDPC_CODING; 189 dev->mt76.chainmask = 0x202; 190 dev->mt76.antenna_mask = 3; 191 } else { 192 dev->mt76.chainmask = 0x101; 193 dev->mt76.antenna_mask = 1; 194 } 195 } 196 EXPORT_SYMBOL_GPL(mt76x02_init_device); 197 198 void mt76x02_configure_filter(struct ieee80211_hw *hw, 199 unsigned int changed_flags, 200 unsigned int *total_flags, u64 multicast) 201 { 202 struct mt76x02_dev *dev = hw->priv; 203 u32 flags = 0; 204 205 #define MT76_FILTER(_flag, _hw) do { \ 206 flags |= *total_flags & FIF_##_flag; \ 207 dev->mt76.rxfilter &= ~(_hw); \ 208 dev->mt76.rxfilter |= !(flags & FIF_##_flag) * (_hw); \ 209 } while (0) 210 211 mutex_lock(&dev->mt76.mutex); 212 213 dev->mt76.rxfilter &= ~MT_RX_FILTR_CFG_OTHER_BSS; 214 215 MT76_FILTER(FCSFAIL, MT_RX_FILTR_CFG_CRC_ERR); 216 MT76_FILTER(PLCPFAIL, MT_RX_FILTR_CFG_PHY_ERR); 217 MT76_FILTER(CONTROL, MT_RX_FILTR_CFG_ACK | 218 MT_RX_FILTR_CFG_CTS | 219 MT_RX_FILTR_CFG_CFEND | 220 MT_RX_FILTR_CFG_CFACK | 221 MT_RX_FILTR_CFG_BA | 222 MT_RX_FILTR_CFG_CTRL_RSV); 223 MT76_FILTER(PSPOLL, MT_RX_FILTR_CFG_PSPOLL); 224 225 *total_flags = flags; 226 mt76_wr(dev, MT_RX_FILTR_CFG, dev->mt76.rxfilter); 227 228 mutex_unlock(&dev->mt76.mutex); 229 } 230 EXPORT_SYMBOL_GPL(mt76x02_configure_filter); 231 232 int mt76x02_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, 233 struct ieee80211_sta *sta) 234 { 235 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76); 236 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv; 237 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv; 238 int idx = 0; 239 240 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, ARRAY_SIZE(dev->mt76.wcid)); 241 if (idx < 0) 242 return -ENOSPC; 243 244 msta->vif = mvif; 245 msta->wcid.sta = 1; 246 msta->wcid.idx = idx; 247 msta->wcid.hw_key_idx = -1; 248 mt76x02_mac_wcid_setup(dev, idx, mvif->idx, sta->addr); 249 mt76x02_mac_wcid_set_drop(dev, idx, false); 250 251 if (vif->type == NL80211_IFTYPE_AP) 252 set_bit(MT_WCID_FLAG_CHECK_PS, &msta->wcid.flags); 253 254 return 0; 255 } 256 EXPORT_SYMBOL_GPL(mt76x02_sta_add); 257 258 void mt76x02_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 259 struct ieee80211_sta *sta) 260 { 261 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76); 262 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv; 263 int idx = wcid->idx; 264 265 mt76x02_mac_wcid_set_drop(dev, idx, true); 266 mt76x02_mac_wcid_setup(dev, idx, 0, NULL); 267 } 268 EXPORT_SYMBOL_GPL(mt76x02_sta_remove); 269 270 static void 271 mt76x02_vif_init(struct mt76x02_dev *dev, struct ieee80211_vif *vif, 272 unsigned int idx) 273 { 274 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv; 275 struct mt76_txq *mtxq; 276 277 mvif->idx = idx; 278 mvif->group_wcid.idx = MT_VIF_WCID(idx); 279 mvif->group_wcid.hw_key_idx = -1; 280 mtxq = (struct mt76_txq *) vif->txq->drv_priv; 281 mtxq->wcid = &mvif->group_wcid; 282 283 mt76_txq_init(&dev->mt76, vif->txq); 284 } 285 286 int 287 mt76x02_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 288 { 289 struct mt76x02_dev *dev = hw->priv; 290 unsigned int idx = 0; 291 292 if (vif->addr[0] & BIT(1)) 293 idx = 1 + (((dev->mt76.macaddr[0] ^ vif->addr[0]) >> 2) & 7); 294 295 /* 296 * Client mode typically only has one configurable BSSID register, 297 * which is used for bssidx=0. This is linked to the MAC address. 298 * Since mac80211 allows changing interface types, and we cannot 299 * force the use of the primary MAC address for a station mode 300 * interface, we need some other way of configuring a per-interface 301 * remote BSSID. 302 * The hardware provides an AP-Client feature, where bssidx 0-7 are 303 * used for AP mode and bssidx 8-15 for client mode. 304 * We shift the station interface bss index by 8 to force the 305 * hardware to recognize the BSSID. 306 * The resulting bssidx mismatch for unicast frames is ignored by hw. 307 */ 308 if (vif->type == NL80211_IFTYPE_STATION) 309 idx += 8; 310 311 if (dev->vif_mask & BIT(idx)) 312 return -EBUSY; 313 314 /* Allow to change address in HW if we create first interface. */ 315 if (!dev->vif_mask && !ether_addr_equal(dev->mt76.macaddr, vif->addr)) 316 mt76x02_mac_setaddr(dev, vif->addr); 317 318 dev->vif_mask |= BIT(idx); 319 320 mt76x02_vif_init(dev, vif, idx); 321 return 0; 322 } 323 EXPORT_SYMBOL_GPL(mt76x02_add_interface); 324 325 void mt76x02_remove_interface(struct ieee80211_hw *hw, 326 struct ieee80211_vif *vif) 327 { 328 struct mt76x02_dev *dev = hw->priv; 329 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv; 330 331 mt76_txq_remove(&dev->mt76, vif->txq); 332 dev->vif_mask &= ~BIT(mvif->idx); 333 } 334 EXPORT_SYMBOL_GPL(mt76x02_remove_interface); 335 336 int mt76x02_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 337 struct ieee80211_ampdu_params *params) 338 { 339 enum ieee80211_ampdu_mlme_action action = params->action; 340 struct ieee80211_sta *sta = params->sta; 341 struct mt76x02_dev *dev = hw->priv; 342 struct mt76x02_sta *msta = (struct mt76x02_sta *) sta->drv_priv; 343 struct ieee80211_txq *txq = sta->txq[params->tid]; 344 u16 tid = params->tid; 345 u16 *ssn = ¶ms->ssn; 346 struct mt76_txq *mtxq; 347 348 if (!txq) 349 return -EINVAL; 350 351 mtxq = (struct mt76_txq *)txq->drv_priv; 352 353 switch (action) { 354 case IEEE80211_AMPDU_RX_START: 355 mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid, 356 *ssn, params->buf_size); 357 mt76_set(dev, MT_WCID_ADDR(msta->wcid.idx) + 4, BIT(16 + tid)); 358 break; 359 case IEEE80211_AMPDU_RX_STOP: 360 mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid); 361 mt76_clear(dev, MT_WCID_ADDR(msta->wcid.idx) + 4, 362 BIT(16 + tid)); 363 break; 364 case IEEE80211_AMPDU_TX_OPERATIONAL: 365 mtxq->aggr = true; 366 mtxq->send_bar = false; 367 ieee80211_send_bar(vif, sta->addr, tid, mtxq->agg_ssn); 368 break; 369 case IEEE80211_AMPDU_TX_STOP_FLUSH: 370 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: 371 mtxq->aggr = false; 372 ieee80211_send_bar(vif, sta->addr, tid, mtxq->agg_ssn); 373 break; 374 case IEEE80211_AMPDU_TX_START: 375 mtxq->agg_ssn = *ssn << 4; 376 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); 377 break; 378 case IEEE80211_AMPDU_TX_STOP_CONT: 379 mtxq->aggr = false; 380 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); 381 break; 382 } 383 384 return 0; 385 } 386 EXPORT_SYMBOL_GPL(mt76x02_ampdu_action); 387 388 int mt76x02_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 389 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 390 struct ieee80211_key_conf *key) 391 { 392 struct mt76x02_dev *dev = hw->priv; 393 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv; 394 struct mt76x02_sta *msta; 395 struct mt76_wcid *wcid; 396 int idx = key->keyidx; 397 int ret; 398 399 /* fall back to sw encryption for unsupported ciphers */ 400 switch (key->cipher) { 401 case WLAN_CIPHER_SUITE_WEP40: 402 case WLAN_CIPHER_SUITE_WEP104: 403 case WLAN_CIPHER_SUITE_TKIP: 404 case WLAN_CIPHER_SUITE_CCMP: 405 break; 406 default: 407 return -EOPNOTSUPP; 408 } 409 410 /* 411 * The hardware does not support per-STA RX GTK, fall back 412 * to software mode for these. 413 */ 414 if ((vif->type == NL80211_IFTYPE_ADHOC || 415 vif->type == NL80211_IFTYPE_MESH_POINT) && 416 (key->cipher == WLAN_CIPHER_SUITE_TKIP || 417 key->cipher == WLAN_CIPHER_SUITE_CCMP) && 418 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) 419 return -EOPNOTSUPP; 420 421 msta = sta ? (struct mt76x02_sta *) sta->drv_priv : NULL; 422 wcid = msta ? &msta->wcid : &mvif->group_wcid; 423 424 if (cmd == SET_KEY) { 425 key->hw_key_idx = wcid->idx; 426 wcid->hw_key_idx = idx; 427 if (key->flags & IEEE80211_KEY_FLAG_RX_MGMT) { 428 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX; 429 wcid->sw_iv = true; 430 } 431 } else { 432 if (idx == wcid->hw_key_idx) { 433 wcid->hw_key_idx = -1; 434 wcid->sw_iv = false; 435 } 436 437 key = NULL; 438 } 439 mt76_wcid_key_setup(&dev->mt76, wcid, key); 440 441 if (!msta) { 442 if (key || wcid->hw_key_idx == idx) { 443 ret = mt76x02_mac_wcid_set_key(dev, wcid->idx, key); 444 if (ret) 445 return ret; 446 } 447 448 return mt76x02_mac_shared_key_setup(dev, mvif->idx, idx, key); 449 } 450 451 return mt76x02_mac_wcid_set_key(dev, msta->wcid.idx, key); 452 } 453 EXPORT_SYMBOL_GPL(mt76x02_set_key); 454 455 int mt76x02_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 456 u16 queue, const struct ieee80211_tx_queue_params *params) 457 { 458 struct mt76x02_dev *dev = hw->priv; 459 u8 cw_min = 5, cw_max = 10, qid; 460 u32 val; 461 462 qid = dev->mt76.q_tx[queue].hw_idx; 463 464 if (params->cw_min) 465 cw_min = fls(params->cw_min); 466 if (params->cw_max) 467 cw_max = fls(params->cw_max); 468 469 val = FIELD_PREP(MT_EDCA_CFG_TXOP, params->txop) | 470 FIELD_PREP(MT_EDCA_CFG_AIFSN, params->aifs) | 471 FIELD_PREP(MT_EDCA_CFG_CWMIN, cw_min) | 472 FIELD_PREP(MT_EDCA_CFG_CWMAX, cw_max); 473 mt76_wr(dev, MT_EDCA_CFG_AC(qid), val); 474 475 val = mt76_rr(dev, MT_WMM_TXOP(qid)); 476 val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(qid)); 477 val |= params->txop << MT_WMM_TXOP_SHIFT(qid); 478 mt76_wr(dev, MT_WMM_TXOP(qid), val); 479 480 val = mt76_rr(dev, MT_WMM_AIFSN); 481 val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(qid)); 482 val |= params->aifs << MT_WMM_AIFSN_SHIFT(qid); 483 mt76_wr(dev, MT_WMM_AIFSN, val); 484 485 val = mt76_rr(dev, MT_WMM_CWMIN); 486 val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(qid)); 487 val |= cw_min << MT_WMM_CWMIN_SHIFT(qid); 488 mt76_wr(dev, MT_WMM_CWMIN, val); 489 490 val = mt76_rr(dev, MT_WMM_CWMAX); 491 val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(qid)); 492 val |= cw_max << MT_WMM_CWMAX_SHIFT(qid); 493 mt76_wr(dev, MT_WMM_CWMAX, val); 494 495 return 0; 496 } 497 EXPORT_SYMBOL_GPL(mt76x02_conf_tx); 498 499 void mt76x02_set_tx_ackto(struct mt76x02_dev *dev) 500 { 501 u8 ackto, sifs, slottime = dev->slottime; 502 503 /* As defined by IEEE 802.11-2007 17.3.8.6 */ 504 slottime += 3 * dev->coverage_class; 505 mt76_rmw_field(dev, MT_BKOFF_SLOT_CFG, 506 MT_BKOFF_SLOT_CFG_SLOTTIME, slottime); 507 508 sifs = mt76_get_field(dev, MT_XIFS_TIME_CFG, 509 MT_XIFS_TIME_CFG_OFDM_SIFS); 510 511 ackto = slottime + sifs; 512 mt76_rmw_field(dev, MT_TX_TIMEOUT_CFG, 513 MT_TX_TIMEOUT_CFG_ACKTO, ackto); 514 } 515 EXPORT_SYMBOL_GPL(mt76x02_set_tx_ackto); 516 517 void mt76x02_set_coverage_class(struct ieee80211_hw *hw, 518 s16 coverage_class) 519 { 520 struct mt76x02_dev *dev = hw->priv; 521 522 mutex_lock(&dev->mt76.mutex); 523 dev->coverage_class = coverage_class; 524 mt76x02_set_tx_ackto(dev); 525 mutex_unlock(&dev->mt76.mutex); 526 } 527 EXPORT_SYMBOL_GPL(mt76x02_set_coverage_class); 528 529 int mt76x02_set_rts_threshold(struct ieee80211_hw *hw, u32 val) 530 { 531 struct mt76x02_dev *dev = hw->priv; 532 533 if (val != ~0 && val > 0xffff) 534 return -EINVAL; 535 536 mutex_lock(&dev->mt76.mutex); 537 mt76x02_mac_set_rts_thresh(dev, val); 538 mutex_unlock(&dev->mt76.mutex); 539 540 return 0; 541 } 542 EXPORT_SYMBOL_GPL(mt76x02_set_rts_threshold); 543 544 void mt76x02_sta_rate_tbl_update(struct ieee80211_hw *hw, 545 struct ieee80211_vif *vif, 546 struct ieee80211_sta *sta) 547 { 548 struct mt76x02_dev *dev = hw->priv; 549 struct mt76x02_sta *msta = (struct mt76x02_sta *) sta->drv_priv; 550 struct ieee80211_sta_rates *rates = rcu_dereference(sta->rates); 551 struct ieee80211_tx_rate rate = {}; 552 553 if (!rates) 554 return; 555 556 rate.idx = rates->rate[0].idx; 557 rate.flags = rates->rate[0].flags; 558 mt76x02_mac_wcid_set_rate(dev, &msta->wcid, &rate); 559 msta->wcid.max_txpwr_adj = mt76x02_tx_get_max_txpwr_adj(dev, &rate); 560 } 561 EXPORT_SYMBOL_GPL(mt76x02_sta_rate_tbl_update); 562 563 int mt76x02_insert_hdr_pad(struct sk_buff *skb) 564 { 565 int len = ieee80211_get_hdrlen_from_skb(skb); 566 567 if (len % 4 == 0) 568 return 0; 569 570 skb_push(skb, 2); 571 memmove(skb->data, skb->data + 2, len); 572 573 skb->data[len] = 0; 574 skb->data[len + 1] = 0; 575 return 2; 576 } 577 EXPORT_SYMBOL_GPL(mt76x02_insert_hdr_pad); 578 579 void mt76x02_remove_hdr_pad(struct sk_buff *skb, int len) 580 { 581 int hdrlen; 582 583 if (!len) 584 return; 585 586 hdrlen = ieee80211_get_hdrlen_from_skb(skb); 587 memmove(skb->data + len, skb->data, hdrlen); 588 skb_pull(skb, len); 589 } 590 EXPORT_SYMBOL_GPL(mt76x02_remove_hdr_pad); 591 592 void mt76x02_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 593 const u8 *mac) 594 { 595 struct mt76x02_dev *dev = hw->priv; 596 597 if (mt76_is_mmio(dev)) 598 tasklet_disable(&dev->pre_tbtt_tasklet); 599 set_bit(MT76_SCANNING, &dev->mt76.state); 600 } 601 EXPORT_SYMBOL_GPL(mt76x02_sw_scan); 602 603 void mt76x02_sw_scan_complete(struct ieee80211_hw *hw, 604 struct ieee80211_vif *vif) 605 { 606 struct mt76x02_dev *dev = hw->priv; 607 608 clear_bit(MT76_SCANNING, &dev->mt76.state); 609 if (mt76_is_mmio(dev)) 610 tasklet_enable(&dev->pre_tbtt_tasklet); 611 612 if (dev->cal.gain_init_done) { 613 /* Restore AGC gain and resume calibration after scanning. */ 614 dev->cal.low_gain = -1; 615 ieee80211_queue_delayed_work(hw, &dev->cal_work, 0); 616 } 617 } 618 EXPORT_SYMBOL_GPL(mt76x02_sw_scan_complete); 619 620 void mt76x02_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, 621 bool ps) 622 { 623 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76); 624 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv; 625 int idx = msta->wcid.idx; 626 627 mt76_stop_tx_queues(&dev->mt76, sta, true); 628 mt76x02_mac_wcid_set_drop(dev, idx, ps); 629 } 630 EXPORT_SYMBOL_GPL(mt76x02_sta_ps); 631 632 const u16 mt76x02_beacon_offsets[16] = { 633 /* 1024 byte per beacon */ 634 0xc000, 635 0xc400, 636 0xc800, 637 0xcc00, 638 0xd000, 639 0xd400, 640 0xd800, 641 0xdc00, 642 /* BSS idx 8-15 not used for beacons */ 643 0xc000, 644 0xc000, 645 0xc000, 646 0xc000, 647 0xc000, 648 0xc000, 649 0xc000, 650 0xc000, 651 }; 652 653 static void mt76x02_set_beacon_offsets(struct mt76x02_dev *dev) 654 { 655 u16 val, base = MT_BEACON_BASE; 656 u32 regs[4] = {}; 657 int i; 658 659 for (i = 0; i < 16; i++) { 660 val = mt76x02_beacon_offsets[i] - base; 661 regs[i / 4] |= (val / 64) << (8 * (i % 4)); 662 } 663 664 for (i = 0; i < 4; i++) 665 mt76_wr(dev, MT_BCN_OFFSET(i), regs[i]); 666 } 667 668 void mt76x02_init_beacon_config(struct mt76x02_dev *dev) 669 { 670 int i; 671 672 if (mt76_is_mmio(dev)) { 673 /* Fire a pre-TBTT interrupt 8 ms before TBTT */ 674 mt76_rmw_field(dev, MT_INT_TIMER_CFG, MT_INT_TIMER_CFG_PRE_TBTT, 675 8 << 4); 676 mt76_rmw_field(dev, MT_INT_TIMER_CFG, MT_INT_TIMER_CFG_GP_TIMER, 677 MT_DFS_GP_INTERVAL); 678 mt76_wr(dev, MT_INT_TIMER_EN, 0); 679 } 680 681 mt76_clear(dev, MT_BEACON_TIME_CFG, (MT_BEACON_TIME_CFG_TIMER_EN | 682 MT_BEACON_TIME_CFG_TBTT_EN | 683 MT_BEACON_TIME_CFG_BEACON_TX)); 684 mt76_set(dev, MT_BEACON_TIME_CFG, MT_BEACON_TIME_CFG_SYNC_MODE); 685 mt76_wr(dev, MT_BCN_BYPASS_MASK, 0xffff); 686 687 for (i = 0; i < 8; i++) 688 mt76x02_mac_set_beacon(dev, i, NULL); 689 690 mt76x02_set_beacon_offsets(dev); 691 } 692 EXPORT_SYMBOL_GPL(mt76x02_init_beacon_config); 693 694 void mt76x02_bss_info_changed(struct ieee80211_hw *hw, 695 struct ieee80211_vif *vif, 696 struct ieee80211_bss_conf *info, 697 u32 changed) 698 { 699 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv; 700 struct mt76x02_dev *dev = hw->priv; 701 702 mutex_lock(&dev->mt76.mutex); 703 704 if (changed & BSS_CHANGED_BSSID) 705 mt76x02_mac_set_bssid(dev, mvif->idx, info->bssid); 706 707 if (changed & BSS_CHANGED_HT || changed & BSS_CHANGED_ERP_CTS_PROT) 708 mt76x02_mac_set_tx_protection(dev, info->use_cts_prot, 709 info->ht_operation_mode); 710 711 if (changed & BSS_CHANGED_BEACON_INT) { 712 mt76_rmw_field(dev, MT_BEACON_TIME_CFG, 713 MT_BEACON_TIME_CFG_INTVAL, 714 info->beacon_int << 4); 715 dev->beacon_int = info->beacon_int; 716 } 717 718 if (changed & BSS_CHANGED_BEACON_ENABLED) 719 mt76x02_mac_set_beacon_enable(dev, vif, info->enable_beacon); 720 721 if (changed & BSS_CHANGED_ERP_PREAMBLE) 722 mt76x02_mac_set_short_preamble(dev, info->use_short_preamble); 723 724 if (changed & BSS_CHANGED_ERP_SLOT) { 725 int slottime = info->use_short_slot ? 9 : 20; 726 727 dev->slottime = slottime; 728 mt76x02_set_tx_ackto(dev); 729 } 730 731 mutex_unlock(&dev->mt76.mutex); 732 } 733 EXPORT_SYMBOL_GPL(mt76x02_bss_info_changed); 734 735 void mt76x02_config_mac_addr_list(struct mt76x02_dev *dev) 736 { 737 struct ieee80211_hw *hw = mt76_hw(dev); 738 struct wiphy *wiphy = hw->wiphy; 739 int i; 740 741 for (i = 0; i < ARRAY_SIZE(dev->macaddr_list); i++) { 742 u8 *addr = dev->macaddr_list[i].addr; 743 744 memcpy(addr, dev->mt76.macaddr, ETH_ALEN); 745 746 if (!i) 747 continue; 748 749 addr[0] |= BIT(1); 750 addr[0] ^= ((i - 1) << 2); 751 } 752 wiphy->addresses = dev->macaddr_list; 753 wiphy->n_addresses = ARRAY_SIZE(dev->macaddr_list); 754 } 755 EXPORT_SYMBOL_GPL(mt76x02_config_mac_addr_list); 756 757 MODULE_LICENSE("Dual BSD/GPL"); 758