1 /* 2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name> 3 * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl> 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef __MT76X02_MAC_H 19 #define __MT76X02_MAC_H 20 21 #include <linux/average.h> 22 23 struct mt76x02_dev; 24 25 struct mt76x02_tx_status { 26 u8 valid:1; 27 u8 success:1; 28 u8 aggr:1; 29 u8 ack_req:1; 30 u8 wcid; 31 u8 pktid; 32 u8 retry; 33 u16 rate; 34 } __packed __aligned(2); 35 36 #define MT_VIF_WCID(_n) (254 - ((_n) & 7)) 37 #define MT_MAX_VIFS 8 38 39 struct mt76x02_vif { 40 struct mt76_wcid group_wcid; /* must be first */ 41 u8 idx; 42 }; 43 44 DECLARE_EWMA(signal, 10, 8); 45 46 struct mt76x02_sta { 47 struct mt76_wcid wcid; /* must be first */ 48 49 struct mt76x02_vif *vif; 50 struct mt76x02_tx_status status; 51 int n_frames; 52 53 struct ewma_signal rssi; 54 int inactive_count; 55 }; 56 57 #define MT_RXINFO_BA BIT(0) 58 #define MT_RXINFO_DATA BIT(1) 59 #define MT_RXINFO_NULL BIT(2) 60 #define MT_RXINFO_FRAG BIT(3) 61 #define MT_RXINFO_UNICAST BIT(4) 62 #define MT_RXINFO_MULTICAST BIT(5) 63 #define MT_RXINFO_BROADCAST BIT(6) 64 #define MT_RXINFO_MYBSS BIT(7) 65 #define MT_RXINFO_CRCERR BIT(8) 66 #define MT_RXINFO_ICVERR BIT(9) 67 #define MT_RXINFO_MICERR BIT(10) 68 #define MT_RXINFO_AMSDU BIT(11) 69 #define MT_RXINFO_HTC BIT(12) 70 #define MT_RXINFO_RSSI BIT(13) 71 #define MT_RXINFO_L2PAD BIT(14) 72 #define MT_RXINFO_AMPDU BIT(15) 73 #define MT_RXINFO_DECRYPT BIT(16) 74 #define MT_RXINFO_BSSIDX3 BIT(17) 75 #define MT_RXINFO_WAPI_KEY BIT(18) 76 #define MT_RXINFO_PN_LEN GENMASK(21, 19) 77 #define MT_RXINFO_SW_FTYPE0 BIT(22) 78 #define MT_RXINFO_SW_FTYPE1 BIT(23) 79 #define MT_RXINFO_PROBE_RESP BIT(24) 80 #define MT_RXINFO_BEACON BIT(25) 81 #define MT_RXINFO_DISASSOC BIT(26) 82 #define MT_RXINFO_DEAUTH BIT(27) 83 #define MT_RXINFO_ACTION BIT(28) 84 #define MT_RXINFO_TCP_SUM_ERR BIT(30) 85 #define MT_RXINFO_IP_SUM_ERR BIT(31) 86 87 #define MT_RXWI_CTL_WCID GENMASK(7, 0) 88 #define MT_RXWI_CTL_KEY_IDX GENMASK(9, 8) 89 #define MT_RXWI_CTL_BSS_IDX GENMASK(12, 10) 90 #define MT_RXWI_CTL_UDF GENMASK(15, 13) 91 #define MT_RXWI_CTL_MPDU_LEN GENMASK(29, 16) 92 #define MT_RXWI_CTL_EOF BIT(31) 93 94 #define MT_RXWI_TID GENMASK(3, 0) 95 #define MT_RXWI_SN GENMASK(15, 4) 96 97 #define MT_RXWI_RATE_INDEX GENMASK(5, 0) 98 #define MT_RXWI_RATE_LDPC BIT(6) 99 #define MT_RXWI_RATE_BW GENMASK(8, 7) 100 #define MT_RXWI_RATE_SGI BIT(9) 101 #define MT_RXWI_RATE_STBC BIT(10) 102 #define MT_RXWI_RATE_LDPC_EXSYM BIT(11) 103 #define MT_RXWI_RATE_PHY GENMASK(15, 13) 104 105 #define MT_RATE_INDEX_VHT_IDX GENMASK(3, 0) 106 #define MT_RATE_INDEX_VHT_NSS GENMASK(5, 4) 107 108 struct mt76x02_rxwi { 109 __le32 rxinfo; 110 111 __le32 ctl; 112 113 __le16 tid_sn; 114 __le16 rate; 115 116 u8 rssi[4]; 117 118 __le32 bbp_rxinfo[4]; 119 }; 120 121 #define MT_TX_PWR_ADJ GENMASK(3, 0) 122 123 enum mt76x2_phy_bandwidth { 124 MT_PHY_BW_20, 125 MT_PHY_BW_40, 126 MT_PHY_BW_80, 127 }; 128 129 #define MT_TXWI_FLAGS_FRAG BIT(0) 130 #define MT_TXWI_FLAGS_MMPS BIT(1) 131 #define MT_TXWI_FLAGS_CFACK BIT(2) 132 #define MT_TXWI_FLAGS_TS BIT(3) 133 #define MT_TXWI_FLAGS_AMPDU BIT(4) 134 #define MT_TXWI_FLAGS_MPDU_DENSITY GENMASK(7, 5) 135 #define MT_TXWI_FLAGS_TXOP GENMASK(9, 8) 136 #define MT_TXWI_FLAGS_NDPS BIT(10) 137 #define MT_TXWI_FLAGS_RTSBWSIG BIT(11) 138 #define MT_TXWI_FLAGS_NDP_BW GENMASK(13, 12) 139 #define MT_TXWI_FLAGS_SOUND BIT(14) 140 #define MT_TXWI_FLAGS_TX_RATE_LUT BIT(15) 141 142 #define MT_TXWI_ACK_CTL_REQ BIT(0) 143 #define MT_TXWI_ACK_CTL_NSEQ BIT(1) 144 #define MT_TXWI_ACK_CTL_BA_WINDOW GENMASK(7, 2) 145 146 struct mt76x02_txwi { 147 __le16 flags; 148 __le16 rate; 149 u8 ack_ctl; 150 u8 wcid; 151 __le16 len_ctl; 152 __le32 iv; 153 __le32 eiv; 154 u8 aid; 155 u8 txstream; 156 u8 ctl2; 157 u8 pktid; 158 } __packed __aligned(4); 159 160 static inline bool mt76x02_wait_for_mac(struct mt76_dev *dev) 161 { 162 const u32 MAC_CSR0 = 0x1000; 163 int i; 164 165 for (i = 0; i < 500; i++) { 166 if (test_bit(MT76_REMOVED, &dev->state)) 167 return false; 168 169 switch (dev->bus->rr(dev, MAC_CSR0)) { 170 case 0: 171 case ~0: 172 break; 173 default: 174 return true; 175 } 176 usleep_range(5000, 10000); 177 } 178 return false; 179 } 180 181 void mt76x02_mac_set_short_preamble(struct mt76x02_dev *dev, bool enable); 182 int mt76x02_mac_shared_key_setup(struct mt76x02_dev *dev, u8 vif_idx, 183 u8 key_idx, struct ieee80211_key_conf *key); 184 int mt76x02_mac_wcid_set_key(struct mt76x02_dev *dev, u8 idx, 185 struct ieee80211_key_conf *key); 186 void mt76x02_mac_wcid_setup(struct mt76x02_dev *dev, u8 idx, u8 vif_idx, 187 u8 *mac); 188 void mt76x02_mac_wcid_set_drop(struct mt76x02_dev *dev, u8 idx, bool drop); 189 void mt76x02_mac_wcid_set_rate(struct mt76x02_dev *dev, struct mt76_wcid *wcid, 190 const struct ieee80211_tx_rate *rate); 191 bool mt76x02_mac_load_tx_status(struct mt76x02_dev *dev, 192 struct mt76x02_tx_status *stat); 193 void mt76x02_send_tx_status(struct mt76x02_dev *dev, 194 struct mt76x02_tx_status *stat, u8 *update); 195 int mt76x02_mac_process_rx(struct mt76x02_dev *dev, struct sk_buff *skb, 196 void *rxi); 197 void mt76x02_mac_set_tx_protection(struct mt76x02_dev *dev, u32 val); 198 void mt76x02_mac_setaddr(struct mt76x02_dev *dev, u8 *addr); 199 void mt76x02_mac_write_txwi(struct mt76x02_dev *dev, struct mt76x02_txwi *txwi, 200 struct sk_buff *skb, struct mt76_wcid *wcid, 201 struct ieee80211_sta *sta, int len); 202 void mt76x02_mac_poll_tx_status(struct mt76x02_dev *dev, bool irq); 203 void mt76x02_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue *q, 204 struct mt76_queue_entry *e, bool flush); 205 void mt76x02_update_channel(struct mt76_dev *mdev); 206 void mt76x02_mac_work(struct work_struct *work); 207 208 void mt76x02_mac_set_bssid(struct mt76x02_dev *dev, u8 idx, const u8 *addr); 209 int mt76x02_mac_set_beacon(struct mt76x02_dev *dev, u8 vif_idx, 210 struct sk_buff *skb); 211 void mt76x02_mac_set_beacon_enable(struct mt76x02_dev *dev, u8 vif_idx, 212 bool val); 213 #endif 214