1 /*
2  * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
3  * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
4  *
5  * Permission to use, copy, modify, and/or distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  */
17 
18 #ifndef __MT76x02_EEPROM_H
19 #define __MT76x02_EEPROM_H
20 
21 #include "mt76x02.h"
22 
23 enum mt76x02_eeprom_field {
24 	MT_EE_CHIP_ID =				0x000,
25 	MT_EE_VERSION =				0x002,
26 	MT_EE_MAC_ADDR =			0x004,
27 	MT_EE_PCI_ID =				0x00A,
28 	MT_EE_ANTENNA =				0x022,
29 	MT_EE_NIC_CONF_0 =			0x034,
30 	MT_EE_NIC_CONF_1 =			0x036,
31 	MT_EE_COUNTRY_REGION_5GHZ =		0x038,
32 	MT_EE_COUNTRY_REGION_2GHZ =		0x039,
33 	MT_EE_FREQ_OFFSET =			0x03a,
34 	MT_EE_NIC_CONF_2 =			0x042,
35 
36 	MT_EE_XTAL_TRIM_1 =			0x03a,
37 	MT_EE_XTAL_TRIM_2 =			0x09e,
38 
39 	MT_EE_LNA_GAIN =			0x044,
40 	MT_EE_RSSI_OFFSET_2G_0 =		0x046,
41 	MT_EE_RSSI_OFFSET_2G_1 =		0x048,
42 	MT_EE_LNA_GAIN_5GHZ_1 =			0x049,
43 	MT_EE_RSSI_OFFSET_5G_0 =		0x04a,
44 	MT_EE_RSSI_OFFSET_5G_1 =		0x04c,
45 	MT_EE_LNA_GAIN_5GHZ_2 =			0x04d,
46 
47 	MT_EE_TX_POWER_DELTA_BW40 =		0x050,
48 	MT_EE_TX_POWER_DELTA_BW80 =		0x052,
49 
50 	MT_EE_TX_POWER_EXT_PA_5G =		0x054,
51 
52 	MT_EE_TX_POWER_0_START_2G =		0x056,
53 	MT_EE_TX_POWER_1_START_2G =		0x05c,
54 
55 	/* used as byte arrays */
56 #define MT_TX_POWER_GROUP_SIZE_5G		5
57 #define MT_TX_POWER_GROUPS_5G			6
58 	MT_EE_TX_POWER_0_START_5G =		0x062,
59 	MT_EE_TSSI_SLOPE_2G =			0x06e,
60 
61 	MT_EE_TX_POWER_0_GRP3_TX_POWER_DELTA =	0x074,
62 	MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE =	0x076,
63 
64 	MT_EE_TX_POWER_1_START_5G =		0x080,
65 
66 	MT_EE_TX_POWER_CCK =			0x0a0,
67 	MT_EE_TX_POWER_OFDM_2G_6M =		0x0a2,
68 	MT_EE_TX_POWER_OFDM_2G_24M =		0x0a4,
69 	MT_EE_TX_POWER_OFDM_5G_6M =		0x0b2,
70 	MT_EE_TX_POWER_OFDM_5G_24M =		0x0b4,
71 	MT_EE_TX_POWER_HT_MCS0 =		0x0a6,
72 	MT_EE_TX_POWER_HT_MCS4 =		0x0a8,
73 	MT_EE_TX_POWER_HT_MCS8 =		0x0aa,
74 	MT_EE_TX_POWER_HT_MCS12 =		0x0ac,
75 	MT_EE_TX_POWER_VHT_MCS0 =		0x0ba,
76 	MT_EE_TX_POWER_VHT_MCS4 =		0x0bc,
77 	MT_EE_TX_POWER_VHT_MCS8 =		0x0be,
78 
79 	MT_EE_2G_TARGET_POWER =			0x0d0,
80 	MT_EE_TEMP_OFFSET =			0x0d1,
81 	MT_EE_5G_TARGET_POWER =			0x0d2,
82 	MT_EE_TSSI_BOUND1 =			0x0d4,
83 	MT_EE_TSSI_BOUND2 =			0x0d6,
84 	MT_EE_TSSI_BOUND3 =			0x0d8,
85 	MT_EE_TSSI_BOUND4 =			0x0da,
86 	MT_EE_FREQ_OFFSET_COMPENSATION =	0x0db,
87 	MT_EE_TSSI_BOUND5 =			0x0dc,
88 	MT_EE_TX_POWER_BYRATE_BASE =		0x0de,
89 
90 	MT_EE_TSSI_SLOPE_5G =			0x0f0,
91 	MT_EE_RF_TEMP_COMP_SLOPE_5G =		0x0f2,
92 	MT_EE_RF_TEMP_COMP_SLOPE_2G =		0x0f4,
93 
94 	MT_EE_RF_2G_TSSI_OFF_TXPOWER =		0x0f6,
95 	MT_EE_RF_2G_RX_HIGH_GAIN =		0x0f8,
96 	MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN =	0x0fa,
97 	MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN =	0x0fc,
98 	MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN =	0x0fe,
99 
100 	MT_EE_BT_RCAL_RESULT =			0x138,
101 	MT_EE_BT_VCDL_CALIBRATION =		0x13c,
102 	MT_EE_BT_PMUCFG =			0x13e,
103 
104 	MT_EE_USAGE_MAP_START =			0x1e0,
105 	MT_EE_USAGE_MAP_END =			0x1fc,
106 
107 	__MT_EE_MAX
108 };
109 
110 #define MT_EE_ANTENNA_DUAL			BIT(15)
111 
112 #define MT_EE_NIC_CONF_0_RX_PATH		GENMASK(3, 0)
113 #define MT_EE_NIC_CONF_0_TX_PATH		GENMASK(7, 4)
114 #define MT_EE_NIC_CONF_0_PA_TYPE		GENMASK(9, 8)
115 #define MT_EE_NIC_CONF_0_PA_INT_2G		BIT(8)
116 #define MT_EE_NIC_CONF_0_PA_INT_5G		BIT(9)
117 #define MT_EE_NIC_CONF_0_PA_IO_CURRENT		BIT(10)
118 #define MT_EE_NIC_CONF_0_BOARD_TYPE		GENMASK(13, 12)
119 
120 #define MT_EE_NIC_CONF_1_HW_RF_CTRL		BIT(0)
121 #define MT_EE_NIC_CONF_1_TEMP_TX_ALC		BIT(1)
122 #define MT_EE_NIC_CONF_1_LNA_EXT_2G		BIT(2)
123 #define MT_EE_NIC_CONF_1_LNA_EXT_5G		BIT(3)
124 #define MT_EE_NIC_CONF_1_TX_ALC_EN		BIT(13)
125 
126 #define MT_EE_NIC_CONF_2_ANT_OPT		BIT(3)
127 #define MT_EE_NIC_CONF_2_ANT_DIV		BIT(4)
128 #define MT_EE_NIC_CONF_2_XTAL_OPTION		GENMASK(10, 9)
129 
130 #define MT_EFUSE_USAGE_MAP_SIZE			(MT_EE_USAGE_MAP_END - \
131 						 MT_EE_USAGE_MAP_START + 1)
132 
133 enum mt76x02_eeprom_modes {
134 	MT_EE_READ,
135 	MT_EE_PHYSICAL_READ,
136 };
137 
138 enum mt76x02_board_type {
139 	BOARD_TYPE_2GHZ = 1,
140 	BOARD_TYPE_5GHZ = 2,
141 };
142 
143 static inline bool mt76x02_field_valid(u8 val)
144 {
145 	return val != 0 && val != 0xff;
146 }
147 
148 static inline int
149 mt76x02_sign_extend(u32 val, unsigned int size)
150 {
151 	bool sign = val & BIT(size - 1);
152 
153 	val &= BIT(size - 1) - 1;
154 
155 	return sign ? val : -val;
156 }
157 
158 static inline int
159 mt76x02_sign_extend_optional(u32 val, unsigned int size)
160 {
161 	bool enable = val & BIT(size);
162 
163 	return enable ? mt76x02_sign_extend(val, size) : 0;
164 }
165 
166 static inline s8 mt76x02_rate_power_val(u8 val)
167 {
168 	if (!mt76x02_field_valid(val))
169 		return 0;
170 
171 	return mt76x02_sign_extend_optional(val, 7);
172 }
173 
174 static inline int
175 mt76x02_eeprom_get(struct mt76x02_dev *dev,
176 		   enum mt76x02_eeprom_field field)
177 {
178 	if ((field & 1) || field >= __MT_EE_MAX)
179 		return -1;
180 
181 	return get_unaligned_le16(dev->mt76.eeprom.data + field);
182 }
183 
184 bool mt76x02_ext_pa_enabled(struct mt76x02_dev *dev, enum nl80211_band band);
185 int mt76x02_get_efuse_data(struct mt76x02_dev *dev, u16 base, void *buf,
186 			   int len, enum mt76x02_eeprom_modes mode);
187 void mt76x02_get_rx_gain(struct mt76x02_dev *dev, enum nl80211_band band,
188 			 u16 *rssi_offset, s8 *lna_2g, s8 *lna_5g);
189 u8 mt76x02_get_lna_gain(struct mt76x02_dev *dev,
190 			s8 *lna_2g, s8 *lna_5g,
191 			struct ieee80211_channel *chan);
192 void mt76x02_eeprom_parse_hw_cap(struct mt76x02_dev *dev);
193 int mt76x02_eeprom_copy(struct mt76x02_dev *dev,
194 			enum mt76x02_eeprom_field field,
195 			void *dest, int len);
196 
197 #endif /* __MT76x02_EEPROM_H */
198