1 /* 2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name> 3 * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl> 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef __MT76x02_H 19 #define __MT76x02_H 20 21 #include <linux/kfifo.h> 22 23 #include "mt76.h" 24 #include "mt76x02_regs.h" 25 #include "mt76x02_mac.h" 26 #include "mt76x02_dfs.h" 27 #include "mt76x02_dma.h" 28 29 #define MT_CALIBRATE_INTERVAL HZ 30 #define MT_MAC_WORK_INTERVAL (HZ / 10) 31 32 #define MT_WATCHDOG_TIME (HZ / 10) 33 #define MT_TX_HANG_TH 10 34 35 #define MT_MAX_CHAINS 2 36 struct mt76x02_rx_freq_cal { 37 s8 high_gain[MT_MAX_CHAINS]; 38 s8 rssi_offset[MT_MAX_CHAINS]; 39 s8 lna_gain; 40 u32 mcu_gain; 41 s16 temp_offset; 42 u8 freq_offset; 43 }; 44 45 struct mt76x02_calibration { 46 struct mt76x02_rx_freq_cal rx; 47 48 u8 agc_gain_init[MT_MAX_CHAINS]; 49 u8 agc_gain_cur[MT_MAX_CHAINS]; 50 51 u16 false_cca; 52 s8 avg_rssi_all; 53 s8 agc_gain_adjust; 54 s8 low_gain; 55 56 s8 temp_vco; 57 s8 temp; 58 59 bool init_cal_done; 60 bool tssi_cal_done; 61 bool tssi_comp_pending; 62 bool dpd_cal_done; 63 bool channel_cal_done; 64 bool gain_init_done; 65 66 int tssi_target; 67 s8 tssi_dc; 68 }; 69 70 struct mt76x02_dev { 71 struct mt76_dev mt76; /* must be first */ 72 73 struct mac_address macaddr_list[8]; 74 75 struct mutex phy_mutex; 76 77 u16 vif_mask; 78 79 u8 txdone_seq; 80 DECLARE_KFIFO_PTR(txstatus_fifo, struct mt76x02_tx_status); 81 82 struct sk_buff *rx_head; 83 84 struct tasklet_struct tx_tasklet; 85 struct tasklet_struct pre_tbtt_tasklet; 86 struct delayed_work cal_work; 87 struct delayed_work mac_work; 88 struct delayed_work wdt_work; 89 90 u32 aggr_stats[32]; 91 92 struct sk_buff *beacons[8]; 93 u8 beacon_mask; 94 u8 beacon_data_mask; 95 96 u8 tbtt_count; 97 u16 beacon_int; 98 99 u32 tx_hang_reset; 100 u8 tx_hang_check; 101 u8 mcu_timeout; 102 103 struct mt76x02_calibration cal; 104 105 s8 target_power; 106 s8 target_power_delta[2]; 107 bool enable_tpc; 108 109 bool no_2ghz; 110 111 u8 coverage_class; 112 u8 slottime; 113 114 struct mt76x02_dfs_pattern_detector dfs_pd; 115 116 /* edcca monitor */ 117 bool ed_tx_blocked; 118 bool ed_monitor; 119 u8 ed_trigger; 120 u8 ed_silent; 121 ktime_t ed_time; 122 }; 123 124 extern struct ieee80211_rate mt76x02_rates[12]; 125 126 void mt76x02_init_device(struct mt76x02_dev *dev); 127 void mt76x02_configure_filter(struct ieee80211_hw *hw, 128 unsigned int changed_flags, 129 unsigned int *total_flags, u64 multicast); 130 int mt76x02_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, 131 struct ieee80211_sta *sta); 132 void mt76x02_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 133 struct ieee80211_sta *sta); 134 135 void mt76x02_config_mac_addr_list(struct mt76x02_dev *dev); 136 137 int mt76x02_add_interface(struct ieee80211_hw *hw, 138 struct ieee80211_vif *vif); 139 void mt76x02_remove_interface(struct ieee80211_hw *hw, 140 struct ieee80211_vif *vif); 141 142 int mt76x02_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 143 struct ieee80211_ampdu_params *params); 144 int mt76x02_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 145 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 146 struct ieee80211_key_conf *key); 147 int mt76x02_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 148 u16 queue, const struct ieee80211_tx_queue_params *params); 149 void mt76x02_sta_rate_tbl_update(struct ieee80211_hw *hw, 150 struct ieee80211_vif *vif, 151 struct ieee80211_sta *sta); 152 s8 mt76x02_tx_get_max_txpwr_adj(struct mt76x02_dev *dev, 153 const struct ieee80211_tx_rate *rate); 154 s8 mt76x02_tx_get_txpwr_adj(struct mt76x02_dev *dev, s8 txpwr, 155 s8 max_txpwr_adj); 156 void mt76x02_wdt_work(struct work_struct *work); 157 void mt76x02_tx_set_txpwr_auto(struct mt76x02_dev *dev, s8 txpwr); 158 void mt76x02_set_tx_ackto(struct mt76x02_dev *dev); 159 void mt76x02_set_coverage_class(struct ieee80211_hw *hw, 160 s16 coverage_class); 161 int mt76x02_set_rts_threshold(struct ieee80211_hw *hw, u32 val); 162 int mt76x02_insert_hdr_pad(struct sk_buff *skb); 163 void mt76x02_remove_hdr_pad(struct sk_buff *skb, int len); 164 bool mt76x02_tx_status_data(struct mt76_dev *mdev, u8 *update); 165 void mt76x02_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 166 struct sk_buff *skb); 167 void mt76x02_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q); 168 irqreturn_t mt76x02_irq_handler(int irq, void *dev_instance); 169 void mt76x02_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control, 170 struct sk_buff *skb); 171 int mt76x02_tx_prepare_skb(struct mt76_dev *mdev, void *txwi, 172 struct sk_buff *skb, struct mt76_queue *q, 173 struct mt76_wcid *wcid, struct ieee80211_sta *sta, 174 u32 *tx_info); 175 void mt76x02_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 176 const u8 *mac); 177 void mt76x02_sw_scan_complete(struct ieee80211_hw *hw, 178 struct ieee80211_vif *vif); 179 void mt76x02_sta_ps(struct mt76_dev *dev, struct ieee80211_sta *sta, bool ps); 180 void mt76x02_bss_info_changed(struct ieee80211_hw *hw, 181 struct ieee80211_vif *vif, 182 struct ieee80211_bss_conf *info, u32 changed); 183 184 extern const u16 mt76x02_beacon_offsets[16]; 185 void mt76x02_init_beacon_config(struct mt76x02_dev *dev); 186 void mt76x02_set_irq_mask(struct mt76x02_dev *dev, u32 clear, u32 set); 187 void mt76x02_mac_start(struct mt76x02_dev *dev); 188 189 void mt76x02_init_debugfs(struct mt76x02_dev *dev); 190 191 static inline bool is_mt76x2(struct mt76x02_dev *dev) 192 { 193 return mt76_chip(&dev->mt76) == 0x7612 || 194 mt76_chip(&dev->mt76) == 0x7662 || 195 mt76_chip(&dev->mt76) == 0x7602; 196 } 197 198 static inline void mt76x02_irq_enable(struct mt76x02_dev *dev, u32 mask) 199 { 200 mt76x02_set_irq_mask(dev, 0, mask); 201 } 202 203 static inline void mt76x02_irq_disable(struct mt76x02_dev *dev, u32 mask) 204 { 205 mt76x02_set_irq_mask(dev, mask, 0); 206 } 207 208 static inline bool 209 mt76x02_wait_for_txrx_idle(struct mt76_dev *dev) 210 { 211 return __mt76_poll_msec(dev, MT_MAC_STATUS, 212 MT_MAC_STATUS_TX | MT_MAC_STATUS_RX, 213 0, 100); 214 } 215 216 static inline struct mt76x02_sta * 217 mt76x02_rx_get_sta(struct mt76_dev *dev, u8 idx) 218 { 219 struct mt76_wcid *wcid; 220 221 if (idx >= ARRAY_SIZE(dev->wcid)) 222 return NULL; 223 224 wcid = rcu_dereference(dev->wcid[idx]); 225 if (!wcid) 226 return NULL; 227 228 return container_of(wcid, struct mt76x02_sta, wcid); 229 } 230 231 static inline struct mt76_wcid * 232 mt76x02_rx_get_sta_wcid(struct mt76x02_sta *sta, bool unicast) 233 { 234 if (!sta) 235 return NULL; 236 237 if (unicast) 238 return &sta->wcid; 239 else 240 return &sta->vif->group_wcid; 241 } 242 243 #endif /* __MT76x02_H */ 244