1 /* 2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name> 3 * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl> 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef __MT76x02_H 19 #define __MT76x02_H 20 21 #include <linux/kfifo.h> 22 23 #include "mt76.h" 24 #include "mt76x02_regs.h" 25 #include "mt76x02_mac.h" 26 #include "mt76x02_dfs.h" 27 #include "mt76x02_dma.h" 28 29 #define MT_CALIBRATE_INTERVAL HZ 30 #define MT_MAC_WORK_INTERVAL (HZ / 10) 31 32 #define MT_WATCHDOG_TIME (HZ / 10) 33 #define MT_TX_HANG_TH 10 34 35 #define MT_MAX_CHAINS 2 36 struct mt76x02_rx_freq_cal { 37 s8 high_gain[MT_MAX_CHAINS]; 38 s8 rssi_offset[MT_MAX_CHAINS]; 39 s8 lna_gain; 40 u32 mcu_gain; 41 s16 temp_offset; 42 u8 freq_offset; 43 }; 44 45 struct mt76x02_calibration { 46 struct mt76x02_rx_freq_cal rx; 47 48 u8 agc_gain_init[MT_MAX_CHAINS]; 49 u8 agc_gain_cur[MT_MAX_CHAINS]; 50 51 u16 false_cca; 52 s8 avg_rssi_all; 53 s8 agc_gain_adjust; 54 s8 agc_lowest_gain; 55 s8 low_gain; 56 57 s8 temp_vco; 58 s8 temp; 59 60 bool init_cal_done; 61 bool tssi_cal_done; 62 bool tssi_comp_pending; 63 bool dpd_cal_done; 64 bool channel_cal_done; 65 bool gain_init_done; 66 67 int tssi_target; 68 s8 tssi_dc; 69 }; 70 71 struct mt76x02_beacon_ops { 72 unsigned int nslots; 73 unsigned int slot_size; 74 void (*pre_tbtt_enable) (struct mt76x02_dev *, bool); 75 void (*beacon_enable) (struct mt76x02_dev *, bool); 76 }; 77 78 struct mt76x02_dev { 79 struct mt76_dev mt76; /* must be first */ 80 81 struct mac_address macaddr_list[8]; 82 83 struct mutex phy_mutex; 84 85 u16 vif_mask; 86 87 u8 txdone_seq; 88 DECLARE_KFIFO_PTR(txstatus_fifo, struct mt76x02_tx_status); 89 spinlock_t txstatus_fifo_lock; 90 91 struct sk_buff *rx_head; 92 93 struct delayed_work cal_work; 94 struct delayed_work wdt_work; 95 96 struct hrtimer pre_tbtt_timer; 97 struct work_struct pre_tbtt_work; 98 99 const struct mt76x02_beacon_ops *beacon_ops; 100 101 u32 aggr_stats[32]; 102 103 struct sk_buff *beacons[8]; 104 u8 beacon_data_mask; 105 106 u8 tbtt_count; 107 108 u32 tx_hang_reset; 109 u8 tx_hang_check; 110 u8 mcu_timeout; 111 112 struct mt76x02_calibration cal; 113 114 s8 target_power; 115 s8 target_power_delta[2]; 116 bool enable_tpc; 117 118 bool no_2ghz; 119 120 u8 coverage_class; 121 u8 slottime; 122 123 struct mt76x02_dfs_pattern_detector dfs_pd; 124 125 /* edcca monitor */ 126 unsigned long ed_trigger_timeout; 127 bool ed_tx_blocked; 128 bool ed_monitor; 129 u8 ed_monitor_enabled; 130 u8 ed_monitor_learning; 131 u8 ed_trigger; 132 u8 ed_silent; 133 ktime_t ed_time; 134 }; 135 136 extern struct ieee80211_rate mt76x02_rates[12]; 137 138 void mt76x02_init_device(struct mt76x02_dev *dev); 139 void mt76x02_configure_filter(struct ieee80211_hw *hw, 140 unsigned int changed_flags, 141 unsigned int *total_flags, u64 multicast); 142 int mt76x02_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, 143 struct ieee80211_sta *sta); 144 void mt76x02_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 145 struct ieee80211_sta *sta); 146 147 void mt76x02_config_mac_addr_list(struct mt76x02_dev *dev); 148 149 int mt76x02_add_interface(struct ieee80211_hw *hw, 150 struct ieee80211_vif *vif); 151 void mt76x02_remove_interface(struct ieee80211_hw *hw, 152 struct ieee80211_vif *vif); 153 154 int mt76x02_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 155 struct ieee80211_ampdu_params *params); 156 int mt76x02_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 157 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 158 struct ieee80211_key_conf *key); 159 int mt76x02_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 160 u16 queue, const struct ieee80211_tx_queue_params *params); 161 void mt76x02_sta_rate_tbl_update(struct ieee80211_hw *hw, 162 struct ieee80211_vif *vif, 163 struct ieee80211_sta *sta); 164 s8 mt76x02_tx_get_max_txpwr_adj(struct mt76x02_dev *dev, 165 const struct ieee80211_tx_rate *rate); 166 s8 mt76x02_tx_get_txpwr_adj(struct mt76x02_dev *dev, s8 txpwr, 167 s8 max_txpwr_adj); 168 void mt76x02_wdt_work(struct work_struct *work); 169 void mt76x02_tx_set_txpwr_auto(struct mt76x02_dev *dev, s8 txpwr); 170 void mt76x02_set_tx_ackto(struct mt76x02_dev *dev); 171 void mt76x02_set_coverage_class(struct ieee80211_hw *hw, 172 s16 coverage_class); 173 int mt76x02_set_rts_threshold(struct ieee80211_hw *hw, u32 val); 174 void mt76x02_remove_hdr_pad(struct sk_buff *skb, int len); 175 bool mt76x02_tx_status_data(struct mt76_dev *mdev, u8 *update); 176 void mt76x02_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 177 struct sk_buff *skb); 178 void mt76x02_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q); 179 irqreturn_t mt76x02_irq_handler(int irq, void *dev_instance); 180 void mt76x02_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control, 181 struct sk_buff *skb); 182 int mt76x02_tx_prepare_skb(struct mt76_dev *mdev, void *txwi, 183 enum mt76_txq_id qid, struct mt76_wcid *wcid, 184 struct ieee80211_sta *sta, 185 struct mt76_tx_info *tx_info); 186 void mt76x02_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 187 const u8 *mac); 188 void mt76x02_sw_scan_complete(struct ieee80211_hw *hw, 189 struct ieee80211_vif *vif); 190 void mt76x02_sta_ps(struct mt76_dev *dev, struct ieee80211_sta *sta, bool ps); 191 void mt76x02_bss_info_changed(struct ieee80211_hw *hw, 192 struct ieee80211_vif *vif, 193 struct ieee80211_bss_conf *info, u32 changed); 194 195 struct beacon_bc_data { 196 struct mt76x02_dev *dev; 197 struct sk_buff_head q; 198 struct sk_buff *tail[8]; 199 }; 200 void mt76x02_init_beacon_config(struct mt76x02_dev *dev); 201 void mt76x02e_init_beacon_config(struct mt76x02_dev *dev); 202 void mt76x02_resync_beacon_timer(struct mt76x02_dev *dev); 203 void mt76x02_update_beacon_iter(void *priv, u8 *mac, struct ieee80211_vif *vif); 204 void mt76x02_enqueue_buffered_bc(struct mt76x02_dev *dev, 205 struct beacon_bc_data *data, 206 int max_nframes); 207 208 void mt76x02_mac_start(struct mt76x02_dev *dev); 209 210 void mt76x02_init_debugfs(struct mt76x02_dev *dev); 211 212 static inline bool is_mt76x0(struct mt76x02_dev *dev) 213 { 214 return mt76_chip(&dev->mt76) == 0x7610 || 215 mt76_chip(&dev->mt76) == 0x7630 || 216 mt76_chip(&dev->mt76) == 0x7650; 217 } 218 219 static inline bool is_mt76x2(struct mt76x02_dev *dev) 220 { 221 return mt76_chip(&dev->mt76) == 0x7612 || 222 mt76_chip(&dev->mt76) == 0x7662 || 223 mt76_chip(&dev->mt76) == 0x7602; 224 } 225 226 static inline void mt76x02_irq_enable(struct mt76x02_dev *dev, u32 mask) 227 { 228 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, 0, mask); 229 } 230 231 static inline void mt76x02_irq_disable(struct mt76x02_dev *dev, u32 mask) 232 { 233 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0); 234 } 235 236 static inline bool 237 mt76x02_wait_for_txrx_idle(struct mt76_dev *dev) 238 { 239 return __mt76_poll_msec(dev, MT_MAC_STATUS, 240 MT_MAC_STATUS_TX | MT_MAC_STATUS_RX, 241 0, 100); 242 } 243 244 static inline struct mt76x02_sta * 245 mt76x02_rx_get_sta(struct mt76_dev *dev, u8 idx) 246 { 247 struct mt76_wcid *wcid; 248 249 if (idx >= ARRAY_SIZE(dev->wcid)) 250 return NULL; 251 252 wcid = rcu_dereference(dev->wcid[idx]); 253 if (!wcid) 254 return NULL; 255 256 return container_of(wcid, struct mt76x02_sta, wcid); 257 } 258 259 static inline struct mt76_wcid * 260 mt76x02_rx_get_sta_wcid(struct mt76x02_sta *sta, bool unicast) 261 { 262 if (!sta) 263 return NULL; 264 265 if (unicast) 266 return &sta->wcid; 267 else 268 return &sta->vif->group_wcid; 269 } 270 271 #endif /* __MT76x02_H */ 272