1 /* 2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name> 3 * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl> 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef __MT76X02_UTIL_H 19 #define __MT76X02_UTIL_H 20 21 #include <linux/kfifo.h> 22 23 #include "mt76.h" 24 #include "mt76x02_regs.h" 25 #include "mt76x02_mac.h" 26 #include "mt76x02_dfs.h" 27 #include "mt76x02_dma.h" 28 29 #define MT_CALIBRATE_INTERVAL HZ 30 31 #define MT_MAX_CHAINS 2 32 struct mt76x02_rx_freq_cal { 33 s8 high_gain[MT_MAX_CHAINS]; 34 s8 rssi_offset[MT_MAX_CHAINS]; 35 s8 lna_gain; 36 u32 mcu_gain; 37 s16 temp_offset; 38 u8 freq_offset; 39 }; 40 41 struct mt76x02_calibration { 42 struct mt76x02_rx_freq_cal rx; 43 44 u8 agc_gain_init[MT_MAX_CHAINS]; 45 u8 agc_gain_cur[MT_MAX_CHAINS]; 46 47 u16 false_cca; 48 s8 avg_rssi_all; 49 s8 agc_gain_adjust; 50 s8 low_gain; 51 52 s8 temp_vco; 53 s8 temp; 54 55 bool init_cal_done; 56 bool tssi_cal_done; 57 bool tssi_comp_pending; 58 bool dpd_cal_done; 59 bool channel_cal_done; 60 bool gain_init_done; 61 62 int tssi_target; 63 s8 tssi_dc; 64 }; 65 66 struct mt76x02_dev { 67 struct mt76_dev mt76; /* must be first */ 68 69 struct mac_address macaddr_list[8]; 70 71 struct mutex phy_mutex; 72 73 u8 txdone_seq; 74 DECLARE_KFIFO_PTR(txstatus_fifo, struct mt76x02_tx_status); 75 76 struct sk_buff *rx_head; 77 78 struct tasklet_struct tx_tasklet; 79 struct tasklet_struct pre_tbtt_tasklet; 80 struct delayed_work cal_work; 81 struct delayed_work mac_work; 82 83 u32 aggr_stats[32]; 84 85 struct sk_buff *beacons[8]; 86 u8 beacon_mask; 87 u8 beacon_data_mask; 88 89 u8 tbtt_count; 90 u16 beacon_int; 91 92 struct mt76x02_calibration cal; 93 94 s8 target_power; 95 s8 target_power_delta[2]; 96 bool enable_tpc; 97 98 bool no_2ghz; 99 100 u8 coverage_class; 101 u8 slottime; 102 103 struct mt76x02_dfs_pattern_detector dfs_pd; 104 }; 105 106 extern struct ieee80211_rate mt76x02_rates[12]; 107 108 void mt76x02_init_device(struct mt76x02_dev *dev); 109 void mt76x02_configure_filter(struct ieee80211_hw *hw, 110 unsigned int changed_flags, 111 unsigned int *total_flags, u64 multicast); 112 int mt76x02_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, 113 struct ieee80211_sta *sta); 114 void mt76x02_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 115 struct ieee80211_sta *sta); 116 117 void mt76x02_config_mac_addr_list(struct mt76x02_dev *dev); 118 void mt76x02_vif_init(struct mt76x02_dev *dev, struct ieee80211_vif *vif, 119 unsigned int idx); 120 int mt76x02_add_interface(struct ieee80211_hw *hw, 121 struct ieee80211_vif *vif); 122 void mt76x02_remove_interface(struct ieee80211_hw *hw, 123 struct ieee80211_vif *vif); 124 125 int mt76x02_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 126 struct ieee80211_ampdu_params *params); 127 int mt76x02_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 128 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 129 struct ieee80211_key_conf *key); 130 int mt76x02_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 131 u16 queue, const struct ieee80211_tx_queue_params *params); 132 void mt76x02_sta_rate_tbl_update(struct ieee80211_hw *hw, 133 struct ieee80211_vif *vif, 134 struct ieee80211_sta *sta); 135 s8 mt76x02_tx_get_max_txpwr_adj(struct mt76x02_dev *dev, 136 const struct ieee80211_tx_rate *rate); 137 s8 mt76x02_tx_get_txpwr_adj(struct mt76x02_dev *dev, s8 txpwr, 138 s8 max_txpwr_adj); 139 void mt76x02_tx_set_txpwr_auto(struct mt76x02_dev *dev, s8 txpwr); 140 void mt76x02_set_tx_ackto(struct mt76x02_dev *dev); 141 void mt76x02_set_coverage_class(struct ieee80211_hw *hw, 142 s16 coverage_class); 143 int mt76x02_set_rts_threshold(struct ieee80211_hw *hw, u32 val); 144 int mt76x02_insert_hdr_pad(struct sk_buff *skb); 145 void mt76x02_remove_hdr_pad(struct sk_buff *skb, int len); 146 bool mt76x02_tx_status_data(struct mt76_dev *mdev, u8 *update); 147 void mt76x02_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 148 struct sk_buff *skb); 149 void mt76x02_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q); 150 irqreturn_t mt76x02_irq_handler(int irq, void *dev_instance); 151 void mt76x02_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control, 152 struct sk_buff *skb); 153 int mt76x02_tx_prepare_skb(struct mt76_dev *mdev, void *txwi, 154 struct sk_buff *skb, struct mt76_queue *q, 155 struct mt76_wcid *wcid, struct ieee80211_sta *sta, 156 u32 *tx_info); 157 void mt76x02_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 158 const u8 *mac); 159 void mt76x02_sw_scan_complete(struct ieee80211_hw *hw, 160 struct ieee80211_vif *vif); 161 int mt76x02_get_txpower(struct ieee80211_hw *hw, 162 struct ieee80211_vif *vif, int *dbm); 163 void mt76x02_sta_ps(struct mt76_dev *dev, struct ieee80211_sta *sta, bool ps); 164 void mt76x02_bss_info_changed(struct ieee80211_hw *hw, 165 struct ieee80211_vif *vif, 166 struct ieee80211_bss_conf *info, u32 changed); 167 168 extern const u16 mt76x02_beacon_offsets[16]; 169 void mt76x02_init_beacon_config(struct mt76x02_dev *dev); 170 void mt76x02_set_irq_mask(struct mt76x02_dev *dev, u32 clear, u32 set); 171 void mt76x02_mac_start(struct mt76x02_dev *dev); 172 173 void mt76x02_init_debugfs(struct mt76x02_dev *dev); 174 175 static inline bool is_mt76x2(struct mt76x02_dev *dev) 176 { 177 return mt76_chip(&dev->mt76) == 0x7612 || 178 mt76_chip(&dev->mt76) == 0x7662 || 179 mt76_chip(&dev->mt76) == 0x7602; 180 } 181 182 static inline void mt76x02_irq_enable(struct mt76x02_dev *dev, u32 mask) 183 { 184 mt76x02_set_irq_mask(dev, 0, mask); 185 } 186 187 static inline void mt76x02_irq_disable(struct mt76x02_dev *dev, u32 mask) 188 { 189 mt76x02_set_irq_mask(dev, mask, 0); 190 } 191 192 static inline bool 193 mt76x02_wait_for_txrx_idle(struct mt76_dev *dev) 194 { 195 return __mt76_poll_msec(dev, MT_MAC_STATUS, 196 MT_MAC_STATUS_TX | MT_MAC_STATUS_RX, 197 0, 100); 198 } 199 200 static inline struct mt76x02_sta * 201 mt76x02_rx_get_sta(struct mt76_dev *dev, u8 idx) 202 { 203 struct mt76_wcid *wcid; 204 205 if (idx >= ARRAY_SIZE(dev->wcid)) 206 return NULL; 207 208 wcid = rcu_dereference(dev->wcid[idx]); 209 if (!wcid) 210 return NULL; 211 212 return container_of(wcid, struct mt76x02_sta, wcid); 213 } 214 215 static inline struct mt76_wcid * 216 mt76x02_rx_get_sta_wcid(struct mt76x02_sta *sta, bool unicast) 217 { 218 if (!sta) 219 return NULL; 220 221 if (unicast) 222 return &sta->wcid; 223 else 224 return &sta->vif->group_wcid; 225 } 226 227 #endif 228