1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name> 4 */ 5 6 #include <linux/kernel.h> 7 #include <linux/module.h> 8 #include <linux/pci.h> 9 10 #include "mt76x0.h" 11 #include "mcu.h" 12 13 static int mt76x0e_start(struct ieee80211_hw *hw) 14 { 15 struct mt76x02_dev *dev = hw->priv; 16 17 mt76x02_mac_start(dev); 18 mt76x0_phy_calibrate(dev, true); 19 ieee80211_queue_delayed_work(dev->mt76.hw, &dev->mt76.mac_work, 20 MT_MAC_WORK_INTERVAL); 21 ieee80211_queue_delayed_work(dev->mt76.hw, &dev->cal_work, 22 MT_CALIBRATE_INTERVAL); 23 set_bit(MT76_STATE_RUNNING, &dev->mt76.state); 24 25 return 0; 26 } 27 28 static void mt76x0e_stop_hw(struct mt76x02_dev *dev) 29 { 30 cancel_delayed_work_sync(&dev->cal_work); 31 cancel_delayed_work_sync(&dev->mt76.mac_work); 32 33 if (!mt76_poll(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_TX_DMA_BUSY, 34 0, 1000)) 35 dev_warn(dev->mt76.dev, "TX DMA did not stop\n"); 36 mt76_clear(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_TX_DMA_EN); 37 38 mt76x0_mac_stop(dev); 39 40 if (!mt76_poll(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_RX_DMA_BUSY, 41 0, 1000)) 42 dev_warn(dev->mt76.dev, "TX DMA did not stop\n"); 43 mt76_clear(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_RX_DMA_EN); 44 } 45 46 static void mt76x0e_stop(struct ieee80211_hw *hw) 47 { 48 struct mt76x02_dev *dev = hw->priv; 49 50 clear_bit(MT76_STATE_RUNNING, &dev->mt76.state); 51 mt76x0e_stop_hw(dev); 52 } 53 54 static int 55 mt76x0e_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 56 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 57 struct ieee80211_key_conf *key) 58 { 59 struct mt76x02_dev *dev = hw->priv; 60 61 if (is_mt7630(dev)) 62 return -EOPNOTSUPP; 63 64 return mt76x02_set_key(hw, cmd, vif, sta, key); 65 } 66 67 static void 68 mt76x0e_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 69 u32 queues, bool drop) 70 { 71 } 72 73 static const struct ieee80211_ops mt76x0e_ops = { 74 .tx = mt76x02_tx, 75 .start = mt76x0e_start, 76 .stop = mt76x0e_stop, 77 .add_interface = mt76x02_add_interface, 78 .remove_interface = mt76x02_remove_interface, 79 .config = mt76x0_config, 80 .configure_filter = mt76x02_configure_filter, 81 .bss_info_changed = mt76x02_bss_info_changed, 82 .sta_state = mt76_sta_state, 83 .set_key = mt76x0e_set_key, 84 .conf_tx = mt76x02_conf_tx, 85 .sw_scan_start = mt76_sw_scan, 86 .sw_scan_complete = mt76x02_sw_scan_complete, 87 .ampdu_action = mt76x02_ampdu_action, 88 .sta_rate_tbl_update = mt76x02_sta_rate_tbl_update, 89 .wake_tx_queue = mt76_wake_tx_queue, 90 .get_survey = mt76_get_survey, 91 .get_txpower = mt76_get_txpower, 92 .flush = mt76x0e_flush, 93 .set_tim = mt76_set_tim, 94 .release_buffered_frames = mt76_release_buffered_frames, 95 .set_coverage_class = mt76x02_set_coverage_class, 96 .set_rts_threshold = mt76x02_set_rts_threshold, 97 }; 98 99 static int mt76x0e_register_device(struct mt76x02_dev *dev) 100 { 101 int err; 102 103 mt76x0_chip_onoff(dev, true, false); 104 if (!mt76x02_wait_for_mac(&dev->mt76)) 105 return -ETIMEDOUT; 106 107 mt76x02_dma_disable(dev); 108 err = mt76x0e_mcu_init(dev); 109 if (err < 0) 110 return err; 111 112 err = mt76x02_dma_init(dev); 113 if (err < 0) 114 return err; 115 116 err = mt76x0_init_hardware(dev); 117 if (err < 0) 118 return err; 119 120 mt76x02e_init_beacon_config(dev); 121 122 if (mt76_chip(&dev->mt76) == 0x7610) { 123 u16 val; 124 125 mt76_clear(dev, MT_COEXCFG0, BIT(0)); 126 127 val = mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_0); 128 if (!(val & MT_EE_NIC_CONF_0_PA_IO_CURRENT)) 129 mt76_set(dev, MT_XO_CTRL7, 0xc03); 130 } 131 132 mt76_clear(dev, 0x110, BIT(9)); 133 mt76_set(dev, MT_MAX_LEN_CFG, BIT(13)); 134 135 mt76_wr(dev, MT_CH_TIME_CFG, 136 MT_CH_TIME_CFG_TIMER_EN | 137 MT_CH_TIME_CFG_TX_AS_BUSY | 138 MT_CH_TIME_CFG_RX_AS_BUSY | 139 MT_CH_TIME_CFG_NAV_AS_BUSY | 140 MT_CH_TIME_CFG_EIFS_AS_BUSY | 141 MT_CH_CCA_RC_EN | 142 FIELD_PREP(MT_CH_TIME_CFG_CH_TIMER_CLR, 1)); 143 144 err = mt76x0_register_device(dev); 145 if (err < 0) 146 return err; 147 148 set_bit(MT76_STATE_INITIALIZED, &dev->mt76.state); 149 150 return 0; 151 } 152 153 static int 154 mt76x0e_probe(struct pci_dev *pdev, const struct pci_device_id *id) 155 { 156 static const struct mt76_driver_ops drv_ops = { 157 .txwi_size = sizeof(struct mt76x02_txwi), 158 .tx_aligned4_skbs = true, 159 .update_survey = mt76x02_update_channel, 160 .tx_prepare_skb = mt76x02_tx_prepare_skb, 161 .tx_complete_skb = mt76x02_tx_complete_skb, 162 .rx_skb = mt76x02_queue_rx_skb, 163 .rx_poll_complete = mt76x02_rx_poll_complete, 164 .sta_ps = mt76x02_sta_ps, 165 .sta_add = mt76x02_sta_add, 166 .sta_remove = mt76x02_sta_remove, 167 }; 168 struct mt76x02_dev *dev; 169 struct mt76_dev *mdev; 170 int ret; 171 172 ret = pcim_enable_device(pdev); 173 if (ret) 174 return ret; 175 176 ret = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev)); 177 if (ret) 178 return ret; 179 180 pci_set_master(pdev); 181 182 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 183 if (ret) 184 return ret; 185 186 mdev = mt76_alloc_device(&pdev->dev, sizeof(*dev), &mt76x0e_ops, 187 &drv_ops); 188 if (!mdev) 189 return -ENOMEM; 190 191 dev = container_of(mdev, struct mt76x02_dev, mt76); 192 mutex_init(&dev->phy_mutex); 193 194 mt76_mmio_init(mdev, pcim_iomap_table(pdev)[0]); 195 196 mdev->rev = mt76_rr(dev, MT_ASIC_VERSION); 197 dev_info(mdev->dev, "ASIC revision: %08x\n", mdev->rev); 198 199 ret = devm_request_irq(mdev->dev, pdev->irq, mt76x02_irq_handler, 200 IRQF_SHARED, KBUILD_MODNAME, dev); 201 if (ret) 202 goto error; 203 204 ret = mt76x0e_register_device(dev); 205 if (ret < 0) 206 goto error; 207 208 return 0; 209 210 error: 211 ieee80211_free_hw(mt76_hw(dev)); 212 return ret; 213 } 214 215 static void mt76x0e_cleanup(struct mt76x02_dev *dev) 216 { 217 clear_bit(MT76_STATE_INITIALIZED, &dev->mt76.state); 218 tasklet_disable(&dev->mt76.pre_tbtt_tasklet); 219 mt76x0_chip_onoff(dev, false, false); 220 mt76x0e_stop_hw(dev); 221 mt76x02_dma_cleanup(dev); 222 mt76x02_mcu_cleanup(dev); 223 } 224 225 static void 226 mt76x0e_remove(struct pci_dev *pdev) 227 { 228 struct mt76_dev *mdev = pci_get_drvdata(pdev); 229 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76); 230 231 mt76_unregister_device(mdev); 232 mt76x0e_cleanup(dev); 233 mt76_free_device(mdev); 234 } 235 236 static const struct pci_device_id mt76x0e_device_table[] = { 237 { PCI_DEVICE(0x14c3, 0x7630) }, 238 { PCI_DEVICE(0x14c3, 0x7650) }, 239 { }, 240 }; 241 242 MODULE_DEVICE_TABLE(pci, mt76x0e_device_table); 243 MODULE_FIRMWARE(MT7610E_FIRMWARE); 244 MODULE_FIRMWARE(MT7650E_FIRMWARE); 245 MODULE_LICENSE("Dual BSD/GPL"); 246 247 static struct pci_driver mt76x0e_driver = { 248 .name = KBUILD_MODNAME, 249 .id_table = mt76x0e_device_table, 250 .probe = mt76x0e_probe, 251 .remove = mt76x0e_remove, 252 }; 253 254 module_pci_driver(mt76x0e_driver); 255