1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name> 4 */ 5 6 #include <linux/kernel.h> 7 #include <linux/module.h> 8 #include <linux/pci.h> 9 10 #include "mt76x0.h" 11 #include "mcu.h" 12 13 static int mt76x0e_start(struct ieee80211_hw *hw) 14 { 15 struct mt76x02_dev *dev = hw->priv; 16 17 mt76x02_mac_start(dev); 18 mt76x0_phy_calibrate(dev, true); 19 ieee80211_queue_delayed_work(dev->mt76.hw, &dev->mphy.mac_work, 20 MT_MAC_WORK_INTERVAL); 21 ieee80211_queue_delayed_work(dev->mt76.hw, &dev->cal_work, 22 MT_CALIBRATE_INTERVAL); 23 set_bit(MT76_STATE_RUNNING, &dev->mphy.state); 24 25 return 0; 26 } 27 28 static void mt76x0e_stop_hw(struct mt76x02_dev *dev) 29 { 30 cancel_delayed_work_sync(&dev->cal_work); 31 cancel_delayed_work_sync(&dev->mphy.mac_work); 32 clear_bit(MT76_RESTART, &dev->mphy.state); 33 34 if (!mt76_poll(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_TX_DMA_BUSY, 35 0, 1000)) 36 dev_warn(dev->mt76.dev, "TX DMA did not stop\n"); 37 mt76_clear(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_TX_DMA_EN); 38 39 mt76x0_mac_stop(dev); 40 41 if (!mt76_poll(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_RX_DMA_BUSY, 42 0, 1000)) 43 dev_warn(dev->mt76.dev, "TX DMA did not stop\n"); 44 mt76_clear(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_RX_DMA_EN); 45 } 46 47 static void mt76x0e_stop(struct ieee80211_hw *hw) 48 { 49 struct mt76x02_dev *dev = hw->priv; 50 51 clear_bit(MT76_STATE_RUNNING, &dev->mphy.state); 52 mt76x0e_stop_hw(dev); 53 } 54 55 static void 56 mt76x0e_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 57 u32 queues, bool drop) 58 { 59 } 60 61 static const struct ieee80211_ops mt76x0e_ops = { 62 .tx = mt76x02_tx, 63 .start = mt76x0e_start, 64 .stop = mt76x0e_stop, 65 .add_interface = mt76x02_add_interface, 66 .remove_interface = mt76x02_remove_interface, 67 .config = mt76x0_config, 68 .configure_filter = mt76x02_configure_filter, 69 .bss_info_changed = mt76x02_bss_info_changed, 70 .sta_state = mt76_sta_state, 71 .sta_pre_rcu_remove = mt76_sta_pre_rcu_remove, 72 .set_key = mt76x02_set_key, 73 .conf_tx = mt76x02_conf_tx, 74 .sw_scan_start = mt76_sw_scan, 75 .sw_scan_complete = mt76x02_sw_scan_complete, 76 .ampdu_action = mt76x02_ampdu_action, 77 .sta_rate_tbl_update = mt76x02_sta_rate_tbl_update, 78 .wake_tx_queue = mt76_wake_tx_queue, 79 .get_survey = mt76_get_survey, 80 .get_txpower = mt76_get_txpower, 81 .flush = mt76x0e_flush, 82 .set_tim = mt76_set_tim, 83 .release_buffered_frames = mt76_release_buffered_frames, 84 .set_coverage_class = mt76x02_set_coverage_class, 85 .set_rts_threshold = mt76x02_set_rts_threshold, 86 .get_antenna = mt76_get_antenna, 87 .reconfig_complete = mt76x02_reconfig_complete, 88 }; 89 90 static int mt76x0e_register_device(struct mt76x02_dev *dev) 91 { 92 int err; 93 94 mt76x0_chip_onoff(dev, true, false); 95 if (!mt76x02_wait_for_mac(&dev->mt76)) 96 return -ETIMEDOUT; 97 98 mt76x02_dma_disable(dev); 99 err = mt76x0e_mcu_init(dev); 100 if (err < 0) 101 return err; 102 103 err = mt76x02_dma_init(dev); 104 if (err < 0) 105 return err; 106 107 err = mt76x0_init_hardware(dev); 108 if (err < 0) 109 return err; 110 111 mt76x02e_init_beacon_config(dev); 112 113 if (mt76_chip(&dev->mt76) == 0x7610) { 114 u16 val; 115 116 mt76_clear(dev, MT_COEXCFG0, BIT(0)); 117 118 val = mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_0); 119 if (!(val & MT_EE_NIC_CONF_0_PA_IO_CURRENT)) 120 mt76_set(dev, MT_XO_CTRL7, 0xc03); 121 } 122 123 mt76_clear(dev, 0x110, BIT(9)); 124 mt76_set(dev, MT_MAX_LEN_CFG, BIT(13)); 125 126 err = mt76x0_register_device(dev); 127 if (err < 0) 128 return err; 129 130 set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state); 131 132 return 0; 133 } 134 135 static int 136 mt76x0e_probe(struct pci_dev *pdev, const struct pci_device_id *id) 137 { 138 static const struct mt76_driver_ops drv_ops = { 139 .txwi_size = sizeof(struct mt76x02_txwi), 140 .drv_flags = MT_DRV_TX_ALIGNED4_SKBS | 141 MT_DRV_SW_RX_AIRTIME, 142 .survey_flags = SURVEY_INFO_TIME_TX, 143 .update_survey = mt76x02_update_channel, 144 .tx_prepare_skb = mt76x02_tx_prepare_skb, 145 .tx_complete_skb = mt76x02_tx_complete_skb, 146 .rx_skb = mt76x02_queue_rx_skb, 147 .rx_poll_complete = mt76x02_rx_poll_complete, 148 .sta_ps = mt76x02_sta_ps, 149 .sta_add = mt76x02_sta_add, 150 .sta_remove = mt76x02_sta_remove, 151 }; 152 struct mt76x02_dev *dev; 153 struct mt76_dev *mdev; 154 int ret; 155 156 ret = pcim_enable_device(pdev); 157 if (ret) 158 return ret; 159 160 ret = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev)); 161 if (ret) 162 return ret; 163 164 pci_set_master(pdev); 165 166 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 167 if (ret) 168 return ret; 169 170 mdev = mt76_alloc_device(&pdev->dev, sizeof(*dev), &mt76x0e_ops, 171 &drv_ops); 172 if (!mdev) 173 return -ENOMEM; 174 175 dev = container_of(mdev, struct mt76x02_dev, mt76); 176 mutex_init(&dev->phy_mutex); 177 178 mt76_mmio_init(mdev, pcim_iomap_table(pdev)[0]); 179 180 mdev->rev = mt76_rr(dev, MT_ASIC_VERSION); 181 dev_info(mdev->dev, "ASIC revision: %08x\n", mdev->rev); 182 183 mt76_wr(dev, MT_INT_MASK_CSR, 0); 184 185 ret = devm_request_irq(mdev->dev, pdev->irq, mt76x02_irq_handler, 186 IRQF_SHARED, KBUILD_MODNAME, dev); 187 if (ret) 188 goto error; 189 190 ret = mt76x0e_register_device(dev); 191 if (ret < 0) 192 goto error; 193 194 return 0; 195 196 error: 197 mt76_free_device(&dev->mt76); 198 199 return ret; 200 } 201 202 static void mt76x0e_cleanup(struct mt76x02_dev *dev) 203 { 204 clear_bit(MT76_STATE_INITIALIZED, &dev->mphy.state); 205 tasklet_disable(&dev->mt76.pre_tbtt_tasklet); 206 mt76x0_chip_onoff(dev, false, false); 207 mt76x0e_stop_hw(dev); 208 mt76_dma_cleanup(&dev->mt76); 209 mt76x02_mcu_cleanup(dev); 210 } 211 212 static void 213 mt76x0e_remove(struct pci_dev *pdev) 214 { 215 struct mt76_dev *mdev = pci_get_drvdata(pdev); 216 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76); 217 218 mt76_unregister_device(mdev); 219 mt76x0e_cleanup(dev); 220 mt76_free_device(mdev); 221 } 222 223 static const struct pci_device_id mt76x0e_device_table[] = { 224 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7610) }, 225 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7630) }, 226 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7650) }, 227 { }, 228 }; 229 230 MODULE_DEVICE_TABLE(pci, mt76x0e_device_table); 231 MODULE_FIRMWARE(MT7610E_FIRMWARE); 232 MODULE_FIRMWARE(MT7650E_FIRMWARE); 233 MODULE_LICENSE("Dual BSD/GPL"); 234 235 static struct pci_driver mt76x0e_driver = { 236 .name = KBUILD_MODNAME, 237 .id_table = mt76x0e_device_table, 238 .probe = mt76x0e_probe, 239 .remove = mt76x0e_remove, 240 }; 241 242 module_pci_driver(mt76x0e_driver); 243