1 /* 2 * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org> 3 * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl> 4 * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 8 * as published by the Free Software Foundation 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 16 #ifndef MT76X0U_H 17 #define MT76X0U_H 18 19 #include <linux/bitfield.h> 20 #include <linux/kernel.h> 21 #include <linux/device.h> 22 #include <linux/mutex.h> 23 #include <linux/usb.h> 24 #include <linux/completion.h> 25 #include <net/mac80211.h> 26 #include <linux/debugfs.h> 27 28 #include "../mt76.h" 29 #include "../mt76x02_regs.h" 30 #include "../mt76x02_mac.h" 31 32 #define MT_CALIBRATE_INTERVAL (4 * HZ) 33 34 #define MT_FREQ_CAL_INIT_DELAY (30 * HZ) 35 #define MT_FREQ_CAL_CHECK_INTERVAL (10 * HZ) 36 #define MT_FREQ_CAL_ADJ_INTERVAL (HZ / 2) 37 38 #define MT_BBP_REG_VERSION 0x00 39 40 #define MT_USB_AGGR_SIZE_LIMIT 21 /* * 1024B */ 41 #define MT_USB_AGGR_TIMEOUT 0x80 /* * 33ns */ 42 #define MT_RX_ORDER 3 43 #define MT_RX_URB_SIZE (PAGE_SIZE << MT_RX_ORDER) 44 45 struct mt76x0_dma_buf { 46 struct urb *urb; 47 void *buf; 48 dma_addr_t dma; 49 size_t len; 50 }; 51 52 struct mt76x0_mcu { 53 struct mutex mutex; 54 55 u8 msg_seq; 56 57 struct mt76x0_dma_buf resp; 58 59 struct mt76_reg_pair *reg_pairs; 60 unsigned int reg_pairs_len; 61 u32 reg_base; 62 bool burst_read; 63 }; 64 65 struct mac_stats { 66 u64 rx_stat[6]; 67 u64 tx_stat[6]; 68 u64 aggr_stat[2]; 69 u64 aggr_n[32]; 70 u64 zero_len_del[2]; 71 }; 72 73 #define N_RX_ENTRIES 16 74 struct mt76x0_rx_queue { 75 struct mt76x0_dev *dev; 76 77 struct mt76x0_dma_buf_rx { 78 struct urb *urb; 79 struct page *p; 80 } e[N_RX_ENTRIES]; 81 82 unsigned int start; 83 unsigned int end; 84 unsigned int entries; 85 unsigned int pending; 86 }; 87 88 #define N_TX_ENTRIES 64 89 90 struct mt76x0_tx_queue { 91 struct mt76x0_dev *dev; 92 93 struct mt76x0_dma_buf_tx { 94 struct urb *urb; 95 struct sk_buff *skb; 96 } e[N_TX_ENTRIES]; 97 98 unsigned int start; 99 unsigned int end; 100 unsigned int entries; 101 unsigned int used; 102 unsigned int fifo_seq; 103 }; 104 105 /* WCID allocation: 106 * 0: mcast wcid 107 * 1: bssid wcid 108 * 1...: STAs 109 * ...7e: group wcids 110 * 7f: reserved 111 */ 112 #define N_WCIDS 128 113 #define GROUP_WCID(idx) (254 - idx) 114 115 struct mt76x0_eeprom_params; 116 117 #define MT_EE_TEMPERATURE_SLOPE 39 118 #define MT_FREQ_OFFSET_INVALID -128 119 120 /* addr req mask */ 121 #define MT_VEND_TYPE_EEPROM BIT(31) 122 #define MT_VEND_TYPE_CFG BIT(30) 123 #define MT_VEND_TYPE_MASK (MT_VEND_TYPE_EEPROM | MT_VEND_TYPE_CFG) 124 125 #define MT_VEND_ADDR(type, n) (MT_VEND_TYPE_##type | (n)) 126 127 enum mt_bw { 128 MT_BW_20, 129 MT_BW_40, 130 }; 131 132 /** 133 * struct mt76x0_dev - adapter structure 134 * @lock: protects @wcid->tx_rate. 135 * @mac_lock: locks out mac80211's tx status and rx paths. 136 * @tx_lock: protects @tx_q and changes of MT76_STATE_*_STATS 137 * flags in @state. 138 * @rx_lock: protects @rx_q. 139 * @con_mon_lock: protects @ap_bssid, @bcn_*, @avg_rssi. 140 * @mutex: ensures exclusive access from mac80211 callbacks. 141 * @reg_atomic_mutex: ensures atomicity of indirect register accesses 142 * (accesses to RF and BBP). 143 * @hw_atomic_mutex: ensures exclusive access to HW during critical 144 * operations (power management, channel switch). 145 */ 146 struct mt76x0_dev { 147 struct mt76_dev mt76; /* must be first */ 148 149 struct mutex usb_ctrl_mtx; 150 u8 data[32]; 151 152 struct tasklet_struct rx_tasklet; 153 struct tasklet_struct tx_tasklet; 154 155 u8 out_ep[__MT_EP_OUT_MAX]; 156 u16 out_max_packet; 157 u8 in_ep[__MT_EP_IN_MAX]; 158 u16 in_max_packet; 159 160 unsigned long wcid_mask[DIV_ROUND_UP(N_WCIDS, BITS_PER_LONG)]; 161 unsigned long vif_mask; 162 163 struct mt76x0_mcu mcu; 164 165 struct delayed_work cal_work; 166 struct delayed_work mac_work; 167 168 struct workqueue_struct *stat_wq; 169 struct delayed_work stat_work; 170 171 struct mt76_wcid *mon_wcid; 172 struct mt76_wcid __rcu *wcid[N_WCIDS]; 173 174 spinlock_t mac_lock; 175 176 const u16 *beacon_offsets; 177 178 u8 macaddr[ETH_ALEN]; 179 struct mt76x0_eeprom_params *ee; 180 181 struct mutex reg_atomic_mutex; 182 struct mutex hw_atomic_mutex; 183 184 u32 debugfs_reg; 185 186 /* TX */ 187 spinlock_t tx_lock; 188 struct mt76x0_tx_queue *tx_q; 189 struct sk_buff_head tx_skb_done; 190 191 atomic_t avg_ampdu_len; 192 193 /* RX */ 194 spinlock_t rx_lock; 195 struct mt76x0_rx_queue rx_q; 196 197 /* Connection monitoring things */ 198 spinlock_t con_mon_lock; 199 u8 ap_bssid[ETH_ALEN]; 200 201 s8 bcn_freq_off; 202 u8 bcn_phy_mode; 203 204 int avg_rssi; /* starts at 0 and converges */ 205 206 u8 agc_save; 207 u16 chainmask; 208 209 struct mac_stats stats; 210 }; 211 212 struct mt76x0_wcid { 213 u8 idx; 214 u8 hw_key_idx; 215 216 u16 tx_rate; 217 bool tx_rate_set; 218 u8 tx_rate_nss; 219 }; 220 221 struct mt76x0_rxwi; 222 223 extern const struct ieee80211_ops mt76x0_ops; 224 225 static inline bool is_mt7610e(struct mt76x0_dev *dev) 226 { 227 /* TODO */ 228 return false; 229 } 230 231 void mt76x0_init_debugfs(struct mt76x0_dev *dev); 232 233 /* Compatibility with mt76 */ 234 #define mt76_rmw_field(_dev, _reg, _field, _val) \ 235 mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val)) 236 237 int mt76x0_write_reg_pairs(struct mt76x0_dev *dev, u32 base, 238 const struct mt76_reg_pair *data, int len); 239 int mt76x0_read_reg_pairs(struct mt76x0_dev *dev, u32 base, 240 struct mt76_reg_pair *data, int len); 241 int mt76x0_burst_write_regs(struct mt76x0_dev *dev, u32 offset, 242 const u32 *data, int n); 243 void mt76x0_addr_wr(struct mt76x0_dev *dev, const u32 offset, const u8 *addr); 244 245 /* Init */ 246 struct mt76x0_dev *mt76x0_alloc_device(struct device *dev); 247 int mt76x0_init_hardware(struct mt76x0_dev *dev); 248 int mt76x0_register_device(struct mt76x0_dev *dev); 249 void mt76x0_cleanup(struct mt76x0_dev *dev); 250 void mt76x0_chip_onoff(struct mt76x0_dev *dev, bool enable, bool reset); 251 252 int mt76x0_mac_start(struct mt76x0_dev *dev); 253 void mt76x0_mac_stop(struct mt76x0_dev *dev); 254 255 /* PHY */ 256 void mt76x0_phy_init(struct mt76x0_dev *dev); 257 int mt76x0_wait_bbp_ready(struct mt76x0_dev *dev); 258 void mt76x0_agc_save(struct mt76x0_dev *dev); 259 void mt76x0_agc_restore(struct mt76x0_dev *dev); 260 int mt76x0_phy_set_channel(struct mt76x0_dev *dev, 261 struct cfg80211_chan_def *chandef); 262 void mt76x0_phy_recalibrate_after_assoc(struct mt76x0_dev *dev); 263 int mt76x0_phy_get_rssi(struct mt76x0_dev *dev, struct mt76x0_rxwi *rxwi); 264 void mt76x0_phy_con_cal_onoff(struct mt76x0_dev *dev, 265 struct ieee80211_bss_conf *info); 266 267 /* MAC */ 268 void mt76x0_mac_work(struct work_struct *work); 269 void mt76x0_mac_set_protection(struct mt76x0_dev *dev, bool legacy_prot, 270 int ht_mode); 271 void mt76x0_mac_set_short_preamble(struct mt76x0_dev *dev, bool short_preamb); 272 void mt76x0_mac_config_tsf(struct mt76x0_dev *dev, bool enable, int interval); 273 void mt76x0_mac_set_ampdu_factor(struct mt76x0_dev *dev); 274 275 /* TX */ 276 void mt76x0_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control, 277 struct sk_buff *skb); 278 int mt76x0_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 279 u16 queue, const struct ieee80211_tx_queue_params *params); 280 void mt76x0_tx_status(struct mt76x0_dev *dev, struct sk_buff *skb); 281 void mt76x0_tx_stat(struct work_struct *work); 282 283 /* util */ 284 void mt76x0_remove_hdr_pad(struct sk_buff *skb); 285 int mt76x0_insert_hdr_pad(struct sk_buff *skb); 286 287 int mt76x0_dma_init(struct mt76x0_dev *dev); 288 void mt76x0_dma_cleanup(struct mt76x0_dev *dev); 289 290 int mt76x0_dma_enqueue_tx(struct mt76x0_dev *dev, struct sk_buff *skb, 291 struct mt76_wcid *wcid, int hw_q); 292 293 #endif 294