1 /* 2 * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org> 3 * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl> 4 * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 8 * as published by the Free Software Foundation 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 16 #ifndef MT76X0U_H 17 #define MT76X0U_H 18 19 #include <linux/bitfield.h> 20 #include <linux/kernel.h> 21 #include <linux/device.h> 22 #include <linux/mutex.h> 23 #include <linux/usb.h> 24 #include <linux/completion.h> 25 #include <net/mac80211.h> 26 #include <linux/debugfs.h> 27 28 #include "../mt76.h" 29 #include "../mt76x02_regs.h" 30 #include "../mt76x02_mac.h" 31 32 #define MT_CALIBRATE_INTERVAL (4 * HZ) 33 34 #define MT_FREQ_CAL_INIT_DELAY (30 * HZ) 35 #define MT_FREQ_CAL_CHECK_INTERVAL (10 * HZ) 36 #define MT_FREQ_CAL_ADJ_INTERVAL (HZ / 2) 37 38 #define MT_BBP_REG_VERSION 0x00 39 40 #define MT_USB_AGGR_SIZE_LIMIT 21 /* * 1024B */ 41 #define MT_USB_AGGR_TIMEOUT 0x80 /* * 33ns */ 42 43 struct mt76x0_dma_buf { 44 struct urb *urb; 45 void *buf; 46 dma_addr_t dma; 47 size_t len; 48 }; 49 50 struct mac_stats { 51 u64 rx_stat[6]; 52 u64 tx_stat[6]; 53 u64 aggr_stat[2]; 54 u64 aggr_n[32]; 55 u64 zero_len_del[2]; 56 }; 57 58 #define N_RX_ENTRIES 16 59 struct mt76x0_rx_queue { 60 struct mt76x0_dev *dev; 61 62 struct mt76x0_dma_buf_rx { 63 struct urb *urb; 64 struct page *p; 65 } e[N_RX_ENTRIES]; 66 67 unsigned int start; 68 unsigned int end; 69 unsigned int entries; 70 unsigned int pending; 71 }; 72 73 #define N_TX_ENTRIES 64 74 75 struct mt76x0_tx_queue { 76 struct mt76x0_dev *dev; 77 78 struct mt76x0_dma_buf_tx { 79 struct urb *urb; 80 struct sk_buff *skb; 81 } e[N_TX_ENTRIES]; 82 83 unsigned int start; 84 unsigned int end; 85 unsigned int entries; 86 unsigned int used; 87 unsigned int fifo_seq; 88 }; 89 90 struct mt76x0_eeprom_params; 91 92 #define MT_EE_TEMPERATURE_SLOPE 39 93 #define MT_FREQ_OFFSET_INVALID -128 94 95 /* addr req mask */ 96 #define MT_VEND_TYPE_EEPROM BIT(31) 97 #define MT_VEND_TYPE_CFG BIT(30) 98 #define MT_VEND_TYPE_MASK (MT_VEND_TYPE_EEPROM | MT_VEND_TYPE_CFG) 99 100 #define MT_VEND_ADDR(type, n) (MT_VEND_TYPE_##type | (n)) 101 102 enum mt_bw { 103 MT_BW_20, 104 MT_BW_40, 105 }; 106 107 /** 108 * struct mt76x0_dev - adapter structure 109 * @lock: protects @wcid->tx_rate. 110 * @mac_lock: locks out mac80211's tx status and rx paths. 111 * @tx_lock: protects @tx_q and changes of MT76_STATE_*_STATS 112 * flags in @state. 113 * @rx_lock: protects @rx_q. 114 * @con_mon_lock: protects @ap_bssid, @bcn_*, @avg_rssi. 115 * @mutex: ensures exclusive access from mac80211 callbacks. 116 * @reg_atomic_mutex: ensures atomicity of indirect register accesses 117 * (accesses to RF and BBP). 118 * @hw_atomic_mutex: ensures exclusive access to HW during critical 119 * operations (power management, channel switch). 120 */ 121 struct mt76x0_dev { 122 struct mt76_dev mt76; /* must be first */ 123 124 struct mutex usb_ctrl_mtx; 125 u8 data[32]; 126 127 u8 out_ep[__MT_EP_OUT_MAX]; 128 u16 out_max_packet; 129 u8 in_ep[__MT_EP_IN_MAX]; 130 u16 in_max_packet; 131 132 struct delayed_work cal_work; 133 struct delayed_work mac_work; 134 135 struct workqueue_struct *stat_wq; 136 struct delayed_work stat_work; 137 138 spinlock_t mac_lock; 139 140 const u16 *beacon_offsets; 141 142 u8 macaddr[ETH_ALEN]; 143 struct mt76x0_eeprom_params *ee; 144 145 struct mutex reg_atomic_mutex; 146 struct mutex hw_atomic_mutex; 147 148 u32 debugfs_reg; 149 150 /* TX */ 151 spinlock_t tx_lock; 152 struct mt76x0_tx_queue *tx_q; 153 154 atomic_t avg_ampdu_len; 155 156 /* RX */ 157 spinlock_t rx_lock; 158 struct mt76x0_rx_queue rx_q; 159 160 /* Connection monitoring things */ 161 spinlock_t con_mon_lock; 162 u8 ap_bssid[ETH_ALEN]; 163 164 s8 bcn_freq_off; 165 u8 bcn_phy_mode; 166 167 int avg_rssi; /* starts at 0 and converges */ 168 169 u8 agc_save; 170 u16 chainmask; 171 172 struct mac_stats stats; 173 }; 174 175 struct mt76x0_wcid { 176 u8 idx; 177 u8 hw_key_idx; 178 179 u16 tx_rate; 180 bool tx_rate_set; 181 u8 tx_rate_nss; 182 }; 183 184 extern const struct ieee80211_ops mt76x0_ops; 185 186 static inline bool is_mt7610e(struct mt76x0_dev *dev) 187 { 188 /* TODO */ 189 return false; 190 } 191 192 void mt76x0_init_debugfs(struct mt76x0_dev *dev); 193 194 /* Compatibility with mt76 */ 195 #define mt76_rmw_field(_dev, _reg, _field, _val) \ 196 mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val)) 197 198 int mt76x0_write_reg_pairs(struct mt76x0_dev *dev, u32 base, 199 const struct mt76_reg_pair *data, int len); 200 int mt76x0_read_reg_pairs(struct mt76x0_dev *dev, u32 base, 201 struct mt76_reg_pair *data, int len); 202 int mt76x0_burst_write_regs(struct mt76x0_dev *dev, u32 offset, 203 const u32 *data, int n); 204 void mt76x0_addr_wr(struct mt76x0_dev *dev, const u32 offset, const u8 *addr); 205 206 /* Init */ 207 struct mt76x0_dev *mt76x0_alloc_device(struct device *dev); 208 int mt76x0_init_hardware(struct mt76x0_dev *dev); 209 int mt76x0_register_device(struct mt76x0_dev *dev); 210 void mt76x0_cleanup(struct mt76x0_dev *dev); 211 void mt76x0_chip_onoff(struct mt76x0_dev *dev, bool enable, bool reset); 212 213 int mt76x0_mac_start(struct mt76x0_dev *dev); 214 void mt76x0_mac_stop(struct mt76x0_dev *dev); 215 216 /* PHY */ 217 void mt76x0_phy_init(struct mt76x0_dev *dev); 218 int mt76x0_wait_bbp_ready(struct mt76x0_dev *dev); 219 void mt76x0_agc_save(struct mt76x0_dev *dev); 220 void mt76x0_agc_restore(struct mt76x0_dev *dev); 221 int mt76x0_phy_set_channel(struct mt76x0_dev *dev, 222 struct cfg80211_chan_def *chandef); 223 void mt76x0_phy_recalibrate_after_assoc(struct mt76x0_dev *dev); 224 int mt76x0_phy_get_rssi(struct mt76x0_dev *dev, struct mt76x02_rxwi *rxwi); 225 void mt76x0_phy_con_cal_onoff(struct mt76x0_dev *dev, 226 struct ieee80211_bss_conf *info); 227 228 /* MAC */ 229 void mt76x0_mac_work(struct work_struct *work); 230 void mt76x0_mac_set_protection(struct mt76x0_dev *dev, bool legacy_prot, 231 int ht_mode); 232 void mt76x0_mac_set_short_preamble(struct mt76x0_dev *dev, bool short_preamb); 233 void mt76x0_mac_config_tsf(struct mt76x0_dev *dev, bool enable, int interval); 234 void mt76x0_mac_set_ampdu_factor(struct mt76x0_dev *dev); 235 236 /* TX */ 237 void mt76x0_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control, 238 struct sk_buff *skb); 239 void mt76x0_tx_status(struct mt76x0_dev *dev, struct sk_buff *skb); 240 void mt76x0_tx_stat(struct work_struct *work); 241 242 void mt76x0_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 243 struct sk_buff *skb); 244 245 int mt76x0_tx_prepare_skb(struct mt76_dev *mdev, void *data, 246 struct sk_buff *skb, struct mt76_queue *q, 247 struct mt76_wcid *wcid, struct ieee80211_sta *sta, 248 u32 *tx_info); 249 #endif 250