1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org> 4 * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl> 5 * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl> 6 */ 7 8 #include <linux/module.h> 9 #include <linux/of.h> 10 #include <linux/mtd/mtd.h> 11 #include <linux/mtd/partitions.h> 12 #include <linux/etherdevice.h> 13 #include <asm/unaligned.h> 14 #include "mt76x0.h" 15 #include "eeprom.h" 16 #include "../mt76x02_phy.h" 17 18 #define MT_MAP_READS DIV_ROUND_UP(MT_EFUSE_USAGE_MAP_SIZE, 16) 19 static int 20 mt76x0_efuse_physical_size_check(struct mt76x02_dev *dev) 21 { 22 u8 data[MT_MAP_READS * 16]; 23 int ret, i; 24 u32 start = 0, end = 0, cnt_free; 25 26 ret = mt76x02_get_efuse_data(dev, MT_EE_USAGE_MAP_START, data, 27 sizeof(data), MT_EE_PHYSICAL_READ); 28 if (ret) 29 return ret; 30 31 for (i = 0; i < MT_EFUSE_USAGE_MAP_SIZE; i++) 32 if (!data[i]) { 33 if (!start) 34 start = MT_EE_USAGE_MAP_START + i; 35 end = MT_EE_USAGE_MAP_START + i; 36 } 37 cnt_free = end - start + 1; 38 39 if (MT_EFUSE_USAGE_MAP_SIZE - cnt_free < 5) { 40 dev_err(dev->mt76.dev, 41 "driver does not support default EEPROM\n"); 42 return -EINVAL; 43 } 44 45 return 0; 46 } 47 48 static void mt76x0_set_chip_cap(struct mt76x02_dev *dev) 49 { 50 u16 nic_conf0 = mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_0); 51 u16 nic_conf1 = mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_1); 52 53 mt76x02_eeprom_parse_hw_cap(dev); 54 dev_dbg(dev->mt76.dev, "2GHz %d 5GHz %d\n", 55 dev->mt76.cap.has_2ghz, dev->mt76.cap.has_5ghz); 56 57 if (dev->no_2ghz) { 58 dev->mt76.cap.has_2ghz = false; 59 dev_dbg(dev->mt76.dev, "mask out 2GHz support\n"); 60 } 61 62 if (!mt76x02_field_valid(nic_conf1 & 0xff)) 63 nic_conf1 &= 0xff00; 64 65 if (nic_conf1 & MT_EE_NIC_CONF_1_HW_RF_CTRL) 66 dev_err(dev->mt76.dev, 67 "driver does not support HW RF ctrl\n"); 68 69 if (!mt76x02_field_valid(nic_conf0 >> 8)) 70 return; 71 72 if (FIELD_GET(MT_EE_NIC_CONF_0_RX_PATH, nic_conf0) > 1 || 73 FIELD_GET(MT_EE_NIC_CONF_0_TX_PATH, nic_conf0) > 1) 74 dev_err(dev->mt76.dev, "invalid tx-rx stream\n"); 75 } 76 77 static void mt76x0_set_temp_offset(struct mt76x02_dev *dev) 78 { 79 u8 val; 80 81 val = mt76x02_eeprom_get(dev, MT_EE_2G_TARGET_POWER) >> 8; 82 if (mt76x02_field_valid(val)) 83 dev->cal.rx.temp_offset = mt76x02_sign_extend(val, 8); 84 else 85 dev->cal.rx.temp_offset = -10; 86 } 87 88 static void mt76x0_set_freq_offset(struct mt76x02_dev *dev) 89 { 90 struct mt76x02_rx_freq_cal *caldata = &dev->cal.rx; 91 u8 val; 92 93 val = mt76x02_eeprom_get(dev, MT_EE_FREQ_OFFSET); 94 if (!mt76x02_field_valid(val)) 95 val = 0; 96 caldata->freq_offset = val; 97 98 val = mt76x02_eeprom_get(dev, MT_EE_TSSI_BOUND4) >> 8; 99 if (!mt76x02_field_valid(val)) 100 val = 0; 101 102 caldata->freq_offset -= mt76x02_sign_extend(val, 8); 103 } 104 105 void mt76x0_read_rx_gain(struct mt76x02_dev *dev) 106 { 107 struct ieee80211_channel *chan = dev->mt76.chandef.chan; 108 struct mt76x02_rx_freq_cal *caldata = &dev->cal.rx; 109 s8 val, lna_5g[3], lna_2g; 110 u16 rssi_offset; 111 int i; 112 113 mt76x02_get_rx_gain(dev, chan->band, &rssi_offset, &lna_2g, lna_5g); 114 caldata->lna_gain = mt76x02_get_lna_gain(dev, &lna_2g, lna_5g, chan); 115 116 for (i = 0; i < ARRAY_SIZE(caldata->rssi_offset); i++) { 117 val = rssi_offset >> (8 * i); 118 if (val < -10 || val > 10) 119 val = 0; 120 121 caldata->rssi_offset[i] = val; 122 } 123 } 124 125 static s8 mt76x0_get_delta(struct mt76x02_dev *dev) 126 { 127 struct cfg80211_chan_def *chandef = &dev->mt76.chandef; 128 u8 val; 129 130 if (chandef->width == NL80211_CHAN_WIDTH_80) { 131 val = mt76x02_eeprom_get(dev, MT_EE_5G_TARGET_POWER) >> 8; 132 } else if (chandef->width == NL80211_CHAN_WIDTH_40) { 133 u16 data; 134 135 data = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_DELTA_BW40); 136 if (chandef->chan->band == NL80211_BAND_5GHZ) 137 val = data >> 8; 138 else 139 val = data; 140 } else { 141 return 0; 142 } 143 144 return mt76x02_rate_power_val(val); 145 } 146 147 void mt76x0_get_tx_power_per_rate(struct mt76x02_dev *dev, 148 struct ieee80211_channel *chan, 149 struct mt76_rate_power *t) 150 { 151 bool is_2ghz = chan->band == NL80211_BAND_2GHZ; 152 u16 val, addr; 153 s8 delta; 154 155 memset(t, 0, sizeof(*t)); 156 157 /* cck 1M, 2M, 5.5M, 11M */ 158 val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_BYRATE_BASE); 159 t->cck[0] = t->cck[1] = s6_to_s8(val); 160 t->cck[2] = t->cck[3] = s6_to_s8(val >> 8); 161 162 /* ofdm 6M, 9M, 12M, 18M */ 163 addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 2 : 0x120; 164 val = mt76x02_eeprom_get(dev, addr); 165 t->ofdm[0] = t->ofdm[1] = s6_to_s8(val); 166 t->ofdm[2] = t->ofdm[3] = s6_to_s8(val >> 8); 167 168 /* ofdm 24M, 36M, 48M, 54M */ 169 addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 4 : 0x122; 170 val = mt76x02_eeprom_get(dev, addr); 171 t->ofdm[4] = t->ofdm[5] = s6_to_s8(val); 172 t->ofdm[6] = t->ofdm[7] = s6_to_s8(val >> 8); 173 174 /* ht-vht mcs 1ss 0, 1, 2, 3 */ 175 addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 6 : 0x124; 176 val = mt76x02_eeprom_get(dev, addr); 177 t->ht[0] = t->ht[1] = t->vht[0] = t->vht[1] = s6_to_s8(val); 178 t->ht[2] = t->ht[3] = t->vht[2] = t->vht[3] = s6_to_s8(val >> 8); 179 180 /* ht-vht mcs 1ss 4, 5, 6 */ 181 addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 8 : 0x126; 182 val = mt76x02_eeprom_get(dev, addr); 183 t->ht[4] = t->ht[5] = t->vht[4] = t->vht[5] = s6_to_s8(val); 184 t->ht[6] = t->ht[7] = t->vht[6] = t->vht[7] = s6_to_s8(val >> 8); 185 186 /* ht-vht mcs 1ss 0, 1, 2, 3 stbc */ 187 addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 14 : 0xec; 188 val = mt76x02_eeprom_get(dev, addr); 189 t->stbc[0] = t->stbc[1] = s6_to_s8(val); 190 t->stbc[2] = t->stbc[3] = s6_to_s8(val >> 8); 191 192 /* ht-vht mcs 1ss 4, 5, 6 stbc */ 193 addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 16 : 0xee; 194 val = mt76x02_eeprom_get(dev, addr); 195 t->stbc[4] = t->stbc[5] = s6_to_s8(val); 196 t->stbc[6] = t->stbc[7] = s6_to_s8(val >> 8); 197 198 /* vht mcs 8, 9 5GHz */ 199 val = mt76x02_eeprom_get(dev, 0x132); 200 t->vht[8] = s6_to_s8(val); 201 t->vht[9] = s6_to_s8(val >> 8); 202 203 delta = mt76x0_tssi_enabled(dev) ? 0 : mt76x0_get_delta(dev); 204 mt76x02_add_rate_power_offset(t, delta); 205 } 206 207 void mt76x0_get_power_info(struct mt76x02_dev *dev, 208 struct ieee80211_channel *chan, s8 *tp) 209 { 210 struct mt76x0_chan_map { 211 u8 chan; 212 u8 offset; 213 } chan_map[] = { 214 { 2, 0 }, { 4, 2 }, { 6, 4 }, { 8, 6 }, 215 { 10, 8 }, { 12, 10 }, { 14, 12 }, { 38, 0 }, 216 { 44, 2 }, { 48, 4 }, { 54, 6 }, { 60, 8 }, 217 { 64, 10 }, { 102, 12 }, { 108, 14 }, { 112, 16 }, 218 { 118, 18 }, { 124, 20 }, { 128, 22 }, { 134, 24 }, 219 { 140, 26 }, { 151, 28 }, { 157, 30 }, { 161, 32 }, 220 { 167, 34 }, { 171, 36 }, { 175, 38 }, 221 }; 222 u8 offset, addr; 223 int i, idx = 0; 224 u16 data; 225 226 if (mt76x0_tssi_enabled(dev)) { 227 s8 target_power; 228 229 if (chan->band == NL80211_BAND_5GHZ) 230 data = mt76x02_eeprom_get(dev, MT_EE_5G_TARGET_POWER); 231 else 232 data = mt76x02_eeprom_get(dev, MT_EE_2G_TARGET_POWER); 233 target_power = (data & 0xff) - dev->mt76.rate_power.ofdm[7]; 234 *tp = target_power + mt76x0_get_delta(dev); 235 236 return; 237 } 238 239 for (i = 0; i < ARRAY_SIZE(chan_map); i++) { 240 if (chan->hw_value <= chan_map[i].chan) { 241 idx = (chan->hw_value == chan_map[i].chan); 242 offset = chan_map[i].offset; 243 break; 244 } 245 } 246 if (i == ARRAY_SIZE(chan_map)) 247 offset = chan_map[0].offset; 248 249 if (chan->band == NL80211_BAND_2GHZ) { 250 addr = MT_EE_TX_POWER_DELTA_BW80 + offset; 251 } else { 252 switch (chan->hw_value) { 253 case 42: 254 offset = 2; 255 break; 256 case 58: 257 offset = 8; 258 break; 259 case 106: 260 offset = 14; 261 break; 262 case 122: 263 offset = 20; 264 break; 265 case 155: 266 offset = 30; 267 break; 268 default: 269 break; 270 } 271 addr = MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE + 2 + offset; 272 } 273 274 data = mt76x02_eeprom_get(dev, addr); 275 *tp = data >> (8 * idx); 276 if (*tp < 0 || *tp > 0x3f) 277 *tp = 5; 278 } 279 280 static int mt76x0_check_eeprom(struct mt76x02_dev *dev) 281 { 282 u16 val; 283 284 val = get_unaligned_le16(dev->mt76.eeprom.data); 285 if (!val) 286 val = get_unaligned_le16(dev->mt76.eeprom.data + 287 MT_EE_PCI_ID); 288 289 switch (val) { 290 case 0x7650: 291 case 0x7610: 292 return 0; 293 default: 294 dev_err(dev->mt76.dev, "EEPROM data check failed: %04x\n", 295 val); 296 return -EINVAL; 297 } 298 } 299 300 static int mt76x0_load_eeprom(struct mt76x02_dev *dev) 301 { 302 int found; 303 304 found = mt76_eeprom_init(&dev->mt76, MT76X0_EEPROM_SIZE); 305 if (found < 0) 306 return found; 307 308 if (found && !mt76x0_check_eeprom(dev)) 309 return 0; 310 311 found = mt76x0_efuse_physical_size_check(dev); 312 if (found < 0) 313 return found; 314 315 return mt76x02_get_efuse_data(dev, 0, dev->mt76.eeprom.data, 316 MT76X0_EEPROM_SIZE, MT_EE_READ); 317 } 318 319 int mt76x0_eeprom_init(struct mt76x02_dev *dev) 320 { 321 u8 version, fae; 322 u16 data; 323 int err; 324 325 err = mt76x0_load_eeprom(dev); 326 if (err < 0) 327 return err; 328 329 data = mt76x02_eeprom_get(dev, MT_EE_VERSION); 330 version = data >> 8; 331 fae = data; 332 333 if (version > MT76X0U_EE_MAX_VER) 334 dev_warn(dev->mt76.dev, 335 "Warning: unsupported EEPROM version %02hhx\n", 336 version); 337 dev_info(dev->mt76.dev, "EEPROM ver:%02hhx fae:%02hhx\n", 338 version, fae); 339 340 mt76x02_mac_setaddr(dev, dev->mt76.eeprom.data + MT_EE_MAC_ADDR); 341 mt76x0_set_chip_cap(dev); 342 mt76x0_set_freq_offset(dev); 343 mt76x0_set_temp_offset(dev); 344 345 return 0; 346 } 347 348 MODULE_LICENSE("Dual BSD/GPL"); 349