xref: /openbmc/linux/drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.c (revision 05cf4fe738242183f1237f1b3a28b4479348c0a1)
1 /*
2  * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
3  * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
4  * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2
8  * as published by the Free Software Foundation
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15 
16 #include <linux/module.h>
17 #include <linux/of.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/mtd/partitions.h>
20 #include <linux/etherdevice.h>
21 #include <asm/unaligned.h>
22 #include "mt76x0.h"
23 #include "eeprom.h"
24 #include "../mt76x02_phy.h"
25 
26 #define MT_MAP_READS	DIV_ROUND_UP(MT_EFUSE_USAGE_MAP_SIZE, 16)
27 static int
28 mt76x0_efuse_physical_size_check(struct mt76x02_dev *dev)
29 {
30 	u8 data[MT_MAP_READS * 16];
31 	int ret, i;
32 	u32 start = 0, end = 0, cnt_free;
33 
34 	ret = mt76x02_get_efuse_data(dev, MT_EE_USAGE_MAP_START, data,
35 				     sizeof(data), MT_EE_PHYSICAL_READ);
36 	if (ret)
37 		return ret;
38 
39 	for (i = 0; i < MT_EFUSE_USAGE_MAP_SIZE; i++)
40 		if (!data[i]) {
41 			if (!start)
42 				start = MT_EE_USAGE_MAP_START + i;
43 			end = MT_EE_USAGE_MAP_START + i;
44 		}
45 	cnt_free = end - start + 1;
46 
47 	if (MT_EFUSE_USAGE_MAP_SIZE - cnt_free < 5) {
48 		dev_err(dev->mt76.dev,
49 			"driver does not support default EEPROM\n");
50 		return -EINVAL;
51 	}
52 
53 	return 0;
54 }
55 
56 static void mt76x0_set_chip_cap(struct mt76x02_dev *dev)
57 {
58 	u16 nic_conf0 = mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_0);
59 	u16 nic_conf1 = mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_1);
60 
61 	mt76x02_eeprom_parse_hw_cap(dev);
62 	dev_dbg(dev->mt76.dev, "2GHz %d 5GHz %d\n",
63 		dev->mt76.cap.has_2ghz, dev->mt76.cap.has_5ghz);
64 
65 	if (dev->no_2ghz) {
66 		dev->mt76.cap.has_2ghz = false;
67 		dev_dbg(dev->mt76.dev, "mask out 2GHz support\n");
68 	}
69 
70 	if (!mt76x02_field_valid(nic_conf1 & 0xff))
71 		nic_conf1 &= 0xff00;
72 
73 	if (nic_conf1 & MT_EE_NIC_CONF_1_HW_RF_CTRL)
74 		dev_err(dev->mt76.dev,
75 			"driver does not support HW RF ctrl\n");
76 
77 	if (!mt76x02_field_valid(nic_conf0 >> 8))
78 		return;
79 
80 	if (FIELD_GET(MT_EE_NIC_CONF_0_RX_PATH, nic_conf0) > 1 ||
81 	    FIELD_GET(MT_EE_NIC_CONF_0_TX_PATH, nic_conf0) > 1)
82 		dev_err(dev->mt76.dev, "invalid tx-rx stream\n");
83 }
84 
85 static void mt76x0_set_temp_offset(struct mt76x02_dev *dev)
86 {
87 	u8 val;
88 
89 	val = mt76x02_eeprom_get(dev, MT_EE_2G_TARGET_POWER) >> 8;
90 	if (mt76x02_field_valid(val))
91 		dev->cal.rx.temp_offset = mt76x02_sign_extend(val, 8);
92 	else
93 		dev->cal.rx.temp_offset = -10;
94 }
95 
96 static void mt76x0_set_freq_offset(struct mt76x02_dev *dev)
97 {
98 	struct mt76x02_rx_freq_cal *caldata = &dev->cal.rx;
99 	u8 val;
100 
101 	val = mt76x02_eeprom_get(dev, MT_EE_FREQ_OFFSET);
102 	if (!mt76x02_field_valid(val))
103 		val = 0;
104 	caldata->freq_offset = val;
105 
106 	val = mt76x02_eeprom_get(dev, MT_EE_TSSI_BOUND4) >> 8;
107 	if (!mt76x02_field_valid(val))
108 		val = 0;
109 
110 	caldata->freq_offset -= mt76x02_sign_extend(val, 8);
111 }
112 
113 void mt76x0_read_rx_gain(struct mt76x02_dev *dev)
114 {
115 	struct ieee80211_channel *chan = dev->mt76.chandef.chan;
116 	struct mt76x02_rx_freq_cal *caldata = &dev->cal.rx;
117 	s8 val, lna_5g[3], lna_2g;
118 	u16 rssi_offset;
119 	int i;
120 
121 	mt76x02_get_rx_gain(dev, chan->band, &rssi_offset, &lna_2g, lna_5g);
122 	caldata->lna_gain = mt76x02_get_lna_gain(dev, &lna_2g, lna_5g, chan);
123 
124 	for (i = 0; i < ARRAY_SIZE(caldata->rssi_offset); i++) {
125 		val = rssi_offset >> (8 * i);
126 		if (val < -10 || val > 10)
127 			val = 0;
128 
129 		caldata->rssi_offset[i] = val;
130 	}
131 }
132 
133 static s8 mt76x0_get_delta(struct mt76x02_dev *dev)
134 {
135 	struct cfg80211_chan_def *chandef = &dev->mt76.chandef;
136 	u8 val;
137 
138 	if (mt76x0_tssi_enabled(dev))
139 		return 0;
140 
141 	if (chandef->width == NL80211_CHAN_WIDTH_80) {
142 		val = mt76x02_eeprom_get(dev, MT_EE_5G_TARGET_POWER) >> 8;
143 	} else if (chandef->width == NL80211_CHAN_WIDTH_40) {
144 		u16 data;
145 
146 		data = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_DELTA_BW40);
147 		if (chandef->chan->band == NL80211_BAND_5GHZ)
148 			val = data >> 8;
149 		else
150 			val = data;
151 	} else {
152 		return 0;
153 	}
154 
155 	return mt76x02_rate_power_val(val);
156 }
157 
158 void mt76x0_get_tx_power_per_rate(struct mt76x02_dev *dev)
159 {
160 	struct ieee80211_channel *chan = dev->mt76.chandef.chan;
161 	bool is_2ghz = chan->band == NL80211_BAND_2GHZ;
162 	struct mt76_rate_power *t = &dev->mt76.rate_power;
163 	s8 delta = mt76x0_get_delta(dev);
164 	u16 val, addr;
165 
166 	memset(t, 0, sizeof(*t));
167 
168 	/* cck 1M, 2M, 5.5M, 11M */
169 	val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_BYRATE_BASE);
170 	t->cck[0] = t->cck[1] = s6_to_s8(val);
171 	t->cck[2] = t->cck[3] = s6_to_s8(val >> 8);
172 
173 	/* ofdm 6M, 9M, 12M, 18M */
174 	addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 2 : 0x120;
175 	val = mt76x02_eeprom_get(dev, addr);
176 	t->ofdm[0] = t->ofdm[1] = s6_to_s8(val);
177 	t->ofdm[2] = t->ofdm[3] = s6_to_s8(val >> 8);
178 
179 	/* ofdm 24M, 36M, 48M, 54M */
180 	addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 4 : 0x122;
181 	val = mt76x02_eeprom_get(dev, addr);
182 	t->ofdm[4] = t->ofdm[5] = s6_to_s8(val);
183 	t->ofdm[6] = t->ofdm[7] = s6_to_s8(val >> 8);
184 
185 	/* ht-vht mcs 1ss 0, 1, 2, 3 */
186 	addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 6 : 0x124;
187 	val = mt76x02_eeprom_get(dev, addr);
188 	t->ht[0] = t->ht[1] = t->vht[0] = t->vht[1] = s6_to_s8(val);
189 	t->ht[2] = t->ht[3] = t->vht[2] = t->vht[3] = s6_to_s8(val >> 8);
190 
191 	/* ht-vht mcs 1ss 4, 5, 6 */
192 	addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 8 : 0x126;
193 	val = mt76x02_eeprom_get(dev, addr);
194 	t->ht[4] = t->ht[5] = t->vht[4] = t->vht[5] = s6_to_s8(val);
195 	t->ht[6] = t->vht[6] = s6_to_s8(val >> 8);
196 
197 	/* ht-vht mcs 1ss 0, 1, 2, 3 stbc */
198 	addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 14 : 0xec;
199 	val = mt76x02_eeprom_get(dev, addr);
200 	t->stbc[0] = t->stbc[1] = s6_to_s8(val);
201 	t->stbc[2] = t->stbc[3] = s6_to_s8(val >> 8);
202 
203 	/* ht-vht mcs 1ss 4, 5, 6 stbc */
204 	addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 16 : 0xee;
205 	val = mt76x02_eeprom_get(dev, addr);
206 	t->stbc[4] = t->stbc[5] = s6_to_s8(val);
207 	t->stbc[6] = t->stbc[7] = s6_to_s8(val >> 8);
208 
209 	/* vht mcs 8, 9 5GHz */
210 	val = mt76x02_eeprom_get(dev, 0x132);
211 	t->vht[7] = s6_to_s8(val);
212 	t->vht[8] = s6_to_s8(val >> 8);
213 
214 	mt76x02_add_rate_power_offset(t, delta);
215 }
216 
217 void mt76x0_get_power_info(struct mt76x02_dev *dev, u8 *info)
218 {
219 	struct mt76x0_chan_map {
220 		u8 chan;
221 		u8 offset;
222 	} chan_map[] = {
223 		{   2,  0 }, {   4,  1 }, {   6,  2 }, {   8,  3 },
224 		{  10,  4 }, {  12,  5 }, {  14,  6 }, {  38,  0 },
225 		{  44,  1 }, {  48,  2 }, {  54,  3 }, {  60,  4 },
226 		{  64,  5 }, { 102,  6 }, { 108,  7 }, { 112,  8 },
227 		{ 118,  9 }, { 124, 10 }, { 128, 11 }, { 134, 12 },
228 		{ 140, 13 }, { 151, 14 }, { 157, 15 }, { 161, 16 },
229 		{ 167, 17 }, { 171, 18 }, { 173, 19 },
230 	};
231 	struct ieee80211_channel *chan = dev->mt76.chandef.chan;
232 	u8 offset, addr;
233 	u16 data;
234 	int i;
235 
236 	for (i = 0; i < ARRAY_SIZE(chan_map); i++) {
237 		if (chan_map[i].chan <= chan->hw_value) {
238 			offset = chan_map[i].offset;
239 			break;
240 		}
241 	}
242 	if (i == ARRAY_SIZE(chan_map))
243 		offset = chan_map[0].offset;
244 
245 	if (chan->band == NL80211_BAND_2GHZ) {
246 		addr = MT_EE_TX_POWER_DELTA_BW80 + offset;
247 	} else {
248 		switch (chan->hw_value) {
249 		case 58:
250 			offset = 8;
251 			break;
252 		case 106:
253 			offset = 14;
254 			break;
255 		case 112:
256 			offset = 20;
257 			break;
258 		case 155:
259 			offset = 30;
260 			break;
261 		default:
262 			break;
263 		}
264 		addr = MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE + 2 + offset;
265 	}
266 
267 	data = mt76x02_eeprom_get(dev, addr);
268 
269 	info[0] = data;
270 	if (!info[0] || info[0] > 0x3f)
271 		info[0] = 5;
272 
273 	info[1] = data >> 8;
274 	if (!info[1] || info[1] > 0x3f)
275 		info[1] = 5;
276 }
277 
278 static int mt76x0_check_eeprom(struct mt76x02_dev *dev)
279 {
280 	u16 val;
281 
282 	val = get_unaligned_le16(dev->mt76.eeprom.data);
283 	if (!val)
284 		val = get_unaligned_le16(dev->mt76.eeprom.data +
285 					 MT_EE_PCI_ID);
286 
287 	switch (val) {
288 	case 0x7650:
289 	case 0x7610:
290 		return 0;
291 	default:
292 		dev_err(dev->mt76.dev, "EEPROM data check failed: %04x\n",
293 			val);
294 		return -EINVAL;
295 	}
296 }
297 
298 static int mt76x0_load_eeprom(struct mt76x02_dev *dev)
299 {
300 	int found;
301 
302 	found = mt76_eeprom_init(&dev->mt76, MT76X0_EEPROM_SIZE);
303 	if (found < 0)
304 		return found;
305 
306 	if (found && !mt76x0_check_eeprom(dev))
307 		return 0;
308 
309 	found = mt76x0_efuse_physical_size_check(dev);
310 	if (found < 0)
311 		return found;
312 
313 	return mt76x02_get_efuse_data(dev, 0, dev->mt76.eeprom.data,
314 				      MT76X0_EEPROM_SIZE, MT_EE_READ);
315 }
316 
317 int mt76x0_eeprom_init(struct mt76x02_dev *dev)
318 {
319 	u8 version, fae;
320 	u16 data;
321 	int err;
322 
323 	err = mt76x0_load_eeprom(dev);
324 	if (err < 0)
325 		return err;
326 
327 	data = mt76x02_eeprom_get(dev, MT_EE_VERSION);
328 	version = data >> 8;
329 	fae = data;
330 
331 	if (version > MT76X0U_EE_MAX_VER)
332 		dev_warn(dev->mt76.dev,
333 			 "Warning: unsupported EEPROM version %02hhx\n",
334 			 version);
335 	dev_info(dev->mt76.dev, "EEPROM ver:%02hhx fae:%02hhx\n",
336 		 version, fae);
337 
338 	mt76x02_mac_setaddr(dev, dev->mt76.eeprom.data + MT_EE_MAC_ADDR);
339 	mt76x0_set_chip_cap(dev);
340 	mt76x0_set_freq_offset(dev);
341 	mt76x0_set_temp_offset(dev);
342 
343 	dev->mt76.chainmask = 0x0101;
344 
345 	return 0;
346 }
347 
348 MODULE_LICENSE("Dual BSD/GPL");
349