1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2020 MediaTek Inc. */ 3 4 #include "mt76_connac.h" 5 #include "mt76_connac2_mac.h" 6 #include "dma.h" 7 8 #define HE_BITS(f) cpu_to_le16(IEEE80211_RADIOTAP_HE_##f) 9 #define HE_PREP(f, m, v) le16_encode_bits(le32_get_bits(v, MT_CRXV_HE_##m),\ 10 IEEE80211_RADIOTAP_HE_##f) 11 12 int mt76_connac_pm_wake(struct mt76_phy *phy, struct mt76_connac_pm *pm) 13 { 14 struct mt76_dev *dev = phy->dev; 15 16 if (mt76_is_usb(dev)) 17 return 0; 18 19 cancel_delayed_work_sync(&pm->ps_work); 20 if (!test_bit(MT76_STATE_PM, &phy->state)) 21 return 0; 22 23 if (pm->suspended) 24 return 0; 25 26 queue_work(dev->wq, &pm->wake_work); 27 if (!wait_event_timeout(pm->wait, 28 !test_bit(MT76_STATE_PM, &phy->state), 29 3 * HZ)) { 30 ieee80211_wake_queues(phy->hw); 31 return -ETIMEDOUT; 32 } 33 34 return 0; 35 } 36 EXPORT_SYMBOL_GPL(mt76_connac_pm_wake); 37 38 void mt76_connac_power_save_sched(struct mt76_phy *phy, 39 struct mt76_connac_pm *pm) 40 { 41 struct mt76_dev *dev = phy->dev; 42 43 if (mt76_is_usb(dev)) 44 return; 45 46 if (!pm->enable) 47 return; 48 49 if (pm->suspended) 50 return; 51 52 pm->last_activity = jiffies; 53 54 if (!test_bit(MT76_STATE_PM, &phy->state)) { 55 cancel_delayed_work(&phy->mac_work); 56 queue_delayed_work(dev->wq, &pm->ps_work, pm->idle_timeout); 57 } 58 } 59 EXPORT_SYMBOL_GPL(mt76_connac_power_save_sched); 60 61 void mt76_connac_free_pending_tx_skbs(struct mt76_connac_pm *pm, 62 struct mt76_wcid *wcid) 63 { 64 int i; 65 66 spin_lock_bh(&pm->txq_lock); 67 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 68 if (wcid && pm->tx_q[i].wcid != wcid) 69 continue; 70 71 dev_kfree_skb(pm->tx_q[i].skb); 72 pm->tx_q[i].skb = NULL; 73 } 74 spin_unlock_bh(&pm->txq_lock); 75 } 76 EXPORT_SYMBOL_GPL(mt76_connac_free_pending_tx_skbs); 77 78 void mt76_connac_pm_queue_skb(struct ieee80211_hw *hw, 79 struct mt76_connac_pm *pm, 80 struct mt76_wcid *wcid, 81 struct sk_buff *skb) 82 { 83 int qid = skb_get_queue_mapping(skb); 84 struct mt76_phy *phy = hw->priv; 85 86 spin_lock_bh(&pm->txq_lock); 87 if (!pm->tx_q[qid].skb) { 88 ieee80211_stop_queues(hw); 89 pm->tx_q[qid].wcid = wcid; 90 pm->tx_q[qid].skb = skb; 91 queue_work(phy->dev->wq, &pm->wake_work); 92 } else { 93 dev_kfree_skb(skb); 94 } 95 spin_unlock_bh(&pm->txq_lock); 96 } 97 EXPORT_SYMBOL_GPL(mt76_connac_pm_queue_skb); 98 99 void mt76_connac_pm_dequeue_skbs(struct mt76_phy *phy, 100 struct mt76_connac_pm *pm) 101 { 102 int i; 103 104 spin_lock_bh(&pm->txq_lock); 105 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 106 struct mt76_wcid *wcid = pm->tx_q[i].wcid; 107 struct ieee80211_sta *sta = NULL; 108 109 if (!pm->tx_q[i].skb) 110 continue; 111 112 if (wcid && wcid->sta) 113 sta = container_of((void *)wcid, struct ieee80211_sta, 114 drv_priv); 115 116 mt76_tx(phy, sta, wcid, pm->tx_q[i].skb); 117 pm->tx_q[i].skb = NULL; 118 } 119 spin_unlock_bh(&pm->txq_lock); 120 121 mt76_worker_schedule(&phy->dev->tx_worker); 122 } 123 EXPORT_SYMBOL_GPL(mt76_connac_pm_dequeue_skbs); 124 125 void mt76_connac_tx_complete_skb(struct mt76_dev *mdev, 126 struct mt76_queue_entry *e) 127 { 128 if (!e->txwi) { 129 dev_kfree_skb_any(e->skb); 130 return; 131 } 132 133 /* error path */ 134 if (e->skb == DMA_DUMMY_DATA) { 135 struct mt76_connac_txp_common *txp; 136 struct mt76_txwi_cache *t; 137 u16 token; 138 139 txp = mt76_connac_txwi_to_txp(mdev, e->txwi); 140 if (is_mt76_fw_txp(mdev)) 141 token = le16_to_cpu(txp->fw.token); 142 else 143 token = le16_to_cpu(txp->hw.msdu_id[0]) & 144 ~MT_MSDU_ID_VALID; 145 146 t = mt76_token_put(mdev, token); 147 e->skb = t ? t->skb : NULL; 148 } 149 150 if (e->skb) 151 mt76_tx_complete_skb(mdev, e->wcid, e->skb); 152 } 153 EXPORT_SYMBOL_GPL(mt76_connac_tx_complete_skb); 154 155 void mt76_connac_write_hw_txp(struct mt76_dev *dev, 156 struct mt76_tx_info *tx_info, 157 void *txp_ptr, u32 id) 158 { 159 struct mt76_connac_hw_txp *txp = txp_ptr; 160 struct mt76_connac_txp_ptr *ptr = &txp->ptr[0]; 161 int i, nbuf = tx_info->nbuf - 1; 162 u32 last_mask; 163 164 tx_info->buf[0].len = MT_TXD_SIZE + sizeof(*txp); 165 tx_info->nbuf = 1; 166 167 txp->msdu_id[0] = cpu_to_le16(id | MT_MSDU_ID_VALID); 168 169 if (is_mt7663(dev) || is_mt7921(dev)) 170 last_mask = MT_TXD_LEN_LAST; 171 else 172 last_mask = MT_TXD_LEN_AMSDU_LAST | 173 MT_TXD_LEN_MSDU_LAST; 174 175 for (i = 0; i < nbuf; i++) { 176 u16 len = tx_info->buf[i + 1].len & MT_TXD_LEN_MASK; 177 u32 addr = tx_info->buf[i + 1].addr; 178 179 if (i == nbuf - 1) 180 len |= last_mask; 181 182 if (i & 1) { 183 ptr->buf1 = cpu_to_le32(addr); 184 ptr->len1 = cpu_to_le16(len); 185 ptr++; 186 } else { 187 ptr->buf0 = cpu_to_le32(addr); 188 ptr->len0 = cpu_to_le16(len); 189 } 190 } 191 } 192 EXPORT_SYMBOL_GPL(mt76_connac_write_hw_txp); 193 194 static void 195 mt76_connac_txp_skb_unmap_fw(struct mt76_dev *mdev, 196 struct mt76_connac_fw_txp *txp) 197 { 198 struct device *dev = is_connac_v1(mdev) ? mdev->dev : mdev->dma_dev; 199 int i; 200 201 for (i = 0; i < txp->nbuf; i++) 202 dma_unmap_single(dev, le32_to_cpu(txp->buf[i]), 203 le16_to_cpu(txp->len[i]), DMA_TO_DEVICE); 204 } 205 206 static void 207 mt76_connac_txp_skb_unmap_hw(struct mt76_dev *dev, 208 struct mt76_connac_hw_txp *txp) 209 { 210 u32 last_mask; 211 int i; 212 213 if (is_mt7663(dev) || is_mt7921(dev)) 214 last_mask = MT_TXD_LEN_LAST; 215 else 216 last_mask = MT_TXD_LEN_MSDU_LAST; 217 218 for (i = 0; i < ARRAY_SIZE(txp->ptr); i++) { 219 struct mt76_connac_txp_ptr *ptr = &txp->ptr[i]; 220 bool last; 221 u16 len; 222 223 len = le16_to_cpu(ptr->len0); 224 last = len & last_mask; 225 len &= MT_TXD_LEN_MASK; 226 dma_unmap_single(dev->dev, le32_to_cpu(ptr->buf0), len, 227 DMA_TO_DEVICE); 228 if (last) 229 break; 230 231 len = le16_to_cpu(ptr->len1); 232 last = len & last_mask; 233 len &= MT_TXD_LEN_MASK; 234 dma_unmap_single(dev->dev, le32_to_cpu(ptr->buf1), len, 235 DMA_TO_DEVICE); 236 if (last) 237 break; 238 } 239 } 240 241 void mt76_connac_txp_skb_unmap(struct mt76_dev *dev, 242 struct mt76_txwi_cache *t) 243 { 244 struct mt76_connac_txp_common *txp; 245 246 txp = mt76_connac_txwi_to_txp(dev, t); 247 if (is_mt76_fw_txp(dev)) 248 mt76_connac_txp_skb_unmap_fw(dev, &txp->fw); 249 else 250 mt76_connac_txp_skb_unmap_hw(dev, &txp->hw); 251 } 252 EXPORT_SYMBOL_GPL(mt76_connac_txp_skb_unmap); 253 254 int mt76_connac_init_tx_queues(struct mt76_phy *phy, int idx, int n_desc, 255 int ring_base, u32 flags) 256 { 257 int i, err; 258 259 err = mt76_init_tx_queue(phy, 0, idx, n_desc, ring_base, flags); 260 if (err < 0) 261 return err; 262 263 for (i = 1; i <= MT_TXQ_PSD; i++) 264 phy->q_tx[i] = phy->q_tx[0]; 265 266 return 0; 267 } 268 EXPORT_SYMBOL_GPL(mt76_connac_init_tx_queues); 269 270 static u16 271 mt76_connac2_mac_tx_rate_val(struct mt76_phy *mphy, struct ieee80211_vif *vif, 272 bool beacon, bool mcast) 273 { 274 u8 mode = 0, band = mphy->chandef.chan->band; 275 int rateidx = 0, mcast_rate; 276 277 if (!vif) 278 goto legacy; 279 280 if (is_mt7921(mphy->dev)) { 281 rateidx = ffs(vif->bss_conf.basic_rates) - 1; 282 goto legacy; 283 } 284 285 if (beacon) { 286 struct cfg80211_bitrate_mask *mask; 287 288 mask = &vif->bss_conf.beacon_tx_rate; 289 if (hweight16(mask->control[band].he_mcs[0]) == 1) { 290 rateidx = ffs(mask->control[band].he_mcs[0]) - 1; 291 mode = MT_PHY_TYPE_HE_SU; 292 goto out; 293 } else if (hweight16(mask->control[band].vht_mcs[0]) == 1) { 294 rateidx = ffs(mask->control[band].vht_mcs[0]) - 1; 295 mode = MT_PHY_TYPE_VHT; 296 goto out; 297 } else if (hweight8(mask->control[band].ht_mcs[0]) == 1) { 298 rateidx = ffs(mask->control[band].ht_mcs[0]) - 1; 299 mode = MT_PHY_TYPE_HT; 300 goto out; 301 } else if (hweight32(mask->control[band].legacy) == 1) { 302 rateidx = ffs(mask->control[band].legacy) - 1; 303 goto legacy; 304 } 305 } 306 307 mcast_rate = vif->bss_conf.mcast_rate[band]; 308 if (mcast && mcast_rate > 0) 309 rateidx = mcast_rate - 1; 310 else 311 rateidx = ffs(vif->bss_conf.basic_rates) - 1; 312 313 legacy: 314 rateidx = mt76_calculate_default_rate(mphy, rateidx); 315 mode = rateidx >> 8; 316 rateidx &= GENMASK(7, 0); 317 318 out: 319 return FIELD_PREP(MT_TX_RATE_IDX, rateidx) | 320 FIELD_PREP(MT_TX_RATE_MODE, mode); 321 } 322 323 static void 324 mt76_connac2_mac_write_txwi_8023(__le32 *txwi, struct sk_buff *skb, 325 struct mt76_wcid *wcid) 326 { 327 u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK; 328 u8 fc_type, fc_stype; 329 u16 ethertype; 330 bool wmm = false; 331 u32 val; 332 333 if (wcid->sta) { 334 struct ieee80211_sta *sta; 335 336 sta = container_of((void *)wcid, struct ieee80211_sta, drv_priv); 337 wmm = sta->wme; 338 } 339 340 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_3) | 341 FIELD_PREP(MT_TXD1_TID, tid); 342 343 ethertype = get_unaligned_be16(&skb->data[12]); 344 if (ethertype >= ETH_P_802_3_MIN) 345 val |= MT_TXD1_ETH_802_3; 346 347 txwi[1] |= cpu_to_le32(val); 348 349 fc_type = IEEE80211_FTYPE_DATA >> 2; 350 fc_stype = wmm ? IEEE80211_STYPE_QOS_DATA >> 4 : 0; 351 352 val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) | 353 FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype); 354 355 txwi[2] |= cpu_to_le32(val); 356 357 val = FIELD_PREP(MT_TXD7_TYPE, fc_type) | 358 FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype); 359 360 txwi[7] |= cpu_to_le32(val); 361 } 362 363 static void 364 mt76_connac2_mac_write_txwi_80211(struct mt76_dev *dev, __le32 *txwi, 365 struct sk_buff *skb, 366 struct ieee80211_key_conf *key) 367 { 368 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 369 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; 370 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 371 bool multicast = is_multicast_ether_addr(hdr->addr1); 372 u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK; 373 __le16 fc = hdr->frame_control; 374 u8 fc_type, fc_stype; 375 u32 val; 376 377 if (ieee80211_is_action(fc) && 378 mgmt->u.action.category == WLAN_CATEGORY_BACK && 379 mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ) { 380 u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab); 381 382 txwi[5] |= cpu_to_le32(MT_TXD5_ADD_BA); 383 tid = (capab >> 2) & IEEE80211_QOS_CTL_TID_MASK; 384 } else if (ieee80211_is_back_req(hdr->frame_control)) { 385 struct ieee80211_bar *bar = (struct ieee80211_bar *)hdr; 386 u16 control = le16_to_cpu(bar->control); 387 388 tid = FIELD_GET(IEEE80211_BAR_CTRL_TID_INFO_MASK, control); 389 } 390 391 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) | 392 FIELD_PREP(MT_TXD1_HDR_INFO, 393 ieee80211_get_hdrlen_from_skb(skb) / 2) | 394 FIELD_PREP(MT_TXD1_TID, tid); 395 396 txwi[1] |= cpu_to_le32(val); 397 398 fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2; 399 fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4; 400 401 val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) | 402 FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype) | 403 FIELD_PREP(MT_TXD2_MULTICAST, multicast); 404 405 if (key && multicast && ieee80211_is_robust_mgmt_frame(skb) && 406 key->cipher == WLAN_CIPHER_SUITE_AES_CMAC) { 407 val |= MT_TXD2_BIP; 408 txwi[3] &= ~cpu_to_le32(MT_TXD3_PROTECT_FRAME); 409 } 410 411 if (!ieee80211_is_data(fc) || multicast || 412 info->flags & IEEE80211_TX_CTL_USE_MINRATE) 413 val |= MT_TXD2_FIX_RATE; 414 415 txwi[2] |= cpu_to_le32(val); 416 417 if (ieee80211_is_beacon(fc)) { 418 txwi[3] &= ~cpu_to_le32(MT_TXD3_SW_POWER_MGMT); 419 txwi[3] |= cpu_to_le32(MT_TXD3_REM_TX_COUNT); 420 } 421 422 if (info->flags & IEEE80211_TX_CTL_INJECTED) { 423 u16 seqno = le16_to_cpu(hdr->seq_ctrl); 424 425 if (ieee80211_is_back_req(hdr->frame_control)) { 426 struct ieee80211_bar *bar; 427 428 bar = (struct ieee80211_bar *)skb->data; 429 seqno = le16_to_cpu(bar->start_seq_num); 430 } 431 432 val = MT_TXD3_SN_VALID | 433 FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno)); 434 txwi[3] |= cpu_to_le32(val); 435 txwi[7] &= ~cpu_to_le32(MT_TXD7_HW_AMSDU); 436 } 437 438 if (mt76_is_mmio(dev)) { 439 val = FIELD_PREP(MT_TXD7_TYPE, fc_type) | 440 FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype); 441 txwi[7] |= cpu_to_le32(val); 442 } else { 443 val = FIELD_PREP(MT_TXD8_L_TYPE, fc_type) | 444 FIELD_PREP(MT_TXD8_L_SUB_TYPE, fc_stype); 445 txwi[8] |= cpu_to_le32(val); 446 } 447 } 448 449 void mt76_connac2_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi, 450 struct sk_buff *skb, struct mt76_wcid *wcid, 451 struct ieee80211_key_conf *key, int pid, 452 enum mt76_txq_id qid, u32 changed) 453 { 454 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 455 u8 phy_idx = (info->hw_queue & MT_TX_HW_QUEUE_PHY) >> 2; 456 struct ieee80211_vif *vif = info->control.vif; 457 struct mt76_phy *mphy = &dev->phy; 458 u8 p_fmt, q_idx, omac_idx = 0, wmm_idx = 0, band_idx = 0; 459 u32 val, sz_txd = mt76_is_mmio(dev) ? MT_TXD_SIZE : MT_SDIO_TXD_SIZE; 460 bool is_8023 = info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP; 461 bool beacon = !!(changed & (BSS_CHANGED_BEACON | 462 BSS_CHANGED_BEACON_ENABLED)); 463 bool inband_disc = !!(changed & (BSS_CHANGED_UNSOL_BCAST_PROBE_RESP | 464 BSS_CHANGED_FILS_DISCOVERY)); 465 466 if (vif) { 467 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 468 469 omac_idx = mvif->omac_idx; 470 wmm_idx = mvif->wmm_idx; 471 band_idx = mvif->band_idx; 472 } 473 474 if (phy_idx && dev->phys[MT_BAND1]) 475 mphy = dev->phys[MT_BAND1]; 476 477 if (inband_disc) { 478 p_fmt = MT_TX_TYPE_FW; 479 q_idx = MT_LMAC_ALTX0; 480 } else if (beacon) { 481 p_fmt = MT_TX_TYPE_FW; 482 q_idx = MT_LMAC_BCN0; 483 } else if (qid >= MT_TXQ_PSD) { 484 p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF; 485 q_idx = MT_LMAC_ALTX0; 486 } else { 487 p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF; 488 q_idx = wmm_idx * MT76_CONNAC_MAX_WMM_SETS + 489 mt76_connac_lmac_mapping(skb_get_queue_mapping(skb)); 490 491 /* counting non-offloading skbs */ 492 wcid->stats.tx_bytes += skb->len; 493 wcid->stats.tx_packets++; 494 } 495 496 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) | 497 FIELD_PREP(MT_TXD0_PKT_FMT, p_fmt) | 498 FIELD_PREP(MT_TXD0_Q_IDX, q_idx); 499 txwi[0] = cpu_to_le32(val); 500 501 val = MT_TXD1_LONG_FORMAT | 502 FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) | 503 FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx); 504 if (!is_mt7921(dev)) 505 val |= MT_TXD1_VTA; 506 if (phy_idx || band_idx) 507 val |= MT_TXD1_TGID; 508 509 txwi[1] = cpu_to_le32(val); 510 txwi[2] = 0; 511 512 val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, 15); 513 if (!is_mt7921(dev)) 514 val |= MT_TXD3_SW_POWER_MGMT; 515 if (key) 516 val |= MT_TXD3_PROTECT_FRAME; 517 if (info->flags & IEEE80211_TX_CTL_NO_ACK) 518 val |= MT_TXD3_NO_ACK; 519 520 txwi[3] = cpu_to_le32(val); 521 txwi[4] = 0; 522 523 val = FIELD_PREP(MT_TXD5_PID, pid); 524 if (pid >= MT_PACKET_ID_FIRST) 525 val |= MT_TXD5_TX_STATUS_HOST; 526 527 txwi[5] = cpu_to_le32(val); 528 txwi[6] = 0; 529 txwi[7] = wcid->amsdu ? cpu_to_le32(MT_TXD7_HW_AMSDU) : 0; 530 531 if (is_8023) 532 mt76_connac2_mac_write_txwi_8023(txwi, skb, wcid); 533 else 534 mt76_connac2_mac_write_txwi_80211(dev, txwi, skb, key); 535 536 if (txwi[2] & cpu_to_le32(MT_TXD2_FIX_RATE)) { 537 /* Fixed rata is available just for 802.11 txd */ 538 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 539 bool multicast = is_multicast_ether_addr(hdr->addr1); 540 u16 rate = mt76_connac2_mac_tx_rate_val(mphy, vif, beacon, 541 multicast); 542 u32 val = MT_TXD6_FIXED_BW; 543 544 /* hardware won't add HTC for mgmt/ctrl frame */ 545 txwi[2] |= cpu_to_le32(MT_TXD2_HTC_VLD); 546 547 val |= FIELD_PREP(MT_TXD6_TX_RATE, rate); 548 txwi[6] |= cpu_to_le32(val); 549 txwi[3] |= cpu_to_le32(MT_TXD3_BA_DISABLE); 550 551 if (!is_mt7921(dev)) { 552 u8 spe_idx = mt76_connac_spe_idx(mphy->antenna_mask); 553 554 if (!spe_idx) 555 spe_idx = 24 + phy_idx; 556 txwi[7] |= cpu_to_le32(FIELD_PREP(MT_TXD7_SPE_IDX, spe_idx)); 557 } 558 } 559 } 560 EXPORT_SYMBOL_GPL(mt76_connac2_mac_write_txwi); 561 562 bool mt76_connac2_mac_fill_txs(struct mt76_dev *dev, struct mt76_wcid *wcid, 563 __le32 *txs_data) 564 { 565 struct mt76_sta_stats *stats = &wcid->stats; 566 struct ieee80211_supported_band *sband; 567 struct mt76_phy *mphy; 568 struct rate_info rate = {}; 569 bool cck = false; 570 u32 txrate, txs, mode, stbc; 571 572 txs = le32_to_cpu(txs_data[0]); 573 574 /* PPDU based reporting */ 575 if (FIELD_GET(MT_TXS0_TXS_FORMAT, txs) > 1) { 576 stats->tx_bytes += 577 le32_get_bits(txs_data[5], MT_TXS5_MPDU_TX_BYTE); 578 stats->tx_packets += 579 le32_get_bits(txs_data[5], MT_TXS5_MPDU_TX_CNT); 580 stats->tx_failed += 581 le32_get_bits(txs_data[6], MT_TXS6_MPDU_FAIL_CNT); 582 stats->tx_retries += 583 le32_get_bits(txs_data[7], MT_TXS7_MPDU_RETRY_CNT); 584 } 585 586 txrate = FIELD_GET(MT_TXS0_TX_RATE, txs); 587 588 rate.mcs = FIELD_GET(MT_TX_RATE_IDX, txrate); 589 rate.nss = FIELD_GET(MT_TX_RATE_NSS, txrate) + 1; 590 stbc = FIELD_GET(MT_TX_RATE_STBC, txrate); 591 592 if (stbc && rate.nss > 1) 593 rate.nss >>= 1; 594 595 if (rate.nss - 1 < ARRAY_SIZE(stats->tx_nss)) 596 stats->tx_nss[rate.nss - 1]++; 597 if (rate.mcs < ARRAY_SIZE(stats->tx_mcs)) 598 stats->tx_mcs[rate.mcs]++; 599 600 mode = FIELD_GET(MT_TX_RATE_MODE, txrate); 601 switch (mode) { 602 case MT_PHY_TYPE_CCK: 603 cck = true; 604 fallthrough; 605 case MT_PHY_TYPE_OFDM: 606 mphy = &dev->phy; 607 if (wcid->phy_idx == MT_BAND1 && dev->phys[MT_BAND1]) 608 mphy = dev->phys[MT_BAND1]; 609 610 if (mphy->chandef.chan->band == NL80211_BAND_5GHZ) 611 sband = &mphy->sband_5g.sband; 612 else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ) 613 sband = &mphy->sband_6g.sband; 614 else 615 sband = &mphy->sband_2g.sband; 616 617 rate.mcs = mt76_get_rate(mphy->dev, sband, rate.mcs, cck); 618 rate.legacy = sband->bitrates[rate.mcs].bitrate; 619 break; 620 case MT_PHY_TYPE_HT: 621 case MT_PHY_TYPE_HT_GF: 622 if (rate.mcs > 31) 623 return false; 624 625 rate.flags = RATE_INFO_FLAGS_MCS; 626 if (wcid->rate.flags & RATE_INFO_FLAGS_SHORT_GI) 627 rate.flags |= RATE_INFO_FLAGS_SHORT_GI; 628 break; 629 case MT_PHY_TYPE_VHT: 630 if (rate.mcs > 9) 631 return false; 632 633 rate.flags = RATE_INFO_FLAGS_VHT_MCS; 634 break; 635 case MT_PHY_TYPE_HE_SU: 636 case MT_PHY_TYPE_HE_EXT_SU: 637 case MT_PHY_TYPE_HE_TB: 638 case MT_PHY_TYPE_HE_MU: 639 if (rate.mcs > 11) 640 return false; 641 642 rate.he_gi = wcid->rate.he_gi; 643 rate.he_dcm = FIELD_GET(MT_TX_RATE_DCM, txrate); 644 rate.flags = RATE_INFO_FLAGS_HE_MCS; 645 break; 646 default: 647 return false; 648 } 649 650 stats->tx_mode[mode]++; 651 652 switch (FIELD_GET(MT_TXS0_BW, txs)) { 653 case IEEE80211_STA_RX_BW_160: 654 rate.bw = RATE_INFO_BW_160; 655 stats->tx_bw[3]++; 656 break; 657 case IEEE80211_STA_RX_BW_80: 658 rate.bw = RATE_INFO_BW_80; 659 stats->tx_bw[2]++; 660 break; 661 case IEEE80211_STA_RX_BW_40: 662 rate.bw = RATE_INFO_BW_40; 663 stats->tx_bw[1]++; 664 break; 665 default: 666 rate.bw = RATE_INFO_BW_20; 667 stats->tx_bw[0]++; 668 break; 669 } 670 wcid->rate = rate; 671 672 return true; 673 } 674 EXPORT_SYMBOL_GPL(mt76_connac2_mac_fill_txs); 675 676 bool mt76_connac2_mac_add_txs_skb(struct mt76_dev *dev, struct mt76_wcid *wcid, 677 int pid, __le32 *txs_data) 678 { 679 struct sk_buff_head list; 680 struct sk_buff *skb; 681 682 mt76_tx_status_lock(dev, &list); 683 skb = mt76_tx_status_skb_get(dev, wcid, pid, &list); 684 if (skb) { 685 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 686 bool noacked = !(info->flags & IEEE80211_TX_STAT_ACK); 687 688 if (!(le32_to_cpu(txs_data[0]) & MT_TXS0_ACK_ERROR_MASK)) 689 info->flags |= IEEE80211_TX_STAT_ACK; 690 691 info->status.ampdu_len = 1; 692 info->status.ampdu_ack_len = !noacked; 693 info->status.rates[0].idx = -1; 694 695 wcid->stats.tx_failed += noacked; 696 697 mt76_connac2_mac_fill_txs(dev, wcid, txs_data); 698 mt76_tx_status_skb_done(dev, skb, &list); 699 } 700 mt76_tx_status_unlock(dev, &list); 701 702 return !!skb; 703 } 704 EXPORT_SYMBOL_GPL(mt76_connac2_mac_add_txs_skb); 705 706 static void 707 mt76_connac2_mac_decode_he_radiotap_ru(struct mt76_rx_status *status, 708 struct ieee80211_radiotap_he *he, 709 __le32 *rxv) 710 { 711 u32 ru_h, ru_l; 712 u8 ru, offs = 0; 713 714 ru_l = le32_get_bits(rxv[0], MT_PRXV_HE_RU_ALLOC_L); 715 ru_h = le32_get_bits(rxv[1], MT_PRXV_HE_RU_ALLOC_H); 716 ru = (u8)(ru_l | ru_h << 4); 717 718 status->bw = RATE_INFO_BW_HE_RU; 719 720 switch (ru) { 721 case 0 ... 36: 722 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_26; 723 offs = ru; 724 break; 725 case 37 ... 52: 726 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_52; 727 offs = ru - 37; 728 break; 729 case 53 ... 60: 730 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_106; 731 offs = ru - 53; 732 break; 733 case 61 ... 64: 734 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_242; 735 offs = ru - 61; 736 break; 737 case 65 ... 66: 738 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_484; 739 offs = ru - 65; 740 break; 741 case 67: 742 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_996; 743 break; 744 case 68: 745 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_2x996; 746 break; 747 } 748 749 he->data1 |= HE_BITS(DATA1_BW_RU_ALLOC_KNOWN); 750 he->data2 |= HE_BITS(DATA2_RU_OFFSET_KNOWN) | 751 le16_encode_bits(offs, 752 IEEE80211_RADIOTAP_HE_DATA2_RU_OFFSET); 753 } 754 755 static void 756 mt76_connac2_mac_decode_he_mu_radiotap(struct mt76_dev *dev, struct sk_buff *skb, 757 __le32 *rxv) 758 { 759 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 760 static struct ieee80211_radiotap_he_mu mu_known = { 761 .flags1 = HE_BITS(MU_FLAGS1_SIG_B_MCS_KNOWN) | 762 HE_BITS(MU_FLAGS1_SIG_B_DCM_KNOWN) | 763 HE_BITS(MU_FLAGS1_CH1_RU_KNOWN) | 764 HE_BITS(MU_FLAGS1_SIG_B_SYMS_USERS_KNOWN), 765 .flags2 = HE_BITS(MU_FLAGS2_BW_FROM_SIG_A_BW_KNOWN), 766 }; 767 struct ieee80211_radiotap_he_mu *he_mu; 768 769 if (is_mt7921(dev)) { 770 mu_known.flags1 |= HE_BITS(MU_FLAGS1_SIG_B_COMP_KNOWN); 771 mu_known.flags2 |= HE_BITS(MU_FLAGS2_PUNC_FROM_SIG_A_BW_KNOWN); 772 } 773 774 status->flag |= RX_FLAG_RADIOTAP_HE_MU; 775 776 he_mu = skb_push(skb, sizeof(mu_known)); 777 memcpy(he_mu, &mu_known, sizeof(mu_known)); 778 779 #define MU_PREP(f, v) le16_encode_bits(v, IEEE80211_RADIOTAP_HE_MU_##f) 780 781 he_mu->flags1 |= MU_PREP(FLAGS1_SIG_B_MCS, status->rate_idx); 782 if (status->he_dcm) 783 he_mu->flags1 |= MU_PREP(FLAGS1_SIG_B_DCM, status->he_dcm); 784 785 he_mu->flags2 |= MU_PREP(FLAGS2_BW_FROM_SIG_A_BW, status->bw) | 786 MU_PREP(FLAGS2_SIG_B_SYMS_USERS, 787 le32_get_bits(rxv[2], MT_CRXV_HE_NUM_USER)); 788 789 he_mu->ru_ch1[0] = le32_get_bits(rxv[3], MT_CRXV_HE_RU0); 790 791 if (status->bw >= RATE_INFO_BW_40) { 792 he_mu->flags1 |= HE_BITS(MU_FLAGS1_CH2_RU_KNOWN); 793 he_mu->ru_ch2[0] = 794 le32_get_bits(rxv[3], MT_CRXV_HE_RU1); 795 } 796 797 if (status->bw >= RATE_INFO_BW_80) { 798 he_mu->ru_ch1[1] = 799 le32_get_bits(rxv[3], MT_CRXV_HE_RU2); 800 he_mu->ru_ch2[1] = 801 le32_get_bits(rxv[3], MT_CRXV_HE_RU3); 802 } 803 } 804 805 void mt76_connac2_mac_decode_he_radiotap(struct mt76_dev *dev, 806 struct sk_buff *skb, 807 __le32 *rxv, u32 mode) 808 { 809 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 810 static const struct ieee80211_radiotap_he known = { 811 .data1 = HE_BITS(DATA1_DATA_MCS_KNOWN) | 812 HE_BITS(DATA1_DATA_DCM_KNOWN) | 813 HE_BITS(DATA1_STBC_KNOWN) | 814 HE_BITS(DATA1_CODING_KNOWN) | 815 HE_BITS(DATA1_LDPC_XSYMSEG_KNOWN) | 816 HE_BITS(DATA1_DOPPLER_KNOWN) | 817 HE_BITS(DATA1_SPTL_REUSE_KNOWN) | 818 HE_BITS(DATA1_BSS_COLOR_KNOWN), 819 .data2 = HE_BITS(DATA2_GI_KNOWN) | 820 HE_BITS(DATA2_TXBF_KNOWN) | 821 HE_BITS(DATA2_PE_DISAMBIG_KNOWN) | 822 HE_BITS(DATA2_TXOP_KNOWN), 823 }; 824 u32 ltf_size = le32_get_bits(rxv[2], MT_CRXV_HE_LTF_SIZE) + 1; 825 struct ieee80211_radiotap_he *he; 826 827 status->flag |= RX_FLAG_RADIOTAP_HE; 828 829 he = skb_push(skb, sizeof(known)); 830 memcpy(he, &known, sizeof(known)); 831 832 he->data3 = HE_PREP(DATA3_BSS_COLOR, BSS_COLOR, rxv[14]) | 833 HE_PREP(DATA3_LDPC_XSYMSEG, LDPC_EXT_SYM, rxv[2]); 834 he->data4 = HE_PREP(DATA4_SU_MU_SPTL_REUSE, SR_MASK, rxv[11]); 835 he->data5 = HE_PREP(DATA5_PE_DISAMBIG, PE_DISAMBIG, rxv[2]) | 836 le16_encode_bits(ltf_size, 837 IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE); 838 if (le32_to_cpu(rxv[0]) & MT_PRXV_TXBF) 839 he->data5 |= HE_BITS(DATA5_TXBF); 840 he->data6 = HE_PREP(DATA6_TXOP, TXOP_DUR, rxv[14]) | 841 HE_PREP(DATA6_DOPPLER, DOPPLER, rxv[14]); 842 843 switch (mode) { 844 case MT_PHY_TYPE_HE_SU: 845 he->data1 |= HE_BITS(DATA1_FORMAT_SU) | 846 HE_BITS(DATA1_UL_DL_KNOWN) | 847 HE_BITS(DATA1_BEAM_CHANGE_KNOWN) | 848 HE_BITS(DATA1_BW_RU_ALLOC_KNOWN); 849 850 he->data3 |= HE_PREP(DATA3_BEAM_CHANGE, BEAM_CHNG, rxv[14]) | 851 HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]); 852 break; 853 case MT_PHY_TYPE_HE_EXT_SU: 854 he->data1 |= HE_BITS(DATA1_FORMAT_EXT_SU) | 855 HE_BITS(DATA1_UL_DL_KNOWN) | 856 HE_BITS(DATA1_BW_RU_ALLOC_KNOWN); 857 858 he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]); 859 break; 860 case MT_PHY_TYPE_HE_MU: 861 he->data1 |= HE_BITS(DATA1_FORMAT_MU) | 862 HE_BITS(DATA1_UL_DL_KNOWN); 863 864 he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]); 865 he->data4 |= HE_PREP(DATA4_MU_STA_ID, MU_AID, rxv[7]); 866 867 mt76_connac2_mac_decode_he_radiotap_ru(status, he, rxv); 868 mt76_connac2_mac_decode_he_mu_radiotap(dev, skb, rxv); 869 break; 870 case MT_PHY_TYPE_HE_TB: 871 he->data1 |= HE_BITS(DATA1_FORMAT_TRIG) | 872 HE_BITS(DATA1_SPTL_REUSE2_KNOWN) | 873 HE_BITS(DATA1_SPTL_REUSE3_KNOWN) | 874 HE_BITS(DATA1_SPTL_REUSE4_KNOWN); 875 876 he->data4 |= HE_PREP(DATA4_TB_SPTL_REUSE1, SR_MASK, rxv[11]) | 877 HE_PREP(DATA4_TB_SPTL_REUSE2, SR1_MASK, rxv[11]) | 878 HE_PREP(DATA4_TB_SPTL_REUSE3, SR2_MASK, rxv[11]) | 879 HE_PREP(DATA4_TB_SPTL_REUSE4, SR3_MASK, rxv[11]); 880 881 mt76_connac2_mac_decode_he_radiotap_ru(status, he, rxv); 882 break; 883 default: 884 break; 885 } 886 } 887 EXPORT_SYMBOL_GPL(mt76_connac2_mac_decode_he_radiotap); 888 889 /* The HW does not translate the mac header to 802.3 for mesh point */ 890 int mt76_connac2_reverse_frag0_hdr_trans(struct ieee80211_vif *vif, 891 struct sk_buff *skb, u16 hdr_offset) 892 { 893 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 894 struct ethhdr *eth_hdr = (struct ethhdr *)(skb->data + hdr_offset); 895 __le32 *rxd = (__le32 *)skb->data; 896 struct ieee80211_sta *sta; 897 struct ieee80211_hdr hdr; 898 u16 frame_control; 899 900 if (le32_get_bits(rxd[3], MT_RXD3_NORMAL_ADDR_TYPE) != 901 MT_RXD3_NORMAL_U2M) 902 return -EINVAL; 903 904 if (!(le32_to_cpu(rxd[1]) & MT_RXD1_NORMAL_GROUP_4)) 905 return -EINVAL; 906 907 sta = container_of((void *)status->wcid, struct ieee80211_sta, drv_priv); 908 909 /* store the info from RXD and ethhdr to avoid being overridden */ 910 frame_control = le32_get_bits(rxd[6], MT_RXD6_FRAME_CONTROL); 911 hdr.frame_control = cpu_to_le16(frame_control); 912 hdr.seq_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_SEQ_CTRL)); 913 hdr.duration_id = 0; 914 915 ether_addr_copy(hdr.addr1, vif->addr); 916 ether_addr_copy(hdr.addr2, sta->addr); 917 switch (frame_control & (IEEE80211_FCTL_TODS | 918 IEEE80211_FCTL_FROMDS)) { 919 case 0: 920 ether_addr_copy(hdr.addr3, vif->bss_conf.bssid); 921 break; 922 case IEEE80211_FCTL_FROMDS: 923 ether_addr_copy(hdr.addr3, eth_hdr->h_source); 924 break; 925 case IEEE80211_FCTL_TODS: 926 ether_addr_copy(hdr.addr3, eth_hdr->h_dest); 927 break; 928 case IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS: 929 ether_addr_copy(hdr.addr3, eth_hdr->h_dest); 930 ether_addr_copy(hdr.addr4, eth_hdr->h_source); 931 break; 932 default: 933 break; 934 } 935 936 skb_pull(skb, hdr_offset + sizeof(struct ethhdr) - 2); 937 if (eth_hdr->h_proto == cpu_to_be16(ETH_P_AARP) || 938 eth_hdr->h_proto == cpu_to_be16(ETH_P_IPX)) 939 ether_addr_copy(skb_push(skb, ETH_ALEN), bridge_tunnel_header); 940 else if (be16_to_cpu(eth_hdr->h_proto) >= ETH_P_802_3_MIN) 941 ether_addr_copy(skb_push(skb, ETH_ALEN), rfc1042_header); 942 else 943 skb_pull(skb, 2); 944 945 if (ieee80211_has_order(hdr.frame_control)) 946 memcpy(skb_push(skb, IEEE80211_HT_CTL_LEN), &rxd[9], 947 IEEE80211_HT_CTL_LEN); 948 if (ieee80211_is_data_qos(hdr.frame_control)) { 949 __le16 qos_ctrl; 950 951 qos_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_QOS_CTL)); 952 memcpy(skb_push(skb, IEEE80211_QOS_CTL_LEN), &qos_ctrl, 953 IEEE80211_QOS_CTL_LEN); 954 } 955 956 if (ieee80211_has_a4(hdr.frame_control)) 957 memcpy(skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr)); 958 else 959 memcpy(skb_push(skb, sizeof(hdr) - 6), &hdr, sizeof(hdr) - 6); 960 961 return 0; 962 } 963 EXPORT_SYMBOL_GPL(mt76_connac2_reverse_frag0_hdr_trans); 964 965 int mt76_connac2_mac_fill_rx_rate(struct mt76_dev *dev, 966 struct mt76_rx_status *status, 967 struct ieee80211_supported_band *sband, 968 __le32 *rxv, u8 *mode) 969 { 970 u32 v0, v2; 971 u8 stbc, gi, bw, dcm, nss; 972 int i, idx; 973 bool cck = false; 974 975 v0 = le32_to_cpu(rxv[0]); 976 v2 = le32_to_cpu(rxv[2]); 977 978 idx = i = FIELD_GET(MT_PRXV_TX_RATE, v0); 979 nss = FIELD_GET(MT_PRXV_NSTS, v0) + 1; 980 981 if (!is_mt7915(dev)) { 982 stbc = FIELD_GET(MT_PRXV_HT_STBC, v0); 983 gi = FIELD_GET(MT_PRXV_HT_SGI, v0); 984 *mode = FIELD_GET(MT_PRXV_TX_MODE, v0); 985 if (is_mt7921(dev)) 986 dcm = !!(idx & MT_PRXV_TX_DCM); 987 else 988 dcm = FIELD_GET(MT_PRXV_DCM, v0); 989 bw = FIELD_GET(MT_PRXV_FRAME_MODE, v0); 990 } else { 991 stbc = FIELD_GET(MT_CRXV_HT_STBC, v2); 992 gi = FIELD_GET(MT_CRXV_HT_SHORT_GI, v2); 993 *mode = FIELD_GET(MT_CRXV_TX_MODE, v2); 994 dcm = !!(idx & GENMASK(3, 0) & MT_PRXV_TX_DCM); 995 bw = FIELD_GET(MT_CRXV_FRAME_MODE, v2); 996 } 997 998 switch (*mode) { 999 case MT_PHY_TYPE_CCK: 1000 cck = true; 1001 fallthrough; 1002 case MT_PHY_TYPE_OFDM: 1003 i = mt76_get_rate(dev, sband, i, cck); 1004 break; 1005 case MT_PHY_TYPE_HT_GF: 1006 case MT_PHY_TYPE_HT: 1007 status->encoding = RX_ENC_HT; 1008 if (gi) 1009 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 1010 if (i > 31) 1011 return -EINVAL; 1012 break; 1013 case MT_PHY_TYPE_VHT: 1014 status->nss = nss; 1015 status->encoding = RX_ENC_VHT; 1016 if (gi) 1017 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 1018 if (i > 11) 1019 return -EINVAL; 1020 break; 1021 case MT_PHY_TYPE_HE_MU: 1022 case MT_PHY_TYPE_HE_SU: 1023 case MT_PHY_TYPE_HE_EXT_SU: 1024 case MT_PHY_TYPE_HE_TB: 1025 status->nss = nss; 1026 status->encoding = RX_ENC_HE; 1027 i &= GENMASK(3, 0); 1028 1029 if (gi <= NL80211_RATE_INFO_HE_GI_3_2) 1030 status->he_gi = gi; 1031 1032 status->he_dcm = dcm; 1033 break; 1034 default: 1035 return -EINVAL; 1036 } 1037 status->rate_idx = i; 1038 1039 switch (bw) { 1040 case IEEE80211_STA_RX_BW_20: 1041 break; 1042 case IEEE80211_STA_RX_BW_40: 1043 if (*mode & MT_PHY_TYPE_HE_EXT_SU && 1044 (idx & MT_PRXV_TX_ER_SU_106T)) { 1045 status->bw = RATE_INFO_BW_HE_RU; 1046 status->he_ru = 1047 NL80211_RATE_INFO_HE_RU_ALLOC_106; 1048 } else { 1049 status->bw = RATE_INFO_BW_40; 1050 } 1051 break; 1052 case IEEE80211_STA_RX_BW_80: 1053 status->bw = RATE_INFO_BW_80; 1054 break; 1055 case IEEE80211_STA_RX_BW_160: 1056 status->bw = RATE_INFO_BW_160; 1057 break; 1058 default: 1059 return -EINVAL; 1060 } 1061 1062 status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc; 1063 if (*mode < MT_PHY_TYPE_HE_SU && gi) 1064 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 1065 1066 return 0; 1067 } 1068 EXPORT_SYMBOL_GPL(mt76_connac2_mac_fill_rx_rate); 1069