1 /* SPDX-License-Identifier: ISC */ 2 /* Copyright (C) 2020 MediaTek Inc. */ 3 4 #ifndef __MT76_CONNAC_H 5 #define __MT76_CONNAC_H 6 7 #include "mt76.h" 8 9 #define MT76_CONNAC_SCAN_IE_LEN 600 10 #define MT76_CONNAC_MAX_SCHED_SCAN_INTERVAL 10 11 #define MT76_CONNAC_MAX_SCHED_SCAN_SSID 10 12 #define MT76_CONNAC_MAX_SCAN_MATCH 16 13 14 #define MT76_CONNAC_COREDUMP_TIMEOUT (HZ / 20) 15 #define MT76_CONNAC_COREDUMP_SZ (128 * 1024) 16 17 enum { 18 CMD_CBW_20MHZ = IEEE80211_STA_RX_BW_20, 19 CMD_CBW_40MHZ = IEEE80211_STA_RX_BW_40, 20 CMD_CBW_80MHZ = IEEE80211_STA_RX_BW_80, 21 CMD_CBW_160MHZ = IEEE80211_STA_RX_BW_160, 22 CMD_CBW_10MHZ, 23 CMD_CBW_5MHZ, 24 CMD_CBW_8080MHZ, 25 26 CMD_HE_MCS_BW80 = 0, 27 CMD_HE_MCS_BW160, 28 CMD_HE_MCS_BW8080, 29 CMD_HE_MCS_BW_NUM 30 }; 31 32 enum { 33 HW_BSSID_0 = 0x0, 34 HW_BSSID_1, 35 HW_BSSID_2, 36 HW_BSSID_3, 37 HW_BSSID_MAX = HW_BSSID_3, 38 EXT_BSSID_START = 0x10, 39 EXT_BSSID_1, 40 EXT_BSSID_15 = 0x1f, 41 EXT_BSSID_MAX = EXT_BSSID_15, 42 REPEATER_BSSID_START = 0x20, 43 REPEATER_BSSID_MAX = 0x3f, 44 }; 45 46 struct mt76_connac_pm { 47 bool enable; 48 49 spinlock_t txq_lock; 50 struct { 51 struct mt76_wcid *wcid; 52 struct sk_buff *skb; 53 } tx_q[IEEE80211_NUM_ACS]; 54 55 struct work_struct wake_work; 56 wait_queue_head_t wait; 57 58 struct { 59 spinlock_t lock; 60 u32 count; 61 } wake; 62 struct mutex mutex; 63 64 struct delayed_work ps_work; 65 unsigned long last_activity; 66 unsigned long idle_timeout; 67 68 struct { 69 unsigned long last_wake_event; 70 unsigned long awake_time; 71 unsigned long last_doze_event; 72 unsigned long doze_time; 73 unsigned int lp_wake; 74 } stats; 75 }; 76 77 struct mt76_connac_coredump { 78 struct sk_buff_head msg_list; 79 struct delayed_work work; 80 unsigned long last_activity; 81 }; 82 83 extern const struct wiphy_wowlan_support mt76_connac_wowlan_support; 84 85 static inline bool is_mt7921(struct mt76_dev *dev) 86 { 87 return mt76_chip(dev) == 0x7961; 88 } 89 90 static inline bool is_mt7663(struct mt76_dev *dev) 91 { 92 return mt76_chip(dev) == 0x7663; 93 } 94 95 int mt76_connac_pm_wake(struct mt76_phy *phy, struct mt76_connac_pm *pm); 96 void mt76_connac_power_save_sched(struct mt76_phy *phy, 97 struct mt76_connac_pm *pm); 98 void mt76_connac_free_pending_tx_skbs(struct mt76_connac_pm *pm, 99 struct mt76_wcid *wcid); 100 101 static inline bool 102 mt76_connac_pm_ref(struct mt76_phy *phy, struct mt76_connac_pm *pm) 103 { 104 bool ret = false; 105 106 spin_lock_bh(&pm->wake.lock); 107 if (test_bit(MT76_STATE_PM, &phy->state)) 108 goto out; 109 110 pm->wake.count++; 111 ret = true; 112 out: 113 spin_unlock_bh(&pm->wake.lock); 114 115 return ret; 116 } 117 118 static inline void 119 mt76_connac_pm_unref(struct mt76_connac_pm *pm) 120 { 121 spin_lock_bh(&pm->wake.lock); 122 pm->wake.count--; 123 pm->last_activity = jiffies; 124 spin_unlock_bh(&pm->wake.lock); 125 } 126 127 static inline bool 128 mt76_connac_skip_fw_pmctrl(struct mt76_phy *phy, struct mt76_connac_pm *pm) 129 { 130 bool ret; 131 132 spin_lock_bh(&pm->wake.lock); 133 ret = pm->wake.count || test_and_set_bit(MT76_STATE_PM, &phy->state); 134 spin_unlock_bh(&pm->wake.lock); 135 136 return ret; 137 } 138 139 static inline void 140 mt76_connac_mutex_acquire(struct mt76_dev *dev, struct mt76_connac_pm *pm) 141 __acquires(&dev->mutex) 142 { 143 mutex_lock(&dev->mutex); 144 mt76_connac_pm_wake(&dev->phy, pm); 145 } 146 147 static inline void 148 mt76_connac_mutex_release(struct mt76_dev *dev, struct mt76_connac_pm *pm) 149 __releases(&dev->mutex) 150 { 151 mt76_connac_power_save_sched(&dev->phy, pm); 152 mutex_unlock(&dev->mutex); 153 } 154 155 void mt76_connac_pm_queue_skb(struct ieee80211_hw *hw, 156 struct mt76_connac_pm *pm, 157 struct mt76_wcid *wcid, 158 struct sk_buff *skb); 159 void mt76_connac_pm_dequeue_skbs(struct mt76_phy *phy, 160 struct mt76_connac_pm *pm); 161 162 #endif /* __MT76_CONNAC_H */ 163