1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2020 MediaTek Inc. 3 * 4 * Author: Lorenzo Bianconi <lorenzo@kernel.org> 5 * Sean Wang <sean.wang@mediatek.com> 6 */ 7 8 #include <linux/kernel.h> 9 #include <linux/module.h> 10 #include <linux/usb.h> 11 12 #include "mt7615.h" 13 #include "mac.h" 14 #include "mcu.h" 15 #include "regs.h" 16 17 const u32 mt7663_usb_sdio_reg_map[] = { 18 [MT_TOP_CFG_BASE] = 0x80020000, 19 [MT_HW_BASE] = 0x80000000, 20 [MT_DMA_SHDL_BASE] = 0x5000a000, 21 [MT_HIF_BASE] = 0x50000000, 22 [MT_CSR_BASE] = 0x40000000, 23 [MT_EFUSE_ADDR_BASE] = 0x78011000, 24 [MT_TOP_MISC_BASE] = 0x81020000, 25 [MT_PLE_BASE] = 0x82060000, 26 [MT_PSE_BASE] = 0x82068000, 27 [MT_PP_BASE] = 0x8206c000, 28 [MT_WTBL_BASE_ADDR] = 0x820e0000, 29 [MT_CFG_BASE] = 0x820f0000, 30 [MT_AGG_BASE] = 0x820f2000, 31 [MT_ARB_BASE] = 0x820f3000, 32 [MT_TMAC_BASE] = 0x820f4000, 33 [MT_RMAC_BASE] = 0x820f5000, 34 [MT_DMA_BASE] = 0x820f7000, 35 [MT_PF_BASE] = 0x820f8000, 36 [MT_WTBL_BASE_ON] = 0x820f9000, 37 [MT_WTBL_BASE_OFF] = 0x820f9800, 38 [MT_LPON_BASE] = 0x820fb000, 39 [MT_MIB_BASE] = 0x820fd000, 40 }; 41 EXPORT_SYMBOL_GPL(mt7663_usb_sdio_reg_map); 42 43 static void 44 mt7663_usb_sdio_write_txwi(struct mt7615_dev *dev, struct mt76_wcid *wcid, 45 enum mt76_txq_id qid, struct ieee80211_sta *sta, 46 struct sk_buff *skb) 47 { 48 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 49 struct ieee80211_key_conf *key = info->control.hw_key; 50 __le32 *txwi; 51 int pid; 52 53 if (!wcid) 54 wcid = &dev->mt76.global_wcid; 55 56 pid = mt76_tx_status_skb_add(&dev->mt76, wcid, skb); 57 58 txwi = (__le32 *)(skb->data - MT_USB_TXD_SIZE); 59 memset(txwi, 0, MT_USB_TXD_SIZE); 60 mt7615_mac_write_txwi(dev, txwi, skb, wcid, sta, pid, key, false); 61 skb_push(skb, MT_USB_TXD_SIZE); 62 } 63 64 static int mt7663_usb_sdio_set_rates(struct mt7615_dev *dev, 65 struct mt7615_wtbl_rate_desc *wrd) 66 { 67 struct mt7615_rate_desc *rate = &wrd->rate; 68 struct mt7615_sta *sta = wrd->sta; 69 u32 w5, w27, addr, val; 70 u16 idx; 71 72 lockdep_assert_held(&dev->mt76.mutex); 73 74 if (!sta) 75 return -EINVAL; 76 77 if (!mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 0, 5000)) 78 return -ETIMEDOUT; 79 80 addr = mt7615_mac_wtbl_addr(dev, sta->wcid.idx); 81 82 w27 = mt76_rr(dev, addr + 27 * 4); 83 w27 &= ~MT_WTBL_W27_CC_BW_SEL; 84 w27 |= FIELD_PREP(MT_WTBL_W27_CC_BW_SEL, rate->bw); 85 86 w5 = mt76_rr(dev, addr + 5 * 4); 87 w5 &= ~(MT_WTBL_W5_BW_CAP | MT_WTBL_W5_CHANGE_BW_RATE | 88 MT_WTBL_W5_MPDU_OK_COUNT | 89 MT_WTBL_W5_MPDU_FAIL_COUNT | 90 MT_WTBL_W5_RATE_IDX); 91 w5 |= FIELD_PREP(MT_WTBL_W5_BW_CAP, rate->bw) | 92 FIELD_PREP(MT_WTBL_W5_CHANGE_BW_RATE, 93 rate->bw_idx ? rate->bw_idx - 1 : 7); 94 95 mt76_wr(dev, MT_WTBL_RIUCR0, w5); 96 97 mt76_wr(dev, MT_WTBL_RIUCR1, 98 FIELD_PREP(MT_WTBL_RIUCR1_RATE0, rate->probe_val) | 99 FIELD_PREP(MT_WTBL_RIUCR1_RATE1, rate->val[0]) | 100 FIELD_PREP(MT_WTBL_RIUCR1_RATE2_LO, rate->val[1])); 101 102 mt76_wr(dev, MT_WTBL_RIUCR2, 103 FIELD_PREP(MT_WTBL_RIUCR2_RATE2_HI, rate->val[1] >> 8) | 104 FIELD_PREP(MT_WTBL_RIUCR2_RATE3, rate->val[1]) | 105 FIELD_PREP(MT_WTBL_RIUCR2_RATE4, rate->val[2]) | 106 FIELD_PREP(MT_WTBL_RIUCR2_RATE5_LO, rate->val[2])); 107 108 mt76_wr(dev, MT_WTBL_RIUCR3, 109 FIELD_PREP(MT_WTBL_RIUCR3_RATE5_HI, rate->val[2] >> 4) | 110 FIELD_PREP(MT_WTBL_RIUCR3_RATE6, rate->val[3]) | 111 FIELD_PREP(MT_WTBL_RIUCR3_RATE7, rate->val[3])); 112 113 mt76_wr(dev, MT_WTBL_UPDATE, 114 FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, sta->wcid.idx) | 115 MT_WTBL_UPDATE_RATE_UPDATE | 116 MT_WTBL_UPDATE_TX_COUNT_CLEAR); 117 118 mt76_wr(dev, addr + 27 * 4, w27); 119 120 sta->rate_probe = sta->rateset[rate->rateset].probe_rate.idx != -1; 121 122 idx = sta->vif->mt76.omac_idx; 123 idx = idx > HW_BSSID_MAX ? HW_BSSID_0 : idx; 124 addr = idx > 1 ? MT_LPON_TCR2(idx): MT_LPON_TCR0(idx); 125 126 mt76_rmw(dev, addr, MT_LPON_TCR_MODE, MT_LPON_TCR_READ); /* TSF read */ 127 val = mt76_rr(dev, MT_LPON_UTTR0); 128 sta->rate_set_tsf = (val & ~BIT(0)) | rate->rateset; 129 130 if (!(sta->wcid.tx_info & MT_WCID_TX_INFO_SET)) 131 mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 0, 5000); 132 133 sta->rate_count = 2 * MT7615_RATE_RETRY * sta->n_rates; 134 sta->wcid.tx_info |= MT_WCID_TX_INFO_SET; 135 136 return 0; 137 } 138 139 static void mt7663_usb_sdio_rate_work(struct work_struct *work) 140 { 141 struct mt7615_wtbl_rate_desc *wrd, *wrd_next; 142 struct list_head wrd_list; 143 struct mt7615_dev *dev; 144 145 dev = (struct mt7615_dev *)container_of(work, struct mt7615_dev, 146 rate_work); 147 148 INIT_LIST_HEAD(&wrd_list); 149 spin_lock_bh(&dev->mt76.lock); 150 list_splice_init(&dev->wrd_head, &wrd_list); 151 spin_unlock_bh(&dev->mt76.lock); 152 153 list_for_each_entry_safe(wrd, wrd_next, &wrd_list, node) { 154 list_del(&wrd->node); 155 156 mt7615_mutex_acquire(dev); 157 mt7663_usb_sdio_set_rates(dev, wrd); 158 mt7615_mutex_release(dev); 159 160 kfree(wrd); 161 } 162 } 163 164 bool mt7663_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update) 165 { 166 struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76); 167 168 mt7615_mutex_acquire(dev); 169 mt7615_mac_sta_poll(dev); 170 mt7615_mutex_release(dev); 171 172 return 0; 173 } 174 EXPORT_SYMBOL_GPL(mt7663_usb_sdio_tx_status_data); 175 176 void mt7663_usb_sdio_tx_complete_skb(struct mt76_dev *mdev, 177 struct mt76_queue_entry *e) 178 { 179 unsigned int headroom = MT_USB_TXD_SIZE; 180 181 if (mt76_is_usb(mdev)) 182 headroom += MT_USB_HDR_SIZE; 183 skb_pull(e->skb, headroom); 184 185 mt76_tx_complete_skb(mdev, e->wcid, e->skb); 186 } 187 EXPORT_SYMBOL_GPL(mt7663_usb_sdio_tx_complete_skb); 188 189 int mt7663_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 190 enum mt76_txq_id qid, struct mt76_wcid *wcid, 191 struct ieee80211_sta *sta, 192 struct mt76_tx_info *tx_info) 193 { 194 struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76); 195 struct sk_buff *skb = tx_info->skb; 196 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 197 struct mt7615_sta *msta; 198 int pad; 199 200 msta = wcid ? container_of(wcid, struct mt7615_sta, wcid) : NULL; 201 if ((info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) && 202 msta && !msta->rate_probe) { 203 /* request to configure sampling rate */ 204 spin_lock_bh(&dev->mt76.lock); 205 mt7615_mac_set_rates(&dev->phy, msta, &info->control.rates[0], 206 msta->rates); 207 spin_unlock_bh(&dev->mt76.lock); 208 } 209 210 mt7663_usb_sdio_write_txwi(dev, wcid, qid, sta, skb); 211 if (mt76_is_usb(mdev)) { 212 u32 len = skb->len; 213 214 put_unaligned_le32(len, skb_push(skb, sizeof(len))); 215 pad = round_up(skb->len, 4) + 4 - skb->len; 216 } else { 217 pad = round_up(skb->len, 4) - skb->len; 218 } 219 220 return mt76_skb_adjust_pad(skb, pad); 221 } 222 EXPORT_SYMBOL_GPL(mt7663_usb_sdio_tx_prepare_skb); 223 224 static int mt7663u_dma_sched_init(struct mt7615_dev *dev) 225 { 226 int i; 227 228 mt76_rmw(dev, MT_DMA_SHDL(MT_DMASHDL_PKT_MAX_SIZE), 229 MT_DMASHDL_PKT_MAX_SIZE_PLE | MT_DMASHDL_PKT_MAX_SIZE_PSE, 230 FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PLE, 1) | 231 FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PSE, 8)); 232 233 /* disable refill group 5 - group 15 and raise group 2 234 * and 3 as high priority. 235 */ 236 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_REFILL), 0xffe00006); 237 mt76_clear(dev, MT_DMA_SHDL(MT_DMASHDL_PAGE), BIT(16)); 238 239 for (i = 0; i < 5; i++) 240 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(i)), 241 FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x3) | 242 FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x1ff)); 243 244 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(0)), 0x42104210); 245 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(1)), 0x42104210); 246 247 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(2)), 0x4444); 248 249 /* group pririority from high to low: 250 * 15 (cmd groups) > 4 > 3 > 2 > 1 > 0. 251 */ 252 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_SCHED_SET0), 0x6501234f); 253 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_SCHED_SET1), 0xedcba987); 254 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_OPTIONAL), 0x7004801c); 255 256 mt76_wr(dev, MT_UDMA_WLCFG_1, 257 FIELD_PREP(MT_WL_TX_TMOUT_LMT, 80000) | 258 FIELD_PREP(MT_WL_RX_AGG_PKT_LMT, 1)); 259 260 /* setup UDMA Rx Flush */ 261 mt76_clear(dev, MT_UDMA_WLCFG_0, MT_WL_RX_FLUSH); 262 /* hif reset */ 263 mt76_set(dev, MT_HIF_RST, MT_HIF_LOGIC_RST_N); 264 265 mt76_set(dev, MT_UDMA_WLCFG_0, 266 MT_WL_RX_AGG_EN | MT_WL_RX_EN | MT_WL_TX_EN | 267 MT_WL_RX_MPSZ_PAD0 | MT_TICK_1US_EN | 268 MT_WL_TX_TMOUT_FUNC_EN); 269 mt76_rmw(dev, MT_UDMA_WLCFG_0, MT_WL_RX_AGG_LMT | MT_WL_RX_AGG_TO, 270 FIELD_PREP(MT_WL_RX_AGG_LMT, 32) | 271 FIELD_PREP(MT_WL_RX_AGG_TO, 100)); 272 273 return 0; 274 } 275 276 static int mt7663_usb_sdio_init_hardware(struct mt7615_dev *dev) 277 { 278 int ret, idx; 279 280 ret = mt7615_eeprom_init(dev, MT_EFUSE_BASE); 281 if (ret < 0) 282 return ret; 283 284 if (mt76_is_usb(&dev->mt76)) { 285 ret = mt7663u_dma_sched_init(dev); 286 if (ret) 287 return ret; 288 } 289 290 set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state); 291 292 /* Beacon and mgmt frames should occupy wcid 0 */ 293 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7615_WTBL_STA - 1); 294 if (idx) 295 return -ENOSPC; 296 297 dev->mt76.global_wcid.idx = idx; 298 dev->mt76.global_wcid.hw_key_idx = -1; 299 rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid); 300 301 return 0; 302 } 303 304 int mt7663_usb_sdio_register_device(struct mt7615_dev *dev) 305 { 306 struct ieee80211_hw *hw = mt76_hw(dev); 307 int err; 308 309 INIT_WORK(&dev->rate_work, mt7663_usb_sdio_rate_work); 310 INIT_LIST_HEAD(&dev->wrd_head); 311 mt7615_init_device(dev); 312 313 err = mt7663_usb_sdio_init_hardware(dev); 314 if (err) 315 return err; 316 317 hw->extra_tx_headroom += MT_USB_TXD_SIZE; 318 if (mt76_is_usb(&dev->mt76)) { 319 hw->extra_tx_headroom += MT_USB_HDR_SIZE; 320 /* check hw sg support in order to enable AMSDU */ 321 if (dev->mt76.usb.sg_en) 322 hw->max_tx_fragments = MT_HW_TXP_MAX_BUF_NUM; 323 else 324 hw->max_tx_fragments = 1; 325 } 326 327 err = mt76_register_device(&dev->mt76, true, mt76_rates, 328 ARRAY_SIZE(mt76_rates)); 329 if (err < 0) 330 return err; 331 332 if (!dev->mt76.usb.sg_en) { 333 struct ieee80211_sta_vht_cap *vht_cap; 334 335 /* decrease max A-MSDU size if SG is not supported */ 336 vht_cap = &dev->mphy.sband_5g.sband.vht_cap; 337 vht_cap->cap &= ~IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 338 } 339 340 ieee80211_queue_work(hw, &dev->mcu_work); 341 mt7615_init_txpower(dev, &dev->mphy.sband_2g.sband); 342 mt7615_init_txpower(dev, &dev->mphy.sband_5g.sband); 343 344 return mt7615_init_debugfs(dev); 345 } 346 EXPORT_SYMBOL_GPL(mt7663_usb_sdio_register_device); 347 348 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>"); 349 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>"); 350 MODULE_LICENSE("Dual BSD/GPL"); 351