1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2020 MediaTek Inc.
3  *
4  * Author: Lorenzo Bianconi <lorenzo@kernel.org>
5  *	   Sean Wang <sean.wang@mediatek.com>
6  */
7 
8 #include <linux/kernel.h>
9 #include <linux/module.h>
10 #include <linux/usb.h>
11 
12 #include "mt7615.h"
13 #include "mac.h"
14 #include "mcu.h"
15 #include "regs.h"
16 
17 const u32 mt7663_usb_sdio_reg_map[] = {
18 	[MT_TOP_CFG_BASE]	= 0x80020000,
19 	[MT_HW_BASE]		= 0x80000000,
20 	[MT_DMA_SHDL_BASE]	= 0x5000a000,
21 	[MT_HIF_BASE]		= 0x50000000,
22 	[MT_CSR_BASE]		= 0x40000000,
23 	[MT_EFUSE_ADDR_BASE]	= 0x78011000,
24 	[MT_TOP_MISC_BASE]	= 0x81020000,
25 	[MT_PLE_BASE]		= 0x82060000,
26 	[MT_PSE_BASE]		= 0x82068000,
27 	[MT_PP_BASE]		= 0x8206c000,
28 	[MT_WTBL_BASE_ADDR]	= 0x820e0000,
29 	[MT_CFG_BASE]		= 0x820f0000,
30 	[MT_AGG_BASE]		= 0x820f2000,
31 	[MT_ARB_BASE]		= 0x820f3000,
32 	[MT_TMAC_BASE]		= 0x820f4000,
33 	[MT_RMAC_BASE]		= 0x820f5000,
34 	[MT_DMA_BASE]		= 0x820f7000,
35 	[MT_PF_BASE]		= 0x820f8000,
36 	[MT_WTBL_BASE_ON]	= 0x820f9000,
37 	[MT_WTBL_BASE_OFF]	= 0x820f9800,
38 	[MT_LPON_BASE]		= 0x820fb000,
39 	[MT_MIB_BASE]		= 0x820fd000,
40 };
41 EXPORT_SYMBOL_GPL(mt7663_usb_sdio_reg_map);
42 
43 static void
44 mt7663_usb_sdio_write_txwi(struct mt7615_dev *dev, struct mt76_wcid *wcid,
45 			   enum mt76_txq_id qid, struct ieee80211_sta *sta,
46 			   struct sk_buff *skb)
47 {
48 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
49 	struct ieee80211_key_conf *key = info->control.hw_key;
50 	__le32 *txwi;
51 	int pid;
52 
53 	if (!wcid)
54 		wcid = &dev->mt76.global_wcid;
55 
56 	pid = mt76_tx_status_skb_add(&dev->mt76, wcid, skb);
57 
58 	txwi = (__le32 *)(skb->data - MT_USB_TXD_SIZE);
59 	memset(txwi, 0, MT_USB_TXD_SIZE);
60 	mt7615_mac_write_txwi(dev, txwi, skb, wcid, sta, pid, key, false);
61 	skb_push(skb, MT_USB_TXD_SIZE);
62 }
63 
64 static int
65 mt7663_usb_sdio_set_rates(struct mt7615_dev *dev,
66 			  struct mt7615_wtbl_desc *wd)
67 {
68 	struct mt7615_rate_desc *rate = &wd->rate;
69 	struct mt7615_sta *sta = wd->sta;
70 	u32 w5, w27, addr, val;
71 
72 	lockdep_assert_held(&dev->mt76.mutex);
73 
74 	if (!sta)
75 		return -EINVAL;
76 
77 	if (!mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 0, 5000))
78 		return -ETIMEDOUT;
79 
80 	addr = mt7615_mac_wtbl_addr(dev, sta->wcid.idx);
81 
82 	w27 = mt76_rr(dev, addr + 27 * 4);
83 	w27 &= ~MT_WTBL_W27_CC_BW_SEL;
84 	w27 |= FIELD_PREP(MT_WTBL_W27_CC_BW_SEL, rate->bw);
85 
86 	w5 = mt76_rr(dev, addr + 5 * 4);
87 	w5 &= ~(MT_WTBL_W5_BW_CAP | MT_WTBL_W5_CHANGE_BW_RATE |
88 		MT_WTBL_W5_MPDU_OK_COUNT |
89 		MT_WTBL_W5_MPDU_FAIL_COUNT |
90 		MT_WTBL_W5_RATE_IDX);
91 	w5 |= FIELD_PREP(MT_WTBL_W5_BW_CAP, rate->bw) |
92 	      FIELD_PREP(MT_WTBL_W5_CHANGE_BW_RATE,
93 			 rate->bw_idx ? rate->bw_idx - 1 : 7);
94 
95 	mt76_wr(dev, MT_WTBL_RIUCR0, w5);
96 
97 	mt76_wr(dev, MT_WTBL_RIUCR1,
98 		FIELD_PREP(MT_WTBL_RIUCR1_RATE0, rate->probe_val) |
99 		FIELD_PREP(MT_WTBL_RIUCR1_RATE1, rate->val[0]) |
100 		FIELD_PREP(MT_WTBL_RIUCR1_RATE2_LO, rate->val[1]));
101 
102 	mt76_wr(dev, MT_WTBL_RIUCR2,
103 		FIELD_PREP(MT_WTBL_RIUCR2_RATE2_HI, rate->val[1] >> 8) |
104 		FIELD_PREP(MT_WTBL_RIUCR2_RATE3, rate->val[1]) |
105 		FIELD_PREP(MT_WTBL_RIUCR2_RATE4, rate->val[2]) |
106 		FIELD_PREP(MT_WTBL_RIUCR2_RATE5_LO, rate->val[2]));
107 
108 	mt76_wr(dev, MT_WTBL_RIUCR3,
109 		FIELD_PREP(MT_WTBL_RIUCR3_RATE5_HI, rate->val[2] >> 4) |
110 		FIELD_PREP(MT_WTBL_RIUCR3_RATE6, rate->val[3]) |
111 		FIELD_PREP(MT_WTBL_RIUCR3_RATE7, rate->val[3]));
112 
113 	mt76_wr(dev, MT_WTBL_UPDATE,
114 		FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, sta->wcid.idx) |
115 		MT_WTBL_UPDATE_RATE_UPDATE |
116 		MT_WTBL_UPDATE_TX_COUNT_CLEAR);
117 
118 	mt76_wr(dev, addr + 27 * 4, w27);
119 
120 	sta->rate_probe = sta->rateset[rate->rateset].probe_rate.idx != -1;
121 
122 	mt76_set(dev, MT_LPON_T0CR, MT_LPON_T0CR_MODE); /* TSF read */
123 	val = mt76_rr(dev, MT_LPON_UTTR0);
124 	sta->rate_set_tsf = (val & ~BIT(0)) | rate->rateset;
125 
126 	if (!(sta->wcid.tx_info & MT_WCID_TX_INFO_SET))
127 		mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 0, 5000);
128 
129 	sta->rate_count = 2 * MT7615_RATE_RETRY * sta->n_rates;
130 	sta->wcid.tx_info |= MT_WCID_TX_INFO_SET;
131 
132 	return 0;
133 }
134 
135 static int
136 mt7663_usb_sdio_set_key(struct mt7615_dev *dev,
137 			struct mt7615_wtbl_desc *wd)
138 {
139 	struct mt7615_key_desc *key = &wd->key;
140 	struct mt7615_sta *sta = wd->sta;
141 	enum mt7615_cipher_type cipher;
142 	struct mt76_wcid *wcid;
143 	int err;
144 
145 	lockdep_assert_held(&dev->mt76.mutex);
146 
147 	if (!sta) {
148 		err = -EINVAL;
149 		goto out;
150 	}
151 
152 	cipher = mt7615_mac_get_cipher(key->cipher);
153 	if (cipher == MT_CIPHER_NONE) {
154 		err = -EOPNOTSUPP;
155 		goto out;
156 	}
157 
158 	wcid = &wd->sta->wcid;
159 
160 	mt7615_mac_wtbl_update_cipher(dev, wcid, cipher, key->cmd);
161 	err = mt7615_mac_wtbl_update_key(dev, wcid, key->key, key->keylen,
162 					 cipher, key->cmd);
163 	if (err < 0)
164 		goto out;
165 
166 	err = mt7615_mac_wtbl_update_pk(dev, wcid, cipher, key->keyidx,
167 					key->cmd);
168 	if (err < 0)
169 		goto out;
170 
171 	if (key->cmd == SET_KEY)
172 		wcid->cipher |= BIT(cipher);
173 	else
174 		wcid->cipher &= ~BIT(cipher);
175 out:
176 	kfree(key->key);
177 
178 	return err;
179 }
180 
181 void mt7663_usb_sdio_wtbl_work(struct work_struct *work)
182 {
183 	struct mt7615_wtbl_desc *wd, *wd_next;
184 	struct list_head wd_list;
185 	struct mt7615_dev *dev;
186 
187 	dev = (struct mt7615_dev *)container_of(work, struct mt7615_dev,
188 						wtbl_work);
189 
190 	INIT_LIST_HEAD(&wd_list);
191 	spin_lock_bh(&dev->mt76.lock);
192 	list_splice_init(&dev->wd_head, &wd_list);
193 	spin_unlock_bh(&dev->mt76.lock);
194 
195 	list_for_each_entry_safe(wd, wd_next, &wd_list, node) {
196 		list_del(&wd->node);
197 
198 		mt7615_mutex_acquire(dev);
199 
200 		switch (wd->type) {
201 		case MT7615_WTBL_RATE_DESC:
202 			mt7663_usb_sdio_set_rates(dev, wd);
203 			break;
204 		case MT7615_WTBL_KEY_DESC:
205 			mt7663_usb_sdio_set_key(dev, wd);
206 			break;
207 		}
208 
209 		mt7615_mutex_release(dev);
210 
211 		kfree(wd);
212 	}
213 }
214 EXPORT_SYMBOL_GPL(mt7663_usb_sdio_wtbl_work);
215 
216 bool mt7663_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update)
217 {
218 	struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76);
219 
220 	mt7615_mutex_acquire(dev);
221 	mt7615_mac_sta_poll(dev);
222 	mt7615_mutex_release(dev);
223 
224 	return 0;
225 }
226 EXPORT_SYMBOL_GPL(mt7663_usb_sdio_tx_status_data);
227 
228 void mt7663_usb_sdio_tx_complete_skb(struct mt76_dev *mdev,
229 				     enum mt76_txq_id qid,
230 				     struct mt76_queue_entry *e)
231 {
232 	unsigned int headroom = MT_USB_TXD_SIZE;
233 
234 	if (mt76_is_usb(mdev))
235 		headroom += MT_USB_HDR_SIZE;
236 	skb_pull(e->skb, headroom);
237 
238 	mt76_tx_complete_skb(mdev, e->skb);
239 }
240 EXPORT_SYMBOL_GPL(mt7663_usb_sdio_tx_complete_skb);
241 
242 int mt7663_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
243 				   enum mt76_txq_id qid, struct mt76_wcid *wcid,
244 				   struct ieee80211_sta *sta,
245 				   struct mt76_tx_info *tx_info)
246 {
247 	struct mt7615_sta *msta = container_of(wcid, struct mt7615_sta, wcid);
248 	struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76);
249 	struct sk_buff *skb = tx_info->skb;
250 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
251 
252 	if ((info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) &&
253 	    !msta->rate_probe) {
254 		/* request to configure sampling rate */
255 		spin_lock_bh(&dev->mt76.lock);
256 		mt7615_mac_set_rates(&dev->phy, msta, &info->control.rates[0],
257 				     msta->rates);
258 		spin_unlock_bh(&dev->mt76.lock);
259 	}
260 
261 	mt7663_usb_sdio_write_txwi(dev, wcid, qid, sta, skb);
262 	if (mt76_is_usb(mdev))
263 		put_unaligned_le32(skb->len, skb_push(skb, sizeof(skb->len)));
264 
265 	return mt76_skb_adjust_pad(skb);
266 }
267 EXPORT_SYMBOL_GPL(mt7663_usb_sdio_tx_prepare_skb);
268 
269 static int mt7663u_dma_sched_init(struct mt7615_dev *dev)
270 {
271 	int i;
272 
273 	mt76_rmw(dev, MT_DMA_SHDL(MT_DMASHDL_PKT_MAX_SIZE),
274 		 MT_DMASHDL_PKT_MAX_SIZE_PLE | MT_DMASHDL_PKT_MAX_SIZE_PSE,
275 		 FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PLE, 1) |
276 		 FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PSE, 8));
277 
278 	/* disable refill group 5 - group 15 and raise group 2
279 	 * and 3 as high priority.
280 	 */
281 	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_REFILL), 0xffe00006);
282 	mt76_clear(dev, MT_DMA_SHDL(MT_DMASHDL_PAGE), BIT(16));
283 
284 	for (i = 0; i < 5; i++)
285 		mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(i)),
286 			FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x3) |
287 			FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x1ff));
288 
289 	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(0)), 0x42104210);
290 	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(1)), 0x42104210);
291 
292 	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(2)), 0x4444);
293 
294 	/* group pririority from high to low:
295 	 * 15 (cmd groups) > 4 > 3 > 2 > 1 > 0.
296 	 */
297 	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_SCHED_SET0), 0x6501234f);
298 	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_SCHED_SET1), 0xedcba987);
299 	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_OPTIONAL), 0x7004801c);
300 
301 	mt76_wr(dev, MT_UDMA_WLCFG_1,
302 		FIELD_PREP(MT_WL_TX_TMOUT_LMT, 80000) |
303 		FIELD_PREP(MT_WL_RX_AGG_PKT_LMT, 1));
304 
305 	/* setup UDMA Rx Flush */
306 	mt76_clear(dev, MT_UDMA_WLCFG_0, MT_WL_RX_FLUSH);
307 	/* hif reset */
308 	mt76_set(dev, MT_HIF_RST, MT_HIF_LOGIC_RST_N);
309 
310 	mt76_set(dev, MT_UDMA_WLCFG_0,
311 		 MT_WL_RX_AGG_EN | MT_WL_RX_EN | MT_WL_TX_EN |
312 		 MT_WL_RX_MPSZ_PAD0 | MT_TICK_1US_EN |
313 		 MT_WL_TX_TMOUT_FUNC_EN);
314 	mt76_rmw(dev, MT_UDMA_WLCFG_0, MT_WL_RX_AGG_LMT | MT_WL_RX_AGG_TO,
315 		 FIELD_PREP(MT_WL_RX_AGG_LMT, 32) |
316 		 FIELD_PREP(MT_WL_RX_AGG_TO, 100));
317 
318 	return 0;
319 }
320 
321 static int mt7663_usb_sdio_init_hardware(struct mt7615_dev *dev)
322 {
323 	int ret, idx;
324 
325 	ret = mt7615_eeprom_init(dev, MT_EFUSE_BASE);
326 	if (ret < 0)
327 		return ret;
328 
329 	if (mt76_is_usb(&dev->mt76)) {
330 		ret = mt7663u_dma_sched_init(dev);
331 		if (ret)
332 			return ret;
333 	}
334 
335 	set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
336 
337 	/* Beacon and mgmt frames should occupy wcid 0 */
338 	idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7615_WTBL_STA - 1);
339 	if (idx)
340 		return -ENOSPC;
341 
342 	dev->mt76.global_wcid.idx = idx;
343 	dev->mt76.global_wcid.hw_key_idx = -1;
344 	rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid);
345 
346 	return 0;
347 }
348 
349 int mt7663_usb_sdio_register_device(struct mt7615_dev *dev)
350 {
351 	struct ieee80211_hw *hw = mt76_hw(dev);
352 	int err;
353 
354 	INIT_WORK(&dev->wtbl_work, mt7663_usb_sdio_wtbl_work);
355 	INIT_LIST_HEAD(&dev->wd_head);
356 	mt7615_init_device(dev);
357 
358 	err = mt7663_usb_sdio_init_hardware(dev);
359 	if (err)
360 		return err;
361 
362 	/* check hw sg support in order to enable AMSDU */
363 	if (dev->mt76.usb.sg_en || mt76_is_sdio(&dev->mt76))
364 		hw->max_tx_fragments = MT_HW_TXP_MAX_BUF_NUM;
365 	else
366 		hw->max_tx_fragments = 1;
367 	hw->extra_tx_headroom += MT_USB_TXD_SIZE;
368 	if (mt76_is_usb(&dev->mt76))
369 		hw->extra_tx_headroom += MT_USB_HDR_SIZE;
370 
371 	err = mt76_register_device(&dev->mt76, true, mt7615_rates,
372 				   ARRAY_SIZE(mt7615_rates));
373 	if (err < 0)
374 		return err;
375 
376 	if (!dev->mt76.usb.sg_en) {
377 		struct ieee80211_sta_vht_cap *vht_cap;
378 
379 		/* decrease max A-MSDU size if SG is not supported */
380 		vht_cap = &dev->mphy.sband_5g.sband.vht_cap;
381 		vht_cap->cap &= ~IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
382 	}
383 
384 	ieee80211_queue_work(hw, &dev->mcu_work);
385 	mt7615_init_txpower(dev, &dev->mphy.sband_2g.sband);
386 	mt7615_init_txpower(dev, &dev->mphy.sband_5g.sband);
387 
388 	return mt7615_init_debugfs(dev);
389 }
390 EXPORT_SYMBOL_GPL(mt7663_usb_sdio_register_device);
391 
392 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
393 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
394 MODULE_LICENSE("Dual BSD/GPL");
395