1 /* SPDX-License-Identifier: ISC */ 2 /* Copyright (C) 2019 MediaTek Inc. */ 3 4 #ifndef __MT7615_H 5 #define __MT7615_H 6 7 #include <linux/completion.h> 8 #include <linux/interrupt.h> 9 #include <linux/ktime.h> 10 #include <linux/regmap.h> 11 #include "../mt76_connac_mcu.h" 12 #include "regs.h" 13 14 #define MT7615_MAX_INTERFACES 16 15 #define MT7615_MAX_WMM_SETS 4 16 #define MT7663_WTBL_SIZE 32 17 #define MT7615_WTBL_SIZE 128 18 #define MT7615_WTBL_RESERVED (mt7615_wtbl_size(dev) - 1) 19 #define MT7615_WTBL_STA (MT7615_WTBL_RESERVED - \ 20 MT7615_MAX_INTERFACES) 21 22 #define MT7615_PM_TIMEOUT (HZ / 12) 23 #define MT7615_WATCHDOG_TIME (HZ / 10) 24 #define MT7615_HW_SCAN_TIMEOUT (HZ / 10) 25 #define MT7615_RESET_TIMEOUT (30 * HZ) 26 #define MT7615_RATE_RETRY 2 27 28 #define MT7615_TX_RING_SIZE 1024 29 #define MT7615_TX_MGMT_RING_SIZE 128 30 #define MT7615_TX_MCU_RING_SIZE 128 31 #define MT7615_TX_FWDL_RING_SIZE 128 32 33 #define MT7615_RX_RING_SIZE 1024 34 #define MT7615_RX_MCU_RING_SIZE 512 35 36 #define MT7615_DRV_OWN_RETRY_COUNT 10 37 38 #define MT7615_FIRMWARE_CR4 "mediatek/mt7615_cr4.bin" 39 #define MT7615_FIRMWARE_N9 "mediatek/mt7615_n9.bin" 40 #define MT7615_ROM_PATCH "mediatek/mt7615_rom_patch.bin" 41 42 #define MT7622_FIRMWARE_N9 "mediatek/mt7622_n9.bin" 43 #define MT7622_ROM_PATCH "mediatek/mt7622_rom_patch.bin" 44 45 #define MT7615_FIRMWARE_V1 1 46 #define MT7615_FIRMWARE_V2 2 47 #define MT7615_FIRMWARE_V3 3 48 49 #define MT7663_OFFLOAD_ROM_PATCH "mediatek/mt7663pr2h.bin" 50 #define MT7663_OFFLOAD_FIRMWARE_N9 "mediatek/mt7663_n9_v3.bin" 51 #define MT7663_ROM_PATCH "mediatek/mt7663pr2h_rebb.bin" 52 #define MT7663_FIRMWARE_N9 "mediatek/mt7663_n9_rebb.bin" 53 54 #define MT7615_EEPROM_SIZE 1024 55 #define MT7615_TOKEN_SIZE 4096 56 57 #define MT_FRAC_SCALE 12 58 #define MT_FRAC(val, div) (((val) << MT_FRAC_SCALE) / (div)) 59 60 #define MT_CHFREQ_VALID BIT(7) 61 #define MT_CHFREQ_DBDC_IDX BIT(6) 62 #define MT_CHFREQ_SEQ GENMASK(5, 0) 63 64 #define MT7615_BAR_RATE_DEFAULT 0x4b /* OFDM 6M */ 65 #define MT7615_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */ 66 #define MT7615_CFEND_RATE_11B 0x03 /* 11B LP, 11M */ 67 68 struct mt7615_vif; 69 struct mt7615_sta; 70 struct mt7615_dfs_pulse; 71 struct mt7615_dfs_pattern; 72 enum mt7615_cipher_type; 73 74 enum mt7615_hw_txq_id { 75 MT7615_TXQ_MAIN, 76 MT7615_TXQ_EXT, 77 MT7615_TXQ_MCU, 78 MT7615_TXQ_FWDL, 79 }; 80 81 enum mt7622_hw_txq_id { 82 MT7622_TXQ_AC0, 83 MT7622_TXQ_AC1, 84 MT7622_TXQ_AC2, 85 MT7622_TXQ_FWDL = MT7615_TXQ_FWDL, 86 MT7622_TXQ_AC3, 87 MT7622_TXQ_MGMT, 88 MT7622_TXQ_MCU = 15, 89 }; 90 91 struct mt7615_rate_set { 92 struct ieee80211_tx_rate probe_rate; 93 struct ieee80211_tx_rate rates[4]; 94 }; 95 96 struct mt7615_rate_desc { 97 bool rateset; 98 u16 probe_val; 99 u16 val[4]; 100 u8 bw_idx; 101 u8 bw; 102 }; 103 104 struct mt7615_wtbl_rate_desc { 105 struct list_head node; 106 107 struct mt7615_rate_desc rate; 108 struct mt7615_sta *sta; 109 }; 110 111 struct mt7615_sta { 112 struct mt76_wcid wcid; /* must be first */ 113 114 struct mt7615_vif *vif; 115 116 struct list_head poll_list; 117 u32 airtime_ac[8]; 118 119 struct ieee80211_tx_rate rates[4]; 120 121 struct mt7615_rate_set rateset[2]; 122 u32 rate_set_tsf; 123 124 u8 rate_count; 125 u8 n_rates; 126 127 u8 rate_probe; 128 }; 129 130 struct mt7615_vif { 131 struct mt76_vif mt76; /* must be first */ 132 struct mt7615_sta sta; 133 }; 134 135 struct mib_stats { 136 u32 ack_fail_cnt; 137 u32 fcs_err_cnt; 138 u32 rts_cnt; 139 u32 rts_retries_cnt; 140 u32 ba_miss_cnt; 141 unsigned long aggr_per; 142 }; 143 144 struct mt7615_phy { 145 struct mt76_phy *mt76; 146 struct mt7615_dev *dev; 147 148 struct ieee80211_vif *monitor_vif; 149 150 u8 n_beacon_vif; 151 152 u32 rxfilter; 153 u64 omac_mask; 154 155 u16 noise; 156 157 bool scs_en; 158 159 unsigned long last_cca_adj; 160 int false_cca_ofdm, false_cca_cck; 161 s8 ofdm_sensitivity; 162 s8 cck_sensitivity; 163 164 s16 coverage_class; 165 u8 slottime; 166 167 u8 chfreq; 168 u8 rdd_state; 169 int dfs_state; 170 171 u32 rx_ampdu_ts; 172 u32 ampdu_ref; 173 174 struct mib_stats mib; 175 176 struct sk_buff_head scan_event_list; 177 struct delayed_work scan_work; 178 179 struct work_struct roc_work; 180 struct timer_list roc_timer; 181 wait_queue_head_t roc_wait; 182 bool roc_grant; 183 184 #ifdef CONFIG_NL80211_TESTMODE 185 struct { 186 u32 *reg_backup; 187 188 s16 last_freq_offset; 189 u8 last_rcpi[4]; 190 s8 last_ib_rssi[4]; 191 s8 last_wb_rssi[4]; 192 } test; 193 #endif 194 }; 195 196 #define mt7615_mcu_add_tx_ba(dev, ...) (dev)->mcu_ops->add_tx_ba((dev), __VA_ARGS__) 197 #define mt7615_mcu_add_rx_ba(dev, ...) (dev)->mcu_ops->add_rx_ba((dev), __VA_ARGS__) 198 #define mt7615_mcu_sta_add(phy, ...) ((phy)->dev)->mcu_ops->sta_add((phy), __VA_ARGS__) 199 #define mt7615_mcu_add_dev_info(phy, ...) ((phy)->dev)->mcu_ops->add_dev_info((phy), __VA_ARGS__) 200 #define mt7615_mcu_add_bss_info(phy, ...) ((phy)->dev)->mcu_ops->add_bss_info((phy), __VA_ARGS__) 201 #define mt7615_mcu_add_beacon(dev, ...) (dev)->mcu_ops->add_beacon_offload((dev), __VA_ARGS__) 202 #define mt7615_mcu_set_pm(dev, ...) (dev)->mcu_ops->set_pm_state((dev), __VA_ARGS__) 203 #define mt7615_mcu_set_drv_ctrl(dev) (dev)->mcu_ops->set_drv_ctrl((dev)) 204 #define mt7615_mcu_set_fw_ctrl(dev) (dev)->mcu_ops->set_fw_ctrl((dev)) 205 struct mt7615_mcu_ops { 206 int (*add_tx_ba)(struct mt7615_dev *dev, 207 struct ieee80211_ampdu_params *params, 208 bool enable); 209 int (*add_rx_ba)(struct mt7615_dev *dev, 210 struct ieee80211_ampdu_params *params, 211 bool enable); 212 int (*sta_add)(struct mt7615_phy *phy, struct ieee80211_vif *vif, 213 struct ieee80211_sta *sta, bool enable); 214 int (*add_dev_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif, 215 bool enable); 216 int (*add_bss_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif, 217 struct ieee80211_sta *sta, bool enable); 218 int (*add_beacon_offload)(struct mt7615_dev *dev, 219 struct ieee80211_hw *hw, 220 struct ieee80211_vif *vif, bool enable); 221 int (*set_pm_state)(struct mt7615_dev *dev, int band, int state); 222 int (*set_drv_ctrl)(struct mt7615_dev *dev); 223 int (*set_fw_ctrl)(struct mt7615_dev *dev); 224 }; 225 226 struct mt7615_dev { 227 union { /* must be first */ 228 struct mt76_dev mt76; 229 struct mt76_phy mphy; 230 }; 231 232 const struct mt76_bus_ops *bus_ops; 233 struct tasklet_struct irq_tasklet; 234 235 struct mt7615_phy phy; 236 u64 omac_mask; 237 238 u16 chainmask; 239 240 struct ieee80211_ops *ops; 241 const struct mt7615_mcu_ops *mcu_ops; 242 struct regmap *infracfg; 243 const u32 *reg_map; 244 245 struct work_struct mcu_work; 246 247 struct work_struct reset_work; 248 wait_queue_head_t reset_wait; 249 u32 reset_state; 250 251 struct list_head sta_poll_list; 252 spinlock_t sta_poll_lock; 253 254 struct { 255 u8 n_pulses; 256 u32 period; 257 u16 width; 258 s16 power; 259 } radar_pattern; 260 u32 hw_pattern; 261 262 bool fw_debug; 263 bool flash_eeprom; 264 bool dbdc_support; 265 266 u8 fw_ver; 267 268 struct work_struct rate_work; 269 struct list_head wrd_head; 270 271 u32 debugfs_rf_wf; 272 u32 debugfs_rf_reg; 273 274 u32 muar_mask; 275 276 struct mt76_connac_pm pm; 277 struct mt76_connac_coredump coredump; 278 }; 279 280 enum tx_pkt_queue_idx { 281 MT_LMAC_AC00, 282 MT_LMAC_AC01, 283 MT_LMAC_AC02, 284 MT_LMAC_AC03, 285 MT_LMAC_ALTX0 = 0x10, 286 MT_LMAC_BMC0, 287 MT_LMAC_BCN0, 288 MT_LMAC_PSMP0, 289 MT_LMAC_ALTX1, 290 MT_LMAC_BMC1, 291 MT_LMAC_BCN1, 292 MT_LMAC_PSMP1, 293 }; 294 295 enum { 296 MT_RX_SEL0, 297 MT_RX_SEL1, 298 }; 299 300 enum mt7615_rdd_cmd { 301 RDD_STOP, 302 RDD_START, 303 RDD_DET_MODE, 304 RDD_DET_STOP, 305 RDD_CAC_START, 306 RDD_CAC_END, 307 RDD_NORMAL_START, 308 RDD_DISABLE_DFS_CAL, 309 RDD_PULSE_DBG, 310 RDD_READ_PULSE, 311 RDD_RESUME_BF, 312 }; 313 314 static inline struct mt7615_phy * 315 mt7615_hw_phy(struct ieee80211_hw *hw) 316 { 317 struct mt76_phy *phy = hw->priv; 318 319 return phy->priv; 320 } 321 322 static inline struct mt7615_dev * 323 mt7615_hw_dev(struct ieee80211_hw *hw) 324 { 325 struct mt76_phy *phy = hw->priv; 326 327 return container_of(phy->dev, struct mt7615_dev, mt76); 328 } 329 330 static inline struct mt7615_phy * 331 mt7615_ext_phy(struct mt7615_dev *dev) 332 { 333 struct mt76_phy *phy = dev->mt76.phy2; 334 335 if (!phy) 336 return NULL; 337 338 return phy->priv; 339 } 340 341 extern struct ieee80211_rate mt7615_rates[12]; 342 extern const struct ieee80211_ops mt7615_ops; 343 extern const u32 mt7615e_reg_map[__MT_BASE_MAX]; 344 extern const u32 mt7663e_reg_map[__MT_BASE_MAX]; 345 extern const u32 mt7663_usb_sdio_reg_map[__MT_BASE_MAX]; 346 extern struct pci_driver mt7615_pci_driver; 347 extern struct platform_driver mt7622_wmac_driver; 348 extern const struct mt76_testmode_ops mt7615_testmode_ops; 349 350 #ifdef CONFIG_MT7622_WMAC 351 int mt7622_wmac_init(struct mt7615_dev *dev); 352 #else 353 static inline int mt7622_wmac_init(struct mt7615_dev *dev) 354 { 355 return 0; 356 } 357 #endif 358 359 int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, 360 int irq, const u32 *map); 361 u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr); 362 363 void mt7615_init_device(struct mt7615_dev *dev); 364 int mt7615_register_device(struct mt7615_dev *dev); 365 void mt7615_unregister_device(struct mt7615_dev *dev); 366 int mt7615_register_ext_phy(struct mt7615_dev *dev); 367 void mt7615_unregister_ext_phy(struct mt7615_dev *dev); 368 int mt7615_eeprom_init(struct mt7615_dev *dev, u32 addr); 369 int mt7615_eeprom_get_target_power_index(struct mt7615_dev *dev, 370 struct ieee80211_channel *chan, 371 u8 chain_idx); 372 int mt7615_eeprom_get_power_delta_index(struct mt7615_dev *dev, 373 enum nl80211_band band); 374 int mt7615_wait_pdma_busy(struct mt7615_dev *dev); 375 int mt7615_dma_init(struct mt7615_dev *dev); 376 void mt7615_dma_start(struct mt7615_dev *dev); 377 void mt7615_dma_cleanup(struct mt7615_dev *dev); 378 int mt7615_mcu_init(struct mt7615_dev *dev); 379 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev); 380 void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta, 381 struct ieee80211_tx_rate *probe_rate, 382 struct ieee80211_tx_rate *rates); 383 void mt7615_pm_wake_work(struct work_struct *work); 384 void mt7615_pm_power_save_work(struct work_struct *work); 385 int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev); 386 int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd); 387 int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue, 388 const struct ieee80211_tx_queue_params *params); 389 void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb); 390 int mt7615_mcu_rdd_cmd(struct mt7615_dev *dev, 391 enum mt7615_rdd_cmd cmd, u8 index, 392 u8 rx_sel, u8 val); 393 int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev); 394 int mt7615_mcu_fw_log_2_host(struct mt7615_dev *dev, u8 ctrl); 395 396 static inline bool is_mt7622(struct mt76_dev *dev) 397 { 398 if (!IS_ENABLED(CONFIG_MT7622_WMAC)) 399 return false; 400 401 return mt76_chip(dev) == 0x7622; 402 } 403 404 static inline bool is_mt7615(struct mt76_dev *dev) 405 { 406 return mt76_chip(dev) == 0x7615 || mt76_chip(dev) == 0x7611; 407 } 408 409 static inline bool is_mt7611(struct mt76_dev *dev) 410 { 411 return mt76_chip(dev) == 0x7611; 412 } 413 414 static inline void mt7615_irq_enable(struct mt7615_dev *dev, u32 mask) 415 { 416 mt76_set_irq_mask(&dev->mt76, 0, 0, mask); 417 418 tasklet_schedule(&dev->irq_tasklet); 419 } 420 421 static inline bool mt7615_firmware_offload(struct mt7615_dev *dev) 422 { 423 return dev->fw_ver > MT7615_FIRMWARE_V2; 424 } 425 426 static inline u16 mt7615_wtbl_size(struct mt7615_dev *dev) 427 { 428 if (is_mt7663(&dev->mt76) && mt7615_firmware_offload(dev)) 429 return MT7663_WTBL_SIZE; 430 else 431 return MT7615_WTBL_SIZE; 432 } 433 434 #define mt7615_mutex_acquire(dev) \ 435 mt76_connac_mutex_acquire(&(dev)->mt76, &(dev)->pm) 436 #define mt7615_mutex_release(dev) \ 437 mt76_connac_mutex_release(&(dev)->mt76, &(dev)->pm) 438 439 static inline u8 mt7615_lmac_mapping(struct mt7615_dev *dev, u8 ac) 440 { 441 static const u8 lmac_queue_map[] = { 442 [IEEE80211_AC_BK] = MT_LMAC_AC00, 443 [IEEE80211_AC_BE] = MT_LMAC_AC01, 444 [IEEE80211_AC_VI] = MT_LMAC_AC02, 445 [IEEE80211_AC_VO] = MT_LMAC_AC03, 446 }; 447 448 if (WARN_ON_ONCE(ac >= ARRAY_SIZE(lmac_queue_map))) 449 return MT_LMAC_AC01; /* BE */ 450 451 return lmac_queue_map[ac]; 452 } 453 454 static inline u32 mt7615_tx_mcu_int_mask(struct mt7615_dev *dev) 455 { 456 return MT_INT_TX_DONE(dev->mt76.q_mcu[MT_MCUQ_WM]->hw_idx); 457 } 458 459 void mt7615_dma_reset(struct mt7615_dev *dev); 460 void mt7615_scan_work(struct work_struct *work); 461 void mt7615_roc_work(struct work_struct *work); 462 void mt7615_roc_timer(struct timer_list *timer); 463 void mt7615_init_txpower(struct mt7615_dev *dev, 464 struct ieee80211_supported_band *sband); 465 int mt7615_set_channel(struct mt7615_phy *phy); 466 void mt7615_init_work(struct mt7615_dev *dev); 467 468 int mt7615_mcu_restart(struct mt76_dev *dev); 469 void mt7615_update_channel(struct mt76_dev *mdev); 470 bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask); 471 void mt7615_mac_reset_counters(struct mt7615_dev *dev); 472 void mt7615_mac_cca_stats_reset(struct mt7615_phy *phy); 473 void mt7615_mac_set_scs(struct mt7615_phy *phy, bool enable); 474 void mt7615_mac_enable_nf(struct mt7615_dev *dev, bool ext_phy); 475 void mt7615_mac_sta_poll(struct mt7615_dev *dev); 476 int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi, 477 struct sk_buff *skb, struct mt76_wcid *wcid, 478 struct ieee80211_sta *sta, int pid, 479 struct ieee80211_key_conf *key, bool beacon); 480 void mt7615_mac_set_timing(struct mt7615_phy *phy); 481 int __mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, 482 struct mt76_wcid *wcid, 483 struct ieee80211_key_conf *key, 484 enum set_key_cmd cmd); 485 int mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, struct mt76_wcid *wcid, 486 struct ieee80211_key_conf *key, 487 enum set_key_cmd cmd); 488 void mt7615_mac_reset_work(struct work_struct *work); 489 u32 mt7615_mac_get_sta_tid_sn(struct mt7615_dev *dev, int wcid, u8 tid); 490 491 int mt7615_mcu_parse_response(struct mt76_dev *mdev, int cmd, 492 struct sk_buff *skb, int seq); 493 u32 mt7615_rf_rr(struct mt7615_dev *dev, u32 wf, u32 reg); 494 int mt7615_rf_wr(struct mt7615_dev *dev, u32 wf, u32 reg, u32 val); 495 int mt7615_mcu_set_dbdc(struct mt7615_dev *dev); 496 int mt7615_mcu_set_eeprom(struct mt7615_dev *dev); 497 int mt7615_mcu_get_temperature(struct mt7615_dev *dev, int index); 498 int mt7615_mcu_set_tx_power(struct mt7615_phy *phy); 499 void mt7615_mcu_exit(struct mt7615_dev *dev); 500 void mt7615_mcu_fill_msg(struct mt7615_dev *dev, struct sk_buff *skb, 501 int cmd, int *wait_seq); 502 503 int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 504 enum mt76_txq_id qid, struct mt76_wcid *wcid, 505 struct ieee80211_sta *sta, 506 struct mt76_tx_info *tx_info); 507 508 void mt7615_tx_worker(struct mt76_worker *w); 509 void mt7615_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e); 510 void mt7615_tx_token_put(struct mt7615_dev *dev); 511 void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 512 struct sk_buff *skb); 513 void mt7615_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps); 514 int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, 515 struct ieee80211_sta *sta); 516 void mt7615_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 517 struct ieee80211_sta *sta); 518 void mt7615_mac_work(struct work_struct *work); 519 void mt7615_txp_skb_unmap(struct mt76_dev *dev, 520 struct mt76_txwi_cache *txwi); 521 int mt7615_mcu_sta_update_hdr_trans(struct mt7615_dev *dev, 522 struct ieee80211_vif *vif, 523 struct ieee80211_sta *sta); 524 int mt7615_mcu_set_rx_hdr_trans_blacklist(struct mt7615_dev *dev); 525 int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val); 526 int mt7615_mcu_set_pulse_th(struct mt7615_dev *dev, 527 const struct mt7615_dfs_pulse *pulse); 528 int mt7615_mcu_set_radar_th(struct mt7615_dev *dev, int index, 529 const struct mt7615_dfs_pattern *pattern); 530 int mt7615_mcu_set_test_param(struct mt7615_dev *dev, u8 param, bool test_mode, 531 u32 val); 532 int mt7615_mcu_set_sku_en(struct mt7615_phy *phy, bool enable); 533 int mt7615_mcu_apply_rx_dcoc(struct mt7615_phy *phy); 534 int mt7615_mcu_apply_tx_dpd(struct mt7615_phy *phy); 535 int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy); 536 537 int mt7615_mcu_set_p2p_oppps(struct ieee80211_hw *hw, 538 struct ieee80211_vif *vif); 539 int mt7615_mcu_set_roc(struct mt7615_phy *phy, struct ieee80211_vif *vif, 540 struct ieee80211_channel *chan, int duration); 541 542 int mt7615_init_debugfs(struct mt7615_dev *dev); 543 int mt7615_mcu_wait_response(struct mt7615_dev *dev, int cmd, int seq); 544 545 int mt7615_mac_set_beacon_filter(struct mt7615_phy *phy, 546 struct ieee80211_vif *vif, 547 bool enable); 548 int mt7615_mcu_set_bss_pm(struct mt7615_dev *dev, struct ieee80211_vif *vif, 549 bool enable); 550 int __mt7663_load_firmware(struct mt7615_dev *dev); 551 u32 mt7615_mcu_reg_rr(struct mt76_dev *dev, u32 offset); 552 void mt7615_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val); 553 void mt7615_coredump_work(struct work_struct *work); 554 555 void mt7622_trigger_hif_int(struct mt7615_dev *dev, bool en); 556 557 /* usb */ 558 int mt7663_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 559 enum mt76_txq_id qid, struct mt76_wcid *wcid, 560 struct ieee80211_sta *sta, 561 struct mt76_tx_info *tx_info); 562 bool mt7663_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update); 563 void mt7663_usb_sdio_tx_complete_skb(struct mt76_dev *mdev, 564 struct mt76_queue_entry *e); 565 int mt7663_usb_sdio_register_device(struct mt7615_dev *dev); 566 int mt7663u_mcu_init(struct mt7615_dev *dev); 567 568 /* sdio */ 569 u32 mt7663s_read_pcr(struct mt7615_dev *dev); 570 int mt7663s_mcu_init(struct mt7615_dev *dev); 571 void mt7663s_txrx_worker(struct mt76_worker *w); 572 void mt7663s_rx_work(struct work_struct *work); 573 void mt7663s_sdio_irq(struct sdio_func *func); 574 575 #endif 576