1 /* SPDX-License-Identifier: ISC */ 2 /* Copyright (C) 2019 MediaTek Inc. */ 3 4 #ifndef __MT7615_H 5 #define __MT7615_H 6 7 #include <linux/interrupt.h> 8 #include <linux/ktime.h> 9 #include <linux/regmap.h> 10 #include "../mt76.h" 11 #include "regs.h" 12 13 #define MT7615_MAX_INTERFACES 4 14 #define MT7615_MAX_WMM_SETS 4 15 #define MT7615_WTBL_SIZE 128 16 #define MT7615_WTBL_RESERVED (MT7615_WTBL_SIZE - 1) 17 #define MT7615_WTBL_STA (MT7615_WTBL_RESERVED - \ 18 MT7615_MAX_INTERFACES) 19 20 #define MT7615_WATCHDOG_TIME (HZ / 10) 21 #define MT7615_RESET_TIMEOUT (30 * HZ) 22 #define MT7615_RATE_RETRY 2 23 24 #define MT7615_TX_RING_SIZE 1024 25 #define MT7615_TX_MGMT_RING_SIZE 128 26 #define MT7615_TX_MCU_RING_SIZE 128 27 #define MT7615_TX_FWDL_RING_SIZE 128 28 29 #define MT7615_RX_RING_SIZE 1024 30 #define MT7615_RX_MCU_RING_SIZE 512 31 32 #define MT7615_FIRMWARE_CR4 "mediatek/mt7615_cr4.bin" 33 #define MT7615_FIRMWARE_N9 "mediatek/mt7615_n9.bin" 34 #define MT7615_ROM_PATCH "mediatek/mt7615_rom_patch.bin" 35 36 #define MT7622_FIRMWARE_N9 "mediatek/mt7622_n9.bin" 37 #define MT7622_ROM_PATCH "mediatek/mt7622_rom_patch.bin" 38 39 #define MT7615_FIRMWARE_V1 1 40 #define MT7615_FIRMWARE_V2 2 41 #define MT7615_FIRMWARE_V3 3 42 43 #define MT7663_ROM_PATCH "mediatek/mt7663pr2h_v3.bin" 44 #define MT7663_FIRMWARE_N9 "mediatek/mt7663_n9_v3.bin" 45 46 #define MT7615_EEPROM_SIZE 1024 47 #define MT7615_TOKEN_SIZE 4096 48 49 #define MT_FRAC_SCALE 12 50 #define MT_FRAC(val, div) (((val) << MT_FRAC_SCALE) / (div)) 51 52 #define MT_CHFREQ_VALID BIT(7) 53 #define MT_CHFREQ_DBDC_IDX BIT(6) 54 #define MT_CHFREQ_SEQ GENMASK(5, 0) 55 56 #define MT7615_BAR_RATE_DEFAULT 0x4b /* OFDM 6M */ 57 #define MT7615_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */ 58 #define MT7615_CFEND_RATE_11B 0x03 /* 11B LP, 11M */ 59 60 struct mt7615_vif; 61 struct mt7615_sta; 62 struct mt7615_dfs_pulse; 63 struct mt7615_dfs_pattern; 64 65 enum mt7615_hw_txq_id { 66 MT7615_TXQ_MAIN, 67 MT7615_TXQ_EXT, 68 MT7615_TXQ_MCU, 69 MT7615_TXQ_FWDL, 70 }; 71 72 enum mt7622_hw_txq_id { 73 MT7622_TXQ_AC0, 74 MT7622_TXQ_AC1, 75 MT7622_TXQ_AC2, 76 MT7622_TXQ_FWDL = MT7615_TXQ_FWDL, 77 MT7622_TXQ_AC3, 78 MT7622_TXQ_MGMT, 79 MT7622_TXQ_MCU = 15, 80 }; 81 82 struct mt7615_rate_set { 83 struct ieee80211_tx_rate probe_rate; 84 struct ieee80211_tx_rate rates[4]; 85 }; 86 87 struct mt7615_sta { 88 struct mt76_wcid wcid; /* must be first */ 89 90 struct mt7615_vif *vif; 91 92 struct list_head poll_list; 93 u32 airtime_ac[8]; 94 95 struct ieee80211_tx_rate rates[4]; 96 97 struct mt7615_rate_set rateset[2]; 98 u32 rate_set_tsf; 99 100 u8 rate_count; 101 u8 n_rates; 102 103 u8 rate_probe; 104 }; 105 106 struct mt7615_vif { 107 u8 idx; 108 u8 omac_idx; 109 u8 band_idx; 110 u8 wmm_idx; 111 112 struct mt7615_sta sta; 113 }; 114 115 struct mib_stats { 116 u32 ack_fail_cnt; 117 u32 fcs_err_cnt; 118 u32 rts_cnt; 119 u32 rts_retries_cnt; 120 }; 121 122 struct mt7615_phy { 123 struct mt76_phy *mt76; 124 struct mt7615_dev *dev; 125 126 u32 rxfilter; 127 u32 omac_mask; 128 129 u16 noise; 130 131 unsigned long last_cca_adj; 132 int false_cca_ofdm, false_cca_cck; 133 s8 ofdm_sensitivity; 134 s8 cck_sensitivity; 135 136 u16 chainmask; 137 138 s16 coverage_class; 139 u8 slottime; 140 141 u8 chfreq; 142 u8 rdd_state; 143 int dfs_state; 144 145 __le32 rx_ampdu_ts; 146 u32 ampdu_ref; 147 148 struct mib_stats mib; 149 }; 150 151 #define mt7615_mcu_add_tx_ba(dev, ...) (dev)->mcu_ops->add_tx_ba((dev), __VA_ARGS__) 152 #define mt7615_mcu_add_rx_ba(dev, ...) (dev)->mcu_ops->add_rx_ba((dev), __VA_ARGS__) 153 #define mt7615_mcu_sta_add(dev, ...) (dev)->mcu_ops->sta_add((dev), __VA_ARGS__) 154 #define mt7615_mcu_add_dev_info(dev, ...) (dev)->mcu_ops->add_dev_info((dev), __VA_ARGS__) 155 #define mt7615_mcu_add_bss_info(dev, ...) (dev)->mcu_ops->add_bss_info((dev), __VA_ARGS__) 156 #define mt7615_mcu_add_beacon(dev, ...) (dev)->mcu_ops->add_beacon_offload((dev), __VA_ARGS__) 157 #define mt7615_mcu_set_pm(dev, ...) (dev)->mcu_ops->set_pm_state((dev), __VA_ARGS__) 158 struct mt7615_mcu_ops { 159 int (*add_tx_ba)(struct mt7615_dev *dev, 160 struct ieee80211_ampdu_params *params, 161 bool enable); 162 int (*add_rx_ba)(struct mt7615_dev *dev, 163 struct ieee80211_ampdu_params *params, 164 bool enable); 165 int (*sta_add)(struct mt7615_dev *dev, 166 struct ieee80211_vif *vif, 167 struct ieee80211_sta *sta, bool enable); 168 int (*add_dev_info)(struct mt7615_dev *dev, 169 struct ieee80211_vif *vif, bool enable); 170 int (*add_bss_info)(struct mt7615_dev *dev, struct ieee80211_vif *vif, 171 bool enable); 172 int (*add_beacon_offload)(struct mt7615_dev *dev, 173 struct ieee80211_hw *hw, 174 struct ieee80211_vif *vif, bool enable); 175 int (*set_pm_state)(struct mt7615_dev *dev, int band, int state); 176 }; 177 178 struct mt7615_dev { 179 union { /* must be first */ 180 struct mt76_dev mt76; 181 struct mt76_phy mphy; 182 }; 183 184 struct mt7615_phy phy; 185 u32 vif_mask; 186 u32 omac_mask; 187 188 u16 chainmask; 189 190 const struct mt7615_mcu_ops *mcu_ops; 191 struct regmap *infracfg; 192 const u32 *reg_map; 193 194 struct work_struct mcu_work; 195 196 struct work_struct reset_work; 197 wait_queue_head_t reset_wait; 198 u32 reset_state; 199 200 struct list_head sta_poll_list; 201 spinlock_t sta_poll_lock; 202 203 struct { 204 u8 n_pulses; 205 u32 period; 206 u16 width; 207 s16 power; 208 } radar_pattern; 209 u32 hw_pattern; 210 211 u8 mac_work_count; 212 bool scs_en; 213 bool fw_debug; 214 215 spinlock_t token_lock; 216 struct idr token; 217 218 u8 fw_ver; 219 }; 220 221 enum { 222 HW_BSSID_0 = 0x0, 223 HW_BSSID_1, 224 HW_BSSID_2, 225 HW_BSSID_3, 226 HW_BSSID_MAX, 227 EXT_BSSID_START = 0x10, 228 EXT_BSSID_1, 229 EXT_BSSID_2, 230 EXT_BSSID_3, 231 EXT_BSSID_4, 232 EXT_BSSID_5, 233 EXT_BSSID_6, 234 EXT_BSSID_7, 235 EXT_BSSID_8, 236 EXT_BSSID_9, 237 EXT_BSSID_10, 238 EXT_BSSID_11, 239 EXT_BSSID_12, 240 EXT_BSSID_13, 241 EXT_BSSID_14, 242 EXT_BSSID_15, 243 EXT_BSSID_END 244 }; 245 246 enum { 247 MT_RX_SEL0, 248 MT_RX_SEL1, 249 }; 250 251 enum mt7615_rdd_cmd { 252 RDD_STOP, 253 RDD_START, 254 RDD_DET_MODE, 255 RDD_DET_STOP, 256 RDD_CAC_START, 257 RDD_CAC_END, 258 RDD_NORMAL_START, 259 RDD_DISABLE_DFS_CAL, 260 RDD_PULSE_DBG, 261 RDD_READ_PULSE, 262 RDD_RESUME_BF, 263 }; 264 265 static inline struct mt7615_phy * 266 mt7615_hw_phy(struct ieee80211_hw *hw) 267 { 268 struct mt76_phy *phy = hw->priv; 269 270 return phy->priv; 271 } 272 273 static inline struct mt7615_dev * 274 mt7615_hw_dev(struct ieee80211_hw *hw) 275 { 276 struct mt76_phy *phy = hw->priv; 277 278 return container_of(phy->dev, struct mt7615_dev, mt76); 279 } 280 281 static inline struct mt7615_phy * 282 mt7615_ext_phy(struct mt7615_dev *dev) 283 { 284 struct mt76_phy *phy = dev->mt76.phy2; 285 286 if (!phy) 287 return NULL; 288 289 return phy->priv; 290 } 291 292 extern const struct ieee80211_ops mt7615_ops; 293 extern const u32 mt7615e_reg_map[__MT_BASE_MAX]; 294 extern const u32 mt7663e_reg_map[__MT_BASE_MAX]; 295 extern struct pci_driver mt7615_pci_driver; 296 extern struct platform_driver mt7622_wmac_driver; 297 298 #ifdef CONFIG_MT7622_WMAC 299 int mt7622_wmac_init(struct mt7615_dev *dev); 300 #else 301 static inline int mt7622_wmac_init(struct mt7615_dev *dev) 302 { 303 return 0; 304 } 305 #endif 306 307 int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, 308 int irq, const u32 *map); 309 u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr); 310 311 void mt7615_init_device(struct mt7615_dev *dev); 312 int mt7615_register_device(struct mt7615_dev *dev); 313 void mt7615_unregister_device(struct mt7615_dev *dev); 314 int mt7615_register_ext_phy(struct mt7615_dev *dev); 315 void mt7615_unregister_ext_phy(struct mt7615_dev *dev); 316 int mt7615_eeprom_init(struct mt7615_dev *dev); 317 int mt7615_eeprom_get_power_index(struct mt7615_dev *dev, 318 struct ieee80211_channel *chan, 319 u8 chain_idx); 320 int mt7615_dma_init(struct mt7615_dev *dev); 321 void mt7615_dma_cleanup(struct mt7615_dev *dev); 322 int mt7615_mcu_init(struct mt7615_dev *dev); 323 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev); 324 void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta, 325 struct ieee80211_tx_rate *probe_rate, 326 struct ieee80211_tx_rate *rates); 327 int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev); 328 int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd); 329 int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue, 330 const struct ieee80211_tx_queue_params *params); 331 void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb); 332 int mt7615_mcu_rdd_cmd(struct mt7615_dev *dev, 333 enum mt7615_rdd_cmd cmd, u8 index, 334 u8 rx_sel, u8 val); 335 int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev); 336 int mt7615_mcu_fw_log_2_host(struct mt7615_dev *dev, u8 ctrl); 337 338 static inline bool is_mt7622(struct mt76_dev *dev) 339 { 340 if (!IS_ENABLED(CONFIG_MT7622_WMAC)) 341 return false; 342 343 return mt76_chip(dev) == 0x7622; 344 } 345 346 static inline bool is_mt7615(struct mt76_dev *dev) 347 { 348 return mt76_chip(dev) == 0x7615; 349 } 350 351 static inline bool is_mt7663(struct mt76_dev *dev) 352 { 353 return mt76_chip(dev) == 0x7663; 354 } 355 356 static inline void mt7615_irq_enable(struct mt7615_dev *dev, u32 mask) 357 { 358 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, 0, mask); 359 } 360 361 static inline void mt7615_irq_disable(struct mt7615_dev *dev, u32 mask) 362 { 363 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0); 364 } 365 366 void mt7615_update_channel(struct mt76_dev *mdev); 367 bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask); 368 void mt7615_mac_reset_counters(struct mt7615_dev *dev); 369 void mt7615_mac_cca_stats_reset(struct mt7615_phy *phy); 370 void mt7615_mac_set_scs(struct mt7615_dev *dev, bool enable); 371 void mt7615_mac_enable_nf(struct mt7615_dev *dev, bool ext_phy); 372 void mt7615_mac_sta_poll(struct mt7615_dev *dev); 373 int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi, 374 struct sk_buff *skb, struct mt76_wcid *wcid, 375 struct ieee80211_sta *sta, int pid, 376 struct ieee80211_key_conf *key, bool beacon); 377 void mt7615_mac_set_timing(struct mt7615_phy *phy); 378 int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb); 379 void mt7615_mac_add_txs(struct mt7615_dev *dev, void *data); 380 void mt7615_mac_tx_free(struct mt7615_dev *dev, struct sk_buff *skb); 381 int mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, struct mt76_wcid *wcid, 382 struct ieee80211_key_conf *key, 383 enum set_key_cmd cmd); 384 void mt7615_mac_reset_work(struct work_struct *work); 385 386 int mt7615_mcu_wait_response(struct mt7615_dev *dev, int cmd, int seq); 387 int mt7615_mcu_set_dbdc(struct mt7615_dev *dev); 388 int mt7615_mcu_set_eeprom(struct mt7615_dev *dev); 389 int mt7615_mcu_set_mac_enable(struct mt7615_dev *dev, int band, bool enable); 390 int mt7615_mcu_set_rts_thresh(struct mt7615_phy *phy, u32 val); 391 int mt7615_mcu_get_temperature(struct mt7615_dev *dev, int index); 392 void mt7615_mcu_exit(struct mt7615_dev *dev); 393 void mt7615_mcu_fill_msg(struct mt7615_dev *dev, struct sk_buff *skb, 394 int cmd, int *wait_seq); 395 396 int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 397 enum mt76_txq_id qid, struct mt76_wcid *wcid, 398 struct ieee80211_sta *sta, 399 struct mt76_tx_info *tx_info); 400 401 void mt7615_tx_complete_skb(struct mt76_dev *mdev, enum mt76_txq_id qid, 402 struct mt76_queue_entry *e); 403 404 void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 405 struct sk_buff *skb); 406 void mt7615_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps); 407 int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, 408 struct ieee80211_sta *sta); 409 void mt7615_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 410 struct ieee80211_sta *sta); 411 void mt7615_mac_work(struct work_struct *work); 412 void mt7615_txp_skb_unmap(struct mt76_dev *dev, 413 struct mt76_txwi_cache *txwi); 414 int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val); 415 int mt7615_mcu_set_pulse_th(struct mt7615_dev *dev, 416 const struct mt7615_dfs_pulse *pulse); 417 int mt7615_mcu_set_radar_th(struct mt7615_dev *dev, int index, 418 const struct mt7615_dfs_pattern *pattern); 419 int mt7615_mcu_set_sku_en(struct mt7615_phy *phy, bool enable); 420 int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy); 421 422 int mt7615_init_debugfs(struct mt7615_dev *dev); 423 424 #endif 425