1 /* SPDX-License-Identifier: ISC */ 2 /* Copyright (C) 2019 MediaTek Inc. */ 3 4 #ifndef __MT7615_MCU_H 5 #define __MT7615_MCU_H 6 7 struct mt7615_mcu_txd { 8 __le32 txd[8]; 9 10 __le16 len; 11 __le16 pq_id; 12 13 u8 cid; 14 u8 pkt_type; 15 u8 set_query; /* FW don't care */ 16 u8 seq; 17 18 u8 uc_d2b0_rev; 19 u8 ext_cid; 20 u8 s2d_index; 21 u8 ext_cid_ack; 22 23 u32 reserved[5]; 24 } __packed __aligned(4); 25 26 struct mt7615_mcu_rxd { 27 __le32 rxd[4]; 28 29 __le16 len; 30 __le16 pkt_type_id; 31 32 u8 eid; 33 u8 seq; 34 __le16 __rsv; 35 36 u8 ext_eid; 37 u8 __rsv1[2]; 38 u8 s2d_index; 39 }; 40 41 #define MCU_PQ_ID(p, q) (((p) << 15) | ((q) << 10)) 42 #define MCU_PKT_ID 0xa0 43 44 enum { 45 MCU_Q_QUERY, 46 MCU_Q_SET, 47 MCU_Q_RESERVED, 48 MCU_Q_NA 49 }; 50 51 enum { 52 MCU_S2D_H2N, 53 MCU_S2D_C2N, 54 MCU_S2D_H2C, 55 MCU_S2D_H2CN 56 }; 57 58 enum { 59 MCU_CMD_TARGET_ADDRESS_LEN_REQ = 0x01, 60 MCU_CMD_FW_START_REQ = 0x02, 61 MCU_CMD_INIT_ACCESS_REG = 0x3, 62 MCU_CMD_PATCH_START_REQ = 0x05, 63 MCU_CMD_PATCH_FINISH_REQ = 0x07, 64 MCU_CMD_PATCH_SEM_CONTROL = 0x10, 65 MCU_CMD_EXT_CID = 0xED, 66 MCU_CMD_FW_SCATTER = 0xEE, 67 MCU_CMD_RESTART_DL_REQ = 0xEF, 68 }; 69 70 enum { 71 MCU_EXT_CMD_PM_STATE_CTRL = 0x07, 72 MCU_EXT_CMD_CHANNEL_SWITCH = 0x08, 73 MCU_EXT_CMD_EFUSE_BUFFER_MODE = 0x21, 74 MCU_EXT_CMD_STA_REC_UPDATE = 0x25, 75 MCU_EXT_CMD_BSS_INFO_UPDATE = 0x26, 76 MCU_EXT_CMD_EDCA_UPDATE = 0x27, 77 MCU_EXT_CMD_DEV_INFO_UPDATE = 0x2A, 78 MCU_EXT_CMD_WTBL_UPDATE = 0x32, 79 MCU_EXT_CMD_PROTECT_CTRL = 0x3e, 80 MCU_EXT_CMD_MAC_INIT_CTRL = 0x46, 81 MCU_EXT_CMD_BCN_OFFLOAD = 0x49, 82 MCU_EXT_CMD_SET_RX_PATH = 0x4e, 83 }; 84 85 enum { 86 PATCH_SEM_RELEASE = 0x0, 87 PATCH_SEM_GET = 0x1 88 }; 89 90 enum { 91 PATCH_NOT_DL_SEM_FAIL = 0x0, 92 PATCH_IS_DL = 0x1, 93 PATCH_NOT_DL_SEM_SUCCESS = 0x2, 94 PATCH_REL_SEM_SUCCESS = 0x3 95 }; 96 97 enum { 98 FW_STATE_INITIAL = 0, 99 FW_STATE_FW_DOWNLOAD = 1, 100 FW_STATE_NORMAL_OPERATION = 2, 101 FW_STATE_NORMAL_TRX = 3, 102 FW_STATE_CR4_RDY = 7 103 }; 104 105 #define STA_TYPE_STA BIT(0) 106 #define STA_TYPE_AP BIT(1) 107 #define STA_TYPE_ADHOC BIT(2) 108 #define STA_TYPE_TDLS BIT(3) 109 #define STA_TYPE_WDS BIT(4) 110 #define STA_TYPE_BC BIT(5) 111 112 #define NETWORK_INFRA BIT(16) 113 #define NETWORK_P2P BIT(17) 114 #define NETWORK_IBSS BIT(18) 115 #define NETWORK_MESH BIT(19) 116 #define NETWORK_BOW BIT(20) 117 #define NETWORK_WDS BIT(21) 118 119 #define CONNECTION_INFRA_STA (STA_TYPE_STA | NETWORK_INFRA) 120 #define CONNECTION_INFRA_AP (STA_TYPE_AP | NETWORK_INFRA) 121 #define CONNECTION_P2P_GC (STA_TYPE_STA | NETWORK_P2P) 122 #define CONNECTION_P2P_GO (STA_TYPE_AP | NETWORK_P2P) 123 #define CONNECTION_MESH_STA (STA_TYPE_STA | NETWORK_MESH) 124 #define CONNECTION_MESH_AP (STA_TYPE_AP | NETWORK_MESH) 125 #define CONNECTION_IBSS_ADHOC (STA_TYPE_ADHOC | NETWORK_IBSS) 126 #define CONNECTION_TDLS (STA_TYPE_STA | NETWORK_INFRA | STA_TYPE_TDLS) 127 #define CONNECTION_WDS (STA_TYPE_WDS | NETWORK_WDS) 128 #define CONNECTION_INFRA_BC (STA_TYPE_BC | NETWORK_INFRA) 129 130 #define CONN_STATE_DISCONNECT 0 131 #define CONN_STATE_CONNECT 1 132 #define CONN_STATE_PORT_SECURE 2 133 134 struct dev_info { 135 u8 omac_idx; 136 u8 omac_addr[ETH_ALEN]; 137 u8 band_idx; 138 u8 enable; 139 u32 feature; 140 }; 141 142 enum { 143 DEV_INFO_ACTIVE, 144 DEV_INFO_MAX_NUM 145 }; 146 147 struct bss_info { 148 u8 bss_idx; 149 u8 bssid[ETH_ALEN]; 150 u8 omac_idx; 151 u8 band_idx; 152 u8 bmc_tx_wlan_idx; /* for bmc tx (sta mode use uc entry) */ 153 u8 wmm_idx; 154 u32 network_type; 155 u32 conn_type; 156 u16 bcn_interval; 157 u8 dtim_period; 158 u8 enable; 159 u32 feature; 160 }; 161 162 struct bss_info_tag_handler { 163 u32 tag; 164 u32 len; 165 void (*handler)(struct mt7615_dev *dev, 166 struct bss_info *bss_info, struct sk_buff *skb); 167 }; 168 169 struct bss_info_omac { 170 __le16 tag; 171 __le16 len; 172 u8 hw_bss_idx; 173 u8 omac_idx; 174 u8 band_idx; 175 u8 rsv0; 176 __le32 conn_type; 177 u32 rsv1; 178 } __packed; 179 180 struct bss_info_basic { 181 __le16 tag; 182 __le16 len; 183 __le32 network_type; 184 u8 active; 185 u8 rsv0; 186 __le16 bcn_interval; 187 u8 bssid[ETH_ALEN]; 188 u8 wmm_idx; 189 u8 dtim_period; 190 u8 bmc_tx_wlan_idx; 191 u8 cipher; /* not used */ 192 u8 phymode; /* not used */ 193 u8 rsv1[5]; 194 } __packed; 195 196 struct bss_info_rf_ch { 197 __le16 tag; 198 __le16 len; 199 u8 pri_ch; 200 u8 central_ch0; 201 u8 central_ch1; 202 u8 bw; 203 } __packed; 204 205 struct bss_info_ext_bss { 206 __le16 tag; 207 __le16 len; 208 __le32 mbss_tsf_offset; /* in unit of us */ 209 u8 rsv[8]; 210 } __packed; 211 212 enum { 213 BSS_INFO_OMAC, 214 BSS_INFO_BASIC, 215 BSS_INFO_RF_CH, /* optional, for BT/LTE coex */ 216 BSS_INFO_PM, /* sta only */ 217 BSS_INFO_UAPSD, /* sta only */ 218 BSS_INFO_ROAM_DETECTION, /* obsoleted */ 219 BSS_INFO_LQ_RM, /* obsoleted */ 220 BSS_INFO_EXT_BSS, 221 BSS_INFO_BMC_INFO, /* for bmc rate control in CR4 */ 222 BSS_INFO_SYNC_MODE, /* obsoleted */ 223 BSS_INFO_RA, 224 BSS_INFO_MAX_NUM 225 }; 226 227 enum { 228 WTBL_RESET_AND_SET = 1, 229 WTBL_SET, 230 WTBL_QUERY, 231 WTBL_RESET_ALL 232 }; 233 234 struct wtbl_generic { 235 __le16 tag; 236 __le16 len; 237 u8 peer_addr[ETH_ALEN]; 238 u8 muar_idx; 239 u8 skip_tx; 240 u8 cf_ack; 241 u8 qos; 242 u8 mesh; 243 u8 adm; 244 __le16 partial_aid; 245 u8 baf_en; 246 u8 aad_om; 247 } __packed; 248 249 struct wtbl_rx { 250 __le16 tag; 251 __le16 len; 252 u8 rcid; 253 u8 rca1; 254 u8 rca2; 255 u8 rv; 256 u8 rsv[4]; 257 } __packed; 258 259 struct wtbl_ht { 260 __le16 tag; 261 __le16 len; 262 u8 ht; 263 u8 ldpc; 264 u8 af; 265 u8 mm; 266 u8 rsv[4]; 267 } __packed; 268 269 struct wtbl_vht { 270 __le16 tag; 271 __le16 len; 272 u8 ldpc; 273 u8 dyn_bw; 274 u8 vht; 275 u8 txop_ps; 276 u8 rsv[4]; 277 } __packed; 278 279 struct wtbl_tx_ps { 280 __le16 tag; 281 __le16 len; 282 u8 txps; 283 u8 rsv[3]; 284 } __packed; 285 286 struct wtbl_hdr_trans { 287 __le16 tag; 288 __le16 len; 289 u8 to_ds; 290 u8 from_ds; 291 u8 disable_rx_trans; 292 u8 rsv; 293 } __packed; 294 295 enum mt7615_cipher_type { 296 MT_CIPHER_NONE, 297 MT_CIPHER_WEP40, 298 MT_CIPHER_TKIP, 299 MT_CIPHER_TKIP_NO_MIC, 300 MT_CIPHER_AES_CCMP, 301 MT_CIPHER_WEP104, 302 MT_CIPHER_BIP_CMAC_128, 303 MT_CIPHER_WEP128, 304 MT_CIPHER_WAPI, 305 MT_CIPHER_CCMP_256 = 10, 306 MT_CIPHER_GCMP, 307 MT_CIPHER_GCMP_256, 308 }; 309 310 struct wtbl_sec_key { 311 __le16 tag; 312 __le16 len; 313 u8 add; /* 0: add, 1: remove */ 314 u8 rkv; 315 u8 ikv; 316 u8 cipher_id; 317 u8 key_id; 318 u8 key_len; 319 u8 rsv[2]; 320 u8 key_material[32]; 321 } __packed; 322 323 enum { 324 MT_BA_TYPE_INVALID, 325 MT_BA_TYPE_ORIGINATOR, 326 MT_BA_TYPE_RECIPIENT 327 }; 328 329 enum { 330 RST_BA_MAC_TID_MATCH, 331 RST_BA_MAC_MATCH, 332 RST_BA_NO_MATCH 333 }; 334 335 struct wtbl_ba { 336 __le16 tag; 337 __le16 len; 338 /* common */ 339 u8 tid; 340 u8 ba_type; 341 u8 rsv0[2]; 342 /* originator only */ 343 __le16 sn; 344 u8 ba_en; 345 u8 ba_winsize_idx; 346 __le16 ba_winsize; 347 /* recipient only */ 348 u8 peer_addr[ETH_ALEN]; 349 u8 rst_ba_tid; 350 u8 rst_ba_sel; 351 u8 rst_ba_sb; 352 u8 band_idx; 353 u8 rsv1[4]; 354 } __packed; 355 356 struct wtbl_bf { 357 __le16 tag; 358 __le16 len; 359 u8 ibf; 360 u8 ebf; 361 u8 ibf_vht; 362 u8 ebf_vht; 363 u8 gid; 364 u8 pfmu_idx; 365 u8 rsv[2]; 366 } __packed; 367 368 struct wtbl_smps { 369 __le16 tag; 370 __le16 len; 371 u8 smps; 372 u8 rsv[3]; 373 } __packed; 374 375 struct wtbl_pn { 376 __le16 tag; 377 __le16 len; 378 u8 pn[6]; 379 u8 rsv[2]; 380 } __packed; 381 382 struct wtbl_spe { 383 __le16 tag; 384 __le16 len; 385 u8 spe_idx; 386 u8 rsv[3]; 387 } __packed; 388 389 struct wtbl_raw { 390 __le16 tag; 391 __le16 len; 392 u8 wtbl_idx; 393 u8 dw; 394 u8 rsv[2]; 395 __le32 msk; 396 __le32 val; 397 } __packed; 398 399 #define MT7615_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_generic) + \ 400 sizeof(struct wtbl_rx) + \ 401 sizeof(struct wtbl_ht) + \ 402 sizeof(struct wtbl_vht) + \ 403 sizeof(struct wtbl_tx_ps) + \ 404 sizeof(struct wtbl_hdr_trans) + \ 405 sizeof(struct wtbl_sec_key) + \ 406 sizeof(struct wtbl_ba) + \ 407 sizeof(struct wtbl_bf) + \ 408 sizeof(struct wtbl_smps) + \ 409 sizeof(struct wtbl_pn) + \ 410 sizeof(struct wtbl_spe)) 411 412 enum { 413 WTBL_GENERIC, 414 WTBL_RX, 415 WTBL_HT, 416 WTBL_VHT, 417 WTBL_PEER_PS, /* not used */ 418 WTBL_TX_PS, 419 WTBL_HDR_TRANS, 420 WTBL_SEC_KEY, 421 WTBL_BA, 422 WTBL_RDG, /* obsoleted */ 423 WTBL_PROTECT, /* not used */ 424 WTBL_CLEAR, /* not used */ 425 WTBL_BF, 426 WTBL_SMPS, 427 WTBL_RAW_DATA, /* debug only */ 428 WTBL_PN, 429 WTBL_SPE, 430 WTBL_MAX_NUM 431 }; 432 433 struct sta_rec_basic { 434 __le16 tag; 435 __le16 len; 436 __le32 conn_type; 437 u8 conn_state; 438 u8 qos; 439 __le16 aid; 440 u8 peer_addr[ETH_ALEN]; 441 #define EXTRA_INFO_VER BIT(0) 442 #define EXTRA_INFO_NEW BIT(1) 443 __le16 extra_info; 444 } __packed; 445 446 struct sta_rec_ht { 447 __le16 tag; 448 __le16 len; 449 __le16 ht_cap; 450 u16 rsv; 451 } __packed; 452 453 struct sta_rec_vht { 454 __le16 tag; 455 __le16 len; 456 __le32 vht_cap; 457 __le16 vht_rx_mcs_map; 458 __le16 vht_tx_mcs_map; 459 } __packed; 460 461 struct sta_rec_ba { 462 __le16 tag; 463 __le16 len; 464 u8 tid; 465 u8 ba_type; 466 u8 amsdu; 467 u8 ba_en; 468 __le16 ssn; 469 __le16 winsize; 470 } __packed; 471 472 #define MT7615_STA_REC_UPDATE_MAX_SIZE (sizeof(struct sta_rec_basic) + \ 473 sizeof(struct sta_rec_ht) + \ 474 sizeof(struct sta_rec_vht)) 475 476 enum { 477 STA_REC_BASIC, 478 STA_REC_RA, 479 STA_REC_RA_CMM_INFO, 480 STA_REC_RA_UPDATE, 481 STA_REC_BF, 482 STA_REC_AMSDU, /* for CR4 */ 483 STA_REC_BA, 484 STA_REC_RED, /* not used */ 485 STA_REC_TX_PROC, /* for hdr trans and CSO in CR4 */ 486 STA_REC_HT, 487 STA_REC_VHT, 488 STA_REC_APPS, 489 STA_REC_MAX_NUM 490 }; 491 492 enum { 493 CMD_CBW_20MHZ, 494 CMD_CBW_40MHZ, 495 CMD_CBW_80MHZ, 496 CMD_CBW_160MHZ, 497 CMD_CBW_10MHZ, 498 CMD_CBW_5MHZ, 499 CMD_CBW_8080MHZ 500 }; 501 502 enum { 503 CH_SWITCH_NORMAL = 0, 504 CH_SWITCH_SCAN = 3, 505 CH_SWITCH_MCC = 4, 506 CH_SWITCH_DFS = 5, 507 CH_SWITCH_BACKGROUND_SCAN_START = 6, 508 CH_SWITCH_BACKGROUND_SCAN_RUNNING = 7, 509 CH_SWITCH_BACKGROUND_SCAN_STOP = 8, 510 CH_SWITCH_SCAN_BYPASS_DPD = 9 511 }; 512 513 static inline struct sk_buff * 514 mt7615_mcu_msg_alloc(const void *data, int len) 515 { 516 return mt76_mcu_msg_alloc(data, sizeof(struct mt7615_mcu_txd), 517 len, 0); 518 } 519 520 #endif 521