1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2019 MediaTek Inc. 3 * 4 * Author: Roy Luo <royluo@google.com> 5 * Ryder Lee <ryder.lee@mediatek.com> 6 */ 7 8 #include <linux/firmware.h> 9 #include "mt7615.h" 10 #include "mcu.h" 11 #include "mac.h" 12 #include "eeprom.h" 13 14 struct mt7615_patch_hdr { 15 char build_date[16]; 16 char platform[4]; 17 __be32 hw_sw_ver; 18 __be32 patch_ver; 19 __be16 checksum; 20 } __packed; 21 22 struct mt7615_fw_trailer { 23 __le32 addr; 24 u8 chip_id; 25 u8 feature_set; 26 u8 eco_code; 27 char fw_ver[10]; 28 char build_date[15]; 29 __le32 len; 30 } __packed; 31 32 #define MCU_PATCH_ADDRESS 0x80000 33 34 #define N9_REGION_NUM 2 35 #define CR4_REGION_NUM 1 36 37 #define IMG_CRC_LEN 4 38 39 #define FW_FEATURE_SET_ENCRYPT BIT(0) 40 #define FW_FEATURE_SET_KEY_IDX GENMASK(2, 1) 41 42 #define DL_MODE_ENCRYPT BIT(0) 43 #define DL_MODE_KEY_IDX GENMASK(2, 1) 44 #define DL_MODE_RESET_SEC_IV BIT(3) 45 #define DL_MODE_WORKING_PDA_CR4 BIT(4) 46 #define DL_MODE_NEED_RSP BIT(31) 47 48 #define FW_START_OVERRIDE BIT(0) 49 #define FW_START_WORKING_PDA_CR4 BIT(2) 50 51 static int __mt7615_mcu_msg_send(struct mt7615_dev *dev, struct sk_buff *skb, 52 int cmd, int *wait_seq) 53 { 54 struct mt7615_mcu_txd *mcu_txd; 55 u8 seq, q_idx, pkt_fmt; 56 enum mt76_txq_id qid; 57 u32 val; 58 __le32 *txd; 59 60 seq = ++dev->mt76.mmio.mcu.msg_seq & 0xf; 61 if (!seq) 62 seq = ++dev->mt76.mmio.mcu.msg_seq & 0xf; 63 64 mcu_txd = (struct mt7615_mcu_txd *)skb_push(skb, 65 sizeof(struct mt7615_mcu_txd)); 66 memset(mcu_txd, 0, sizeof(struct mt7615_mcu_txd)); 67 68 if (cmd != -MCU_CMD_FW_SCATTER) { 69 q_idx = MT_TX_MCU_PORT_RX_Q0; 70 pkt_fmt = MT_TX_TYPE_CMD; 71 } else { 72 q_idx = MT_TX_MCU_PORT_RX_FWDL; 73 pkt_fmt = MT_TX_TYPE_FW; 74 } 75 76 txd = mcu_txd->txd; 77 78 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) | 79 FIELD_PREP(MT_TXD0_P_IDX, MT_TX_PORT_IDX_MCU) | 80 FIELD_PREP(MT_TXD0_Q_IDX, q_idx); 81 txd[0] = cpu_to_le32(val); 82 83 val = MT_TXD1_LONG_FORMAT | 84 FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD) | 85 FIELD_PREP(MT_TXD1_PKT_FMT, pkt_fmt); 86 txd[1] = cpu_to_le32(val); 87 88 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd)); 89 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU, q_idx)); 90 mcu_txd->pkt_type = MCU_PKT_ID; 91 mcu_txd->seq = seq; 92 93 if (cmd < 0) { 94 mcu_txd->set_query = MCU_Q_NA; 95 mcu_txd->cid = -cmd; 96 } else { 97 mcu_txd->cid = MCU_CMD_EXT_CID; 98 mcu_txd->set_query = MCU_Q_SET; 99 mcu_txd->ext_cid = cmd; 100 mcu_txd->ext_cid_ack = 1; 101 } 102 mcu_txd->s2d_index = MCU_S2D_H2N; 103 104 if (wait_seq) 105 *wait_seq = seq; 106 107 if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mt76.state)) 108 qid = MT_TXQ_MCU; 109 else 110 qid = MT_TXQ_FWDL; 111 112 return mt76_tx_queue_skb_raw(dev, qid, skb, 0); 113 } 114 115 static int 116 mt7615_mcu_parse_response(struct mt7615_dev *dev, int cmd, 117 struct sk_buff *skb, int seq) 118 { 119 struct mt7615_mcu_rxd *rxd = (struct mt7615_mcu_rxd *)skb->data; 120 int ret = 0; 121 122 if (seq != rxd->seq) 123 return -EAGAIN; 124 125 switch (cmd) { 126 case -MCU_CMD_PATCH_SEM_CONTROL: 127 skb_pull(skb, sizeof(*rxd) - 4); 128 ret = *skb->data; 129 break; 130 case MCU_EXT_CMD_GET_TEMP: 131 skb_pull(skb, sizeof(*rxd)); 132 ret = le32_to_cpu(*(__le32 *)skb->data); 133 break; 134 default: 135 break; 136 } 137 dev_kfree_skb(skb); 138 139 return ret; 140 } 141 142 static int 143 mt7615_mcu_msg_send(struct mt76_dev *mdev, int cmd, const void *data, 144 int len, bool wait_resp) 145 { 146 struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76); 147 unsigned long expires = jiffies + 10 * HZ; 148 struct sk_buff *skb; 149 int ret, seq; 150 151 skb = mt7615_mcu_msg_alloc(data, len); 152 if (!skb) 153 return -ENOMEM; 154 155 mutex_lock(&mdev->mmio.mcu.mutex); 156 157 ret = __mt7615_mcu_msg_send(dev, skb, cmd, &seq); 158 if (ret) 159 goto out; 160 161 while (wait_resp) { 162 skb = mt76_mcu_get_response(mdev, expires); 163 if (!skb) { 164 dev_err(mdev->dev, "Message %d (seq %d) timeout\n", 165 cmd, seq); 166 ret = -ETIMEDOUT; 167 break; 168 } 169 170 ret = mt7615_mcu_parse_response(dev, cmd, skb, seq); 171 if (ret != -EAGAIN) 172 break; 173 } 174 175 out: 176 mutex_unlock(&mdev->mmio.mcu.mutex); 177 178 return ret; 179 } 180 181 static void 182 mt7615_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 183 { 184 if (vif->csa_active) 185 ieee80211_csa_finish(vif); 186 } 187 188 static void 189 mt7615_mcu_rx_ext_event(struct mt7615_dev *dev, struct sk_buff *skb) 190 { 191 struct mt7615_mcu_rxd *rxd = (struct mt7615_mcu_rxd *)skb->data; 192 193 switch (rxd->ext_eid) { 194 case MCU_EXT_EVENT_RDD_REPORT: 195 ieee80211_radar_detected(dev->mt76.hw); 196 dev->hw_pattern++; 197 break; 198 case MCU_EXT_EVENT_CSA_NOTIFY: 199 ieee80211_iterate_active_interfaces_atomic(dev->mt76.hw, 200 IEEE80211_IFACE_ITER_RESUME_ALL, 201 mt7615_mcu_csa_finish, dev); 202 break; 203 default: 204 break; 205 } 206 } 207 208 static void 209 mt7615_mcu_rx_unsolicited_event(struct mt7615_dev *dev, struct sk_buff *skb) 210 { 211 struct mt7615_mcu_rxd *rxd = (struct mt7615_mcu_rxd *)skb->data; 212 213 switch (rxd->eid) { 214 case MCU_EVENT_EXT: 215 mt7615_mcu_rx_ext_event(dev, skb); 216 break; 217 default: 218 break; 219 } 220 dev_kfree_skb(skb); 221 } 222 223 void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb) 224 { 225 struct mt7615_mcu_rxd *rxd = (struct mt7615_mcu_rxd *)skb->data; 226 227 if (rxd->ext_eid == MCU_EXT_EVENT_THERMAL_PROTECT || 228 rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST || 229 rxd->ext_eid == MCU_EXT_EVENT_ASSERT_DUMP || 230 rxd->ext_eid == MCU_EXT_EVENT_PS_SYNC || 231 !rxd->seq) 232 mt7615_mcu_rx_unsolicited_event(dev, skb); 233 else 234 mt76_mcu_rx_event(&dev->mt76, skb); 235 } 236 237 static int mt7615_mcu_init_download(struct mt7615_dev *dev, u32 addr, 238 u32 len, u32 mode) 239 { 240 struct { 241 __le32 addr; 242 __le32 len; 243 __le32 mode; 244 } req = { 245 .addr = cpu_to_le32(addr), 246 .len = cpu_to_le32(len), 247 .mode = cpu_to_le32(mode), 248 }; 249 250 return __mt76_mcu_send_msg(&dev->mt76, -MCU_CMD_TARGET_ADDRESS_LEN_REQ, 251 &req, sizeof(req), true); 252 } 253 254 static int mt7615_mcu_send_firmware(struct mt7615_dev *dev, const void *data, 255 int len) 256 { 257 int ret = 0, cur_len; 258 259 while (len > 0) { 260 cur_len = min_t(int, 4096 - sizeof(struct mt7615_mcu_txd), 261 len); 262 263 ret = __mt76_mcu_send_msg(&dev->mt76, -MCU_CMD_FW_SCATTER, 264 data, cur_len, false); 265 if (ret) 266 break; 267 268 data += cur_len; 269 len -= cur_len; 270 mt76_queue_tx_cleanup(dev, MT_TXQ_FWDL, false); 271 } 272 273 return ret; 274 } 275 276 static int mt7615_mcu_start_firmware(struct mt7615_dev *dev, u32 addr, 277 u32 option) 278 { 279 struct { 280 __le32 option; 281 __le32 addr; 282 } req = { 283 .option = cpu_to_le32(option), 284 .addr = cpu_to_le32(addr), 285 }; 286 287 return __mt76_mcu_send_msg(&dev->mt76, -MCU_CMD_FW_START_REQ, 288 &req, sizeof(req), true); 289 } 290 291 static int mt7615_mcu_restart(struct mt76_dev *dev) 292 { 293 return __mt76_mcu_send_msg(dev, -MCU_CMD_RESTART_DL_REQ, NULL, 294 0, true); 295 } 296 297 static int mt7615_mcu_patch_sem_ctrl(struct mt7615_dev *dev, bool get) 298 { 299 struct { 300 __le32 op; 301 } req = { 302 .op = cpu_to_le32(get ? PATCH_SEM_GET : PATCH_SEM_RELEASE), 303 }; 304 305 return __mt76_mcu_send_msg(&dev->mt76, -MCU_CMD_PATCH_SEM_CONTROL, 306 &req, sizeof(req), true); 307 } 308 309 static int mt7615_mcu_start_patch(struct mt7615_dev *dev) 310 { 311 struct { 312 u8 check_crc; 313 u8 reserved[3]; 314 } req = { 315 .check_crc = 0, 316 }; 317 318 return __mt76_mcu_send_msg(&dev->mt76, -MCU_CMD_PATCH_FINISH_REQ, 319 &req, sizeof(req), true); 320 } 321 322 static int mt7615_driver_own(struct mt7615_dev *dev) 323 { 324 mt76_wr(dev, MT_CFG_LPCR_HOST, MT_CFG_LPCR_HOST_DRV_OWN); 325 if (!mt76_poll_msec(dev, MT_CFG_LPCR_HOST, 326 MT_CFG_LPCR_HOST_FW_OWN, 0, 500)) { 327 dev_err(dev->mt76.dev, "Timeout for driver own\n"); 328 return -EIO; 329 } 330 331 return 0; 332 } 333 334 static int mt7615_load_patch(struct mt7615_dev *dev) 335 { 336 const char *firmware = MT7615_ROM_PATCH; 337 const struct mt7615_patch_hdr *hdr; 338 const struct firmware *fw = NULL; 339 int len, ret, sem; 340 341 sem = mt7615_mcu_patch_sem_ctrl(dev, 1); 342 switch (sem) { 343 case PATCH_IS_DL: 344 return 0; 345 case PATCH_NOT_DL_SEM_SUCCESS: 346 break; 347 default: 348 dev_err(dev->mt76.dev, "Failed to get patch semaphore\n"); 349 return -EAGAIN; 350 } 351 352 ret = request_firmware(&fw, firmware, dev->mt76.dev); 353 if (ret) 354 goto out; 355 356 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 357 dev_err(dev->mt76.dev, "Invalid firmware\n"); 358 ret = -EINVAL; 359 goto out; 360 } 361 362 hdr = (const struct mt7615_patch_hdr *)(fw->data); 363 364 dev_info(dev->mt76.dev, "HW/SW Version: 0x%x, Build Time: %.16s\n", 365 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date); 366 367 len = fw->size - sizeof(*hdr); 368 369 ret = mt7615_mcu_init_download(dev, MCU_PATCH_ADDRESS, len, 370 DL_MODE_NEED_RSP); 371 if (ret) { 372 dev_err(dev->mt76.dev, "Download request failed\n"); 373 goto out; 374 } 375 376 ret = mt7615_mcu_send_firmware(dev, fw->data + sizeof(*hdr), len); 377 if (ret) { 378 dev_err(dev->mt76.dev, "Failed to send firmware to device\n"); 379 goto out; 380 } 381 382 ret = mt7615_mcu_start_patch(dev); 383 if (ret) 384 dev_err(dev->mt76.dev, "Failed to start patch\n"); 385 386 out: 387 release_firmware(fw); 388 389 sem = mt7615_mcu_patch_sem_ctrl(dev, 0); 390 switch (sem) { 391 case PATCH_REL_SEM_SUCCESS: 392 break; 393 default: 394 ret = -EAGAIN; 395 dev_err(dev->mt76.dev, "Failed to release patch semaphore\n"); 396 break; 397 } 398 399 return ret; 400 } 401 402 static u32 mt7615_mcu_gen_dl_mode(u8 feature_set, bool is_cr4) 403 { 404 u32 ret = 0; 405 406 ret |= (feature_set & FW_FEATURE_SET_ENCRYPT) ? 407 (DL_MODE_ENCRYPT | DL_MODE_RESET_SEC_IV) : 0; 408 ret |= FIELD_PREP(DL_MODE_KEY_IDX, 409 FIELD_GET(FW_FEATURE_SET_KEY_IDX, feature_set)); 410 ret |= DL_MODE_NEED_RSP; 411 ret |= is_cr4 ? DL_MODE_WORKING_PDA_CR4 : 0; 412 413 return ret; 414 } 415 416 static int 417 mt7615_mcu_send_ram_firmware(struct mt7615_dev *dev, 418 const struct mt7615_fw_trailer *hdr, 419 const u8 *data, bool is_cr4) 420 { 421 int n_region = is_cr4 ? CR4_REGION_NUM : N9_REGION_NUM; 422 int err, i, offset = 0; 423 u32 len, addr, mode; 424 425 for (i = 0; i < n_region; i++) { 426 mode = mt7615_mcu_gen_dl_mode(hdr[i].feature_set, is_cr4); 427 len = le32_to_cpu(hdr[i].len) + IMG_CRC_LEN; 428 addr = le32_to_cpu(hdr[i].addr); 429 430 err = mt7615_mcu_init_download(dev, addr, len, mode); 431 if (err) { 432 dev_err(dev->mt76.dev, "Download request failed\n"); 433 return err; 434 } 435 436 err = mt7615_mcu_send_firmware(dev, data + offset, len); 437 if (err) { 438 dev_err(dev->mt76.dev, "Failed to send firmware to device\n"); 439 return err; 440 } 441 442 offset += len; 443 } 444 445 return 0; 446 } 447 448 static int mt7615_load_ram(struct mt7615_dev *dev) 449 { 450 const struct firmware *fw; 451 const struct mt7615_fw_trailer *hdr; 452 const char *n9_firmware = MT7615_FIRMWARE_N9; 453 const char *cr4_firmware = MT7615_FIRMWARE_CR4; 454 int ret; 455 456 ret = request_firmware(&fw, n9_firmware, dev->mt76.dev); 457 if (ret) 458 return ret; 459 460 if (!fw || !fw->data || fw->size < N9_REGION_NUM * sizeof(*hdr)) { 461 dev_err(dev->mt76.dev, "Invalid firmware\n"); 462 ret = -EINVAL; 463 goto out; 464 } 465 466 hdr = (const struct mt7615_fw_trailer *)(fw->data + fw->size - 467 N9_REGION_NUM * sizeof(*hdr)); 468 469 dev_info(dev->mt76.dev, "N9 Firmware Version: %.10s, Build Time: %.15s\n", 470 hdr->fw_ver, hdr->build_date); 471 472 ret = mt7615_mcu_send_ram_firmware(dev, hdr, fw->data, false); 473 if (ret) 474 goto out; 475 476 ret = mt7615_mcu_start_firmware(dev, le32_to_cpu(hdr->addr), 477 FW_START_OVERRIDE); 478 if (ret) { 479 dev_err(dev->mt76.dev, "Failed to start N9 firmware\n"); 480 goto out; 481 } 482 483 release_firmware(fw); 484 485 ret = request_firmware(&fw, cr4_firmware, dev->mt76.dev); 486 if (ret) 487 return ret; 488 489 if (!fw || !fw->data || fw->size < CR4_REGION_NUM * sizeof(*hdr)) { 490 dev_err(dev->mt76.dev, "Invalid firmware\n"); 491 ret = -EINVAL; 492 goto out; 493 } 494 495 hdr = (const struct mt7615_fw_trailer *)(fw->data + fw->size - 496 CR4_REGION_NUM * sizeof(*hdr)); 497 498 dev_info(dev->mt76.dev, "CR4 Firmware Version: %.10s, Build Time: %.15s\n", 499 hdr->fw_ver, hdr->build_date); 500 501 ret = mt7615_mcu_send_ram_firmware(dev, hdr, fw->data, true); 502 if (ret) 503 goto out; 504 505 ret = mt7615_mcu_start_firmware(dev, 0, FW_START_WORKING_PDA_CR4); 506 if (ret) 507 dev_err(dev->mt76.dev, "Failed to start CR4 firmware\n"); 508 509 out: 510 release_firmware(fw); 511 512 return ret; 513 } 514 515 static int mt7615_load_firmware(struct mt7615_dev *dev) 516 { 517 int ret; 518 u32 val; 519 520 val = mt76_get_field(dev, MT_TOP_MISC2, MT_TOP_MISC2_FW_STATE); 521 522 if (val != FW_STATE_FW_DOWNLOAD) { 523 dev_err(dev->mt76.dev, "Firmware is not ready for download\n"); 524 return -EIO; 525 } 526 527 ret = mt7615_load_patch(dev); 528 if (ret) 529 return ret; 530 531 ret = mt7615_load_ram(dev); 532 if (ret) 533 return ret; 534 535 if (!mt76_poll_msec(dev, MT_TOP_MISC2, MT_TOP_MISC2_FW_STATE, 536 FIELD_PREP(MT_TOP_MISC2_FW_STATE, 537 FW_STATE_CR4_RDY), 500)) { 538 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); 539 return -EIO; 540 } 541 542 mt76_queue_tx_cleanup(dev, MT_TXQ_FWDL, false); 543 544 dev_dbg(dev->mt76.dev, "Firmware init done\n"); 545 546 return 0; 547 } 548 549 int mt7615_mcu_init(struct mt7615_dev *dev) 550 { 551 static const struct mt76_mcu_ops mt7615_mcu_ops = { 552 .mcu_send_msg = mt7615_mcu_msg_send, 553 .mcu_restart = mt7615_mcu_restart, 554 }; 555 int ret; 556 557 dev->mt76.mcu_ops = &mt7615_mcu_ops, 558 559 ret = mt7615_driver_own(dev); 560 if (ret) 561 return ret; 562 563 ret = mt7615_load_firmware(dev); 564 if (ret) 565 return ret; 566 567 set_bit(MT76_STATE_MCU_RUNNING, &dev->mt76.state); 568 569 return 0; 570 } 571 572 void mt7615_mcu_exit(struct mt7615_dev *dev) 573 { 574 __mt76_mcu_restart(&dev->mt76); 575 mt76_wr(dev, MT_CFG_LPCR_HOST, MT_CFG_LPCR_HOST_FW_OWN); 576 skb_queue_purge(&dev->mt76.mmio.mcu.res_q); 577 } 578 579 int mt7615_mcu_set_eeprom(struct mt7615_dev *dev) 580 { 581 struct { 582 u8 buffer_mode; 583 u8 pad; 584 u16 len; 585 } __packed req_hdr = { 586 .buffer_mode = 1, 587 .len = __MT_EE_MAX - MT_EE_NIC_CONF_0, 588 }; 589 int ret, len = sizeof(req_hdr) + __MT_EE_MAX - MT_EE_NIC_CONF_0; 590 u8 *req, *eep = (u8 *)dev->mt76.eeprom.data; 591 592 req = kzalloc(len, GFP_KERNEL); 593 if (!req) 594 return -ENOMEM; 595 596 memcpy(req, &req_hdr, sizeof(req_hdr)); 597 memcpy(req + sizeof(req_hdr), eep + MT_EE_NIC_CONF_0, 598 __MT_EE_MAX - MT_EE_NIC_CONF_0); 599 600 ret = __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_EFUSE_BUFFER_MODE, 601 req, len, true); 602 kfree(req); 603 604 return ret; 605 } 606 607 int mt7615_mcu_init_mac(struct mt7615_dev *dev) 608 { 609 struct { 610 u8 enable; 611 u8 band; 612 u8 rsv[2]; 613 } __packed req = { 614 .enable = 1, 615 .band = 0, 616 }; 617 618 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_MAC_INIT_CTRL, 619 &req, sizeof(req), true); 620 } 621 622 int mt7615_mcu_set_rts_thresh(struct mt7615_dev *dev, u32 val) 623 { 624 struct { 625 u8 prot_idx; 626 u8 band; 627 u8 rsv[2]; 628 __le32 len_thresh; 629 __le32 pkt_thresh; 630 } __packed req = { 631 .prot_idx = 1, 632 .band = 0, 633 .len_thresh = cpu_to_le32(val), 634 .pkt_thresh = cpu_to_le32(0x2), 635 }; 636 637 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_PROTECT_CTRL, 638 &req, sizeof(req), true); 639 } 640 641 int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue, 642 const struct ieee80211_tx_queue_params *params) 643 { 644 #define WMM_AIFS_SET BIT(0) 645 #define WMM_CW_MIN_SET BIT(1) 646 #define WMM_CW_MAX_SET BIT(2) 647 #define WMM_TXOP_SET BIT(3) 648 #define WMM_PARAM_SET (WMM_AIFS_SET | WMM_CW_MIN_SET | \ 649 WMM_CW_MAX_SET | WMM_TXOP_SET) 650 struct req_data { 651 u8 number; 652 u8 rsv[3]; 653 u8 queue; 654 u8 valid; 655 u8 aifs; 656 u8 cw_min; 657 __le16 cw_max; 658 __le16 txop; 659 } __packed req = { 660 .number = 1, 661 .queue = queue, 662 .valid = WMM_PARAM_SET, 663 .aifs = params->aifs, 664 .cw_min = 5, 665 .cw_max = cpu_to_le16(10), 666 .txop = cpu_to_le16(params->txop), 667 }; 668 669 if (params->cw_min) 670 req.cw_min = fls(params->cw_min); 671 if (params->cw_max) 672 req.cw_max = cpu_to_le16(fls(params->cw_max)); 673 674 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_EDCA_UPDATE, 675 &req, sizeof(req), true); 676 } 677 678 int mt7615_mcu_ctrl_pm_state(struct mt7615_dev *dev, int enter) 679 { 680 #define ENTER_PM_STATE 1 681 #define EXIT_PM_STATE 2 682 struct { 683 u8 pm_number; 684 u8 pm_state; 685 u8 bssid[ETH_ALEN]; 686 u8 dtim_period; 687 u8 wlan_idx; 688 __le16 bcn_interval; 689 __le32 aid; 690 __le32 rx_filter; 691 u8 band_idx; 692 u8 rsv[3]; 693 __le32 feature; 694 u8 omac_idx; 695 u8 wmm_idx; 696 u8 bcn_loss_cnt; 697 u8 bcn_sp_duration; 698 } __packed req = { 699 .pm_number = 5, 700 .pm_state = (enter) ? ENTER_PM_STATE : EXIT_PM_STATE, 701 .band_idx = 0, 702 }; 703 704 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_PM_STATE_CTRL, 705 &req, sizeof(req), true); 706 } 707 708 int mt7615_mcu_set_dev_info(struct mt7615_dev *dev, 709 struct ieee80211_vif *vif, bool enable) 710 { 711 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 712 struct { 713 struct req_hdr { 714 u8 omac_idx; 715 u8 band_idx; 716 __le16 tlv_num; 717 u8 is_tlv_append; 718 u8 rsv[3]; 719 } __packed hdr; 720 struct req_tlv { 721 __le16 tag; 722 __le16 len; 723 u8 active; 724 u8 band_idx; 725 u8 omac_addr[ETH_ALEN]; 726 } __packed tlv; 727 } data = { 728 .hdr = { 729 .omac_idx = mvif->omac_idx, 730 .band_idx = mvif->band_idx, 731 .tlv_num = cpu_to_le16(1), 732 .is_tlv_append = 1, 733 }, 734 .tlv = { 735 .tag = cpu_to_le16(DEV_INFO_ACTIVE), 736 .len = cpu_to_le16(sizeof(struct req_tlv)), 737 .active = enable, 738 .band_idx = mvif->band_idx, 739 }, 740 }; 741 742 memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN); 743 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_DEV_INFO_UPDATE, 744 &data, sizeof(data), true); 745 } 746 747 static void 748 mt7615_mcu_bss_info_omac_header(struct mt7615_vif *mvif, u8 *data, 749 u32 conn_type) 750 { 751 struct bss_info_omac *hdr = (struct bss_info_omac *)data; 752 u8 idx; 753 754 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 755 hdr->tag = cpu_to_le16(BSS_INFO_OMAC); 756 hdr->len = cpu_to_le16(sizeof(struct bss_info_omac)); 757 hdr->hw_bss_idx = idx; 758 hdr->omac_idx = mvif->omac_idx; 759 hdr->band_idx = mvif->band_idx; 760 hdr->conn_type = cpu_to_le32(conn_type); 761 } 762 763 static void 764 mt7615_mcu_bss_info_basic_header(struct ieee80211_vif *vif, u8 *data, 765 u32 net_type, u8 tx_wlan_idx, 766 bool enable) 767 { 768 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 769 struct bss_info_basic *hdr = (struct bss_info_basic *)data; 770 771 hdr->tag = cpu_to_le16(BSS_INFO_BASIC); 772 hdr->len = cpu_to_le16(sizeof(struct bss_info_basic)); 773 hdr->network_type = cpu_to_le32(net_type); 774 hdr->active = enable; 775 hdr->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int); 776 memcpy(hdr->bssid, vif->bss_conf.bssid, ETH_ALEN); 777 hdr->wmm_idx = mvif->wmm_idx; 778 hdr->dtim_period = vif->bss_conf.dtim_period; 779 hdr->bmc_tx_wlan_idx = tx_wlan_idx; 780 } 781 782 static void 783 mt7615_mcu_bss_info_ext_header(struct mt7615_vif *mvif, u8 *data) 784 { 785 /* SIFS 20us + 512 byte beacon tranmitted by 1Mbps (3906us) */ 786 #define BCN_TX_ESTIMATE_TIME (4096 + 20) 787 struct bss_info_ext_bss *hdr = (struct bss_info_ext_bss *)data; 788 int ext_bss_idx, tsf_offset; 789 790 ext_bss_idx = mvif->omac_idx - EXT_BSSID_START; 791 if (ext_bss_idx < 0) 792 return; 793 794 hdr->tag = cpu_to_le16(BSS_INFO_EXT_BSS); 795 hdr->len = cpu_to_le16(sizeof(struct bss_info_ext_bss)); 796 tsf_offset = ext_bss_idx * BCN_TX_ESTIMATE_TIME; 797 hdr->mbss_tsf_offset = cpu_to_le32(tsf_offset); 798 } 799 800 int mt7615_mcu_set_bss_info(struct mt7615_dev *dev, 801 struct ieee80211_vif *vif, int en) 802 { 803 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 804 struct req_hdr { 805 u8 bss_idx; 806 u8 rsv0; 807 __le16 tlv_num; 808 u8 is_tlv_append; 809 u8 rsv1[3]; 810 } __packed; 811 int len = sizeof(struct req_hdr) + sizeof(struct bss_info_basic); 812 int ret, i, features = BIT(BSS_INFO_BASIC), ntlv = 1; 813 u32 conn_type = 0, net_type = NETWORK_INFRA; 814 u8 *buf, *data, tx_wlan_idx = 0; 815 struct req_hdr *hdr; 816 817 if (en) { 818 len += sizeof(struct bss_info_omac); 819 features |= BIT(BSS_INFO_OMAC); 820 if (mvif->omac_idx > EXT_BSSID_START) { 821 len += sizeof(struct bss_info_ext_bss); 822 features |= BIT(BSS_INFO_EXT_BSS); 823 ntlv++; 824 } 825 ntlv++; 826 } 827 828 switch (vif->type) { 829 case NL80211_IFTYPE_AP: 830 case NL80211_IFTYPE_MESH_POINT: 831 tx_wlan_idx = mvif->sta.wcid.idx; 832 conn_type = CONNECTION_INFRA_AP; 833 break; 834 case NL80211_IFTYPE_STATION: { 835 /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */ 836 if (en) { 837 struct ieee80211_sta *sta; 838 struct mt7615_sta *msta; 839 840 rcu_read_lock(); 841 sta = ieee80211_find_sta(vif, vif->bss_conf.bssid); 842 if (!sta) { 843 rcu_read_unlock(); 844 return -EINVAL; 845 } 846 847 msta = (struct mt7615_sta *)sta->drv_priv; 848 tx_wlan_idx = msta->wcid.idx; 849 rcu_read_unlock(); 850 } 851 conn_type = CONNECTION_INFRA_STA; 852 break; 853 } 854 default: 855 WARN_ON(1); 856 break; 857 } 858 859 buf = kzalloc(len, GFP_KERNEL); 860 if (!buf) 861 return -ENOMEM; 862 863 hdr = (struct req_hdr *)buf; 864 hdr->bss_idx = mvif->idx; 865 hdr->tlv_num = cpu_to_le16(ntlv); 866 hdr->is_tlv_append = 1; 867 868 data = buf + sizeof(*hdr); 869 for (i = 0; i < BSS_INFO_MAX_NUM; i++) { 870 int tag = ffs(features & BIT(i)) - 1; 871 872 switch (tag) { 873 case BSS_INFO_OMAC: 874 mt7615_mcu_bss_info_omac_header(mvif, data, 875 conn_type); 876 data += sizeof(struct bss_info_omac); 877 break; 878 case BSS_INFO_BASIC: 879 mt7615_mcu_bss_info_basic_header(vif, data, net_type, 880 tx_wlan_idx, en); 881 data += sizeof(struct bss_info_basic); 882 break; 883 case BSS_INFO_EXT_BSS: 884 mt7615_mcu_bss_info_ext_header(mvif, data); 885 data += sizeof(struct bss_info_ext_bss); 886 break; 887 default: 888 break; 889 } 890 } 891 892 ret = __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_BSS_INFO_UPDATE, 893 buf, len, true); 894 kfree(buf); 895 896 return ret; 897 } 898 899 static int 900 mt7615_mcu_add_wtbl_bmc(struct mt7615_dev *dev, 901 struct mt7615_vif *mvif) 902 { 903 struct { 904 struct wtbl_req_hdr hdr; 905 struct wtbl_generic g_wtbl; 906 struct wtbl_rx rx_wtbl; 907 } req = { 908 .hdr = { 909 .wlan_idx = mvif->sta.wcid.idx, 910 .operation = WTBL_RESET_AND_SET, 911 .tlv_num = cpu_to_le16(2), 912 }, 913 .g_wtbl = { 914 .tag = cpu_to_le16(WTBL_GENERIC), 915 .len = cpu_to_le16(sizeof(struct wtbl_generic)), 916 .muar_idx = 0xe, 917 }, 918 .rx_wtbl = { 919 .tag = cpu_to_le16(WTBL_RX), 920 .len = cpu_to_le16(sizeof(struct wtbl_rx)), 921 .rca1 = 1, 922 .rca2 = 1, 923 .rv = 1, 924 }, 925 }; 926 eth_broadcast_addr(req.g_wtbl.peer_addr); 927 928 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_WTBL_UPDATE, 929 &req, sizeof(req), true); 930 } 931 932 int mt7615_mcu_wtbl_bmc(struct mt7615_dev *dev, 933 struct ieee80211_vif *vif, bool enable) 934 { 935 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 936 937 if (!enable) { 938 struct wtbl_req_hdr req = { 939 .wlan_idx = mvif->sta.wcid.idx, 940 .operation = WTBL_RESET_AND_SET, 941 }; 942 943 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_WTBL_UPDATE, 944 &req, sizeof(req), true); 945 } 946 947 return mt7615_mcu_add_wtbl_bmc(dev, mvif); 948 } 949 950 int mt7615_mcu_add_wtbl(struct mt7615_dev *dev, struct ieee80211_vif *vif, 951 struct ieee80211_sta *sta) 952 { 953 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 954 struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv; 955 struct { 956 struct wtbl_req_hdr hdr; 957 struct wtbl_generic g_wtbl; 958 struct wtbl_rx rx_wtbl; 959 } req = { 960 .hdr = { 961 .wlan_idx = msta->wcid.idx, 962 .operation = WTBL_RESET_AND_SET, 963 .tlv_num = cpu_to_le16(2), 964 }, 965 .g_wtbl = { 966 .tag = cpu_to_le16(WTBL_GENERIC), 967 .len = cpu_to_le16(sizeof(struct wtbl_generic)), 968 .muar_idx = mvif->omac_idx, 969 .qos = sta->wme, 970 .partial_aid = cpu_to_le16(sta->aid), 971 }, 972 .rx_wtbl = { 973 .tag = cpu_to_le16(WTBL_RX), 974 .len = cpu_to_le16(sizeof(struct wtbl_rx)), 975 .rca1 = vif->type != NL80211_IFTYPE_AP, 976 .rca2 = 1, 977 .rv = 1, 978 }, 979 }; 980 memcpy(req.g_wtbl.peer_addr, sta->addr, ETH_ALEN); 981 982 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_WTBL_UPDATE, 983 &req, sizeof(req), true); 984 } 985 986 int mt7615_mcu_del_wtbl(struct mt7615_dev *dev, 987 struct ieee80211_sta *sta) 988 { 989 struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv; 990 struct wtbl_req_hdr req = { 991 .wlan_idx = msta->wcid.idx, 992 .operation = WTBL_RESET_AND_SET, 993 }; 994 995 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_WTBL_UPDATE, 996 &req, sizeof(req), true); 997 } 998 999 int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev) 1000 { 1001 struct wtbl_req_hdr req = { 1002 .operation = WTBL_RESET_ALL, 1003 }; 1004 1005 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_WTBL_UPDATE, 1006 &req, sizeof(req), true); 1007 } 1008 1009 int mt7615_mcu_set_sta_rec_bmc(struct mt7615_dev *dev, 1010 struct ieee80211_vif *vif, bool en) 1011 { 1012 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 1013 struct { 1014 struct sta_req_hdr hdr; 1015 struct sta_rec_basic basic; 1016 } req = { 1017 .hdr = { 1018 .bss_idx = mvif->idx, 1019 .wlan_idx = mvif->sta.wcid.idx, 1020 .tlv_num = cpu_to_le16(1), 1021 .is_tlv_append = 1, 1022 .muar_idx = mvif->omac_idx, 1023 }, 1024 .basic = { 1025 .tag = cpu_to_le16(STA_REC_BASIC), 1026 .len = cpu_to_le16(sizeof(struct sta_rec_basic)), 1027 .conn_type = cpu_to_le32(CONNECTION_INFRA_BC), 1028 }, 1029 }; 1030 eth_broadcast_addr(req.basic.peer_addr); 1031 1032 if (en) { 1033 req.basic.conn_state = CONN_STATE_PORT_SECURE; 1034 req.basic.extra_info = cpu_to_le16(EXTRA_INFO_VER | 1035 EXTRA_INFO_NEW); 1036 } else { 1037 req.basic.conn_state = CONN_STATE_DISCONNECT; 1038 req.basic.extra_info = cpu_to_le16(EXTRA_INFO_VER); 1039 } 1040 1041 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_STA_REC_UPDATE, 1042 &req, sizeof(req), true); 1043 } 1044 1045 int mt7615_mcu_set_sta_rec(struct mt7615_dev *dev, struct ieee80211_vif *vif, 1046 struct ieee80211_sta *sta, bool en) 1047 { 1048 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 1049 struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv; 1050 1051 struct { 1052 struct sta_req_hdr hdr; 1053 struct sta_rec_basic basic; 1054 } req = { 1055 .hdr = { 1056 .bss_idx = mvif->idx, 1057 .wlan_idx = msta->wcid.idx, 1058 .tlv_num = cpu_to_le16(1), 1059 .is_tlv_append = 1, 1060 .muar_idx = mvif->omac_idx, 1061 }, 1062 .basic = { 1063 .tag = cpu_to_le16(STA_REC_BASIC), 1064 .len = cpu_to_le16(sizeof(struct sta_rec_basic)), 1065 .qos = sta->wme, 1066 .aid = cpu_to_le16(sta->aid), 1067 }, 1068 }; 1069 memcpy(req.basic.peer_addr, sta->addr, ETH_ALEN); 1070 1071 switch (vif->type) { 1072 case NL80211_IFTYPE_AP: 1073 case NL80211_IFTYPE_MESH_POINT: 1074 req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_STA); 1075 break; 1076 case NL80211_IFTYPE_STATION: 1077 req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_AP); 1078 break; 1079 default: 1080 WARN_ON(1); 1081 break; 1082 }; 1083 1084 if (en) { 1085 req.basic.conn_state = CONN_STATE_PORT_SECURE; 1086 req.basic.extra_info = cpu_to_le16(EXTRA_INFO_VER | 1087 EXTRA_INFO_NEW); 1088 } else { 1089 req.basic.conn_state = CONN_STATE_DISCONNECT; 1090 req.basic.extra_info = cpu_to_le16(EXTRA_INFO_VER); 1091 } 1092 1093 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_STA_REC_UPDATE, 1094 &req, sizeof(req), true); 1095 } 1096 1097 int mt7615_mcu_set_bcn(struct mt7615_dev *dev, struct ieee80211_vif *vif, 1098 int en) 1099 { 1100 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 1101 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 1102 struct ieee80211_mutable_offsets offs; 1103 struct req { 1104 u8 omac_idx; 1105 u8 enable; 1106 u8 wlan_idx; 1107 u8 band_idx; 1108 u8 pkt_type; 1109 u8 need_pre_tbtt_int; 1110 __le16 csa_ie_pos; 1111 __le16 pkt_len; 1112 __le16 tim_ie_pos; 1113 u8 pkt[512]; 1114 u8 csa_cnt; 1115 /* bss color change */ 1116 u8 bcc_cnt; 1117 __le16 bcc_ie_pos; 1118 } __packed req = { 1119 .omac_idx = mvif->omac_idx, 1120 .enable = en, 1121 .wlan_idx = wcid->idx, 1122 .band_idx = mvif->band_idx, 1123 }; 1124 struct sk_buff *skb; 1125 1126 skb = ieee80211_beacon_get_template(mt76_hw(dev), vif, &offs); 1127 if (!skb) 1128 return -EINVAL; 1129 1130 if (skb->len > 512 - MT_TXD_SIZE) { 1131 dev_err(dev->mt76.dev, "Bcn size limit exceed\n"); 1132 dev_kfree_skb(skb); 1133 return -EINVAL; 1134 } 1135 1136 mt7615_mac_write_txwi(dev, (__le32 *)(req.pkt), skb, wcid, NULL, 1137 0, NULL); 1138 memcpy(req.pkt + MT_TXD_SIZE, skb->data, skb->len); 1139 req.pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 1140 req.tim_ie_pos = cpu_to_le16(MT_TXD_SIZE + offs.tim_offset); 1141 if (offs.csa_counter_offs[0]) { 1142 u16 csa_offs; 1143 1144 csa_offs = MT_TXD_SIZE + offs.csa_counter_offs[0] - 4; 1145 req.csa_ie_pos = cpu_to_le16(csa_offs); 1146 req.csa_cnt = skb->data[offs.csa_counter_offs[0]]; 1147 } 1148 dev_kfree_skb(skb); 1149 1150 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_BCN_OFFLOAD, 1151 &req, sizeof(req), true); 1152 } 1153 1154 int mt7615_mcu_set_tx_power(struct mt7615_dev *dev) 1155 { 1156 int i, ret, n_chains = hweight8(dev->mt76.antenna_mask); 1157 struct cfg80211_chan_def *chandef = &dev->mt76.chandef; 1158 int freq = chandef->center_freq1, len, target_chains; 1159 u8 *req, *data, *eep = (u8 *)dev->mt76.eeprom.data; 1160 enum nl80211_band band = chandef->chan->band; 1161 struct ieee80211_hw *hw = mt76_hw(dev); 1162 struct { 1163 u8 center_chan; 1164 u8 dbdc_idx; 1165 u8 band; 1166 u8 rsv; 1167 } __packed req_hdr = { 1168 .center_chan = ieee80211_frequency_to_channel(freq), 1169 .band = band, 1170 }; 1171 s8 tx_power; 1172 1173 len = sizeof(req_hdr) + __MT_EE_MAX - MT_EE_NIC_CONF_0; 1174 req = kzalloc(len, GFP_KERNEL); 1175 if (!req) 1176 return -ENOMEM; 1177 1178 memcpy(req, &req_hdr, sizeof(req_hdr)); 1179 data = req + sizeof(req_hdr); 1180 memcpy(data, eep + MT_EE_NIC_CONF_0, 1181 __MT_EE_MAX - MT_EE_NIC_CONF_0); 1182 1183 tx_power = hw->conf.power_level * 2; 1184 switch (n_chains) { 1185 case 4: 1186 tx_power -= 12; 1187 break; 1188 case 3: 1189 tx_power -= 8; 1190 break; 1191 case 2: 1192 tx_power -= 6; 1193 break; 1194 default: 1195 break; 1196 } 1197 tx_power = max_t(s8, tx_power, 0); 1198 dev->mt76.txpower_cur = tx_power; 1199 1200 target_chains = mt7615_ext_pa_enabled(dev, band) ? 1 : n_chains; 1201 for (i = 0; i < target_chains; i++) { 1202 int index = -MT_EE_NIC_CONF_0; 1203 1204 ret = mt7615_eeprom_get_power_index(dev, chandef->chan, i); 1205 if (ret < 0) 1206 goto out; 1207 1208 index += ret; 1209 data[index] = min_t(u8, data[index], tx_power); 1210 } 1211 1212 ret = __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_SET_TX_POWER_CTRL, 1213 req, len, true); 1214 out: 1215 kfree(req); 1216 1217 return ret; 1218 } 1219 1220 int mt7615_mcu_rdd_cmd(struct mt7615_dev *dev, 1221 enum mt7615_rdd_cmd cmd, u8 index, 1222 u8 rx_sel, u8 val) 1223 { 1224 struct { 1225 u8 ctrl; 1226 u8 rdd_idx; 1227 u8 rdd_rx_sel; 1228 u8 val; 1229 u8 rsv[4]; 1230 } req = { 1231 .ctrl = cmd, 1232 .rdd_idx = index, 1233 .rdd_rx_sel = rx_sel, 1234 .val = val, 1235 }; 1236 1237 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_SET_RDD_CTRL, 1238 &req, sizeof(req), true); 1239 } 1240 1241 int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev) 1242 { 1243 struct { 1244 u8 pulse_num; 1245 u8 rsv[3]; 1246 struct { 1247 u32 start_time; 1248 u16 width; 1249 s16 power; 1250 } pattern[32]; 1251 } req = { 1252 .pulse_num = dev->radar_pattern.n_pulses, 1253 }; 1254 u32 start_time = ktime_to_ms(ktime_get_boottime()); 1255 int i; 1256 1257 if (dev->radar_pattern.n_pulses > ARRAY_SIZE(req.pattern)) 1258 return -EINVAL; 1259 1260 /* TODO: add some noise here */ 1261 for (i = 0; i < dev->radar_pattern.n_pulses; i++) { 1262 req.pattern[i].width = dev->radar_pattern.width; 1263 req.pattern[i].power = dev->radar_pattern.power; 1264 req.pattern[i].start_time = start_time + 1265 i * dev->radar_pattern.period; 1266 } 1267 1268 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_SET_RDD_PATTERN, 1269 &req, sizeof(req), false); 1270 } 1271 1272 int mt7615_mcu_set_channel(struct mt7615_dev *dev) 1273 { 1274 struct cfg80211_chan_def *chandef = &dev->mt76.chandef; 1275 int freq1 = chandef->center_freq1, freq2 = chandef->center_freq2; 1276 struct { 1277 u8 control_chan; 1278 u8 center_chan; 1279 u8 bw; 1280 u8 tx_streams; 1281 u8 rx_streams_mask; 1282 u8 switch_reason; 1283 u8 band_idx; 1284 /* for 80+80 only */ 1285 u8 center_chan2; 1286 __le16 cac_case; 1287 u8 channel_band; 1288 u8 rsv0; 1289 __le32 outband_freq; 1290 u8 txpower_drop; 1291 u8 rsv1[3]; 1292 u8 txpower_sku[53]; 1293 u8 rsv2[3]; 1294 } req = { 1295 .control_chan = chandef->chan->hw_value, 1296 .center_chan = ieee80211_frequency_to_channel(freq1), 1297 .tx_streams = (dev->mt76.chainmask >> 8) & 0xf, 1298 .rx_streams_mask = dev->mt76.antenna_mask, 1299 .center_chan2 = ieee80211_frequency_to_channel(freq2), 1300 }; 1301 int ret; 1302 1303 if ((chandef->chan->flags & IEEE80211_CHAN_RADAR) && 1304 chandef->chan->dfs_state != NL80211_DFS_AVAILABLE) 1305 req.switch_reason = CH_SWITCH_DFS; 1306 else 1307 req.switch_reason = CH_SWITCH_NORMAL; 1308 1309 switch (dev->mt76.chandef.width) { 1310 case NL80211_CHAN_WIDTH_40: 1311 req.bw = CMD_CBW_40MHZ; 1312 break; 1313 case NL80211_CHAN_WIDTH_80: 1314 req.bw = CMD_CBW_80MHZ; 1315 break; 1316 case NL80211_CHAN_WIDTH_80P80: 1317 req.bw = CMD_CBW_8080MHZ; 1318 break; 1319 case NL80211_CHAN_WIDTH_160: 1320 req.bw = CMD_CBW_160MHZ; 1321 break; 1322 case NL80211_CHAN_WIDTH_5: 1323 req.bw = CMD_CBW_5MHZ; 1324 break; 1325 case NL80211_CHAN_WIDTH_10: 1326 req.bw = CMD_CBW_10MHZ; 1327 break; 1328 case NL80211_CHAN_WIDTH_20_NOHT: 1329 case NL80211_CHAN_WIDTH_20: 1330 default: 1331 req.bw = CMD_CBW_20MHZ; 1332 break; 1333 } 1334 memset(req.txpower_sku, 0x3f, 49); 1335 1336 ret = __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_CHANNEL_SWITCH, 1337 &req, sizeof(req), true); 1338 if (ret) 1339 return ret; 1340 1341 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_SET_RX_PATH, 1342 &req, sizeof(req), true); 1343 } 1344 1345 int mt7615_mcu_set_ht_cap(struct mt7615_dev *dev, struct ieee80211_vif *vif, 1346 struct ieee80211_sta *sta) 1347 { 1348 struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv; 1349 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 1350 struct wtbl_req_hdr *wtbl_hdr; 1351 struct sta_req_hdr *sta_hdr; 1352 struct wtbl_raw *wtbl_raw; 1353 struct sta_rec_ht *sta_ht; 1354 struct wtbl_ht *wtbl_ht; 1355 int buf_len, ret, ntlv = 2; 1356 u32 msk, val = 0; 1357 u8 *buf; 1358 1359 buf = kzalloc(MT7615_WTBL_UPDATE_MAX_SIZE, GFP_KERNEL); 1360 if (!buf) 1361 return -ENOMEM; 1362 1363 wtbl_hdr = (struct wtbl_req_hdr *)buf; 1364 wtbl_hdr->wlan_idx = msta->wcid.idx; 1365 wtbl_hdr->operation = WTBL_SET; 1366 buf_len = sizeof(*wtbl_hdr); 1367 1368 /* ht basic */ 1369 wtbl_ht = (struct wtbl_ht *)(buf + buf_len); 1370 wtbl_ht->tag = cpu_to_le16(WTBL_HT); 1371 wtbl_ht->len = cpu_to_le16(sizeof(*wtbl_ht)); 1372 wtbl_ht->ht = 1; 1373 wtbl_ht->ldpc = sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING; 1374 wtbl_ht->af = sta->ht_cap.ampdu_factor; 1375 wtbl_ht->mm = sta->ht_cap.ampdu_density; 1376 buf_len += sizeof(*wtbl_ht); 1377 1378 if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20) 1379 val |= MT_WTBL_W5_SHORT_GI_20; 1380 if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 1381 val |= MT_WTBL_W5_SHORT_GI_40; 1382 1383 /* vht basic */ 1384 if (sta->vht_cap.vht_supported) { 1385 struct wtbl_vht *wtbl_vht; 1386 1387 wtbl_vht = (struct wtbl_vht *)(buf + buf_len); 1388 buf_len += sizeof(*wtbl_vht); 1389 wtbl_vht->tag = cpu_to_le16(WTBL_VHT); 1390 wtbl_vht->len = cpu_to_le16(sizeof(*wtbl_vht)); 1391 wtbl_vht->ldpc = sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC; 1392 wtbl_vht->vht = 1; 1393 ntlv++; 1394 1395 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 1396 val |= MT_WTBL_W5_SHORT_GI_80; 1397 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160) 1398 val |= MT_WTBL_W5_SHORT_GI_160; 1399 } 1400 1401 /* smps */ 1402 if (sta->smps_mode == IEEE80211_SMPS_DYNAMIC) { 1403 struct wtbl_smps *wtbl_smps; 1404 1405 wtbl_smps = (struct wtbl_smps *)(buf + buf_len); 1406 buf_len += sizeof(*wtbl_smps); 1407 wtbl_smps->tag = cpu_to_le16(WTBL_SMPS); 1408 wtbl_smps->len = cpu_to_le16(sizeof(*wtbl_smps)); 1409 wtbl_smps->smps = 1; 1410 ntlv++; 1411 } 1412 1413 /* sgi */ 1414 msk = MT_WTBL_W5_SHORT_GI_20 | MT_WTBL_W5_SHORT_GI_40 | 1415 MT_WTBL_W5_SHORT_GI_80 | MT_WTBL_W5_SHORT_GI_160; 1416 1417 wtbl_raw = (struct wtbl_raw *)(buf + buf_len); 1418 buf_len += sizeof(*wtbl_raw); 1419 wtbl_raw->tag = cpu_to_le16(WTBL_RAW_DATA); 1420 wtbl_raw->len = cpu_to_le16(sizeof(*wtbl_raw)); 1421 wtbl_raw->wtbl_idx = 1; 1422 wtbl_raw->dw = 5; 1423 wtbl_raw->msk = cpu_to_le32(~msk); 1424 wtbl_raw->val = cpu_to_le32(val); 1425 1426 wtbl_hdr->tlv_num = cpu_to_le16(ntlv); 1427 ret = __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_WTBL_UPDATE, 1428 buf, buf_len, true); 1429 if (ret) 1430 goto out; 1431 1432 memset(buf, 0, MT7615_WTBL_UPDATE_MAX_SIZE); 1433 1434 sta_hdr = (struct sta_req_hdr *)buf; 1435 sta_hdr->bss_idx = mvif->idx; 1436 sta_hdr->wlan_idx = msta->wcid.idx; 1437 sta_hdr->is_tlv_append = 1; 1438 ntlv = sta->vht_cap.vht_supported ? 2 : 1; 1439 sta_hdr->tlv_num = cpu_to_le16(ntlv); 1440 sta_hdr->muar_idx = mvif->omac_idx; 1441 buf_len = sizeof(*sta_hdr); 1442 1443 sta_ht = (struct sta_rec_ht *)(buf + buf_len); 1444 sta_ht->tag = cpu_to_le16(STA_REC_HT); 1445 sta_ht->len = cpu_to_le16(sizeof(*sta_ht)); 1446 sta_ht->ht_cap = cpu_to_le16(sta->ht_cap.cap); 1447 buf_len += sizeof(*sta_ht); 1448 1449 if (sta->vht_cap.vht_supported) { 1450 struct sta_rec_vht *sta_vht; 1451 1452 sta_vht = (struct sta_rec_vht *)(buf + buf_len); 1453 buf_len += sizeof(*sta_vht); 1454 sta_vht->tag = cpu_to_le16(STA_REC_VHT); 1455 sta_vht->len = cpu_to_le16(sizeof(*sta_vht)); 1456 sta_vht->vht_cap = cpu_to_le32(sta->vht_cap.cap); 1457 sta_vht->vht_rx_mcs_map = sta->vht_cap.vht_mcs.rx_mcs_map; 1458 sta_vht->vht_tx_mcs_map = sta->vht_cap.vht_mcs.tx_mcs_map; 1459 } 1460 1461 ret = __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_STA_REC_UPDATE, 1462 buf, buf_len, true); 1463 out: 1464 kfree(buf); 1465 1466 return ret; 1467 } 1468 1469 int mt7615_mcu_set_tx_ba(struct mt7615_dev *dev, 1470 struct ieee80211_ampdu_params *params, 1471 bool add) 1472 { 1473 struct mt7615_sta *msta = (struct mt7615_sta *)params->sta->drv_priv; 1474 struct mt7615_vif *mvif = msta->vif; 1475 struct { 1476 struct wtbl_req_hdr hdr; 1477 struct wtbl_ba ba; 1478 } wtbl_req = { 1479 .hdr = { 1480 .wlan_idx = msta->wcid.idx, 1481 .operation = WTBL_SET, 1482 .tlv_num = cpu_to_le16(1), 1483 }, 1484 .ba = { 1485 .tag = cpu_to_le16(WTBL_BA), 1486 .len = cpu_to_le16(sizeof(struct wtbl_ba)), 1487 .tid = params->tid, 1488 .ba_type = MT_BA_TYPE_ORIGINATOR, 1489 .sn = add ? cpu_to_le16(params->ssn) : 0, 1490 .ba_en = add, 1491 }, 1492 }; 1493 struct { 1494 struct sta_req_hdr hdr; 1495 struct sta_rec_ba ba; 1496 } sta_req = { 1497 .hdr = { 1498 .bss_idx = mvif->idx, 1499 .wlan_idx = msta->wcid.idx, 1500 .tlv_num = cpu_to_le16(1), 1501 .is_tlv_append = 1, 1502 .muar_idx = mvif->omac_idx, 1503 }, 1504 .ba = { 1505 .tag = cpu_to_le16(STA_REC_BA), 1506 .len = cpu_to_le16(sizeof(struct sta_rec_ba)), 1507 .tid = params->tid, 1508 .ba_type = MT_BA_TYPE_ORIGINATOR, 1509 .amsdu = params->amsdu, 1510 .ba_en = add << params->tid, 1511 .ssn = cpu_to_le16(params->ssn), 1512 .winsize = cpu_to_le16(params->buf_size), 1513 }, 1514 }; 1515 int ret; 1516 1517 if (add) { 1518 u8 idx, ba_range[] = { 4, 8, 12, 24, 36, 48, 54, 64 }; 1519 1520 for (idx = 7; idx > 0; idx--) { 1521 if (params->buf_size >= ba_range[idx]) 1522 break; 1523 } 1524 1525 wtbl_req.ba.ba_winsize_idx = idx; 1526 } 1527 1528 ret = __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_WTBL_UPDATE, 1529 &wtbl_req, sizeof(wtbl_req), true); 1530 if (ret) 1531 return ret; 1532 1533 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_STA_REC_UPDATE, 1534 &sta_req, sizeof(sta_req), true); 1535 } 1536 1537 int mt7615_mcu_set_rx_ba(struct mt7615_dev *dev, 1538 struct ieee80211_ampdu_params *params, 1539 bool add) 1540 { 1541 struct mt7615_sta *msta = (struct mt7615_sta *)params->sta->drv_priv; 1542 struct mt7615_vif *mvif = msta->vif; 1543 struct { 1544 struct wtbl_req_hdr hdr; 1545 struct wtbl_ba ba; 1546 } wtbl_req = { 1547 .hdr = { 1548 .wlan_idx = msta->wcid.idx, 1549 .operation = WTBL_SET, 1550 .tlv_num = cpu_to_le16(1), 1551 }, 1552 .ba = { 1553 .tag = cpu_to_le16(WTBL_BA), 1554 .len = cpu_to_le16(sizeof(struct wtbl_ba)), 1555 .tid = params->tid, 1556 .ba_type = MT_BA_TYPE_RECIPIENT, 1557 .rst_ba_tid = params->tid, 1558 .rst_ba_sel = RST_BA_MAC_TID_MATCH, 1559 .rst_ba_sb = 1, 1560 }, 1561 }; 1562 struct { 1563 struct sta_req_hdr hdr; 1564 struct sta_rec_ba ba; 1565 } sta_req = { 1566 .hdr = { 1567 .bss_idx = mvif->idx, 1568 .wlan_idx = msta->wcid.idx, 1569 .tlv_num = cpu_to_le16(1), 1570 .is_tlv_append = 1, 1571 .muar_idx = mvif->omac_idx, 1572 }, 1573 .ba = { 1574 .tag = cpu_to_le16(STA_REC_BA), 1575 .len = cpu_to_le16(sizeof(struct sta_rec_ba)), 1576 .tid = params->tid, 1577 .ba_type = MT_BA_TYPE_RECIPIENT, 1578 .amsdu = params->amsdu, 1579 .ba_en = add << params->tid, 1580 .ssn = cpu_to_le16(params->ssn), 1581 .winsize = cpu_to_le16(params->buf_size), 1582 }, 1583 }; 1584 int ret; 1585 1586 memcpy(wtbl_req.ba.peer_addr, params->sta->addr, ETH_ALEN); 1587 1588 ret = __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_STA_REC_UPDATE, 1589 &sta_req, sizeof(sta_req), true); 1590 if (ret || !add) 1591 return ret; 1592 1593 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_WTBL_UPDATE, 1594 &wtbl_req, sizeof(wtbl_req), true); 1595 } 1596 1597 int mt7615_mcu_get_temperature(struct mt7615_dev *dev, int index) 1598 { 1599 struct { 1600 u8 action; 1601 u8 rsv[3]; 1602 } req = { 1603 .action = index, 1604 }; 1605 1606 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_GET_TEMP, &req, 1607 sizeof(req), true); 1608 } 1609