1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2019 MediaTek Inc.
3  *
4  * Author: Roy Luo <royluo@google.com>
5  *         Ryder Lee <ryder.lee@mediatek.com>
6  *         Felix Fietkau <nbd@nbd.name>
7  */
8 
9 #include <linux/etherdevice.h>
10 #include "mt7615.h"
11 #include "mac.h"
12 #include "eeprom.h"
13 
14 static void mt7615_phy_init(struct mt7615_dev *dev)
15 {
16 	/* disable band 0 rf low power beacon mode */
17 	mt76_rmw(dev, MT_WF_PHY_WF2_RFCTRL0, MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN,
18 		 MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
19 }
20 
21 static void mt7615_mac_init(struct mt7615_dev *dev)
22 {
23 	u32 val;
24 
25 	/* enable band 0/1 clk */
26 	mt76_set(dev, MT_CFG_CCR,
27 		 MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN |
28 		 MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN);
29 
30 	val = mt76_rmw(dev, MT_TMAC_TRCR0,
31 		       MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL,
32 		       FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) |
33 		       FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0));
34 	mt76_wr(dev, MT_TMAC_TRCR1, val);
35 
36 	val = MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE |
37 	      FIELD_PREP(MT_AGG_ACR_CFEND_RATE, 0x49) | /* 24M */
38 	      FIELD_PREP(MT_AGG_ACR_BAR_RATE, 0x4b); /* 6M */
39 	mt76_wr(dev, MT_AGG_ACR0, val);
40 	mt76_wr(dev, MT_AGG_ACR1, val);
41 
42 	mt76_rmw_field(dev, MT_TMAC_CTCR0,
43 		       MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
44 	mt76_rmw_field(dev, MT_TMAC_CTCR0,
45 		       MT_TMAC_CTCR0_INS_DDLMT_DENSITY, 0x3);
46 	mt76_rmw(dev, MT_TMAC_CTCR0,
47 		 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
48 		 MT_TMAC_CTCR0_INS_DDLMT_EN,
49 		 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
50 		 MT_TMAC_CTCR0_INS_DDLMT_EN);
51 
52 	mt7615_mcu_set_rts_thresh(dev, 0x92b);
53 	mt7615_mac_set_scs(dev, false);
54 
55 	mt76_rmw(dev, MT_AGG_SCR, MT_AGG_SCR_NLNAV_MID_PTEC_DIS,
56 		 MT_AGG_SCR_NLNAV_MID_PTEC_DIS);
57 
58 	mt7615_mcu_init_mac(dev);
59 
60 	mt76_wr(dev, MT_DMA_DCR0, MT_DMA_DCR0_RX_VEC_DROP |
61 		FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072));
62 
63 	mt76_wr(dev, MT_AGG_ARUCR,
64 		FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) |
65 		FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) |
66 		FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) |
67 		FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) |
68 		FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) |
69 		FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) |
70 		FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) |
71 		FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1));
72 
73 	mt76_wr(dev, MT_AGG_ARDCR,
74 		FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) |
75 		FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) |
76 		FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) |
77 		FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) |
78 		FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) |
79 		FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) |
80 		FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) |
81 		FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1));
82 
83 	mt76_wr(dev, MT_AGG_ARCR,
84 		(FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) |
85 		 MT_AGG_ARCR_RATE_DOWN_RATIO_EN |
86 		 FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) |
87 		 FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4)));
88 }
89 
90 static int mt7615_init_hardware(struct mt7615_dev *dev)
91 {
92 	int ret, idx;
93 
94 	mt76_wr(dev, MT_INT_SOURCE_CSR, ~0);
95 
96 	spin_lock_init(&dev->token_lock);
97 	idr_init(&dev->token);
98 
99 	ret = mt7615_eeprom_init(dev);
100 	if (ret < 0)
101 		return ret;
102 
103 	ret = mt7615_dma_init(dev);
104 	if (ret)
105 		return ret;
106 
107 	set_bit(MT76_STATE_INITIALIZED, &dev->mt76.state);
108 
109 	ret = mt7615_mcu_init(dev);
110 	if (ret)
111 		return ret;
112 
113 	mt7615_mcu_set_eeprom(dev);
114 	mt7615_mac_init(dev);
115 	mt7615_phy_init(dev);
116 	mt7615_mcu_ctrl_pm_state(dev, 0);
117 	mt7615_mcu_del_wtbl_all(dev);
118 
119 	/* Beacon and mgmt frames should occupy wcid 0 */
120 	idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7615_WTBL_STA - 1);
121 	if (idx)
122 		return -ENOSPC;
123 
124 	dev->mt76.global_wcid.idx = idx;
125 	dev->mt76.global_wcid.hw_key_idx = -1;
126 	rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid);
127 
128 	return 0;
129 }
130 
131 #define CCK_RATE(_idx, _rate) {						\
132 	.bitrate = _rate,						\
133 	.flags = IEEE80211_RATE_SHORT_PREAMBLE,				\
134 	.hw_value = (MT_PHY_TYPE_CCK << 8) | (_idx),			\
135 	.hw_value_short = (MT_PHY_TYPE_CCK << 8) | (4 + (_idx)),	\
136 }
137 
138 #define OFDM_RATE(_idx, _rate) {					\
139 	.bitrate = _rate,						\
140 	.hw_value = (MT_PHY_TYPE_OFDM << 8) | (_idx),			\
141 	.hw_value_short = (MT_PHY_TYPE_OFDM << 8) | (_idx),		\
142 }
143 
144 static struct ieee80211_rate mt7615_rates[] = {
145 	CCK_RATE(0, 10),
146 	CCK_RATE(1, 20),
147 	CCK_RATE(2, 55),
148 	CCK_RATE(3, 110),
149 	OFDM_RATE(11, 60),
150 	OFDM_RATE(15, 90),
151 	OFDM_RATE(10, 120),
152 	OFDM_RATE(14, 180),
153 	OFDM_RATE(9,  240),
154 	OFDM_RATE(13, 360),
155 	OFDM_RATE(8,  480),
156 	OFDM_RATE(12, 540),
157 };
158 
159 static const struct ieee80211_iface_limit if_limits[] = {
160 	{
161 		.max = MT7615_MAX_INTERFACES,
162 		.types = BIT(NL80211_IFTYPE_AP) |
163 #ifdef CONFIG_MAC80211_MESH
164 			 BIT(NL80211_IFTYPE_MESH_POINT) |
165 #endif
166 			 BIT(NL80211_IFTYPE_STATION)
167 	}
168 };
169 
170 static const struct ieee80211_iface_combination if_comb[] = {
171 	{
172 		.limits = if_limits,
173 		.n_limits = ARRAY_SIZE(if_limits),
174 		.max_interfaces = 4,
175 		.num_different_channels = 1,
176 		.beacon_int_infra_match = true,
177 	}
178 };
179 
180 static void
181 mt7615_init_txpower(struct mt7615_dev *dev,
182 		    struct ieee80211_supported_band *sband)
183 {
184 	int i, n_chains = hweight8(dev->mt76.antenna_mask), target_chains;
185 	u8 *eep = (u8 *)dev->mt76.eeprom.data;
186 	enum nl80211_band band = sband->band;
187 
188 	target_chains = mt7615_ext_pa_enabled(dev, band) ? 1 : n_chains;
189 	for (i = 0; i < sband->n_channels; i++) {
190 		struct ieee80211_channel *chan = &sband->channels[i];
191 		u8 target_power = 0;
192 		int j;
193 
194 		for (j = 0; j < target_chains; j++) {
195 			int index;
196 
197 			index = mt7615_eeprom_get_power_index(dev, chan, j);
198 			target_power = max(target_power, eep[index]);
199 		}
200 
201 		target_power = DIV_ROUND_UP(target_power, 2);
202 		switch (n_chains) {
203 		case 4:
204 			target_power += 6;
205 			break;
206 		case 3:
207 			target_power += 4;
208 			break;
209 		case 2:
210 			target_power += 3;
211 			break;
212 		default:
213 			break;
214 		}
215 
216 		chan->max_power = min_t(int, chan->max_reg_power,
217 					target_power);
218 		chan->orig_mpwr = target_power;
219 	}
220 }
221 
222 static void
223 mt7615_regd_notifier(struct wiphy *wiphy,
224 		     struct regulatory_request *request)
225 {
226 	struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
227 	struct mt7615_dev *dev = hw->priv;
228 	struct cfg80211_chan_def *chandef = &dev->mt76.chandef;
229 
230 	if (request->dfs_region == dev->mt76.region)
231 		return;
232 
233 	dev->mt76.region = request->dfs_region;
234 
235 	if (!(chandef->chan->flags & IEEE80211_CHAN_RADAR))
236 		return;
237 
238 	mt7615_dfs_stop_radar_detector(dev);
239 	if (request->dfs_region == NL80211_DFS_UNSET)
240 		mt7615_mcu_rdd_cmd(dev, RDD_CAC_END, MT_HW_RDD0,
241 				   MT_RX_SEL0, 0);
242 	else
243 		mt7615_dfs_start_radar_detector(dev);
244 }
245 
246 int mt7615_register_device(struct mt7615_dev *dev)
247 {
248 	struct ieee80211_hw *hw = mt76_hw(dev);
249 	struct wiphy *wiphy = hw->wiphy;
250 	int ret;
251 
252 	ret = mt7615_init_hardware(dev);
253 	if (ret)
254 		return ret;
255 
256 	INIT_DELAYED_WORK(&dev->mt76.mac_work, mt7615_mac_work);
257 
258 	hw->queues = 4;
259 	hw->max_rates = 3;
260 	hw->max_report_rates = 7;
261 	hw->max_rate_tries = 11;
262 
263 	hw->sta_data_size = sizeof(struct mt7615_sta);
264 	hw->vif_data_size = sizeof(struct mt7615_vif);
265 
266 	wiphy->iface_combinations = if_comb;
267 	wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
268 	wiphy->reg_notifier = mt7615_regd_notifier;
269 	wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH;
270 
271 	ieee80211_hw_set(hw, SUPPORTS_REORDERING_BUFFER);
272 	ieee80211_hw_set(hw, TX_STATUS_NO_AMPDU_LEN);
273 
274 	dev->mt76.sband_2g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
275 	dev->mt76.sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
276 	dev->mt76.sband_5g.sband.vht_cap.cap |=
277 			IEEE80211_VHT_CAP_SHORT_GI_160 |
278 			IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
279 			IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
280 			IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ;
281 	dev->mt76.chainmask = 0x404;
282 	dev->mt76.antenna_mask = 0xf;
283 	dev->dfs_state = -1;
284 
285 	wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
286 #ifdef CONFIG_MAC80211_MESH
287 				 BIT(NL80211_IFTYPE_MESH_POINT) |
288 #endif
289 				 BIT(NL80211_IFTYPE_AP);
290 
291 	ret = mt76_register_device(&dev->mt76, true, mt7615_rates,
292 				   ARRAY_SIZE(mt7615_rates));
293 	if (ret)
294 		return ret;
295 
296 	mt7615_init_txpower(dev, &dev->mt76.sband_2g.sband);
297 	mt7615_init_txpower(dev, &dev->mt76.sband_5g.sband);
298 
299 	hw->max_tx_fragments = MT_TXP_MAX_BUF_NUM;
300 
301 	return mt7615_init_debugfs(dev);
302 }
303 
304 void mt7615_unregister_device(struct mt7615_dev *dev)
305 {
306 	struct mt76_txwi_cache *txwi;
307 	int id;
308 
309 	mt76_unregister_device(&dev->mt76);
310 	mt7615_mcu_exit(dev);
311 	mt7615_dma_cleanup(dev);
312 
313 	spin_lock_bh(&dev->token_lock);
314 	idr_for_each_entry(&dev->token, txwi, id) {
315 		mt7615_txp_skb_unmap(&dev->mt76, txwi);
316 		if (txwi->skb)
317 			dev_kfree_skb_any(txwi->skb);
318 		mt76_put_txwi(&dev->mt76, txwi);
319 	}
320 	spin_unlock_bh(&dev->token_lock);
321 	idr_destroy(&dev->token);
322 
323 	mt76_free_device(&dev->mt76);
324 }
325