1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2019 MediaTek Inc. 3 * 4 * Author: Roy Luo <royluo@google.com> 5 * Ryder Lee <ryder.lee@mediatek.com> 6 * Felix Fietkau <nbd@nbd.name> 7 * Lorenzo Bianconi <lorenzo@kernel.org> 8 */ 9 10 #include <linux/etherdevice.h> 11 #include "mt7615.h" 12 #include "mac.h" 13 #include "mcu.h" 14 #include "eeprom.h" 15 16 static void 17 mt7615_phy_init(struct mt7615_dev *dev) 18 { 19 /* disable rf low power beacon mode */ 20 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(0), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN); 21 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(1), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN); 22 } 23 24 static void 25 mt7615_init_mac_chain(struct mt7615_dev *dev, int chain) 26 { 27 u32 val; 28 29 if (!chain) 30 val = MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN; 31 else 32 val = MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN; 33 34 /* enable band 0/1 clk */ 35 mt76_set(dev, MT_CFG_CCR, val); 36 37 mt76_rmw(dev, MT_TMAC_TRCR(chain), 38 MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL, 39 FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) | 40 FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0)); 41 42 mt76_wr(dev, MT_AGG_ACR(chain), 43 MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE | 44 FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) | 45 FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT)); 46 47 mt76_wr(dev, MT_AGG_ARUCR(chain), 48 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) | 49 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) | 50 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) | 51 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) | 52 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) | 53 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) | 54 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) | 55 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1)); 56 57 mt76_wr(dev, MT_AGG_ARDCR(chain), 58 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) | 59 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) | 60 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) | 61 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) | 62 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) | 63 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) | 64 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) | 65 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1)); 66 67 mt76_clear(dev, MT_DMA_RCFR0(chain), MT_DMA_RCFR0_MCU_RX_TDLS); 68 if (!mt7615_firmware_offload(dev)) { 69 u32 mask, set; 70 71 mask = MT_DMA_RCFR0_MCU_RX_MGMT | 72 MT_DMA_RCFR0_MCU_RX_CTL_NON_BAR | 73 MT_DMA_RCFR0_MCU_RX_CTL_BAR | 74 MT_DMA_RCFR0_MCU_RX_BYPASS | 75 MT_DMA_RCFR0_RX_DROPPED_UCAST | 76 MT_DMA_RCFR0_RX_DROPPED_MCAST; 77 set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) | 78 FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2); 79 mt76_rmw(dev, MT_DMA_RCFR0(chain), mask, set); 80 } 81 } 82 83 static void 84 mt7615_mac_init(struct mt7615_dev *dev) 85 { 86 int i; 87 88 mt7615_init_mac_chain(dev, 0); 89 90 mt76_rmw_field(dev, MT_TMAC_CTCR0, 91 MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f); 92 mt76_rmw_field(dev, MT_TMAC_CTCR0, 93 MT_TMAC_CTCR0_INS_DDLMT_DENSITY, 0x3); 94 mt76_rmw(dev, MT_TMAC_CTCR0, 95 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN | 96 MT_TMAC_CTCR0_INS_DDLMT_EN, 97 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN | 98 MT_TMAC_CTCR0_INS_DDLMT_EN); 99 100 mt76_connac_mcu_set_rts_thresh(&dev->mt76, 0x92b, 0); 101 mt7615_mac_set_scs(&dev->phy, true); 102 103 mt76_rmw(dev, MT_AGG_SCR, MT_AGG_SCR_NLNAV_MID_PTEC_DIS, 104 MT_AGG_SCR_NLNAV_MID_PTEC_DIS); 105 106 mt76_wr(dev, MT_AGG_ARCR, 107 FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) | 108 MT_AGG_ARCR_RATE_DOWN_RATIO_EN | 109 FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) | 110 FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4)); 111 112 for (i = 0; i < MT7615_WTBL_SIZE; i++) 113 mt7615_mac_wtbl_update(dev, i, 114 MT_WTBL_UPDATE_ADM_COUNT_CLEAR); 115 116 mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_EN); 117 mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0, MT_WF_RMAC_MIB_RXTIME_EN); 118 119 /* disable hdr translation and hw AMSDU */ 120 mt76_wr(dev, MT_DMA_DCR0, 121 FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072) | 122 MT_DMA_DCR0_RX_VEC_DROP); 123 /* disable TDLS filtering */ 124 mt76_clear(dev, MT_WF_PFCR, MT_WF_PFCR_TDLS_EN); 125 mt76_set(dev, MT_WF_MIB_SCR0, MT_MIB_SCR0_AGG_CNT_RANGE_EN); 126 if (is_mt7663(&dev->mt76)) { 127 mt76_wr(dev, MT_WF_AGG(0x160), 0x5c341c02); 128 mt76_wr(dev, MT_WF_AGG(0x164), 0x70708040); 129 } else { 130 mt7615_init_mac_chain(dev, 1); 131 } 132 } 133 134 static void 135 mt7615_check_offload_capability(struct mt7615_dev *dev) 136 { 137 struct ieee80211_hw *hw = mt76_hw(dev); 138 struct wiphy *wiphy = hw->wiphy; 139 140 if (mt7615_firmware_offload(dev)) { 141 ieee80211_hw_set(hw, SUPPORTS_PS); 142 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); 143 144 wiphy->max_remain_on_channel_duration = 5000; 145 wiphy->features |= NL80211_FEATURE_SCHED_SCAN_RANDOM_MAC_ADDR | 146 NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR | 147 WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL | 148 NL80211_FEATURE_P2P_GO_CTWIN | 149 NL80211_FEATURE_P2P_GO_OPPPS; 150 } else { 151 dev->ops->hw_scan = NULL; 152 dev->ops->cancel_hw_scan = NULL; 153 dev->ops->sched_scan_start = NULL; 154 dev->ops->sched_scan_stop = NULL; 155 dev->ops->set_rekey_data = NULL; 156 dev->ops->remain_on_channel = NULL; 157 dev->ops->cancel_remain_on_channel = NULL; 158 159 wiphy->max_sched_scan_plan_interval = 0; 160 wiphy->max_sched_scan_ie_len = 0; 161 wiphy->max_scan_ie_len = IEEE80211_MAX_DATA_LEN; 162 wiphy->max_sched_scan_ssids = 0; 163 wiphy->max_match_sets = 0; 164 wiphy->max_sched_scan_reqs = 0; 165 } 166 } 167 168 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev) 169 { 170 flush_work(&dev->mcu_work); 171 172 return test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); 173 } 174 EXPORT_SYMBOL_GPL(mt7615_wait_for_mcu_init); 175 176 #define CCK_RATE(_idx, _rate) { \ 177 .bitrate = _rate, \ 178 .flags = IEEE80211_RATE_SHORT_PREAMBLE, \ 179 .hw_value = (MT_PHY_TYPE_CCK << 8) | (_idx), \ 180 .hw_value_short = (MT_PHY_TYPE_CCK << 8) | (4 + (_idx)), \ 181 } 182 183 #define OFDM_RATE(_idx, _rate) { \ 184 .bitrate = _rate, \ 185 .hw_value = (MT_PHY_TYPE_OFDM << 8) | (_idx), \ 186 .hw_value_short = (MT_PHY_TYPE_OFDM << 8) | (_idx), \ 187 } 188 189 struct ieee80211_rate mt7615_rates[] = { 190 CCK_RATE(0, 10), 191 CCK_RATE(1, 20), 192 CCK_RATE(2, 55), 193 CCK_RATE(3, 110), 194 OFDM_RATE(11, 60), 195 OFDM_RATE(15, 90), 196 OFDM_RATE(10, 120), 197 OFDM_RATE(14, 180), 198 OFDM_RATE(9, 240), 199 OFDM_RATE(13, 360), 200 OFDM_RATE(8, 480), 201 OFDM_RATE(12, 540), 202 }; 203 EXPORT_SYMBOL_GPL(mt7615_rates); 204 205 static const struct ieee80211_iface_limit if_limits[] = { 206 { 207 .max = 1, 208 .types = BIT(NL80211_IFTYPE_ADHOC) 209 }, { 210 .max = MT7615_MAX_INTERFACES, 211 .types = BIT(NL80211_IFTYPE_AP) | 212 #ifdef CONFIG_MAC80211_MESH 213 BIT(NL80211_IFTYPE_MESH_POINT) | 214 #endif 215 BIT(NL80211_IFTYPE_P2P_CLIENT) | 216 BIT(NL80211_IFTYPE_P2P_GO) | 217 BIT(NL80211_IFTYPE_STATION) 218 } 219 }; 220 221 static const struct ieee80211_iface_combination if_comb_radar[] = { 222 { 223 .limits = if_limits, 224 .n_limits = ARRAY_SIZE(if_limits), 225 .max_interfaces = MT7615_MAX_INTERFACES, 226 .num_different_channels = 1, 227 .beacon_int_infra_match = true, 228 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) | 229 BIT(NL80211_CHAN_WIDTH_20) | 230 BIT(NL80211_CHAN_WIDTH_40) | 231 BIT(NL80211_CHAN_WIDTH_80) | 232 BIT(NL80211_CHAN_WIDTH_160) | 233 BIT(NL80211_CHAN_WIDTH_80P80), 234 } 235 }; 236 237 static const struct ieee80211_iface_combination if_comb[] = { 238 { 239 .limits = if_limits, 240 .n_limits = ARRAY_SIZE(if_limits), 241 .max_interfaces = MT7615_MAX_INTERFACES, 242 .num_different_channels = 1, 243 .beacon_int_infra_match = true, 244 } 245 }; 246 247 void mt7615_init_txpower(struct mt7615_dev *dev, 248 struct ieee80211_supported_band *sband) 249 { 250 int i, n_chains = hweight8(dev->mphy.antenna_mask), target_chains; 251 int delta_idx, delta = mt76_tx_power_nss_delta(n_chains); 252 u8 *eep = (u8 *)dev->mt76.eeprom.data; 253 enum nl80211_band band = sband->band; 254 u8 rate_val; 255 256 delta_idx = mt7615_eeprom_get_power_delta_index(dev, band); 257 rate_val = eep[delta_idx]; 258 if ((rate_val & ~MT_EE_RATE_POWER_MASK) == 259 (MT_EE_RATE_POWER_EN | MT_EE_RATE_POWER_SIGN)) 260 delta += rate_val & MT_EE_RATE_POWER_MASK; 261 262 if (!is_mt7663(&dev->mt76) && mt7615_ext_pa_enabled(dev, band)) 263 target_chains = 1; 264 else 265 target_chains = n_chains; 266 267 for (i = 0; i < sband->n_channels; i++) { 268 struct ieee80211_channel *chan = &sband->channels[i]; 269 u8 target_power = 0; 270 int j; 271 272 for (j = 0; j < target_chains; j++) { 273 int index; 274 275 index = mt7615_eeprom_get_target_power_index(dev, chan, j); 276 if (index < 0) 277 continue; 278 279 target_power = max(target_power, eep[index]); 280 } 281 282 target_power = DIV_ROUND_UP(target_power + delta, 2); 283 chan->max_power = min_t(int, chan->max_reg_power, 284 target_power); 285 chan->orig_mpwr = target_power; 286 } 287 } 288 EXPORT_SYMBOL_GPL(mt7615_init_txpower); 289 290 void mt7615_init_work(struct mt7615_dev *dev) 291 { 292 mt7615_mcu_set_eeprom(dev); 293 mt7615_mac_init(dev); 294 mt7615_phy_init(dev); 295 mt7615_mcu_del_wtbl_all(dev); 296 mt7615_check_offload_capability(dev); 297 } 298 EXPORT_SYMBOL_GPL(mt7615_init_work); 299 300 static void 301 mt7615_regd_notifier(struct wiphy *wiphy, 302 struct regulatory_request *request) 303 { 304 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 305 struct mt7615_dev *dev = mt7615_hw_dev(hw); 306 struct mt76_phy *mphy = hw->priv; 307 struct mt7615_phy *phy = mphy->priv; 308 struct cfg80211_chan_def *chandef = &mphy->chandef; 309 310 memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2)); 311 dev->mt76.region = request->dfs_region; 312 313 mt7615_mutex_acquire(dev); 314 315 if (chandef->chan->flags & IEEE80211_CHAN_RADAR) 316 mt7615_dfs_init_radar_detector(phy); 317 if (mt7615_firmware_offload(phy->dev)) 318 mt76_connac_mcu_set_channel_domain(mphy); 319 320 mt7615_mutex_release(dev); 321 } 322 323 static void 324 mt7615_init_wiphy(struct ieee80211_hw *hw) 325 { 326 struct mt7615_phy *phy = mt7615_hw_phy(hw); 327 struct wiphy *wiphy = hw->wiphy; 328 329 hw->queues = 4; 330 hw->max_rates = 3; 331 hw->max_report_rates = 7; 332 hw->max_rate_tries = 11; 333 334 phy->slottime = 9; 335 336 hw->sta_data_size = sizeof(struct mt7615_sta); 337 hw->vif_data_size = sizeof(struct mt7615_vif); 338 339 if (is_mt7663(&phy->dev->mt76)) { 340 wiphy->iface_combinations = if_comb; 341 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb); 342 } else { 343 wiphy->iface_combinations = if_comb_radar; 344 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb_radar); 345 } 346 wiphy->reg_notifier = mt7615_regd_notifier; 347 348 wiphy->max_sched_scan_plan_interval = 349 MT76_CONNAC_MAX_SCHED_SCAN_INTERVAL; 350 wiphy->max_sched_scan_ie_len = IEEE80211_MAX_DATA_LEN; 351 wiphy->max_scan_ie_len = MT76_CONNAC_SCAN_IE_LEN; 352 wiphy->max_sched_scan_ssids = MT76_CONNAC_MAX_SCHED_SCAN_SSID; 353 wiphy->max_match_sets = MT76_CONNAC_MAX_SCAN_MATCH; 354 wiphy->max_sched_scan_reqs = 1; 355 wiphy->max_scan_ssids = 4; 356 357 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL); 358 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS); 359 360 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS); 361 ieee80211_hw_set(hw, TX_STATUS_NO_AMPDU_LEN); 362 ieee80211_hw_set(hw, WANT_MONITOR_VIF); 363 364 if (is_mt7615(&phy->dev->mt76)) 365 hw->max_tx_fragments = MT_TXP_MAX_BUF_NUM; 366 else 367 hw->max_tx_fragments = MT_HW_TXP_MAX_BUF_NUM; 368 } 369 370 static void 371 mt7615_cap_dbdc_enable(struct mt7615_dev *dev) 372 { 373 dev->mphy.sband_5g.sband.vht_cap.cap &= 374 ~(IEEE80211_VHT_CAP_SHORT_GI_160 | 375 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ); 376 if (dev->chainmask == 0xf) 377 dev->mphy.antenna_mask = dev->chainmask >> 2; 378 else 379 dev->mphy.antenna_mask = dev->chainmask >> 1; 380 dev->mphy.chainmask = dev->mphy.antenna_mask; 381 dev->mphy.hw->wiphy->available_antennas_rx = dev->mphy.chainmask; 382 dev->mphy.hw->wiphy->available_antennas_tx = dev->mphy.chainmask; 383 mt76_set_stream_caps(&dev->mphy, true); 384 } 385 386 static void 387 mt7615_cap_dbdc_disable(struct mt7615_dev *dev) 388 { 389 dev->mphy.sband_5g.sband.vht_cap.cap |= 390 IEEE80211_VHT_CAP_SHORT_GI_160 | 391 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ; 392 dev->mphy.antenna_mask = dev->chainmask; 393 dev->mphy.chainmask = dev->chainmask; 394 dev->mphy.hw->wiphy->available_antennas_rx = dev->chainmask; 395 dev->mphy.hw->wiphy->available_antennas_tx = dev->chainmask; 396 mt76_set_stream_caps(&dev->mphy, true); 397 } 398 399 int mt7615_register_ext_phy(struct mt7615_dev *dev) 400 { 401 struct mt7615_phy *phy = mt7615_ext_phy(dev); 402 struct mt76_phy *mphy; 403 int i, ret; 404 405 if (!is_mt7615(&dev->mt76)) 406 return -EOPNOTSUPP; 407 408 if (test_bit(MT76_STATE_RUNNING, &dev->mphy.state)) 409 return -EINVAL; 410 411 if (phy) 412 return 0; 413 414 mt7615_cap_dbdc_enable(dev); 415 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7615_ops); 416 if (!mphy) 417 return -ENOMEM; 418 419 phy = mphy->priv; 420 phy->dev = dev; 421 phy->mt76 = mphy; 422 mphy->chainmask = dev->chainmask & ~dev->mphy.chainmask; 423 mphy->antenna_mask = BIT(hweight8(mphy->chainmask)) - 1; 424 mt7615_init_wiphy(mphy->hw); 425 426 INIT_DELAYED_WORK(&mphy->mac_work, mt7615_mac_work); 427 INIT_DELAYED_WORK(&phy->scan_work, mt7615_scan_work); 428 skb_queue_head_init(&phy->scan_event_list); 429 430 INIT_WORK(&phy->roc_work, mt7615_roc_work); 431 timer_setup(&phy->roc_timer, mt7615_roc_timer, 0); 432 init_waitqueue_head(&phy->roc_wait); 433 434 mt7615_mac_set_scs(phy, true); 435 436 /* 437 * Make the secondary PHY MAC address local without overlapping with 438 * the usual MAC address allocation scheme on multiple virtual interfaces 439 */ 440 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR, 441 ETH_ALEN); 442 mphy->macaddr[0] |= 2; 443 mphy->macaddr[0] ^= BIT(7); 444 mt76_eeprom_override(mphy); 445 446 /* second phy can only handle 5 GHz */ 447 mphy->cap.has_5ghz = true; 448 449 /* mt7615 second phy shares the same hw queues with the primary one */ 450 for (i = 0; i <= MT_TXQ_PSD ; i++) 451 mphy->q_tx[i] = dev->mphy.q_tx[i]; 452 453 ret = mt76_register_phy(mphy, true, mt7615_rates, 454 ARRAY_SIZE(mt7615_rates)); 455 if (ret) 456 ieee80211_free_hw(mphy->hw); 457 458 return ret; 459 } 460 EXPORT_SYMBOL_GPL(mt7615_register_ext_phy); 461 462 void mt7615_unregister_ext_phy(struct mt7615_dev *dev) 463 { 464 struct mt7615_phy *phy = mt7615_ext_phy(dev); 465 struct mt76_phy *mphy = dev->mt76.phy2; 466 467 if (!phy) 468 return; 469 470 mt7615_cap_dbdc_disable(dev); 471 mt76_unregister_phy(mphy); 472 ieee80211_free_hw(mphy->hw); 473 } 474 EXPORT_SYMBOL_GPL(mt7615_unregister_ext_phy); 475 476 void mt7615_init_device(struct mt7615_dev *dev) 477 { 478 struct ieee80211_hw *hw = mt76_hw(dev); 479 480 dev->phy.dev = dev; 481 dev->phy.mt76 = &dev->mt76.phy; 482 dev->mt76.phy.priv = &dev->phy; 483 484 INIT_DELAYED_WORK(&dev->pm.ps_work, mt7615_pm_power_save_work); 485 INIT_WORK(&dev->pm.wake_work, mt7615_pm_wake_work); 486 init_completion(&dev->pm.wake_cmpl); 487 spin_lock_init(&dev->pm.txq_lock); 488 set_bit(MT76_STATE_PM, &dev->mphy.state); 489 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7615_mac_work); 490 INIT_DELAYED_WORK(&dev->phy.scan_work, mt7615_scan_work); 491 INIT_DELAYED_WORK(&dev->coredump.work, mt7615_coredump_work); 492 skb_queue_head_init(&dev->phy.scan_event_list); 493 skb_queue_head_init(&dev->coredump.msg_list); 494 INIT_LIST_HEAD(&dev->sta_poll_list); 495 spin_lock_init(&dev->sta_poll_lock); 496 init_waitqueue_head(&dev->reset_wait); 497 init_waitqueue_head(&dev->phy.roc_wait); 498 499 INIT_WORK(&dev->reset_work, mt7615_mac_reset_work); 500 INIT_WORK(&dev->phy.roc_work, mt7615_roc_work); 501 timer_setup(&dev->phy.roc_timer, mt7615_roc_timer, 0); 502 503 mt7615_init_wiphy(hw); 504 dev->pm.idle_timeout = MT7615_PM_TIMEOUT; 505 dev->mphy.sband_2g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING; 506 dev->mphy.sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING; 507 dev->mphy.sband_5g.sband.vht_cap.cap |= 508 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK; 509 mt7615_cap_dbdc_disable(dev); 510 dev->phy.dfs_state = -1; 511 512 #ifdef CONFIG_NL80211_TESTMODE 513 dev->mt76.test_ops = &mt7615_testmode_ops; 514 #endif 515 } 516 EXPORT_SYMBOL_GPL(mt7615_init_device); 517