1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2019 MediaTek Inc. 3 * 4 * Author: Roy Luo <royluo@google.com> 5 * Ryder Lee <ryder.lee@mediatek.com> 6 * Felix Fietkau <nbd@nbd.name> 7 * Lorenzo Bianconi <lorenzo@kernel.org> 8 */ 9 10 #include <linux/etherdevice.h> 11 #include "mt7615.h" 12 #include "mac.h" 13 #include "eeprom.h" 14 15 static void mt7615_phy_init(struct mt7615_dev *dev) 16 { 17 /* disable rf low power beacon mode */ 18 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(0), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN); 19 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(1), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN); 20 } 21 22 static void 23 mt7615_init_mac_chain(struct mt7615_dev *dev, int chain) 24 { 25 u32 val, mask, set; 26 27 if (!chain) 28 val = MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN; 29 else 30 val = MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN; 31 32 /* enable band 0/1 clk */ 33 mt76_set(dev, MT_CFG_CCR, val); 34 35 mt76_rmw(dev, MT_TMAC_TRCR(chain), 36 MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL, 37 FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) | 38 FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0)); 39 40 mt76_wr(dev, MT_AGG_ACR(chain), 41 MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE | 42 FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) | 43 FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT)); 44 45 mt76_wr(dev, MT_AGG_ARUCR(chain), 46 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) | 47 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) | 48 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) | 49 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) | 50 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) | 51 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) | 52 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) | 53 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1)); 54 55 mt76_wr(dev, MT_AGG_ARDCR(chain), 56 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) | 57 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) | 58 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) | 59 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) | 60 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) | 61 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) | 62 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) | 63 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1)); 64 65 mask = MT_DMA_RCFR0_MCU_RX_MGMT | 66 MT_DMA_RCFR0_MCU_RX_CTL_NON_BAR | 67 MT_DMA_RCFR0_MCU_RX_CTL_BAR | 68 MT_DMA_RCFR0_MCU_RX_BYPASS | 69 MT_DMA_RCFR0_RX_DROPPED_UCAST | 70 MT_DMA_RCFR0_RX_DROPPED_MCAST; 71 set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) | 72 FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2); 73 mt76_rmw(dev, MT_DMA_RCFR0(chain), mask, set); 74 } 75 76 static void mt7615_mac_init(struct mt7615_dev *dev) 77 { 78 int i; 79 80 mt7615_init_mac_chain(dev, 0); 81 82 mt76_rmw_field(dev, MT_TMAC_CTCR0, 83 MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f); 84 mt76_rmw_field(dev, MT_TMAC_CTCR0, 85 MT_TMAC_CTCR0_INS_DDLMT_DENSITY, 0x3); 86 mt76_rmw(dev, MT_TMAC_CTCR0, 87 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN | 88 MT_TMAC_CTCR0_INS_DDLMT_EN, 89 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN | 90 MT_TMAC_CTCR0_INS_DDLMT_EN); 91 92 mt7615_mcu_set_rts_thresh(&dev->phy, 0x92b); 93 mt7615_mac_set_scs(dev, true); 94 95 mt76_rmw(dev, MT_AGG_SCR, MT_AGG_SCR_NLNAV_MID_PTEC_DIS, 96 MT_AGG_SCR_NLNAV_MID_PTEC_DIS); 97 98 mt76_wr(dev, MT_AGG_ARCR, 99 FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) | 100 MT_AGG_ARCR_RATE_DOWN_RATIO_EN | 101 FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) | 102 FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4)); 103 104 for (i = 0; i < MT7615_WTBL_SIZE; i++) 105 mt7615_mac_wtbl_update(dev, i, 106 MT_WTBL_UPDATE_ADM_COUNT_CLEAR); 107 108 mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_EN); 109 mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0, MT_WF_RMAC_MIB_RXTIME_EN); 110 111 /* disable hdr translation and hw AMSDU */ 112 mt76_wr(dev, MT_DMA_DCR0, 113 FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072) | 114 MT_DMA_DCR0_RX_VEC_DROP); 115 if (is_mt7663(&dev->mt76)) { 116 mt76_wr(dev, MT_CSR(0x010), 0x8208); 117 mt76_wr(dev, 0x44064, 0x2000000); 118 mt76_wr(dev, MT_WF_AGG(0x160), 0x5c341c02); 119 mt76_wr(dev, MT_WF_AGG(0x164), 0x70708040); 120 } else { 121 mt7615_init_mac_chain(dev, 1); 122 } 123 } 124 125 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev) 126 { 127 flush_work(&dev->mcu_work); 128 129 return test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); 130 } 131 132 static void mt7615_init_work(struct work_struct *work) 133 { 134 struct mt7615_dev *dev = container_of(work, struct mt7615_dev, mcu_work); 135 136 if (mt7615_mcu_init(dev)) 137 return; 138 139 mt7615_mcu_set_eeprom(dev); 140 mt7615_mac_init(dev); 141 mt7615_phy_init(dev); 142 mt7615_mcu_del_wtbl_all(dev); 143 } 144 145 static int mt7615_init_hardware(struct mt7615_dev *dev) 146 { 147 int ret, idx; 148 149 mt76_wr(dev, MT_INT_SOURCE_CSR, ~0); 150 151 INIT_WORK(&dev->mcu_work, mt7615_init_work); 152 spin_lock_init(&dev->token_lock); 153 idr_init(&dev->token); 154 155 ret = mt7615_eeprom_init(dev); 156 if (ret < 0) 157 return ret; 158 159 ret = mt7615_dma_init(dev); 160 if (ret) 161 return ret; 162 163 set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state); 164 165 /* Beacon and mgmt frames should occupy wcid 0 */ 166 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7615_WTBL_STA - 1); 167 if (idx) 168 return -ENOSPC; 169 170 dev->mt76.global_wcid.idx = idx; 171 dev->mt76.global_wcid.hw_key_idx = -1; 172 rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid); 173 174 return 0; 175 } 176 177 #define CCK_RATE(_idx, _rate) { \ 178 .bitrate = _rate, \ 179 .flags = IEEE80211_RATE_SHORT_PREAMBLE, \ 180 .hw_value = (MT_PHY_TYPE_CCK << 8) | (_idx), \ 181 .hw_value_short = (MT_PHY_TYPE_CCK << 8) | (4 + (_idx)), \ 182 } 183 184 #define OFDM_RATE(_idx, _rate) { \ 185 .bitrate = _rate, \ 186 .hw_value = (MT_PHY_TYPE_OFDM << 8) | (_idx), \ 187 .hw_value_short = (MT_PHY_TYPE_OFDM << 8) | (_idx), \ 188 } 189 190 static struct ieee80211_rate mt7615_rates[] = { 191 CCK_RATE(0, 10), 192 CCK_RATE(1, 20), 193 CCK_RATE(2, 55), 194 CCK_RATE(3, 110), 195 OFDM_RATE(11, 60), 196 OFDM_RATE(15, 90), 197 OFDM_RATE(10, 120), 198 OFDM_RATE(14, 180), 199 OFDM_RATE(9, 240), 200 OFDM_RATE(13, 360), 201 OFDM_RATE(8, 480), 202 OFDM_RATE(12, 540), 203 }; 204 205 static const struct ieee80211_iface_limit if_limits[] = { 206 { 207 .max = 1, 208 .types = BIT(NL80211_IFTYPE_ADHOC) 209 }, { 210 .max = MT7615_MAX_INTERFACES, 211 .types = BIT(NL80211_IFTYPE_AP) | 212 #ifdef CONFIG_MAC80211_MESH 213 BIT(NL80211_IFTYPE_MESH_POINT) | 214 #endif 215 BIT(NL80211_IFTYPE_STATION) 216 } 217 }; 218 219 static const struct ieee80211_iface_combination if_comb[] = { 220 { 221 .limits = if_limits, 222 .n_limits = ARRAY_SIZE(if_limits), 223 .max_interfaces = 4, 224 .num_different_channels = 1, 225 .beacon_int_infra_match = true, 226 } 227 }; 228 229 static void 230 mt7615_led_set_config(struct led_classdev *led_cdev, 231 u8 delay_on, u8 delay_off) 232 { 233 struct mt7615_dev *dev; 234 struct mt76_dev *mt76; 235 u32 val, addr; 236 237 mt76 = container_of(led_cdev, struct mt76_dev, led_cdev); 238 dev = container_of(mt76, struct mt7615_dev, mt76); 239 val = FIELD_PREP(MT_LED_STATUS_DURATION, 0xffff) | 240 FIELD_PREP(MT_LED_STATUS_OFF, delay_off) | 241 FIELD_PREP(MT_LED_STATUS_ON, delay_on); 242 243 addr = mt7615_reg_map(dev, MT_LED_STATUS_0(mt76->led_pin)); 244 mt76_wr(dev, addr, val); 245 addr = mt7615_reg_map(dev, MT_LED_STATUS_1(mt76->led_pin)); 246 mt76_wr(dev, addr, val); 247 248 val = MT_LED_CTRL_REPLAY(mt76->led_pin) | 249 MT_LED_CTRL_KICK(mt76->led_pin); 250 if (mt76->led_al) 251 val |= MT_LED_CTRL_POLARITY(mt76->led_pin); 252 addr = mt7615_reg_map(dev, MT_LED_CTRL); 253 mt76_wr(dev, addr, val); 254 } 255 256 static int 257 mt7615_led_set_blink(struct led_classdev *led_cdev, 258 unsigned long *delay_on, 259 unsigned long *delay_off) 260 { 261 u8 delta_on, delta_off; 262 263 delta_off = max_t(u8, *delay_off / 10, 1); 264 delta_on = max_t(u8, *delay_on / 10, 1); 265 266 mt7615_led_set_config(led_cdev, delta_on, delta_off); 267 268 return 0; 269 } 270 271 static void 272 mt7615_led_set_brightness(struct led_classdev *led_cdev, 273 enum led_brightness brightness) 274 { 275 if (!brightness) 276 mt7615_led_set_config(led_cdev, 0, 0xff); 277 else 278 mt7615_led_set_config(led_cdev, 0xff, 0); 279 } 280 281 static void 282 mt7615_init_txpower(struct mt7615_dev *dev, 283 struct ieee80211_supported_band *sband) 284 { 285 int i, n_chains = hweight8(dev->mphy.antenna_mask), target_chains; 286 u8 *eep = (u8 *)dev->mt76.eeprom.data; 287 enum nl80211_band band = sband->band; 288 int delta = mt76_tx_power_nss_delta(n_chains); 289 290 target_chains = mt7615_ext_pa_enabled(dev, band) ? 1 : n_chains; 291 for (i = 0; i < sband->n_channels; i++) { 292 struct ieee80211_channel *chan = &sband->channels[i]; 293 u8 target_power = 0; 294 int j; 295 296 for (j = 0; j < target_chains; j++) { 297 int index; 298 299 index = mt7615_eeprom_get_power_index(dev, chan, j); 300 target_power = max(target_power, eep[index]); 301 } 302 303 target_power = DIV_ROUND_UP(target_power + delta, 2); 304 chan->max_power = min_t(int, chan->max_reg_power, 305 target_power); 306 chan->orig_mpwr = target_power; 307 } 308 } 309 310 static void 311 mt7615_regd_notifier(struct wiphy *wiphy, 312 struct regulatory_request *request) 313 { 314 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 315 struct mt7615_dev *dev = mt7615_hw_dev(hw); 316 struct mt76_phy *mphy = hw->priv; 317 struct mt7615_phy *phy = mphy->priv; 318 struct cfg80211_chan_def *chandef = &mphy->chandef; 319 320 dev->mt76.region = request->dfs_region; 321 322 if (!(chandef->chan->flags & IEEE80211_CHAN_RADAR)) 323 return; 324 325 mt7615_dfs_init_radar_detector(phy); 326 } 327 328 static void 329 mt7615_init_wiphy(struct ieee80211_hw *hw) 330 { 331 struct mt7615_phy *phy = mt7615_hw_phy(hw); 332 struct wiphy *wiphy = hw->wiphy; 333 334 hw->queues = 4; 335 hw->max_rates = 3; 336 hw->max_report_rates = 7; 337 hw->max_rate_tries = 11; 338 339 phy->slottime = 9; 340 341 hw->sta_data_size = sizeof(struct mt7615_sta); 342 hw->vif_data_size = sizeof(struct mt7615_vif); 343 344 wiphy->iface_combinations = if_comb; 345 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb); 346 wiphy->reg_notifier = mt7615_regd_notifier; 347 348 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS); 349 350 ieee80211_hw_set(hw, TX_STATUS_NO_AMPDU_LEN); 351 352 if (is_mt7615(&phy->dev->mt76)) 353 hw->max_tx_fragments = MT_TXP_MAX_BUF_NUM; 354 else 355 hw->max_tx_fragments = MT_HW_TXP_MAX_BUF_NUM; 356 } 357 358 static void 359 mt7615_cap_dbdc_enable(struct mt7615_dev *dev) 360 { 361 dev->mphy.sband_5g.sband.vht_cap.cap &= 362 ~(IEEE80211_VHT_CAP_SHORT_GI_160 | 363 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ); 364 if (dev->chainmask == 0xf) 365 dev->mphy.antenna_mask = dev->chainmask >> 2; 366 else 367 dev->mphy.antenna_mask = dev->chainmask >> 1; 368 dev->phy.chainmask = dev->mphy.antenna_mask; 369 dev->mphy.hw->wiphy->available_antennas_rx = dev->phy.chainmask; 370 dev->mphy.hw->wiphy->available_antennas_tx = dev->phy.chainmask; 371 mt76_set_stream_caps(&dev->mt76, true); 372 } 373 374 static void 375 mt7615_cap_dbdc_disable(struct mt7615_dev *dev) 376 { 377 dev->mphy.sband_5g.sband.vht_cap.cap |= 378 IEEE80211_VHT_CAP_SHORT_GI_160 | 379 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ; 380 dev->mphy.antenna_mask = dev->chainmask; 381 dev->phy.chainmask = dev->chainmask; 382 dev->mphy.hw->wiphy->available_antennas_rx = dev->chainmask; 383 dev->mphy.hw->wiphy->available_antennas_tx = dev->chainmask; 384 mt76_set_stream_caps(&dev->mt76, true); 385 } 386 387 int mt7615_register_ext_phy(struct mt7615_dev *dev) 388 { 389 struct mt7615_phy *phy = mt7615_ext_phy(dev); 390 struct mt76_phy *mphy; 391 int ret; 392 393 if (!is_mt7615(&dev->mt76)) 394 return -EOPNOTSUPP; 395 396 if (test_bit(MT76_STATE_RUNNING, &dev->mphy.state)) 397 return -EINVAL; 398 399 if (phy) 400 return 0; 401 402 mt7615_cap_dbdc_enable(dev); 403 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7615_ops); 404 if (!mphy) 405 return -ENOMEM; 406 407 phy = mphy->priv; 408 phy->dev = dev; 409 phy->mt76 = mphy; 410 phy->chainmask = dev->chainmask & ~dev->phy.chainmask; 411 mphy->antenna_mask = BIT(hweight8(phy->chainmask)) - 1; 412 mt7615_init_wiphy(mphy->hw); 413 414 /* 415 * Make the secondary PHY MAC address local without overlapping with 416 * the usual MAC address allocation scheme on multiple virtual interfaces 417 */ 418 mphy->hw->wiphy->perm_addr[0] |= 2; 419 mphy->hw->wiphy->perm_addr[0] ^= BIT(7); 420 421 /* second phy can only handle 5 GHz */ 422 mphy->sband_2g.sband.n_channels = 0; 423 mphy->hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL; 424 425 /* The second interface does not get any packets unless it has a vif */ 426 ieee80211_hw_set(mphy->hw, WANT_MONITOR_VIF); 427 428 ret = mt76_register_phy(mphy); 429 if (ret) 430 ieee80211_free_hw(mphy->hw); 431 432 return ret; 433 } 434 435 void mt7615_unregister_ext_phy(struct mt7615_dev *dev) 436 { 437 struct mt7615_phy *phy = mt7615_ext_phy(dev); 438 struct mt76_phy *mphy = dev->mt76.phy2; 439 440 if (!phy) 441 return; 442 443 mt7615_cap_dbdc_disable(dev); 444 mt76_unregister_phy(mphy); 445 ieee80211_free_hw(mphy->hw); 446 } 447 448 void mt7615_init_device(struct mt7615_dev *dev) 449 { 450 struct ieee80211_hw *hw = mt76_hw(dev); 451 452 dev->phy.dev = dev; 453 dev->phy.mt76 = &dev->mt76.phy; 454 dev->mt76.phy.priv = &dev->phy; 455 INIT_DELAYED_WORK(&dev->mt76.mac_work, mt7615_mac_work); 456 INIT_LIST_HEAD(&dev->sta_poll_list); 457 spin_lock_init(&dev->sta_poll_lock); 458 init_waitqueue_head(&dev->reset_wait); 459 INIT_WORK(&dev->reset_work, mt7615_mac_reset_work); 460 461 mt7615_init_wiphy(hw); 462 dev->mphy.sband_2g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING; 463 dev->mphy.sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING; 464 dev->mphy.sband_5g.sband.vht_cap.cap |= 465 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 | 466 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK; 467 mt7615_cap_dbdc_disable(dev); 468 dev->phy.dfs_state = -1; 469 } 470 471 int mt7615_register_device(struct mt7615_dev *dev) 472 { 473 int ret; 474 475 mt7615_init_device(dev); 476 477 /* init led callbacks */ 478 if (IS_ENABLED(CONFIG_MT76_LEDS)) { 479 dev->mt76.led_cdev.brightness_set = mt7615_led_set_brightness; 480 dev->mt76.led_cdev.blink_set = mt7615_led_set_blink; 481 } 482 483 ret = mt7622_wmac_init(dev); 484 if (ret) 485 return ret; 486 487 ret = mt7615_init_hardware(dev); 488 if (ret) 489 return ret; 490 491 ret = mt76_register_device(&dev->mt76, true, mt7615_rates, 492 ARRAY_SIZE(mt7615_rates)); 493 if (ret) 494 return ret; 495 496 ieee80211_queue_work(mt76_hw(dev), &dev->mcu_work); 497 mt7615_init_txpower(dev, &dev->mphy.sband_2g.sband); 498 mt7615_init_txpower(dev, &dev->mphy.sband_5g.sband); 499 500 return mt7615_init_debugfs(dev); 501 } 502 503 void mt7615_unregister_device(struct mt7615_dev *dev) 504 { 505 struct mt76_txwi_cache *txwi; 506 bool mcu_running; 507 int id; 508 509 mcu_running = mt7615_wait_for_mcu_init(dev); 510 511 mt7615_unregister_ext_phy(dev); 512 mt76_unregister_device(&dev->mt76); 513 if (mcu_running) 514 mt7615_mcu_exit(dev); 515 mt7615_dma_cleanup(dev); 516 517 spin_lock_bh(&dev->token_lock); 518 idr_for_each_entry(&dev->token, txwi, id) { 519 mt7615_txp_skb_unmap(&dev->mt76, txwi); 520 if (txwi->skb) 521 dev_kfree_skb_any(txwi->skb); 522 mt76_put_txwi(&dev->mt76, txwi); 523 } 524 spin_unlock_bh(&dev->token_lock); 525 idr_destroy(&dev->token); 526 527 mt76_free_device(&dev->mt76); 528 } 529