1 // SPDX-License-Identifier: ISC 2 3 #include "mt7615.h" 4 5 static int 6 mt7615_radar_pattern_set(void *data, u64 val) 7 { 8 struct mt7615_dev *dev = data; 9 int err; 10 11 if (!mt7615_wait_for_mcu_init(dev)) 12 return 0; 13 14 mt7615_mutex_acquire(dev); 15 err = mt7615_mcu_rdd_send_pattern(dev); 16 mt7615_mutex_release(dev); 17 18 return err; 19 } 20 21 DEFINE_DEBUGFS_ATTRIBUTE(fops_radar_pattern, NULL, 22 mt7615_radar_pattern_set, "%lld\n"); 23 24 static int mt7615_config(void *data, u64 val) 25 { 26 struct mt7615_dev *dev = data; 27 int ret; 28 29 mt7615_mutex_acquire(dev); 30 ret = mt76_connac_mcu_chip_config(&dev->mt76); 31 mt7615_mutex_release(dev); 32 33 return ret; 34 } 35 36 DEFINE_DEBUGFS_ATTRIBUTE(fops_config, NULL, mt7615_config, "%lld\n"); 37 38 static int 39 mt7615_scs_set(void *data, u64 val) 40 { 41 struct mt7615_dev *dev = data; 42 struct mt7615_phy *ext_phy; 43 44 if (!mt7615_wait_for_mcu_init(dev)) 45 return 0; 46 47 mt7615_mac_set_scs(&dev->phy, val); 48 ext_phy = mt7615_ext_phy(dev); 49 if (ext_phy) 50 mt7615_mac_set_scs(ext_phy, val); 51 52 return 0; 53 } 54 55 static int 56 mt7615_scs_get(void *data, u64 *val) 57 { 58 struct mt7615_dev *dev = data; 59 60 *val = dev->phy.scs_en; 61 62 return 0; 63 } 64 65 DEFINE_DEBUGFS_ATTRIBUTE(fops_scs, mt7615_scs_get, 66 mt7615_scs_set, "%lld\n"); 67 68 static int 69 mt7615_pm_set(void *data, u64 val) 70 { 71 struct mt7615_dev *dev = data; 72 int ret = 0; 73 74 if (!mt7615_wait_for_mcu_init(dev)) 75 return 0; 76 77 if (!mt7615_firmware_offload(dev) || !mt76_is_mmio(&dev->mt76)) 78 return -EOPNOTSUPP; 79 80 mt7615_mutex_acquire(dev); 81 82 if (dev->phy.n_beacon_vif) { 83 ret = -EBUSY; 84 goto out; 85 } 86 87 dev->pm.enable = val; 88 out: 89 mt7615_mutex_release(dev); 90 91 return ret; 92 } 93 94 static int 95 mt7615_pm_get(void *data, u64 *val) 96 { 97 struct mt7615_dev *dev = data; 98 99 *val = dev->pm.enable; 100 101 return 0; 102 } 103 104 DEFINE_DEBUGFS_ATTRIBUTE(fops_pm, mt7615_pm_get, mt7615_pm_set, "%lld\n"); 105 106 static int 107 mt7615_pm_idle_timeout_set(void *data, u64 val) 108 { 109 struct mt7615_dev *dev = data; 110 111 dev->pm.idle_timeout = msecs_to_jiffies(val); 112 113 return 0; 114 } 115 116 static int 117 mt7615_pm_idle_timeout_get(void *data, u64 *val) 118 { 119 struct mt7615_dev *dev = data; 120 121 *val = jiffies_to_msecs(dev->pm.idle_timeout); 122 123 return 0; 124 } 125 126 DEFINE_DEBUGFS_ATTRIBUTE(fops_pm_idle_timeout, mt7615_pm_idle_timeout_get, 127 mt7615_pm_idle_timeout_set, "%lld\n"); 128 129 static int 130 mt7615_dbdc_set(void *data, u64 val) 131 { 132 struct mt7615_dev *dev = data; 133 134 if (!mt7615_wait_for_mcu_init(dev)) 135 return 0; 136 137 if (val) 138 mt7615_register_ext_phy(dev); 139 else 140 mt7615_unregister_ext_phy(dev); 141 142 return 0; 143 } 144 145 static int 146 mt7615_dbdc_get(void *data, u64 *val) 147 { 148 struct mt7615_dev *dev = data; 149 150 *val = !!mt7615_ext_phy(dev); 151 152 return 0; 153 } 154 155 DEFINE_DEBUGFS_ATTRIBUTE(fops_dbdc, mt7615_dbdc_get, 156 mt7615_dbdc_set, "%lld\n"); 157 158 static int 159 mt7615_fw_debug_set(void *data, u64 val) 160 { 161 struct mt7615_dev *dev = data; 162 163 if (!mt7615_wait_for_mcu_init(dev)) 164 return 0; 165 166 dev->fw_debug = val; 167 168 mt7615_mutex_acquire(dev); 169 mt7615_mcu_fw_log_2_host(dev, dev->fw_debug ? 2 : 0); 170 mt7615_mutex_release(dev); 171 172 return 0; 173 } 174 175 static int 176 mt7615_fw_debug_get(void *data, u64 *val) 177 { 178 struct mt7615_dev *dev = data; 179 180 *val = dev->fw_debug; 181 182 return 0; 183 } 184 185 DEFINE_DEBUGFS_ATTRIBUTE(fops_fw_debug, mt7615_fw_debug_get, 186 mt7615_fw_debug_set, "%lld\n"); 187 188 static int 189 mt7615_reset_test_set(void *data, u64 val) 190 { 191 struct mt7615_dev *dev = data; 192 struct sk_buff *skb; 193 194 if (!mt7615_wait_for_mcu_init(dev)) 195 return 0; 196 197 skb = alloc_skb(1, GFP_KERNEL); 198 if (!skb) 199 return -ENOMEM; 200 201 skb_put(skb, 1); 202 203 mt7615_mutex_acquire(dev); 204 mt76_tx_queue_skb_raw(dev, dev->mphy.q_tx[0], skb, 0); 205 mt7615_mutex_release(dev); 206 207 return 0; 208 } 209 210 DEFINE_DEBUGFS_ATTRIBUTE(fops_reset_test, NULL, 211 mt7615_reset_test_set, "%lld\n"); 212 213 static void 214 mt7615_ampdu_stat_read_phy(struct mt7615_phy *phy, 215 struct seq_file *file) 216 { 217 struct mt7615_dev *dev = file->private; 218 u32 reg = is_mt7663(&dev->mt76) ? MT_MIB_ARNG(0) : MT_AGG_ASRCR0; 219 bool ext_phy = phy != &dev->phy; 220 int bound[7], i, range; 221 222 if (!phy) 223 return; 224 225 range = mt76_rr(dev, reg); 226 for (i = 0; i < 4; i++) 227 bound[i] = MT_AGG_ASRCR_RANGE(range, i) + 1; 228 229 range = mt76_rr(dev, reg + 4); 230 for (i = 0; i < 3; i++) 231 bound[i + 4] = MT_AGG_ASRCR_RANGE(range, i) + 1; 232 233 seq_printf(file, "\nPhy %d\n", ext_phy); 234 235 seq_printf(file, "Length: %8d | ", bound[0]); 236 for (i = 0; i < ARRAY_SIZE(bound) - 1; i++) 237 seq_printf(file, "%3d -%3d | ", 238 bound[i], bound[i + 1]); 239 seq_puts(file, "\nCount: "); 240 241 range = ext_phy ? ARRAY_SIZE(dev->mt76.aggr_stats) / 2 : 0; 242 for (i = 0; i < ARRAY_SIZE(bound); i++) 243 seq_printf(file, "%8d | ", dev->mt76.aggr_stats[i + range]); 244 seq_puts(file, "\n"); 245 246 seq_printf(file, "BA miss count: %d\n", phy->mib.ba_miss_cnt); 247 seq_printf(file, "PER: %ld.%1ld%%\n", 248 phy->mib.aggr_per / 10, phy->mib.aggr_per % 10); 249 } 250 251 static int 252 mt7615_ampdu_stat_show(struct seq_file *file, void *data) 253 { 254 struct mt7615_dev *dev = file->private; 255 256 mt7615_mutex_acquire(dev); 257 258 mt7615_ampdu_stat_read_phy(&dev->phy, file); 259 mt7615_ampdu_stat_read_phy(mt7615_ext_phy(dev), file); 260 261 mt7615_mutex_release(dev); 262 263 return 0; 264 } 265 266 DEFINE_SHOW_ATTRIBUTE(mt7615_ampdu_stat); 267 268 static void 269 mt7615_radio_read_phy(struct mt7615_phy *phy, struct seq_file *s) 270 { 271 struct mt7615_dev *dev = dev_get_drvdata(s->private); 272 bool ext_phy = phy != &dev->phy; 273 274 if (!phy) 275 return; 276 277 seq_printf(s, "Radio %d sensitivity: ofdm=%d cck=%d\n", ext_phy, 278 phy->ofdm_sensitivity, phy->cck_sensitivity); 279 seq_printf(s, "Radio %d false CCA: ofdm=%d cck=%d\n", ext_phy, 280 phy->false_cca_ofdm, phy->false_cca_cck); 281 } 282 283 static int 284 mt7615_radio_read(struct seq_file *s, void *data) 285 { 286 struct mt7615_dev *dev = dev_get_drvdata(s->private); 287 288 mt7615_radio_read_phy(&dev->phy, s); 289 mt7615_radio_read_phy(mt7615_ext_phy(dev), s); 290 291 return 0; 292 } 293 294 static int mt7615_read_temperature(struct seq_file *s, void *data) 295 { 296 struct mt7615_dev *dev = dev_get_drvdata(s->private); 297 int temp; 298 299 if (!mt7615_wait_for_mcu_init(dev)) 300 return 0; 301 302 /* cpu */ 303 mt7615_mutex_acquire(dev); 304 temp = mt7615_mcu_get_temperature(dev, 0); 305 mt7615_mutex_release(dev); 306 307 seq_printf(s, "Temperature: %d\n", temp); 308 309 return 0; 310 } 311 312 static int 313 mt7615_queues_acq(struct seq_file *s, void *data) 314 { 315 struct mt7615_dev *dev = dev_get_drvdata(s->private); 316 int i; 317 318 mt7615_mutex_acquire(dev); 319 320 for (i = 0; i < 16; i++) { 321 int j, wmm_idx = i % MT7615_MAX_WMM_SETS; 322 int acs = i / MT7615_MAX_WMM_SETS; 323 u32 ctrl, val, qlen = 0; 324 325 val = mt76_rr(dev, MT_PLE_AC_QEMPTY(acs, wmm_idx)); 326 ctrl = BIT(31) | BIT(15) | (acs << 8); 327 328 for (j = 0; j < 32; j++) { 329 if (val & BIT(j)) 330 continue; 331 332 mt76_wr(dev, MT_PLE_FL_Q0_CTRL, 333 ctrl | (j + (wmm_idx << 5))); 334 qlen += mt76_get_field(dev, MT_PLE_FL_Q3_CTRL, 335 GENMASK(11, 0)); 336 } 337 seq_printf(s, "AC%d%d: queued=%d\n", wmm_idx, acs, qlen); 338 } 339 340 mt7615_mutex_release(dev); 341 342 return 0; 343 } 344 345 static int 346 mt7615_queues_read(struct seq_file *s, void *data) 347 { 348 struct mt7615_dev *dev = dev_get_drvdata(s->private); 349 struct { 350 struct mt76_queue *q; 351 char *queue; 352 } queue_map[] = { 353 { dev->mphy.q_tx[MT_TXQ_BE], "PDMA0" }, 354 { dev->mt76.q_mcu[MT_MCUQ_WM], "MCUQ" }, 355 { dev->mt76.q_mcu[MT_MCUQ_FWDL], "MCUFWQ" }, 356 }; 357 int i; 358 359 for (i = 0; i < ARRAY_SIZE(queue_map); i++) { 360 struct mt76_queue *q = queue_map[i].q; 361 362 seq_printf(s, 363 "%s: queued=%d head=%d tail=%d\n", 364 queue_map[i].queue, q->queued, q->head, 365 q->tail); 366 } 367 368 return 0; 369 } 370 371 static int 372 mt7615_rf_reg_set(void *data, u64 val) 373 { 374 struct mt7615_dev *dev = data; 375 376 mt7615_rf_wr(dev, dev->debugfs_rf_wf, dev->debugfs_rf_reg, val); 377 378 return 0; 379 } 380 381 static int 382 mt7615_rf_reg_get(void *data, u64 *val) 383 { 384 struct mt7615_dev *dev = data; 385 386 *val = mt7615_rf_rr(dev, dev->debugfs_rf_wf, dev->debugfs_rf_reg); 387 388 return 0; 389 } 390 391 DEFINE_DEBUGFS_ATTRIBUTE(fops_rf_reg, mt7615_rf_reg_get, mt7615_rf_reg_set, 392 "0x%08llx\n"); 393 394 static ssize_t 395 mt7615_ext_mac_addr_read(struct file *file, char __user *userbuf, 396 size_t count, loff_t *ppos) 397 { 398 struct mt7615_dev *dev = file->private_data; 399 char buf[32 * ((ETH_ALEN * 3) + 4) + 1]; 400 u8 addr[ETH_ALEN]; 401 int ofs = 0; 402 int i; 403 404 for (i = 0; i < 32; i++) { 405 if (!(dev->muar_mask & BIT(i))) 406 continue; 407 408 mt76_wr(dev, MT_WF_RMAC_MAR1, 409 FIELD_PREP(MT_WF_RMAC_MAR1_IDX, i * 2) | 410 MT_WF_RMAC_MAR1_START); 411 put_unaligned_le32(mt76_rr(dev, MT_WF_RMAC_MAR0), addr); 412 put_unaligned_le16((mt76_rr(dev, MT_WF_RMAC_MAR1) & 413 MT_WF_RMAC_MAR1_ADDR), addr + 4); 414 ofs += snprintf(buf + ofs, sizeof(buf) - ofs, "%d=%pM\n", i, addr); 415 } 416 417 return simple_read_from_buffer(userbuf, count, ppos, buf, ofs); 418 } 419 420 static ssize_t 421 mt7615_ext_mac_addr_write(struct file *file, const char __user *userbuf, 422 size_t count, loff_t *ppos) 423 { 424 struct mt7615_dev *dev = file->private_data; 425 unsigned long idx = 0; 426 u8 addr[ETH_ALEN]; 427 char buf[32]; 428 char *p; 429 430 if (count > sizeof(buf)) 431 return -EINVAL; 432 433 if (copy_from_user(buf, userbuf, count)) 434 return -EFAULT; 435 436 buf[sizeof(buf) - 1] = '\0'; 437 438 p = strchr(buf, '='); 439 if (p) { 440 *p = 0; 441 p++; 442 443 if (kstrtoul(buf, 0, &idx) || idx > 31) 444 return -EINVAL; 445 } else { 446 idx = 0; 447 p = buf; 448 } 449 450 if (!mac_pton(p, addr)) 451 return -EINVAL; 452 453 if (is_valid_ether_addr(addr)) { 454 dev->muar_mask |= BIT(idx); 455 } else { 456 memset(addr, 0, sizeof(addr)); 457 dev->muar_mask &= ~BIT(idx); 458 } 459 460 mt76_rmw_field(dev, MT_WF_RMAC_MORE(0), MT_WF_RMAC_MORE_MUAR_MODE, 1); 461 mt76_wr(dev, MT_WF_RMAC_MAR0, get_unaligned_le32(addr)); 462 mt76_wr(dev, MT_WF_RMAC_MAR1, 463 get_unaligned_le16(addr + 4) | 464 FIELD_PREP(MT_WF_RMAC_MAR1_IDX, idx * 2) | 465 MT_WF_RMAC_MAR1_START | 466 MT_WF_RMAC_MAR1_WRITE); 467 468 mt76_rmw_field(dev, MT_WF_RMAC_MORE(0), MT_WF_RMAC_MORE_MUAR_MODE, !!dev->muar_mask); 469 470 return count; 471 } 472 473 static const struct file_operations fops_ext_mac_addr = { 474 .open = simple_open, 475 .llseek = generic_file_llseek, 476 .read = mt7615_ext_mac_addr_read, 477 .write = mt7615_ext_mac_addr_write, 478 .owner = THIS_MODULE, 479 }; 480 481 static int 482 mt7663s_sched_quota_read(struct seq_file *s, void *data) 483 { 484 struct mt7615_dev *dev = dev_get_drvdata(s->private); 485 struct mt76_sdio *sdio = &dev->mt76.sdio; 486 487 seq_printf(s, "pse_data_quota\t%d\n", sdio->sched.pse_data_quota); 488 seq_printf(s, "ple_data_quota\t%d\n", sdio->sched.ple_data_quota); 489 seq_printf(s, "pse_mcu_quota\t%d\n", sdio->sched.pse_mcu_quota); 490 seq_printf(s, "sched_deficit\t%d\n", sdio->sched.deficit); 491 492 return 0; 493 } 494 495 int mt7615_init_debugfs(struct mt7615_dev *dev) 496 { 497 struct dentry *dir; 498 499 dir = mt76_register_debugfs(&dev->mt76); 500 if (!dir) 501 return -ENOMEM; 502 503 if (is_mt7615(&dev->mt76)) 504 debugfs_create_devm_seqfile(dev->mt76.dev, "xmit-queues", dir, 505 mt7615_queues_read); 506 else 507 debugfs_create_devm_seqfile(dev->mt76.dev, "xmit-queues", dir, 508 mt76_queues_read); 509 debugfs_create_devm_seqfile(dev->mt76.dev, "acq", dir, 510 mt7615_queues_acq); 511 debugfs_create_file("ampdu_stat", 0400, dir, dev, &mt7615_ampdu_stat_fops); 512 debugfs_create_file("scs", 0600, dir, dev, &fops_scs); 513 debugfs_create_file("dbdc", 0600, dir, dev, &fops_dbdc); 514 debugfs_create_file("fw_debug", 0600, dir, dev, &fops_fw_debug); 515 debugfs_create_file("runtime-pm", 0600, dir, dev, &fops_pm); 516 debugfs_create_file("idle-timeout", 0600, dir, dev, 517 &fops_pm_idle_timeout); 518 debugfs_create_devm_seqfile(dev->mt76.dev, "radio", dir, 519 mt7615_radio_read); 520 debugfs_create_u32("dfs_hw_pattern", 0400, dir, &dev->hw_pattern); 521 /* test pattern knobs */ 522 debugfs_create_u8("pattern_len", 0600, dir, 523 &dev->radar_pattern.n_pulses); 524 debugfs_create_u32("pulse_period", 0600, dir, 525 &dev->radar_pattern.period); 526 debugfs_create_u16("pulse_width", 0600, dir, 527 &dev->radar_pattern.width); 528 debugfs_create_u16("pulse_power", 0600, dir, 529 &dev->radar_pattern.power); 530 debugfs_create_file("radar_trigger", 0200, dir, dev, 531 &fops_radar_pattern); 532 debugfs_create_file("reset_test", 0200, dir, dev, 533 &fops_reset_test); 534 debugfs_create_devm_seqfile(dev->mt76.dev, "temperature", dir, 535 mt7615_read_temperature); 536 debugfs_create_file("ext_mac_addr", 0600, dir, dev, &fops_ext_mac_addr); 537 538 debugfs_create_u32("rf_wfidx", 0600, dir, &dev->debugfs_rf_wf); 539 debugfs_create_u32("rf_regidx", 0600, dir, &dev->debugfs_rf_reg); 540 debugfs_create_file_unsafe("rf_regval", 0600, dir, dev, 541 &fops_rf_reg); 542 if (is_mt7663(&dev->mt76)) 543 debugfs_create_file("chip_config", 0600, dir, dev, 544 &fops_config); 545 if (mt76_is_sdio(&dev->mt76)) 546 debugfs_create_devm_seqfile(dev->mt76.dev, "sched-quota", dir, 547 mt7663s_sched_quota_read); 548 549 return 0; 550 } 551 EXPORT_SYMBOL_GPL(mt7615_init_debugfs); 552