1 /* SPDX-License-Identifier: ISC */ 2 3 #include <linux/etherdevice.h> 4 #include <linux/platform_device.h> 5 #include <linux/pci.h> 6 #include <linux/module.h> 7 #include "mt7603.h" 8 #include "mac.h" 9 #include "eeprom.h" 10 11 static int 12 mt7603_start(struct ieee80211_hw *hw) 13 { 14 struct mt7603_dev *dev = hw->priv; 15 16 mt7603_mac_start(dev); 17 dev->survey_time = ktime_get_boottime(); 18 set_bit(MT76_STATE_RUNNING, &dev->mt76.state); 19 mt7603_mac_work(&dev->mt76.mac_work.work); 20 21 return 0; 22 } 23 24 static void 25 mt7603_stop(struct ieee80211_hw *hw) 26 { 27 struct mt7603_dev *dev = hw->priv; 28 29 clear_bit(MT76_STATE_RUNNING, &dev->mt76.state); 30 cancel_delayed_work_sync(&dev->mt76.mac_work); 31 mt7603_mac_stop(dev); 32 } 33 34 static int 35 mt7603_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 36 { 37 struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv; 38 struct mt7603_dev *dev = hw->priv; 39 struct mt76_txq *mtxq; 40 u8 bc_addr[ETH_ALEN]; 41 int idx; 42 int ret = 0; 43 44 mutex_lock(&dev->mt76.mutex); 45 46 mvif->idx = ffs(~dev->vif_mask) - 1; 47 if (mvif->idx >= MT7603_MAX_INTERFACES) { 48 ret = -ENOSPC; 49 goto out; 50 } 51 52 mt76_wr(dev, MT_MAC_ADDR0(mvif->idx), 53 get_unaligned_le32(vif->addr)); 54 mt76_wr(dev, MT_MAC_ADDR1(mvif->idx), 55 (get_unaligned_le16(vif->addr + 4) | 56 MT_MAC_ADDR1_VALID)); 57 58 if (vif->type == NL80211_IFTYPE_AP) { 59 mt76_wr(dev, MT_BSSID0(mvif->idx), 60 get_unaligned_le32(vif->addr)); 61 mt76_wr(dev, MT_BSSID1(mvif->idx), 62 (get_unaligned_le16(vif->addr + 4) | 63 MT_BSSID1_VALID)); 64 } 65 66 idx = MT7603_WTBL_RESERVED - 1 - mvif->idx; 67 dev->vif_mask |= BIT(mvif->idx); 68 mvif->sta.wcid.idx = idx; 69 mvif->sta.wcid.hw_key_idx = -1; 70 71 eth_broadcast_addr(bc_addr); 72 mt7603_wtbl_init(dev, idx, mvif->idx, bc_addr); 73 74 mtxq = (struct mt76_txq *)vif->txq->drv_priv; 75 mtxq->wcid = &mvif->sta.wcid; 76 mt76_txq_init(&dev->mt76, vif->txq); 77 rcu_assign_pointer(dev->mt76.wcid[idx], &mvif->sta.wcid); 78 79 out: 80 mutex_unlock(&dev->mt76.mutex); 81 82 return ret; 83 } 84 85 static void 86 mt7603_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 87 { 88 struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv; 89 struct mt7603_dev *dev = hw->priv; 90 int idx = mvif->sta.wcid.idx; 91 92 mt76_wr(dev, MT_MAC_ADDR0(mvif->idx), 0); 93 mt76_wr(dev, MT_MAC_ADDR1(mvif->idx), 0); 94 mt76_wr(dev, MT_BSSID0(mvif->idx), 0); 95 mt76_wr(dev, MT_BSSID1(mvif->idx), 0); 96 mt7603_beacon_set_timer(dev, mvif->idx, 0); 97 98 rcu_assign_pointer(dev->mt76.wcid[idx], NULL); 99 mt76_txq_remove(&dev->mt76, vif->txq); 100 101 mutex_lock(&dev->mt76.mutex); 102 dev->vif_mask &= ~BIT(mvif->idx); 103 mutex_unlock(&dev->mt76.mutex); 104 } 105 106 static void 107 mt7603_init_edcca(struct mt7603_dev *dev) 108 { 109 /* Set lower signal level to -65dBm */ 110 mt76_rmw_field(dev, MT_RXTD(8), MT_RXTD_8_LOWER_SIGNAL, 0x23); 111 112 /* clear previous energy detect monitor results */ 113 mt76_rr(dev, MT_MIB_STAT_ED); 114 115 if (dev->ed_monitor) 116 mt76_set(dev, MT_MIB_CTL, MT_MIB_CTL_ED_TIME); 117 else 118 mt76_clear(dev, MT_MIB_CTL, MT_MIB_CTL_ED_TIME); 119 120 dev->ed_strict_mode = 0xff; 121 dev->ed_strong_signal = 0; 122 dev->ed_time = ktime_get_boottime(); 123 124 mt7603_edcca_set_strict(dev, false); 125 } 126 127 static int 128 mt7603_set_channel(struct mt7603_dev *dev, struct cfg80211_chan_def *def) 129 { 130 u8 *rssi_data = (u8 *)dev->mt76.eeprom.data; 131 int idx, ret; 132 u8 bw = MT_BW_20; 133 bool failed = false; 134 135 cancel_delayed_work_sync(&dev->mt76.mac_work); 136 tasklet_disable(&dev->mt76.pre_tbtt_tasklet); 137 138 mutex_lock(&dev->mt76.mutex); 139 set_bit(MT76_RESET, &dev->mt76.state); 140 141 mt7603_beacon_set_timer(dev, -1, 0); 142 mt76_set_channel(&dev->mt76); 143 mt7603_mac_stop(dev); 144 145 if (def->width == NL80211_CHAN_WIDTH_40) 146 bw = MT_BW_40; 147 148 dev->mt76.chandef = *def; 149 mt76_rmw_field(dev, MT_AGG_BWCR, MT_AGG_BWCR_BW, bw); 150 ret = mt7603_mcu_set_channel(dev); 151 if (ret) { 152 failed = true; 153 goto out; 154 } 155 156 if (def->chan->band == NL80211_BAND_5GHZ) { 157 idx = 1; 158 rssi_data += MT_EE_RSSI_OFFSET_5G; 159 } else { 160 idx = 0; 161 rssi_data += MT_EE_RSSI_OFFSET_2G; 162 } 163 164 memcpy(dev->rssi_offset, rssi_data, sizeof(dev->rssi_offset)); 165 166 idx |= (def->chan - 167 mt76_hw(dev)->wiphy->bands[def->chan->band]->channels) << 1; 168 mt76_wr(dev, MT_WF_RMAC_CH_FREQ, idx); 169 mt7603_mac_set_timing(dev); 170 mt7603_mac_start(dev); 171 172 clear_bit(MT76_RESET, &dev->mt76.state); 173 174 mt76_txq_schedule_all(&dev->mt76); 175 176 ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mt76.mac_work, 177 MT7603_WATCHDOG_TIME); 178 179 /* reset channel stats */ 180 mt76_clear(dev, MT_MIB_CTL, MT_MIB_CTL_READ_CLR_DIS); 181 mt76_set(dev, MT_MIB_CTL, 182 MT_MIB_CTL_CCA_NAV_TX | MT_MIB_CTL_PSCCA_TIME); 183 mt76_rr(dev, MT_MIB_STAT_PSCCA); 184 mt7603_cca_stats_reset(dev); 185 186 dev->survey_time = ktime_get_boottime(); 187 188 mt7603_init_edcca(dev); 189 190 out: 191 if (!(mt76_hw(dev)->conf.flags & IEEE80211_CONF_OFFCHANNEL)) 192 mt7603_beacon_set_timer(dev, -1, dev->mt76.beacon_int); 193 mutex_unlock(&dev->mt76.mutex); 194 195 tasklet_enable(&dev->mt76.pre_tbtt_tasklet); 196 197 if (failed) 198 mt7603_mac_work(&dev->mt76.mac_work.work); 199 200 return ret; 201 } 202 203 static int 204 mt7603_config(struct ieee80211_hw *hw, u32 changed) 205 { 206 struct mt7603_dev *dev = hw->priv; 207 int ret = 0; 208 209 if (changed & (IEEE80211_CONF_CHANGE_CHANNEL | 210 IEEE80211_CONF_CHANGE_POWER)) 211 ret = mt7603_set_channel(dev, &hw->conf.chandef); 212 213 if (changed & IEEE80211_CONF_CHANGE_MONITOR) { 214 mutex_lock(&dev->mt76.mutex); 215 216 if (!(hw->conf.flags & IEEE80211_CONF_MONITOR)) 217 dev->rxfilter |= MT_WF_RFCR_DROP_OTHER_UC; 218 else 219 dev->rxfilter &= ~MT_WF_RFCR_DROP_OTHER_UC; 220 221 mt76_wr(dev, MT_WF_RFCR, dev->rxfilter); 222 223 mutex_unlock(&dev->mt76.mutex); 224 } 225 226 return ret; 227 } 228 229 static void 230 mt7603_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags, 231 unsigned int *total_flags, u64 multicast) 232 { 233 struct mt7603_dev *dev = hw->priv; 234 u32 flags = 0; 235 236 #define MT76_FILTER(_flag, _hw) do { \ 237 flags |= *total_flags & FIF_##_flag; \ 238 dev->rxfilter &= ~(_hw); \ 239 dev->rxfilter |= !(flags & FIF_##_flag) * (_hw); \ 240 } while (0) 241 242 dev->rxfilter &= ~(MT_WF_RFCR_DROP_OTHER_BSS | 243 MT_WF_RFCR_DROP_OTHER_BEACON | 244 MT_WF_RFCR_DROP_FRAME_REPORT | 245 MT_WF_RFCR_DROP_PROBEREQ | 246 MT_WF_RFCR_DROP_MCAST_FILTERED | 247 MT_WF_RFCR_DROP_MCAST | 248 MT_WF_RFCR_DROP_BCAST | 249 MT_WF_RFCR_DROP_DUPLICATE | 250 MT_WF_RFCR_DROP_A2_BSSID | 251 MT_WF_RFCR_DROP_UNWANTED_CTL | 252 MT_WF_RFCR_DROP_STBC_MULTI); 253 254 MT76_FILTER(OTHER_BSS, MT_WF_RFCR_DROP_OTHER_TIM | 255 MT_WF_RFCR_DROP_A3_MAC | 256 MT_WF_RFCR_DROP_A3_BSSID); 257 258 MT76_FILTER(FCSFAIL, MT_WF_RFCR_DROP_FCSFAIL); 259 260 MT76_FILTER(CONTROL, MT_WF_RFCR_DROP_CTS | 261 MT_WF_RFCR_DROP_RTS | 262 MT_WF_RFCR_DROP_CTL_RSV | 263 MT_WF_RFCR_DROP_NDPA); 264 265 *total_flags = flags; 266 mt76_wr(dev, MT_WF_RFCR, dev->rxfilter); 267 } 268 269 static void 270 mt7603_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 271 struct ieee80211_bss_conf *info, u32 changed) 272 { 273 struct mt7603_dev *dev = hw->priv; 274 struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv; 275 276 mutex_lock(&dev->mt76.mutex); 277 278 if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BSSID)) { 279 if (info->assoc || info->ibss_joined) { 280 mt76_wr(dev, MT_BSSID0(mvif->idx), 281 get_unaligned_le32(info->bssid)); 282 mt76_wr(dev, MT_BSSID1(mvif->idx), 283 (get_unaligned_le16(info->bssid + 4) | 284 MT_BSSID1_VALID)); 285 } else { 286 mt76_wr(dev, MT_BSSID0(mvif->idx), 0); 287 mt76_wr(dev, MT_BSSID1(mvif->idx), 0); 288 } 289 } 290 291 if (changed & BSS_CHANGED_ERP_SLOT) { 292 int slottime = info->use_short_slot ? 9 : 20; 293 294 if (slottime != dev->slottime) { 295 dev->slottime = slottime; 296 mt7603_mac_set_timing(dev); 297 } 298 } 299 300 if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON_INT)) { 301 int beacon_int = !!info->enable_beacon * info->beacon_int; 302 303 tasklet_disable(&dev->mt76.pre_tbtt_tasklet); 304 mt7603_beacon_set_timer(dev, mvif->idx, beacon_int); 305 tasklet_enable(&dev->mt76.pre_tbtt_tasklet); 306 } 307 308 mutex_unlock(&dev->mt76.mutex); 309 } 310 311 int 312 mt7603_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, 313 struct ieee80211_sta *sta) 314 { 315 struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76); 316 struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv; 317 struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv; 318 int idx; 319 int ret = 0; 320 321 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7603_WTBL_STA - 1); 322 if (idx < 0) 323 return -ENOSPC; 324 325 __skb_queue_head_init(&msta->psq); 326 msta->ps = ~0; 327 msta->smps = ~0; 328 msta->wcid.sta = 1; 329 msta->wcid.idx = idx; 330 mt7603_wtbl_init(dev, idx, mvif->idx, sta->addr); 331 mt7603_wtbl_set_ps(dev, msta, false); 332 333 if (vif->type == NL80211_IFTYPE_AP) 334 set_bit(MT_WCID_FLAG_CHECK_PS, &msta->wcid.flags); 335 336 return ret; 337 } 338 339 void 340 mt7603_sta_assoc(struct mt76_dev *mdev, struct ieee80211_vif *vif, 341 struct ieee80211_sta *sta) 342 { 343 struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76); 344 345 mt7603_wtbl_update_cap(dev, sta); 346 } 347 348 void 349 mt7603_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 350 struct ieee80211_sta *sta) 351 { 352 struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76); 353 struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv; 354 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv; 355 356 spin_lock_bh(&dev->ps_lock); 357 __skb_queue_purge(&msta->psq); 358 mt7603_filter_tx(dev, wcid->idx, true); 359 spin_unlock_bh(&dev->ps_lock); 360 361 mt7603_wtbl_clear(dev, wcid->idx); 362 } 363 364 static void 365 mt7603_ps_tx_list(struct mt7603_dev *dev, struct sk_buff_head *list) 366 { 367 struct sk_buff *skb; 368 369 while ((skb = __skb_dequeue(list)) != NULL) 370 mt76_tx_queue_skb_raw(dev, skb_get_queue_mapping(skb), 371 skb, 0); 372 } 373 374 void 375 mt7603_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps) 376 { 377 struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76); 378 struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv; 379 struct sk_buff_head list; 380 381 mt76_stop_tx_queues(&dev->mt76, sta, true); 382 mt7603_wtbl_set_ps(dev, msta, ps); 383 if (ps) 384 return; 385 386 __skb_queue_head_init(&list); 387 388 spin_lock_bh(&dev->ps_lock); 389 skb_queue_splice_tail_init(&msta->psq, &list); 390 spin_unlock_bh(&dev->ps_lock); 391 392 mt7603_ps_tx_list(dev, &list); 393 } 394 395 static void 396 mt7603_ps_set_more_data(struct sk_buff *skb) 397 { 398 struct ieee80211_hdr *hdr; 399 400 hdr = (struct ieee80211_hdr *) &skb->data[MT_TXD_SIZE]; 401 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA); 402 } 403 404 static void 405 mt7603_release_buffered_frames(struct ieee80211_hw *hw, 406 struct ieee80211_sta *sta, 407 u16 tids, int nframes, 408 enum ieee80211_frame_release_type reason, 409 bool more_data) 410 { 411 struct mt7603_dev *dev = hw->priv; 412 struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv; 413 struct sk_buff_head list; 414 struct sk_buff *skb, *tmp; 415 416 __skb_queue_head_init(&list); 417 418 mt7603_wtbl_set_ps(dev, msta, false); 419 420 spin_lock_bh(&dev->ps_lock); 421 skb_queue_walk_safe(&msta->psq, skb, tmp) { 422 if (!nframes) 423 break; 424 425 if (!(tids & BIT(skb->priority))) 426 continue; 427 428 skb_set_queue_mapping(skb, MT_TXQ_PSD); 429 __skb_unlink(skb, &msta->psq); 430 mt7603_ps_set_more_data(skb); 431 __skb_queue_tail(&list, skb); 432 nframes--; 433 } 434 spin_unlock_bh(&dev->ps_lock); 435 436 if (!skb_queue_empty(&list)) 437 ieee80211_sta_eosp(sta); 438 439 mt7603_ps_tx_list(dev, &list); 440 441 if (nframes) 442 mt76_release_buffered_frames(hw, sta, tids, nframes, reason, 443 more_data); 444 } 445 446 static int 447 mt7603_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 448 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 449 struct ieee80211_key_conf *key) 450 { 451 struct mt7603_dev *dev = hw->priv; 452 struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv; 453 struct mt7603_sta *msta = sta ? (struct mt7603_sta *)sta->drv_priv : 454 &mvif->sta; 455 struct mt76_wcid *wcid = &msta->wcid; 456 int idx = key->keyidx; 457 458 /* fall back to sw encryption for unsupported ciphers */ 459 switch (key->cipher) { 460 case WLAN_CIPHER_SUITE_TKIP: 461 case WLAN_CIPHER_SUITE_CCMP: 462 break; 463 default: 464 return -EOPNOTSUPP; 465 } 466 467 /* 468 * The hardware does not support per-STA RX GTK, fall back 469 * to software mode for these. 470 */ 471 if ((vif->type == NL80211_IFTYPE_ADHOC || 472 vif->type == NL80211_IFTYPE_MESH_POINT) && 473 (key->cipher == WLAN_CIPHER_SUITE_TKIP || 474 key->cipher == WLAN_CIPHER_SUITE_CCMP) && 475 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) 476 return -EOPNOTSUPP; 477 478 if (cmd == SET_KEY) { 479 key->hw_key_idx = wcid->idx; 480 wcid->hw_key_idx = idx; 481 } else { 482 if (idx == wcid->hw_key_idx) 483 wcid->hw_key_idx = -1; 484 485 key = NULL; 486 } 487 mt76_wcid_key_setup(&dev->mt76, wcid, key); 488 489 return mt7603_wtbl_set_key(dev, wcid->idx, key); 490 } 491 492 static int 493 mt7603_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue, 494 const struct ieee80211_tx_queue_params *params) 495 { 496 struct mt7603_dev *dev = hw->priv; 497 u16 cw_min = (1 << 5) - 1; 498 u16 cw_max = (1 << 10) - 1; 499 u32 val; 500 501 queue = dev->mt76.q_tx[queue].q->hw_idx; 502 503 if (params->cw_min) 504 cw_min = params->cw_min; 505 if (params->cw_max) 506 cw_max = params->cw_max; 507 508 mutex_lock(&dev->mt76.mutex); 509 mt7603_mac_stop(dev); 510 511 val = mt76_rr(dev, MT_WMM_TXOP(queue)); 512 val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(queue)); 513 val |= params->txop << MT_WMM_TXOP_SHIFT(queue); 514 mt76_wr(dev, MT_WMM_TXOP(queue), val); 515 516 val = mt76_rr(dev, MT_WMM_AIFSN); 517 val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(queue)); 518 val |= params->aifs << MT_WMM_AIFSN_SHIFT(queue); 519 mt76_wr(dev, MT_WMM_AIFSN, val); 520 521 val = mt76_rr(dev, MT_WMM_CWMIN); 522 val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(queue)); 523 val |= cw_min << MT_WMM_CWMIN_SHIFT(queue); 524 mt76_wr(dev, MT_WMM_CWMIN, val); 525 526 val = mt76_rr(dev, MT_WMM_CWMAX(queue)); 527 val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(queue)); 528 val |= cw_max << MT_WMM_CWMAX_SHIFT(queue); 529 mt76_wr(dev, MT_WMM_CWMAX(queue), val); 530 531 mt7603_mac_start(dev); 532 mutex_unlock(&dev->mt76.mutex); 533 534 return 0; 535 } 536 537 static void 538 mt7603_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 539 const u8 *mac) 540 { 541 struct mt7603_dev *dev = hw->priv; 542 543 set_bit(MT76_SCANNING, &dev->mt76.state); 544 } 545 546 static void 547 mt7603_sw_scan_complete(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 548 { 549 struct mt7603_dev *dev = hw->priv; 550 551 clear_bit(MT76_SCANNING, &dev->mt76.state); 552 } 553 554 static void 555 mt7603_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 556 u32 queues, bool drop) 557 { 558 } 559 560 static int 561 mt7603_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 562 struct ieee80211_ampdu_params *params) 563 { 564 enum ieee80211_ampdu_mlme_action action = params->action; 565 struct mt7603_dev *dev = hw->priv; 566 struct ieee80211_sta *sta = params->sta; 567 struct ieee80211_txq *txq = sta->txq[params->tid]; 568 struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv; 569 u16 tid = params->tid; 570 u16 *ssn = ¶ms->ssn; 571 u8 ba_size = params->buf_size; 572 struct mt76_txq *mtxq; 573 574 if (!txq) 575 return -EINVAL; 576 577 mtxq = (struct mt76_txq *)txq->drv_priv; 578 579 switch (action) { 580 case IEEE80211_AMPDU_RX_START: 581 mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid, *ssn, 582 params->buf_size); 583 mt7603_mac_rx_ba_reset(dev, sta->addr, tid); 584 break; 585 case IEEE80211_AMPDU_RX_STOP: 586 mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid); 587 break; 588 case IEEE80211_AMPDU_TX_OPERATIONAL: 589 mtxq->aggr = true; 590 mtxq->send_bar = false; 591 mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, ba_size); 592 break; 593 case IEEE80211_AMPDU_TX_STOP_FLUSH: 594 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: 595 mtxq->aggr = false; 596 ieee80211_send_bar(vif, sta->addr, tid, mtxq->agg_ssn); 597 mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, -1); 598 break; 599 case IEEE80211_AMPDU_TX_START: 600 mtxq->agg_ssn = IEEE80211_SN_TO_SEQ(*ssn); 601 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); 602 break; 603 case IEEE80211_AMPDU_TX_STOP_CONT: 604 mtxq->aggr = false; 605 mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, -1); 606 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); 607 break; 608 } 609 610 return 0; 611 } 612 613 static void 614 mt7603_sta_rate_tbl_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 615 struct ieee80211_sta *sta) 616 { 617 struct mt7603_dev *dev = hw->priv; 618 struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv; 619 struct ieee80211_sta_rates *sta_rates = rcu_dereference(sta->rates); 620 int i; 621 622 spin_lock_bh(&dev->mt76.lock); 623 for (i = 0; i < ARRAY_SIZE(msta->rates); i++) { 624 msta->rates[i].idx = sta_rates->rate[i].idx; 625 msta->rates[i].count = sta_rates->rate[i].count; 626 msta->rates[i].flags = sta_rates->rate[i].flags; 627 628 if (msta->rates[i].idx < 0 || !msta->rates[i].count) 629 break; 630 } 631 msta->n_rates = i; 632 mt7603_wtbl_set_rates(dev, msta, NULL, msta->rates); 633 msta->rate_probe = false; 634 mt7603_wtbl_set_smps(dev, msta, 635 sta->smps_mode == IEEE80211_SMPS_DYNAMIC); 636 spin_unlock_bh(&dev->mt76.lock); 637 } 638 639 static void 640 mt7603_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class) 641 { 642 struct mt7603_dev *dev = hw->priv; 643 644 dev->coverage_class = coverage_class; 645 mt7603_mac_set_timing(dev); 646 } 647 648 static void mt7603_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control, 649 struct sk_buff *skb) 650 { 651 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 652 struct ieee80211_vif *vif = info->control.vif; 653 struct mt7603_dev *dev = hw->priv; 654 struct mt76_wcid *wcid = &dev->global_sta.wcid; 655 656 if (control->sta) { 657 struct mt7603_sta *msta; 658 659 msta = (struct mt7603_sta *)control->sta->drv_priv; 660 wcid = &msta->wcid; 661 } else if (vif) { 662 struct mt7603_vif *mvif; 663 664 mvif = (struct mt7603_vif *)vif->drv_priv; 665 wcid = &mvif->sta.wcid; 666 } 667 668 mt76_tx(&dev->mt76, control->sta, wcid, skb); 669 } 670 671 const struct ieee80211_ops mt7603_ops = { 672 .tx = mt7603_tx, 673 .start = mt7603_start, 674 .stop = mt7603_stop, 675 .add_interface = mt7603_add_interface, 676 .remove_interface = mt7603_remove_interface, 677 .config = mt7603_config, 678 .configure_filter = mt7603_configure_filter, 679 .bss_info_changed = mt7603_bss_info_changed, 680 .sta_state = mt76_sta_state, 681 .set_key = mt7603_set_key, 682 .conf_tx = mt7603_conf_tx, 683 .sw_scan_start = mt7603_sw_scan, 684 .sw_scan_complete = mt7603_sw_scan_complete, 685 .flush = mt7603_flush, 686 .ampdu_action = mt7603_ampdu_action, 687 .get_txpower = mt76_get_txpower, 688 .wake_tx_queue = mt76_wake_tx_queue, 689 .sta_rate_tbl_update = mt7603_sta_rate_tbl_update, 690 .release_buffered_frames = mt7603_release_buffered_frames, 691 .set_coverage_class = mt7603_set_coverage_class, 692 .set_tim = mt76_set_tim, 693 .get_survey = mt76_get_survey, 694 }; 695 696 MODULE_LICENSE("Dual BSD/GPL"); 697 698 static int __init mt7603_init(void) 699 { 700 int ret; 701 702 ret = platform_driver_register(&mt76_wmac_driver); 703 if (ret) 704 return ret; 705 706 #ifdef CONFIG_PCI 707 ret = pci_register_driver(&mt7603_pci_driver); 708 if (ret) 709 platform_driver_unregister(&mt76_wmac_driver); 710 #endif 711 return ret; 712 } 713 714 static void __exit mt7603_exit(void) 715 { 716 #ifdef CONFIG_PCI 717 pci_unregister_driver(&mt7603_pci_driver); 718 #endif 719 platform_driver_unregister(&mt76_wmac_driver); 720 } 721 722 module_init(mt7603_init); 723 module_exit(mt7603_exit); 724