1 // SPDX-License-Identifier: ISC
2 
3 #include <linux/etherdevice.h>
4 #include <linux/platform_device.h>
5 #include <linux/pci.h>
6 #include <linux/module.h>
7 #include "mt7603.h"
8 #include "mac.h"
9 #include "eeprom.h"
10 
11 static int
12 mt7603_start(struct ieee80211_hw *hw)
13 {
14 	struct mt7603_dev *dev = hw->priv;
15 
16 	mt7603_mac_reset_counters(dev);
17 	mt7603_mac_start(dev);
18 	dev->mphy.survey_time = ktime_get_boottime();
19 	set_bit(MT76_STATE_RUNNING, &dev->mphy.state);
20 	mt7603_mac_work(&dev->mphy.mac_work.work);
21 
22 	return 0;
23 }
24 
25 static void
26 mt7603_stop(struct ieee80211_hw *hw)
27 {
28 	struct mt7603_dev *dev = hw->priv;
29 
30 	clear_bit(MT76_STATE_RUNNING, &dev->mphy.state);
31 	cancel_delayed_work_sync(&dev->mphy.mac_work);
32 	mt7603_mac_stop(dev);
33 }
34 
35 static int
36 mt7603_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
37 {
38 	struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
39 	struct mt7603_dev *dev = hw->priv;
40 	struct mt76_txq *mtxq;
41 	u8 bc_addr[ETH_ALEN];
42 	int idx;
43 	int ret = 0;
44 
45 	mutex_lock(&dev->mt76.mutex);
46 
47 	mvif->idx = __ffs64(~dev->mt76.vif_mask);
48 	if (mvif->idx >= MT7603_MAX_INTERFACES) {
49 		ret = -ENOSPC;
50 		goto out;
51 	}
52 
53 	mt76_wr(dev, MT_MAC_ADDR0(mvif->idx),
54 		get_unaligned_le32(vif->addr));
55 	mt76_wr(dev, MT_MAC_ADDR1(mvif->idx),
56 		(get_unaligned_le16(vif->addr + 4) |
57 		 MT_MAC_ADDR1_VALID));
58 
59 	if (vif->type == NL80211_IFTYPE_AP) {
60 		mt76_wr(dev, MT_BSSID0(mvif->idx),
61 			get_unaligned_le32(vif->addr));
62 		mt76_wr(dev, MT_BSSID1(mvif->idx),
63 			(get_unaligned_le16(vif->addr + 4) |
64 			 MT_BSSID1_VALID));
65 	}
66 
67 	idx = MT7603_WTBL_RESERVED - 1 - mvif->idx;
68 	dev->mt76.vif_mask |= BIT_ULL(mvif->idx);
69 	INIT_LIST_HEAD(&mvif->sta.wcid.poll_list);
70 	mvif->sta.wcid.idx = idx;
71 	mvif->sta.wcid.hw_key_idx = -1;
72 	mvif->sta.vif = mvif;
73 	mt76_packet_id_init(&mvif->sta.wcid);
74 
75 	eth_broadcast_addr(bc_addr);
76 	mt7603_wtbl_init(dev, idx, mvif->idx, bc_addr);
77 
78 	mtxq = (struct mt76_txq *)vif->txq->drv_priv;
79 	mtxq->wcid = idx;
80 	rcu_assign_pointer(dev->mt76.wcid[idx], &mvif->sta.wcid);
81 
82 out:
83 	mutex_unlock(&dev->mt76.mutex);
84 
85 	return ret;
86 }
87 
88 static void
89 mt7603_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
90 {
91 	struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
92 	struct mt7603_sta *msta = &mvif->sta;
93 	struct mt7603_dev *dev = hw->priv;
94 	int idx = msta->wcid.idx;
95 
96 	mt76_wr(dev, MT_MAC_ADDR0(mvif->idx), 0);
97 	mt76_wr(dev, MT_MAC_ADDR1(mvif->idx), 0);
98 	mt76_wr(dev, MT_BSSID0(mvif->idx), 0);
99 	mt76_wr(dev, MT_BSSID1(mvif->idx), 0);
100 	mt7603_beacon_set_timer(dev, mvif->idx, 0);
101 
102 	rcu_assign_pointer(dev->mt76.wcid[idx], NULL);
103 
104 	spin_lock_bh(&dev->mt76.sta_poll_lock);
105 	if (!list_empty(&msta->wcid.poll_list))
106 		list_del_init(&msta->wcid.poll_list);
107 	spin_unlock_bh(&dev->mt76.sta_poll_lock);
108 
109 	mutex_lock(&dev->mt76.mutex);
110 	dev->mt76.vif_mask &= ~BIT_ULL(mvif->idx);
111 	mutex_unlock(&dev->mt76.mutex);
112 
113 	mt76_packet_id_flush(&dev->mt76, &mvif->sta.wcid);
114 }
115 
116 void mt7603_init_edcca(struct mt7603_dev *dev)
117 {
118 	/* Set lower signal level to -65dBm */
119 	mt76_rmw_field(dev, MT_RXTD(8), MT_RXTD_8_LOWER_SIGNAL, 0x23);
120 
121 	/* clear previous energy detect monitor results */
122 	mt76_rr(dev, MT_MIB_STAT_ED);
123 
124 	if (dev->ed_monitor)
125 		mt76_set(dev, MT_MIB_CTL, MT_MIB_CTL_ED_TIME);
126 	else
127 		mt76_clear(dev, MT_MIB_CTL, MT_MIB_CTL_ED_TIME);
128 
129 	dev->ed_strict_mode = 0xff;
130 	dev->ed_strong_signal = 0;
131 	dev->ed_time = ktime_get_boottime();
132 
133 	mt7603_edcca_set_strict(dev, false);
134 }
135 
136 static int
137 mt7603_set_channel(struct ieee80211_hw *hw, struct cfg80211_chan_def *def)
138 {
139 	struct mt7603_dev *dev = hw->priv;
140 	u8 *rssi_data = (u8 *)dev->mt76.eeprom.data;
141 	int idx, ret;
142 	u8 bw = MT_BW_20;
143 	bool failed = false;
144 
145 	ieee80211_stop_queues(hw);
146 	cancel_delayed_work_sync(&dev->mphy.mac_work);
147 	tasklet_disable(&dev->mt76.pre_tbtt_tasklet);
148 
149 	mutex_lock(&dev->mt76.mutex);
150 	set_bit(MT76_RESET, &dev->mphy.state);
151 
152 	mt7603_beacon_set_timer(dev, -1, 0);
153 	mt76_set_channel(&dev->mphy);
154 	mt7603_mac_stop(dev);
155 
156 	if (def->width == NL80211_CHAN_WIDTH_40)
157 		bw = MT_BW_40;
158 
159 	dev->mphy.chandef = *def;
160 	mt76_rmw_field(dev, MT_AGG_BWCR, MT_AGG_BWCR_BW, bw);
161 	ret = mt7603_mcu_set_channel(dev);
162 	if (ret) {
163 		failed = true;
164 		goto out;
165 	}
166 
167 	if (def->chan->band == NL80211_BAND_5GHZ) {
168 		idx = 1;
169 		rssi_data += MT_EE_RSSI_OFFSET_5G;
170 	} else {
171 		idx = 0;
172 		rssi_data += MT_EE_RSSI_OFFSET_2G;
173 	}
174 
175 	memcpy(dev->rssi_offset, rssi_data, sizeof(dev->rssi_offset));
176 
177 	idx |= (def->chan -
178 		mt76_hw(dev)->wiphy->bands[def->chan->band]->channels) << 1;
179 	mt76_wr(dev, MT_WF_RMAC_CH_FREQ, idx);
180 	mt7603_mac_set_timing(dev);
181 	mt7603_mac_start(dev);
182 
183 	clear_bit(MT76_RESET, &dev->mphy.state);
184 
185 	mt76_txq_schedule_all(&dev->mphy);
186 
187 	ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mphy.mac_work,
188 				     msecs_to_jiffies(MT7603_WATCHDOG_TIME));
189 
190 	/* reset channel stats */
191 	mt76_clear(dev, MT_MIB_CTL, MT_MIB_CTL_READ_CLR_DIS);
192 	mt76_set(dev, MT_MIB_CTL,
193 		 MT_MIB_CTL_CCA_NAV_TX | MT_MIB_CTL_PSCCA_TIME);
194 	mt76_rr(dev, MT_MIB_STAT_CCA);
195 	mt7603_cca_stats_reset(dev);
196 
197 	dev->mphy.survey_time = ktime_get_boottime();
198 
199 	mt7603_init_edcca(dev);
200 
201 out:
202 	if (!(mt76_hw(dev)->conf.flags & IEEE80211_CONF_OFFCHANNEL))
203 		mt7603_beacon_set_timer(dev, -1, dev->mt76.beacon_int);
204 	mutex_unlock(&dev->mt76.mutex);
205 
206 	tasklet_enable(&dev->mt76.pre_tbtt_tasklet);
207 
208 	if (failed)
209 		mt7603_mac_work(&dev->mphy.mac_work.work);
210 
211 	ieee80211_wake_queues(hw);
212 
213 	return ret;
214 }
215 
216 static int mt7603_set_sar_specs(struct ieee80211_hw *hw,
217 				const struct cfg80211_sar_specs *sar)
218 {
219 	struct mt7603_dev *dev = hw->priv;
220 	struct mt76_phy *mphy = &dev->mphy;
221 	int err;
222 
223 	if (!cfg80211_chandef_valid(&mphy->chandef))
224 		return -EINVAL;
225 
226 	err = mt76_init_sar_power(hw, sar);
227 	if (err)
228 		return err;
229 
230 	return mt7603_set_channel(hw, &mphy->chandef);
231 }
232 
233 static int
234 mt7603_config(struct ieee80211_hw *hw, u32 changed)
235 {
236 	struct mt7603_dev *dev = hw->priv;
237 	int ret = 0;
238 
239 	if (changed & (IEEE80211_CONF_CHANGE_CHANNEL |
240 		       IEEE80211_CONF_CHANGE_POWER))
241 		ret = mt7603_set_channel(hw, &hw->conf.chandef);
242 
243 	if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
244 		mutex_lock(&dev->mt76.mutex);
245 
246 		if (!(hw->conf.flags & IEEE80211_CONF_MONITOR))
247 			dev->rxfilter |= MT_WF_RFCR_DROP_OTHER_UC;
248 		else
249 			dev->rxfilter &= ~MT_WF_RFCR_DROP_OTHER_UC;
250 
251 		mt76_wr(dev, MT_WF_RFCR, dev->rxfilter);
252 
253 		mutex_unlock(&dev->mt76.mutex);
254 	}
255 
256 	return ret;
257 }
258 
259 static void
260 mt7603_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
261 			unsigned int *total_flags, u64 multicast)
262 {
263 	struct mt7603_dev *dev = hw->priv;
264 	u32 flags = 0;
265 
266 #define MT76_FILTER(_flag, _hw) do { \
267 		flags |= *total_flags & FIF_##_flag;			\
268 		dev->rxfilter &= ~(_hw);				\
269 		dev->rxfilter |= !(flags & FIF_##_flag) * (_hw);	\
270 	} while (0)
271 
272 	dev->rxfilter &= ~(MT_WF_RFCR_DROP_OTHER_BSS |
273 			   MT_WF_RFCR_DROP_OTHER_BEACON |
274 			   MT_WF_RFCR_DROP_FRAME_REPORT |
275 			   MT_WF_RFCR_DROP_PROBEREQ |
276 			   MT_WF_RFCR_DROP_MCAST_FILTERED |
277 			   MT_WF_RFCR_DROP_MCAST |
278 			   MT_WF_RFCR_DROP_BCAST |
279 			   MT_WF_RFCR_DROP_DUPLICATE |
280 			   MT_WF_RFCR_DROP_A2_BSSID |
281 			   MT_WF_RFCR_DROP_UNWANTED_CTL |
282 			   MT_WF_RFCR_DROP_STBC_MULTI);
283 
284 	MT76_FILTER(OTHER_BSS, MT_WF_RFCR_DROP_OTHER_TIM |
285 			       MT_WF_RFCR_DROP_A3_MAC |
286 			       MT_WF_RFCR_DROP_A3_BSSID);
287 
288 	MT76_FILTER(FCSFAIL, MT_WF_RFCR_DROP_FCSFAIL);
289 
290 	MT76_FILTER(CONTROL, MT_WF_RFCR_DROP_CTS |
291 			     MT_WF_RFCR_DROP_RTS |
292 			     MT_WF_RFCR_DROP_CTL_RSV |
293 			     MT_WF_RFCR_DROP_NDPA);
294 
295 	*total_flags = flags;
296 	mt76_wr(dev, MT_WF_RFCR, dev->rxfilter);
297 }
298 
299 static void
300 mt7603_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
301 			struct ieee80211_bss_conf *info, u64 changed)
302 {
303 	struct mt7603_dev *dev = hw->priv;
304 	struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
305 
306 	mutex_lock(&dev->mt76.mutex);
307 
308 	if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BSSID)) {
309 		if (vif->cfg.assoc || vif->cfg.ibss_joined) {
310 			mt76_wr(dev, MT_BSSID0(mvif->idx),
311 				get_unaligned_le32(info->bssid));
312 			mt76_wr(dev, MT_BSSID1(mvif->idx),
313 				(get_unaligned_le16(info->bssid + 4) |
314 				 MT_BSSID1_VALID));
315 		} else {
316 			mt76_wr(dev, MT_BSSID0(mvif->idx), 0);
317 			mt76_wr(dev, MT_BSSID1(mvif->idx), 0);
318 		}
319 	}
320 
321 	if (changed & BSS_CHANGED_ERP_SLOT) {
322 		int slottime = info->use_short_slot ? 9 : 20;
323 
324 		if (slottime != dev->slottime) {
325 			dev->slottime = slottime;
326 			mt7603_mac_set_timing(dev);
327 		}
328 	}
329 
330 	if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON_INT)) {
331 		int beacon_int = !!info->enable_beacon * info->beacon_int;
332 
333 		tasklet_disable(&dev->mt76.pre_tbtt_tasklet);
334 		mt7603_beacon_set_timer(dev, mvif->idx, beacon_int);
335 		tasklet_enable(&dev->mt76.pre_tbtt_tasklet);
336 	}
337 
338 	mutex_unlock(&dev->mt76.mutex);
339 }
340 
341 int
342 mt7603_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
343 	       struct ieee80211_sta *sta)
344 {
345 	struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
346 	struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
347 	struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
348 	int idx;
349 	int ret = 0;
350 
351 	idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7603_WTBL_STA - 1);
352 	if (idx < 0)
353 		return -ENOSPC;
354 
355 	INIT_LIST_HEAD(&msta->wcid.poll_list);
356 	__skb_queue_head_init(&msta->psq);
357 	msta->ps = ~0;
358 	msta->smps = ~0;
359 	msta->wcid.sta = 1;
360 	msta->wcid.idx = idx;
361 	msta->vif = mvif;
362 	mt7603_wtbl_init(dev, idx, mvif->idx, sta->addr);
363 	mt7603_wtbl_set_ps(dev, msta, false);
364 
365 	if (vif->type == NL80211_IFTYPE_AP)
366 		set_bit(MT_WCID_FLAG_CHECK_PS, &msta->wcid.flags);
367 
368 	return ret;
369 }
370 
371 void
372 mt7603_sta_assoc(struct mt76_dev *mdev, struct ieee80211_vif *vif,
373 		 struct ieee80211_sta *sta)
374 {
375 	struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
376 
377 	mt7603_wtbl_update_cap(dev, sta);
378 }
379 
380 void
381 mt7603_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
382 		  struct ieee80211_sta *sta)
383 {
384 	struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
385 	struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
386 	struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
387 	struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
388 
389 	spin_lock_bh(&dev->ps_lock);
390 	__skb_queue_purge(&msta->psq);
391 	mt7603_filter_tx(dev, mvif->idx, wcid->idx, true);
392 	spin_unlock_bh(&dev->ps_lock);
393 
394 	spin_lock_bh(&mdev->sta_poll_lock);
395 	if (!list_empty(&msta->wcid.poll_list))
396 		list_del_init(&msta->wcid.poll_list);
397 	spin_unlock_bh(&mdev->sta_poll_lock);
398 
399 	mt7603_wtbl_clear(dev, wcid->idx);
400 }
401 
402 static void
403 mt7603_ps_tx_list(struct mt7603_dev *dev, struct sk_buff_head *list)
404 {
405 	struct sk_buff *skb;
406 
407 	while ((skb = __skb_dequeue(list)) != NULL) {
408 		int qid = skb_get_queue_mapping(skb);
409 
410 		mt76_tx_queue_skb_raw(dev, dev->mphy.q_tx[qid], skb, 0);
411 	}
412 }
413 
414 void
415 mt7603_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps)
416 {
417 	struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
418 	struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
419 	struct sk_buff_head list;
420 
421 	mt76_stop_tx_queues(&dev->mphy, sta, true);
422 	mt7603_wtbl_set_ps(dev, msta, ps);
423 	if (ps)
424 		return;
425 
426 	__skb_queue_head_init(&list);
427 
428 	spin_lock_bh(&dev->ps_lock);
429 	skb_queue_splice_tail_init(&msta->psq, &list);
430 	spin_unlock_bh(&dev->ps_lock);
431 
432 	mt7603_ps_tx_list(dev, &list);
433 }
434 
435 static void
436 mt7603_ps_set_more_data(struct sk_buff *skb)
437 {
438 	struct ieee80211_hdr *hdr;
439 
440 	hdr = (struct ieee80211_hdr *)&skb->data[MT_TXD_SIZE];
441 	hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
442 }
443 
444 static void
445 mt7603_release_buffered_frames(struct ieee80211_hw *hw,
446 			       struct ieee80211_sta *sta,
447 			       u16 tids, int nframes,
448 			       enum ieee80211_frame_release_type reason,
449 			       bool more_data)
450 {
451 	struct mt7603_dev *dev = hw->priv;
452 	struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
453 	struct sk_buff_head list;
454 	struct sk_buff *skb, *tmp;
455 
456 	__skb_queue_head_init(&list);
457 
458 	mt7603_wtbl_set_ps(dev, msta, false);
459 
460 	spin_lock_bh(&dev->ps_lock);
461 	skb_queue_walk_safe(&msta->psq, skb, tmp) {
462 		if (!nframes)
463 			break;
464 
465 		if (!(tids & BIT(skb->priority)))
466 			continue;
467 
468 		skb_set_queue_mapping(skb, MT_TXQ_PSD);
469 		__skb_unlink(skb, &msta->psq);
470 		mt7603_ps_set_more_data(skb);
471 		__skb_queue_tail(&list, skb);
472 		nframes--;
473 	}
474 	spin_unlock_bh(&dev->ps_lock);
475 
476 	if (!skb_queue_empty(&list))
477 		ieee80211_sta_eosp(sta);
478 
479 	mt7603_ps_tx_list(dev, &list);
480 
481 	if (nframes)
482 		mt76_release_buffered_frames(hw, sta, tids, nframes, reason,
483 					     more_data);
484 }
485 
486 static int
487 mt7603_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
488 	       struct ieee80211_vif *vif, struct ieee80211_sta *sta,
489 	       struct ieee80211_key_conf *key)
490 {
491 	struct mt7603_dev *dev = hw->priv;
492 	struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
493 	struct mt7603_sta *msta = sta ? (struct mt7603_sta *)sta->drv_priv :
494 				  &mvif->sta;
495 	struct mt76_wcid *wcid = &msta->wcid;
496 	int idx = key->keyidx;
497 
498 	/* fall back to sw encryption for unsupported ciphers */
499 	switch (key->cipher) {
500 	case WLAN_CIPHER_SUITE_TKIP:
501 	case WLAN_CIPHER_SUITE_CCMP:
502 		break;
503 	default:
504 		return -EOPNOTSUPP;
505 	}
506 
507 	/*
508 	 * The hardware does not support per-STA RX GTK, fall back
509 	 * to software mode for these.
510 	 */
511 	if ((vif->type == NL80211_IFTYPE_ADHOC ||
512 	     vif->type == NL80211_IFTYPE_MESH_POINT) &&
513 	    (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
514 	     key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
515 	    !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
516 		return -EOPNOTSUPP;
517 
518 	if (cmd != SET_KEY) {
519 		if (idx == wcid->hw_key_idx)
520 			wcid->hw_key_idx = -1;
521 
522 		return 0;
523 	}
524 
525 	key->hw_key_idx = wcid->idx;
526 	wcid->hw_key_idx = idx;
527 	mt76_wcid_key_setup(&dev->mt76, wcid, key);
528 
529 	return mt7603_wtbl_set_key(dev, wcid->idx, key);
530 }
531 
532 static int
533 mt7603_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
534 	       unsigned int link_id, u16 queue,
535 	       const struct ieee80211_tx_queue_params *params)
536 {
537 	struct mt7603_dev *dev = hw->priv;
538 	u16 cw_min = (1 << 5) - 1;
539 	u16 cw_max = (1 << 10) - 1;
540 	u32 val;
541 
542 	queue = dev->mphy.q_tx[queue]->hw_idx;
543 
544 	if (params->cw_min)
545 		cw_min = params->cw_min;
546 	if (params->cw_max)
547 		cw_max = params->cw_max;
548 
549 	mutex_lock(&dev->mt76.mutex);
550 	mt7603_mac_stop(dev);
551 
552 	val = mt76_rr(dev, MT_WMM_TXOP(queue));
553 	val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(queue));
554 	val |= params->txop << MT_WMM_TXOP_SHIFT(queue);
555 	mt76_wr(dev, MT_WMM_TXOP(queue), val);
556 
557 	val = mt76_rr(dev, MT_WMM_AIFSN);
558 	val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(queue));
559 	val |= params->aifs << MT_WMM_AIFSN_SHIFT(queue);
560 	mt76_wr(dev, MT_WMM_AIFSN, val);
561 
562 	val = mt76_rr(dev, MT_WMM_CWMIN);
563 	val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(queue));
564 	val |= cw_min << MT_WMM_CWMIN_SHIFT(queue);
565 	mt76_wr(dev, MT_WMM_CWMIN, val);
566 
567 	val = mt76_rr(dev, MT_WMM_CWMAX(queue));
568 	val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(queue));
569 	val |= cw_max << MT_WMM_CWMAX_SHIFT(queue);
570 	mt76_wr(dev, MT_WMM_CWMAX(queue), val);
571 
572 	mt7603_mac_start(dev);
573 	mutex_unlock(&dev->mt76.mutex);
574 
575 	return 0;
576 }
577 
578 static void
579 mt7603_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
580 	     u32 queues, bool drop)
581 {
582 }
583 
584 static int
585 mt7603_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
586 		    struct ieee80211_ampdu_params *params)
587 {
588 	enum ieee80211_ampdu_mlme_action action = params->action;
589 	struct mt7603_dev *dev = hw->priv;
590 	struct ieee80211_sta *sta = params->sta;
591 	struct ieee80211_txq *txq = sta->txq[params->tid];
592 	struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
593 	u16 tid = params->tid;
594 	u16 ssn = params->ssn;
595 	u8 ba_size = params->buf_size;
596 	struct mt76_txq *mtxq;
597 	int ret = 0;
598 
599 	if (!txq)
600 		return -EINVAL;
601 
602 	mtxq = (struct mt76_txq *)txq->drv_priv;
603 
604 	mutex_lock(&dev->mt76.mutex);
605 	switch (action) {
606 	case IEEE80211_AMPDU_RX_START:
607 		mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid, ssn,
608 				   params->buf_size);
609 		mt7603_mac_rx_ba_reset(dev, sta->addr, tid);
610 		break;
611 	case IEEE80211_AMPDU_RX_STOP:
612 		mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid);
613 		break;
614 	case IEEE80211_AMPDU_TX_OPERATIONAL:
615 		mtxq->aggr = true;
616 		mtxq->send_bar = false;
617 		mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, ba_size);
618 		break;
619 	case IEEE80211_AMPDU_TX_STOP_FLUSH:
620 	case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
621 		mtxq->aggr = false;
622 		mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, -1);
623 		break;
624 	case IEEE80211_AMPDU_TX_START:
625 		mtxq->agg_ssn = IEEE80211_SN_TO_SEQ(ssn);
626 		ret = IEEE80211_AMPDU_TX_START_IMMEDIATE;
627 		break;
628 	case IEEE80211_AMPDU_TX_STOP_CONT:
629 		mtxq->aggr = false;
630 		mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, -1);
631 		ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
632 		break;
633 	}
634 	mutex_unlock(&dev->mt76.mutex);
635 
636 	return ret;
637 }
638 
639 static void
640 mt7603_sta_rate_tbl_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
641 			   struct ieee80211_sta *sta)
642 {
643 	struct mt7603_dev *dev = hw->priv;
644 	struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
645 	struct ieee80211_sta_rates *sta_rates = rcu_dereference(sta->rates);
646 	int i;
647 
648 	if (!sta_rates)
649 		return;
650 
651 	spin_lock_bh(&dev->mt76.lock);
652 	for (i = 0; i < ARRAY_SIZE(msta->rates); i++) {
653 		msta->rates[i].idx = sta_rates->rate[i].idx;
654 		msta->rates[i].count = sta_rates->rate[i].count;
655 		msta->rates[i].flags = sta_rates->rate[i].flags;
656 
657 		if (msta->rates[i].idx < 0 || !msta->rates[i].count)
658 			break;
659 	}
660 	msta->n_rates = i;
661 	mt7603_wtbl_set_rates(dev, msta, NULL, msta->rates);
662 	msta->rate_probe = false;
663 	mt7603_wtbl_set_smps(dev, msta,
664 			     sta->deflink.smps_mode == IEEE80211_SMPS_DYNAMIC);
665 	spin_unlock_bh(&dev->mt76.lock);
666 }
667 
668 static void
669 mt7603_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class)
670 {
671 	struct mt7603_dev *dev = hw->priv;
672 
673 	mutex_lock(&dev->mt76.mutex);
674 	dev->coverage_class = max_t(s16, coverage_class, 0);
675 	mt7603_mac_set_timing(dev);
676 	mutex_unlock(&dev->mt76.mutex);
677 }
678 
679 static void mt7603_tx(struct ieee80211_hw *hw,
680 		      struct ieee80211_tx_control *control,
681 		      struct sk_buff *skb)
682 {
683 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
684 	struct ieee80211_vif *vif = info->control.vif;
685 	struct mt7603_dev *dev = hw->priv;
686 	struct mt76_wcid *wcid = &dev->global_sta.wcid;
687 
688 	if (control->sta) {
689 		struct mt7603_sta *msta;
690 
691 		msta = (struct mt7603_sta *)control->sta->drv_priv;
692 		wcid = &msta->wcid;
693 	} else if (vif) {
694 		struct mt7603_vif *mvif;
695 
696 		mvif = (struct mt7603_vif *)vif->drv_priv;
697 		wcid = &mvif->sta.wcid;
698 	}
699 
700 	mt76_tx(&dev->mphy, control->sta, wcid, skb);
701 }
702 
703 const struct ieee80211_ops mt7603_ops = {
704 	.tx = mt7603_tx,
705 	.start = mt7603_start,
706 	.stop = mt7603_stop,
707 	.add_interface = mt7603_add_interface,
708 	.remove_interface = mt7603_remove_interface,
709 	.config = mt7603_config,
710 	.configure_filter = mt7603_configure_filter,
711 	.bss_info_changed = mt7603_bss_info_changed,
712 	.sta_state = mt76_sta_state,
713 	.sta_pre_rcu_remove = mt76_sta_pre_rcu_remove,
714 	.set_key = mt7603_set_key,
715 	.conf_tx = mt7603_conf_tx,
716 	.sw_scan_start = mt76_sw_scan,
717 	.sw_scan_complete = mt76_sw_scan_complete,
718 	.flush = mt7603_flush,
719 	.ampdu_action = mt7603_ampdu_action,
720 	.get_txpower = mt76_get_txpower,
721 	.wake_tx_queue = mt76_wake_tx_queue,
722 	.sta_rate_tbl_update = mt7603_sta_rate_tbl_update,
723 	.release_buffered_frames = mt7603_release_buffered_frames,
724 	.set_coverage_class = mt7603_set_coverage_class,
725 	.set_tim = mt76_set_tim,
726 	.get_survey = mt76_get_survey,
727 	.get_antenna = mt76_get_antenna,
728 	.set_sar_specs = mt7603_set_sar_specs,
729 };
730 
731 MODULE_LICENSE("Dual BSD/GPL");
732 
733 static int __init mt7603_init(void)
734 {
735 	int ret;
736 
737 	ret = platform_driver_register(&mt76_wmac_driver);
738 	if (ret)
739 		return ret;
740 
741 #ifdef CONFIG_PCI
742 	ret = pci_register_driver(&mt7603_pci_driver);
743 	if (ret)
744 		platform_driver_unregister(&mt76_wmac_driver);
745 #endif
746 	return ret;
747 }
748 
749 static void __exit mt7603_exit(void)
750 {
751 #ifdef CONFIG_PCI
752 	pci_unregister_driver(&mt7603_pci_driver);
753 #endif
754 	platform_driver_unregister(&mt76_wmac_driver);
755 }
756 
757 module_init(mt7603_init);
758 module_exit(mt7603_exit);
759