17f17b86aSRyder Lee // SPDX-License-Identifier: ISC 2c8846e10SFelix Fietkau 3c8846e10SFelix Fietkau #include <linux/etherdevice.h> 4c8846e10SFelix Fietkau #include <linux/platform_device.h> 5c8846e10SFelix Fietkau #include <linux/pci.h> 6c8846e10SFelix Fietkau #include <linux/module.h> 7c8846e10SFelix Fietkau #include "mt7603.h" 8b126c889SFelix Fietkau #include "mac.h" 9c8846e10SFelix Fietkau #include "eeprom.h" 10c8846e10SFelix Fietkau 11c8846e10SFelix Fietkau static int 12c8846e10SFelix Fietkau mt7603_start(struct ieee80211_hw *hw) 13c8846e10SFelix Fietkau { 14c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv; 15c8846e10SFelix Fietkau 165a8d4678SLorenzo Bianconi mt7603_mac_reset_counters(dev); 17c8846e10SFelix Fietkau mt7603_mac_start(dev); 1896747a51SFelix Fietkau dev->mphy.survey_time = ktime_get_boottime(); 19011849e0SFelix Fietkau set_bit(MT76_STATE_RUNNING, &dev->mphy.state); 2037426fb6SLorenzo Bianconi mt7603_mac_work(&dev->mt76.mac_work.work); 21c8846e10SFelix Fietkau 22c8846e10SFelix Fietkau return 0; 23c8846e10SFelix Fietkau } 24c8846e10SFelix Fietkau 25c8846e10SFelix Fietkau static void 26c8846e10SFelix Fietkau mt7603_stop(struct ieee80211_hw *hw) 27c8846e10SFelix Fietkau { 28c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv; 29c8846e10SFelix Fietkau 30011849e0SFelix Fietkau clear_bit(MT76_STATE_RUNNING, &dev->mphy.state); 3137426fb6SLorenzo Bianconi cancel_delayed_work_sync(&dev->mt76.mac_work); 32c8846e10SFelix Fietkau mt7603_mac_stop(dev); 33c8846e10SFelix Fietkau } 34c8846e10SFelix Fietkau 35c8846e10SFelix Fietkau static int 36c8846e10SFelix Fietkau mt7603_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 37c8846e10SFelix Fietkau { 38c8846e10SFelix Fietkau struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv; 39c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv; 40c8846e10SFelix Fietkau struct mt76_txq *mtxq; 41c8846e10SFelix Fietkau u8 bc_addr[ETH_ALEN]; 42c8846e10SFelix Fietkau int idx; 43c8846e10SFelix Fietkau int ret = 0; 44c8846e10SFelix Fietkau 45c8846e10SFelix Fietkau mutex_lock(&dev->mt76.mutex); 46c8846e10SFelix Fietkau 47c8846e10SFelix Fietkau mvif->idx = ffs(~dev->vif_mask) - 1; 48c8846e10SFelix Fietkau if (mvif->idx >= MT7603_MAX_INTERFACES) { 49c8846e10SFelix Fietkau ret = -ENOSPC; 50c8846e10SFelix Fietkau goto out; 51c8846e10SFelix Fietkau } 52c8846e10SFelix Fietkau 53c8846e10SFelix Fietkau mt76_wr(dev, MT_MAC_ADDR0(mvif->idx), 54c8846e10SFelix Fietkau get_unaligned_le32(vif->addr)); 55c8846e10SFelix Fietkau mt76_wr(dev, MT_MAC_ADDR1(mvif->idx), 56c8846e10SFelix Fietkau (get_unaligned_le16(vif->addr + 4) | 57c8846e10SFelix Fietkau MT_MAC_ADDR1_VALID)); 58c8846e10SFelix Fietkau 59c8846e10SFelix Fietkau if (vif->type == NL80211_IFTYPE_AP) { 60c8846e10SFelix Fietkau mt76_wr(dev, MT_BSSID0(mvif->idx), 61c8846e10SFelix Fietkau get_unaligned_le32(vif->addr)); 62c8846e10SFelix Fietkau mt76_wr(dev, MT_BSSID1(mvif->idx), 63c8846e10SFelix Fietkau (get_unaligned_le16(vif->addr + 4) | 64c8846e10SFelix Fietkau MT_BSSID1_VALID)); 65c8846e10SFelix Fietkau } 66c8846e10SFelix Fietkau 67c8846e10SFelix Fietkau idx = MT7603_WTBL_RESERVED - 1 - mvif->idx; 68c8846e10SFelix Fietkau dev->vif_mask |= BIT(mvif->idx); 69ea565833SFelix Fietkau INIT_LIST_HEAD(&mvif->sta.poll_list); 70c8846e10SFelix Fietkau mvif->sta.wcid.idx = idx; 71c8846e10SFelix Fietkau mvif->sta.wcid.hw_key_idx = -1; 72c8846e10SFelix Fietkau 73c8846e10SFelix Fietkau eth_broadcast_addr(bc_addr); 74c8846e10SFelix Fietkau mt7603_wtbl_init(dev, idx, mvif->idx, bc_addr); 75c8846e10SFelix Fietkau 76c8846e10SFelix Fietkau mtxq = (struct mt76_txq *)vif->txq->drv_priv; 77c8846e10SFelix Fietkau mtxq->wcid = &mvif->sta.wcid; 78c8846e10SFelix Fietkau mt76_txq_init(&dev->mt76, vif->txq); 79c8846e10SFelix Fietkau rcu_assign_pointer(dev->mt76.wcid[idx], &mvif->sta.wcid); 80c8846e10SFelix Fietkau 81c8846e10SFelix Fietkau out: 82c8846e10SFelix Fietkau mutex_unlock(&dev->mt76.mutex); 83c8846e10SFelix Fietkau 84c8846e10SFelix Fietkau return ret; 85c8846e10SFelix Fietkau } 86c8846e10SFelix Fietkau 87c8846e10SFelix Fietkau static void 88c8846e10SFelix Fietkau mt7603_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 89c8846e10SFelix Fietkau { 90c8846e10SFelix Fietkau struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv; 91ea565833SFelix Fietkau struct mt7603_sta *msta = &mvif->sta; 92c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv; 93ea565833SFelix Fietkau int idx = msta->wcid.idx; 94c8846e10SFelix Fietkau 95c8846e10SFelix Fietkau mt76_wr(dev, MT_MAC_ADDR0(mvif->idx), 0); 96c8846e10SFelix Fietkau mt76_wr(dev, MT_MAC_ADDR1(mvif->idx), 0); 97c8846e10SFelix Fietkau mt76_wr(dev, MT_BSSID0(mvif->idx), 0); 98c8846e10SFelix Fietkau mt76_wr(dev, MT_BSSID1(mvif->idx), 0); 99c8846e10SFelix Fietkau mt7603_beacon_set_timer(dev, mvif->idx, 0); 100c8846e10SFelix Fietkau 101c8846e10SFelix Fietkau rcu_assign_pointer(dev->mt76.wcid[idx], NULL); 102c8846e10SFelix Fietkau mt76_txq_remove(&dev->mt76, vif->txq); 103c8846e10SFelix Fietkau 104ea565833SFelix Fietkau spin_lock_bh(&dev->sta_poll_lock); 105ea565833SFelix Fietkau if (!list_empty(&msta->poll_list)) 106ea565833SFelix Fietkau list_del_init(&msta->poll_list); 107ea565833SFelix Fietkau spin_unlock_bh(&dev->sta_poll_lock); 108ea565833SFelix Fietkau 109c8846e10SFelix Fietkau mutex_lock(&dev->mt76.mutex); 110c8846e10SFelix Fietkau dev->vif_mask &= ~BIT(mvif->idx); 111c8846e10SFelix Fietkau mutex_unlock(&dev->mt76.mutex); 112c8846e10SFelix Fietkau } 113c8846e10SFelix Fietkau 114984d8854SLorenzo Bianconi void mt7603_init_edcca(struct mt7603_dev *dev) 115c8846e10SFelix Fietkau { 116c8846e10SFelix Fietkau /* Set lower signal level to -65dBm */ 117c8846e10SFelix Fietkau mt76_rmw_field(dev, MT_RXTD(8), MT_RXTD_8_LOWER_SIGNAL, 0x23); 118c8846e10SFelix Fietkau 119c8846e10SFelix Fietkau /* clear previous energy detect monitor results */ 120c8846e10SFelix Fietkau mt76_rr(dev, MT_MIB_STAT_ED); 121c8846e10SFelix Fietkau 122c8846e10SFelix Fietkau if (dev->ed_monitor) 123c8846e10SFelix Fietkau mt76_set(dev, MT_MIB_CTL, MT_MIB_CTL_ED_TIME); 124c8846e10SFelix Fietkau else 125c8846e10SFelix Fietkau mt76_clear(dev, MT_MIB_CTL, MT_MIB_CTL_ED_TIME); 126c8846e10SFelix Fietkau 127c8846e10SFelix Fietkau dev->ed_strict_mode = 0xff; 128c8846e10SFelix Fietkau dev->ed_strong_signal = 0; 129c8846e10SFelix Fietkau dev->ed_time = ktime_get_boottime(); 130c8846e10SFelix Fietkau 131c8846e10SFelix Fietkau mt7603_edcca_set_strict(dev, false); 132c8846e10SFelix Fietkau } 133c8846e10SFelix Fietkau 134c8846e10SFelix Fietkau static int 135c8846e10SFelix Fietkau mt7603_set_channel(struct mt7603_dev *dev, struct cfg80211_chan_def *def) 136c8846e10SFelix Fietkau { 137c8846e10SFelix Fietkau u8 *rssi_data = (u8 *)dev->mt76.eeprom.data; 138c8846e10SFelix Fietkau int idx, ret; 139c8846e10SFelix Fietkau u8 bw = MT_BW_20; 140c8846e10SFelix Fietkau bool failed = false; 141c8846e10SFelix Fietkau 14237426fb6SLorenzo Bianconi cancel_delayed_work_sync(&dev->mt76.mac_work); 143bd115805SLorenzo Bianconi tasklet_disable(&dev->mt76.pre_tbtt_tasklet); 144c8846e10SFelix Fietkau 145c8846e10SFelix Fietkau mutex_lock(&dev->mt76.mutex); 146011849e0SFelix Fietkau set_bit(MT76_RESET, &dev->mphy.state); 147c8846e10SFelix Fietkau 148bd115805SLorenzo Bianconi mt7603_beacon_set_timer(dev, -1, 0); 14996747a51SFelix Fietkau mt76_set_channel(&dev->mphy); 150c8846e10SFelix Fietkau mt7603_mac_stop(dev); 151c8846e10SFelix Fietkau 152c8846e10SFelix Fietkau if (def->width == NL80211_CHAN_WIDTH_40) 153c8846e10SFelix Fietkau bw = MT_BW_40; 154c8846e10SFelix Fietkau 15596747a51SFelix Fietkau dev->mphy.chandef = *def; 156c8846e10SFelix Fietkau mt76_rmw_field(dev, MT_AGG_BWCR, MT_AGG_BWCR_BW, bw); 157c8846e10SFelix Fietkau ret = mt7603_mcu_set_channel(dev); 158c8846e10SFelix Fietkau if (ret) { 159c8846e10SFelix Fietkau failed = true; 160c8846e10SFelix Fietkau goto out; 161c8846e10SFelix Fietkau } 162c8846e10SFelix Fietkau 163c8846e10SFelix Fietkau if (def->chan->band == NL80211_BAND_5GHZ) { 164c8846e10SFelix Fietkau idx = 1; 165c8846e10SFelix Fietkau rssi_data += MT_EE_RSSI_OFFSET_5G; 166c8846e10SFelix Fietkau } else { 167c8846e10SFelix Fietkau idx = 0; 168c8846e10SFelix Fietkau rssi_data += MT_EE_RSSI_OFFSET_2G; 169c8846e10SFelix Fietkau } 170c8846e10SFelix Fietkau 171c8846e10SFelix Fietkau memcpy(dev->rssi_offset, rssi_data, sizeof(dev->rssi_offset)); 172c8846e10SFelix Fietkau 173c8846e10SFelix Fietkau idx |= (def->chan - 174c8846e10SFelix Fietkau mt76_hw(dev)->wiphy->bands[def->chan->band]->channels) << 1; 175c8846e10SFelix Fietkau mt76_wr(dev, MT_WF_RMAC_CH_FREQ, idx); 176c8846e10SFelix Fietkau mt7603_mac_set_timing(dev); 177c8846e10SFelix Fietkau mt7603_mac_start(dev); 178c8846e10SFelix Fietkau 179011849e0SFelix Fietkau clear_bit(MT76_RESET, &dev->mphy.state); 180c8846e10SFelix Fietkau 1819fba6d07SFelix Fietkau mt76_txq_schedule_all(&dev->mphy); 182c8846e10SFelix Fietkau 18337426fb6SLorenzo Bianconi ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mt76.mac_work, 1845e814e71SLorenzo Bianconi msecs_to_jiffies(MT7603_WATCHDOG_TIME)); 185c8846e10SFelix Fietkau 186c8846e10SFelix Fietkau /* reset channel stats */ 187c8846e10SFelix Fietkau mt76_clear(dev, MT_MIB_CTL, MT_MIB_CTL_READ_CLR_DIS); 188c8846e10SFelix Fietkau mt76_set(dev, MT_MIB_CTL, 189c8846e10SFelix Fietkau MT_MIB_CTL_CCA_NAV_TX | MT_MIB_CTL_PSCCA_TIME); 19000c29ab2SLorenzo Bianconi mt76_rr(dev, MT_MIB_STAT_CCA); 191c8846e10SFelix Fietkau mt7603_cca_stats_reset(dev); 192c8846e10SFelix Fietkau 19396747a51SFelix Fietkau dev->mphy.survey_time = ktime_get_boottime(); 194c8846e10SFelix Fietkau 195c8846e10SFelix Fietkau mt7603_init_edcca(dev); 196c8846e10SFelix Fietkau 197c8846e10SFelix Fietkau out: 198bd115805SLorenzo Bianconi if (!(mt76_hw(dev)->conf.flags & IEEE80211_CONF_OFFCHANNEL)) 199bd115805SLorenzo Bianconi mt7603_beacon_set_timer(dev, -1, dev->mt76.beacon_int); 200c8846e10SFelix Fietkau mutex_unlock(&dev->mt76.mutex); 201c8846e10SFelix Fietkau 202bd115805SLorenzo Bianconi tasklet_enable(&dev->mt76.pre_tbtt_tasklet); 203bd115805SLorenzo Bianconi 204c8846e10SFelix Fietkau if (failed) 20537426fb6SLorenzo Bianconi mt7603_mac_work(&dev->mt76.mac_work.work); 206c8846e10SFelix Fietkau 207c8846e10SFelix Fietkau return ret; 208c8846e10SFelix Fietkau } 209c8846e10SFelix Fietkau 210c8846e10SFelix Fietkau static int 211c8846e10SFelix Fietkau mt7603_config(struct ieee80211_hw *hw, u32 changed) 212c8846e10SFelix Fietkau { 213c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv; 214c8846e10SFelix Fietkau int ret = 0; 215c8846e10SFelix Fietkau 216c8846e10SFelix Fietkau if (changed & (IEEE80211_CONF_CHANGE_CHANNEL | 217c38cbba4SLorenzo Bianconi IEEE80211_CONF_CHANGE_POWER)) { 218c38cbba4SLorenzo Bianconi ieee80211_stop_queues(hw); 219c8846e10SFelix Fietkau ret = mt7603_set_channel(dev, &hw->conf.chandef); 220c38cbba4SLorenzo Bianconi ieee80211_wake_queues(hw); 221c38cbba4SLorenzo Bianconi } 222c8846e10SFelix Fietkau 223c8846e10SFelix Fietkau if (changed & IEEE80211_CONF_CHANGE_MONITOR) { 224c8846e10SFelix Fietkau mutex_lock(&dev->mt76.mutex); 225c8846e10SFelix Fietkau 226c8846e10SFelix Fietkau if (!(hw->conf.flags & IEEE80211_CONF_MONITOR)) 227c8846e10SFelix Fietkau dev->rxfilter |= MT_WF_RFCR_DROP_OTHER_UC; 228c8846e10SFelix Fietkau else 229c8846e10SFelix Fietkau dev->rxfilter &= ~MT_WF_RFCR_DROP_OTHER_UC; 230c8846e10SFelix Fietkau 231c8846e10SFelix Fietkau mt76_wr(dev, MT_WF_RFCR, dev->rxfilter); 232c8846e10SFelix Fietkau 233c8846e10SFelix Fietkau mutex_unlock(&dev->mt76.mutex); 234c8846e10SFelix Fietkau } 235c8846e10SFelix Fietkau 236c8846e10SFelix Fietkau return ret; 237c8846e10SFelix Fietkau } 238c8846e10SFelix Fietkau 239c8846e10SFelix Fietkau static void 240c8846e10SFelix Fietkau mt7603_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags, 241c8846e10SFelix Fietkau unsigned int *total_flags, u64 multicast) 242c8846e10SFelix Fietkau { 243c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv; 244c8846e10SFelix Fietkau u32 flags = 0; 245c8846e10SFelix Fietkau 246c8846e10SFelix Fietkau #define MT76_FILTER(_flag, _hw) do { \ 247c8846e10SFelix Fietkau flags |= *total_flags & FIF_##_flag; \ 248c8846e10SFelix Fietkau dev->rxfilter &= ~(_hw); \ 249c8846e10SFelix Fietkau dev->rxfilter |= !(flags & FIF_##_flag) * (_hw); \ 250c8846e10SFelix Fietkau } while (0) 251c8846e10SFelix Fietkau 252c8846e10SFelix Fietkau dev->rxfilter &= ~(MT_WF_RFCR_DROP_OTHER_BSS | 253c8846e10SFelix Fietkau MT_WF_RFCR_DROP_OTHER_BEACON | 254c8846e10SFelix Fietkau MT_WF_RFCR_DROP_FRAME_REPORT | 255c8846e10SFelix Fietkau MT_WF_RFCR_DROP_PROBEREQ | 256c8846e10SFelix Fietkau MT_WF_RFCR_DROP_MCAST_FILTERED | 257c8846e10SFelix Fietkau MT_WF_RFCR_DROP_MCAST | 258c8846e10SFelix Fietkau MT_WF_RFCR_DROP_BCAST | 259c8846e10SFelix Fietkau MT_WF_RFCR_DROP_DUPLICATE | 260c8846e10SFelix Fietkau MT_WF_RFCR_DROP_A2_BSSID | 261c8846e10SFelix Fietkau MT_WF_RFCR_DROP_UNWANTED_CTL | 262c8846e10SFelix Fietkau MT_WF_RFCR_DROP_STBC_MULTI); 263c8846e10SFelix Fietkau 264c8846e10SFelix Fietkau MT76_FILTER(OTHER_BSS, MT_WF_RFCR_DROP_OTHER_TIM | 265c8846e10SFelix Fietkau MT_WF_RFCR_DROP_A3_MAC | 266c8846e10SFelix Fietkau MT_WF_RFCR_DROP_A3_BSSID); 267c8846e10SFelix Fietkau 268c8846e10SFelix Fietkau MT76_FILTER(FCSFAIL, MT_WF_RFCR_DROP_FCSFAIL); 269c8846e10SFelix Fietkau 270c8846e10SFelix Fietkau MT76_FILTER(CONTROL, MT_WF_RFCR_DROP_CTS | 271c8846e10SFelix Fietkau MT_WF_RFCR_DROP_RTS | 272c8846e10SFelix Fietkau MT_WF_RFCR_DROP_CTL_RSV | 273c8846e10SFelix Fietkau MT_WF_RFCR_DROP_NDPA); 274c8846e10SFelix Fietkau 275c8846e10SFelix Fietkau *total_flags = flags; 276c8846e10SFelix Fietkau mt76_wr(dev, MT_WF_RFCR, dev->rxfilter); 277c8846e10SFelix Fietkau } 278c8846e10SFelix Fietkau 279c8846e10SFelix Fietkau static void 280c8846e10SFelix Fietkau mt7603_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 281c8846e10SFelix Fietkau struct ieee80211_bss_conf *info, u32 changed) 282c8846e10SFelix Fietkau { 283c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv; 284c8846e10SFelix Fietkau struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv; 285c8846e10SFelix Fietkau 286c8846e10SFelix Fietkau mutex_lock(&dev->mt76.mutex); 287c8846e10SFelix Fietkau 288c8846e10SFelix Fietkau if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BSSID)) { 289c8846e10SFelix Fietkau if (info->assoc || info->ibss_joined) { 290c8846e10SFelix Fietkau mt76_wr(dev, MT_BSSID0(mvif->idx), 291c8846e10SFelix Fietkau get_unaligned_le32(info->bssid)); 292c8846e10SFelix Fietkau mt76_wr(dev, MT_BSSID1(mvif->idx), 293c8846e10SFelix Fietkau (get_unaligned_le16(info->bssid + 4) | 294c8846e10SFelix Fietkau MT_BSSID1_VALID)); 295c8846e10SFelix Fietkau } else { 296c8846e10SFelix Fietkau mt76_wr(dev, MT_BSSID0(mvif->idx), 0); 297c8846e10SFelix Fietkau mt76_wr(dev, MT_BSSID1(mvif->idx), 0); 298c8846e10SFelix Fietkau } 299c8846e10SFelix Fietkau } 300c8846e10SFelix Fietkau 301c8846e10SFelix Fietkau if (changed & BSS_CHANGED_ERP_SLOT) { 302c8846e10SFelix Fietkau int slottime = info->use_short_slot ? 9 : 20; 303c8846e10SFelix Fietkau 304c8846e10SFelix Fietkau if (slottime != dev->slottime) { 305c8846e10SFelix Fietkau dev->slottime = slottime; 306c8846e10SFelix Fietkau mt7603_mac_set_timing(dev); 307c8846e10SFelix Fietkau } 308c8846e10SFelix Fietkau } 309c8846e10SFelix Fietkau 310c8846e10SFelix Fietkau if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON_INT)) { 311c8846e10SFelix Fietkau int beacon_int = !!info->enable_beacon * info->beacon_int; 312c8846e10SFelix Fietkau 313dc6057f4SLorenzo Bianconi tasklet_disable(&dev->mt76.pre_tbtt_tasklet); 314c8846e10SFelix Fietkau mt7603_beacon_set_timer(dev, mvif->idx, beacon_int); 315dc6057f4SLorenzo Bianconi tasklet_enable(&dev->mt76.pre_tbtt_tasklet); 316c8846e10SFelix Fietkau } 317c8846e10SFelix Fietkau 318c8846e10SFelix Fietkau mutex_unlock(&dev->mt76.mutex); 319c8846e10SFelix Fietkau } 320c8846e10SFelix Fietkau 321c8846e10SFelix Fietkau int 322c8846e10SFelix Fietkau mt7603_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, 323c8846e10SFelix Fietkau struct ieee80211_sta *sta) 324c8846e10SFelix Fietkau { 325c8846e10SFelix Fietkau struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76); 326c8846e10SFelix Fietkau struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv; 327c8846e10SFelix Fietkau struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv; 328c8846e10SFelix Fietkau int idx; 329c8846e10SFelix Fietkau int ret = 0; 330c8846e10SFelix Fietkau 331c8846e10SFelix Fietkau idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7603_WTBL_STA - 1); 332c8846e10SFelix Fietkau if (idx < 0) 333c8846e10SFelix Fietkau return -ENOSPC; 334c8846e10SFelix Fietkau 335ea565833SFelix Fietkau INIT_LIST_HEAD(&msta->poll_list); 336c8846e10SFelix Fietkau __skb_queue_head_init(&msta->psq); 337c8846e10SFelix Fietkau msta->ps = ~0; 338c8846e10SFelix Fietkau msta->smps = ~0; 339c8846e10SFelix Fietkau msta->wcid.sta = 1; 340c8846e10SFelix Fietkau msta->wcid.idx = idx; 341c8846e10SFelix Fietkau mt7603_wtbl_init(dev, idx, mvif->idx, sta->addr); 342c8846e10SFelix Fietkau mt7603_wtbl_set_ps(dev, msta, false); 343c8846e10SFelix Fietkau 344c8846e10SFelix Fietkau if (vif->type == NL80211_IFTYPE_AP) 345c8846e10SFelix Fietkau set_bit(MT_WCID_FLAG_CHECK_PS, &msta->wcid.flags); 346c8846e10SFelix Fietkau 347c8846e10SFelix Fietkau return ret; 348c8846e10SFelix Fietkau } 349c8846e10SFelix Fietkau 350c8846e10SFelix Fietkau void 351c8846e10SFelix Fietkau mt7603_sta_assoc(struct mt76_dev *mdev, struct ieee80211_vif *vif, 352c8846e10SFelix Fietkau struct ieee80211_sta *sta) 353c8846e10SFelix Fietkau { 354c8846e10SFelix Fietkau struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76); 355c8846e10SFelix Fietkau 356c8846e10SFelix Fietkau mt7603_wtbl_update_cap(dev, sta); 357c8846e10SFelix Fietkau } 358c8846e10SFelix Fietkau 359c8846e10SFelix Fietkau void 360c8846e10SFelix Fietkau mt7603_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 361c8846e10SFelix Fietkau struct ieee80211_sta *sta) 362c8846e10SFelix Fietkau { 363c8846e10SFelix Fietkau struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76); 364c8846e10SFelix Fietkau struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv; 365c8846e10SFelix Fietkau struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv; 366c8846e10SFelix Fietkau 367c8846e10SFelix Fietkau spin_lock_bh(&dev->ps_lock); 368c8846e10SFelix Fietkau __skb_queue_purge(&msta->psq); 369c8846e10SFelix Fietkau mt7603_filter_tx(dev, wcid->idx, true); 370c8846e10SFelix Fietkau spin_unlock_bh(&dev->ps_lock); 371c8846e10SFelix Fietkau 372ea565833SFelix Fietkau spin_lock_bh(&dev->sta_poll_lock); 373ea565833SFelix Fietkau if (!list_empty(&msta->poll_list)) 374ea565833SFelix Fietkau list_del_init(&msta->poll_list); 375ea565833SFelix Fietkau spin_unlock_bh(&dev->sta_poll_lock); 376ea565833SFelix Fietkau 377c8846e10SFelix Fietkau mt7603_wtbl_clear(dev, wcid->idx); 378c8846e10SFelix Fietkau } 379c8846e10SFelix Fietkau 380c8846e10SFelix Fietkau static void 381c8846e10SFelix Fietkau mt7603_ps_tx_list(struct mt7603_dev *dev, struct sk_buff_head *list) 382c8846e10SFelix Fietkau { 383c8846e10SFelix Fietkau struct sk_buff *skb; 384c8846e10SFelix Fietkau 385c8846e10SFelix Fietkau while ((skb = __skb_dequeue(list)) != NULL) 386c8846e10SFelix Fietkau mt76_tx_queue_skb_raw(dev, skb_get_queue_mapping(skb), 387c8846e10SFelix Fietkau skb, 0); 388c8846e10SFelix Fietkau } 389c8846e10SFelix Fietkau 390c8846e10SFelix Fietkau void 391c8846e10SFelix Fietkau mt7603_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps) 392c8846e10SFelix Fietkau { 393c8846e10SFelix Fietkau struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76); 394c8846e10SFelix Fietkau struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv; 395c8846e10SFelix Fietkau struct sk_buff_head list; 396c8846e10SFelix Fietkau 3979dc27bcbSFelix Fietkau mt76_stop_tx_queues(&dev->mt76, sta, true); 398c8846e10SFelix Fietkau mt7603_wtbl_set_ps(dev, msta, ps); 399c8846e10SFelix Fietkau if (ps) 400c8846e10SFelix Fietkau return; 401c8846e10SFelix Fietkau 402c8846e10SFelix Fietkau __skb_queue_head_init(&list); 403c8846e10SFelix Fietkau 404c8846e10SFelix Fietkau spin_lock_bh(&dev->ps_lock); 405c8846e10SFelix Fietkau skb_queue_splice_tail_init(&msta->psq, &list); 406c8846e10SFelix Fietkau spin_unlock_bh(&dev->ps_lock); 407c8846e10SFelix Fietkau 408c8846e10SFelix Fietkau mt7603_ps_tx_list(dev, &list); 409c8846e10SFelix Fietkau } 410c8846e10SFelix Fietkau 411c8846e10SFelix Fietkau static void 412b126c889SFelix Fietkau mt7603_ps_set_more_data(struct sk_buff *skb) 413b126c889SFelix Fietkau { 414b126c889SFelix Fietkau struct ieee80211_hdr *hdr; 415b126c889SFelix Fietkau 416b126c889SFelix Fietkau hdr = (struct ieee80211_hdr *)&skb->data[MT_TXD_SIZE]; 417b126c889SFelix Fietkau hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA); 418b126c889SFelix Fietkau } 419b126c889SFelix Fietkau 420b126c889SFelix Fietkau static void 421c8846e10SFelix Fietkau mt7603_release_buffered_frames(struct ieee80211_hw *hw, 422c8846e10SFelix Fietkau struct ieee80211_sta *sta, 423c8846e10SFelix Fietkau u16 tids, int nframes, 424c8846e10SFelix Fietkau enum ieee80211_frame_release_type reason, 425c8846e10SFelix Fietkau bool more_data) 426c8846e10SFelix Fietkau { 427c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv; 428c8846e10SFelix Fietkau struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv; 429c8846e10SFelix Fietkau struct sk_buff_head list; 430c8846e10SFelix Fietkau struct sk_buff *skb, *tmp; 431c8846e10SFelix Fietkau 432c8846e10SFelix Fietkau __skb_queue_head_init(&list); 433c8846e10SFelix Fietkau 434f25e813bSFelix Fietkau mt7603_wtbl_set_ps(dev, msta, false); 435f25e813bSFelix Fietkau 436c8846e10SFelix Fietkau spin_lock_bh(&dev->ps_lock); 437c8846e10SFelix Fietkau skb_queue_walk_safe(&msta->psq, skb, tmp) { 438c8846e10SFelix Fietkau if (!nframes) 439c8846e10SFelix Fietkau break; 440c8846e10SFelix Fietkau 441c8846e10SFelix Fietkau if (!(tids & BIT(skb->priority))) 442c8846e10SFelix Fietkau continue; 443c8846e10SFelix Fietkau 444c8846e10SFelix Fietkau skb_set_queue_mapping(skb, MT_TXQ_PSD); 445c8846e10SFelix Fietkau __skb_unlink(skb, &msta->psq); 446b126c889SFelix Fietkau mt7603_ps_set_more_data(skb); 447c8846e10SFelix Fietkau __skb_queue_tail(&list, skb); 448c8846e10SFelix Fietkau nframes--; 449c8846e10SFelix Fietkau } 450c8846e10SFelix Fietkau spin_unlock_bh(&dev->ps_lock); 451c8846e10SFelix Fietkau 452b7001f46SFelix Fietkau if (!skb_queue_empty(&list)) 453b7001f46SFelix Fietkau ieee80211_sta_eosp(sta); 454b7001f46SFelix Fietkau 455c8846e10SFelix Fietkau mt7603_ps_tx_list(dev, &list); 456c8846e10SFelix Fietkau 457c8846e10SFelix Fietkau if (nframes) 458c8846e10SFelix Fietkau mt76_release_buffered_frames(hw, sta, tids, nframes, reason, 459c8846e10SFelix Fietkau more_data); 460c8846e10SFelix Fietkau } 461c8846e10SFelix Fietkau 462c8846e10SFelix Fietkau static int 463c8846e10SFelix Fietkau mt7603_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 464c8846e10SFelix Fietkau struct ieee80211_vif *vif, struct ieee80211_sta *sta, 465c8846e10SFelix Fietkau struct ieee80211_key_conf *key) 466c8846e10SFelix Fietkau { 467c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv; 468c8846e10SFelix Fietkau struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv; 469c8846e10SFelix Fietkau struct mt7603_sta *msta = sta ? (struct mt7603_sta *)sta->drv_priv : 470c8846e10SFelix Fietkau &mvif->sta; 471c8846e10SFelix Fietkau struct mt76_wcid *wcid = &msta->wcid; 472c8846e10SFelix Fietkau int idx = key->keyidx; 473c8846e10SFelix Fietkau 474c8846e10SFelix Fietkau /* fall back to sw encryption for unsupported ciphers */ 475c8846e10SFelix Fietkau switch (key->cipher) { 476c8846e10SFelix Fietkau case WLAN_CIPHER_SUITE_TKIP: 477c8846e10SFelix Fietkau case WLAN_CIPHER_SUITE_CCMP: 478c8846e10SFelix Fietkau break; 479c8846e10SFelix Fietkau default: 480c8846e10SFelix Fietkau return -EOPNOTSUPP; 481c8846e10SFelix Fietkau } 482c8846e10SFelix Fietkau 483c8846e10SFelix Fietkau /* 484c8846e10SFelix Fietkau * The hardware does not support per-STA RX GTK, fall back 485c8846e10SFelix Fietkau * to software mode for these. 486c8846e10SFelix Fietkau */ 487c8846e10SFelix Fietkau if ((vif->type == NL80211_IFTYPE_ADHOC || 488c8846e10SFelix Fietkau vif->type == NL80211_IFTYPE_MESH_POINT) && 489c8846e10SFelix Fietkau (key->cipher == WLAN_CIPHER_SUITE_TKIP || 490c8846e10SFelix Fietkau key->cipher == WLAN_CIPHER_SUITE_CCMP) && 491c8846e10SFelix Fietkau !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) 492c8846e10SFelix Fietkau return -EOPNOTSUPP; 493c8846e10SFelix Fietkau 494c8846e10SFelix Fietkau if (cmd == SET_KEY) { 495c8846e10SFelix Fietkau key->hw_key_idx = wcid->idx; 496c8846e10SFelix Fietkau wcid->hw_key_idx = idx; 497c8846e10SFelix Fietkau } else { 498c8846e10SFelix Fietkau if (idx == wcid->hw_key_idx) 499c8846e10SFelix Fietkau wcid->hw_key_idx = -1; 500c8846e10SFelix Fietkau 501c8846e10SFelix Fietkau key = NULL; 502c8846e10SFelix Fietkau } 503c8846e10SFelix Fietkau mt76_wcid_key_setup(&dev->mt76, wcid, key); 504c8846e10SFelix Fietkau 505c8846e10SFelix Fietkau return mt7603_wtbl_set_key(dev, wcid->idx, key); 506c8846e10SFelix Fietkau } 507c8846e10SFelix Fietkau 508c8846e10SFelix Fietkau static int 509c8846e10SFelix Fietkau mt7603_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue, 510c8846e10SFelix Fietkau const struct ieee80211_tx_queue_params *params) 511c8846e10SFelix Fietkau { 512c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv; 513c8846e10SFelix Fietkau u16 cw_min = (1 << 5) - 1; 514c8846e10SFelix Fietkau u16 cw_max = (1 << 10) - 1; 515c8846e10SFelix Fietkau u32 val; 516c8846e10SFelix Fietkau 517af005f26SLorenzo Bianconi queue = dev->mt76.q_tx[queue].q->hw_idx; 518c8846e10SFelix Fietkau 519c8846e10SFelix Fietkau if (params->cw_min) 520c8846e10SFelix Fietkau cw_min = params->cw_min; 521c8846e10SFelix Fietkau if (params->cw_max) 522c8846e10SFelix Fietkau cw_max = params->cw_max; 523c8846e10SFelix Fietkau 524c8846e10SFelix Fietkau mutex_lock(&dev->mt76.mutex); 525c8846e10SFelix Fietkau mt7603_mac_stop(dev); 526c8846e10SFelix Fietkau 527c8846e10SFelix Fietkau val = mt76_rr(dev, MT_WMM_TXOP(queue)); 528c8846e10SFelix Fietkau val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(queue)); 529c8846e10SFelix Fietkau val |= params->txop << MT_WMM_TXOP_SHIFT(queue); 530c8846e10SFelix Fietkau mt76_wr(dev, MT_WMM_TXOP(queue), val); 531c8846e10SFelix Fietkau 532c8846e10SFelix Fietkau val = mt76_rr(dev, MT_WMM_AIFSN); 533c8846e10SFelix Fietkau val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(queue)); 534c8846e10SFelix Fietkau val |= params->aifs << MT_WMM_AIFSN_SHIFT(queue); 535c8846e10SFelix Fietkau mt76_wr(dev, MT_WMM_AIFSN, val); 536c8846e10SFelix Fietkau 537c8846e10SFelix Fietkau val = mt76_rr(dev, MT_WMM_CWMIN); 538c8846e10SFelix Fietkau val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(queue)); 539c8846e10SFelix Fietkau val |= cw_min << MT_WMM_CWMIN_SHIFT(queue); 540c8846e10SFelix Fietkau mt76_wr(dev, MT_WMM_CWMIN, val); 541c8846e10SFelix Fietkau 542c8846e10SFelix Fietkau val = mt76_rr(dev, MT_WMM_CWMAX(queue)); 543c8846e10SFelix Fietkau val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(queue)); 544c8846e10SFelix Fietkau val |= cw_max << MT_WMM_CWMAX_SHIFT(queue); 545c8846e10SFelix Fietkau mt76_wr(dev, MT_WMM_CWMAX(queue), val); 546c8846e10SFelix Fietkau 547c8846e10SFelix Fietkau mt7603_mac_start(dev); 548c8846e10SFelix Fietkau mutex_unlock(&dev->mt76.mutex); 549c8846e10SFelix Fietkau 550c8846e10SFelix Fietkau return 0; 551c8846e10SFelix Fietkau } 552c8846e10SFelix Fietkau 553c8846e10SFelix Fietkau static void 554c8846e10SFelix Fietkau mt7603_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 555c8846e10SFelix Fietkau u32 queues, bool drop) 556c8846e10SFelix Fietkau { 557c8846e10SFelix Fietkau } 558c8846e10SFelix Fietkau 559c8846e10SFelix Fietkau static int 560c8846e10SFelix Fietkau mt7603_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 561c8846e10SFelix Fietkau struct ieee80211_ampdu_params *params) 562c8846e10SFelix Fietkau { 563c8846e10SFelix Fietkau enum ieee80211_ampdu_mlme_action action = params->action; 564c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv; 565c8846e10SFelix Fietkau struct ieee80211_sta *sta = params->sta; 566c8846e10SFelix Fietkau struct ieee80211_txq *txq = sta->txq[params->tid]; 567c8846e10SFelix Fietkau struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv; 568c8846e10SFelix Fietkau u16 tid = params->tid; 569f8f3b20aSStanislaw Gruszka u16 ssn = params->ssn; 570c8846e10SFelix Fietkau u8 ba_size = params->buf_size; 571c8846e10SFelix Fietkau struct mt76_txq *mtxq; 57205d6c8cfSMarkus Theil int ret = 0; 573c8846e10SFelix Fietkau 574c8846e10SFelix Fietkau if (!txq) 575c8846e10SFelix Fietkau return -EINVAL; 576c8846e10SFelix Fietkau 577c8846e10SFelix Fietkau mtxq = (struct mt76_txq *)txq->drv_priv; 578c8846e10SFelix Fietkau 5791a817fa7SFelix Fietkau mutex_lock(&dev->mt76.mutex); 580c8846e10SFelix Fietkau switch (action) { 581c8846e10SFelix Fietkau case IEEE80211_AMPDU_RX_START: 582f8f3b20aSStanislaw Gruszka mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid, ssn, 583c8846e10SFelix Fietkau params->buf_size); 584c8846e10SFelix Fietkau mt7603_mac_rx_ba_reset(dev, sta->addr, tid); 585c8846e10SFelix Fietkau break; 586c8846e10SFelix Fietkau case IEEE80211_AMPDU_RX_STOP: 587c8846e10SFelix Fietkau mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid); 588c8846e10SFelix Fietkau break; 589c8846e10SFelix Fietkau case IEEE80211_AMPDU_TX_OPERATIONAL: 590c8846e10SFelix Fietkau mtxq->aggr = true; 591c8846e10SFelix Fietkau mtxq->send_bar = false; 592aa3cb24bSFelix Fietkau mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, ba_size); 593c8846e10SFelix Fietkau break; 594c8846e10SFelix Fietkau case IEEE80211_AMPDU_TX_STOP_FLUSH: 595c8846e10SFelix Fietkau case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: 596c8846e10SFelix Fietkau mtxq->aggr = false; 597aa3cb24bSFelix Fietkau mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, -1); 598c8846e10SFelix Fietkau break; 599c8846e10SFelix Fietkau case IEEE80211_AMPDU_TX_START: 600f8f3b20aSStanislaw Gruszka mtxq->agg_ssn = IEEE80211_SN_TO_SEQ(ssn); 60105d6c8cfSMarkus Theil ret = IEEE80211_AMPDU_TX_START_IMMEDIATE; 60205d6c8cfSMarkus Theil break; 603c8846e10SFelix Fietkau case IEEE80211_AMPDU_TX_STOP_CONT: 604c8846e10SFelix Fietkau mtxq->aggr = false; 605aa3cb24bSFelix Fietkau mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, -1); 606c8846e10SFelix Fietkau ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); 607c8846e10SFelix Fietkau break; 608c8846e10SFelix Fietkau } 6091a817fa7SFelix Fietkau mutex_unlock(&dev->mt76.mutex); 610c8846e10SFelix Fietkau 61105d6c8cfSMarkus Theil return ret; 612c8846e10SFelix Fietkau } 613c8846e10SFelix Fietkau 614c8846e10SFelix Fietkau static void 615c8846e10SFelix Fietkau mt7603_sta_rate_tbl_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 616c8846e10SFelix Fietkau struct ieee80211_sta *sta) 617c8846e10SFelix Fietkau { 618c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv; 619c8846e10SFelix Fietkau struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv; 620c8846e10SFelix Fietkau struct ieee80211_sta_rates *sta_rates = rcu_dereference(sta->rates); 621c8846e10SFelix Fietkau int i; 622c8846e10SFelix Fietkau 623c8846e10SFelix Fietkau spin_lock_bh(&dev->mt76.lock); 624c8846e10SFelix Fietkau for (i = 0; i < ARRAY_SIZE(msta->rates); i++) { 625c8846e10SFelix Fietkau msta->rates[i].idx = sta_rates->rate[i].idx; 626c8846e10SFelix Fietkau msta->rates[i].count = sta_rates->rate[i].count; 627c8846e10SFelix Fietkau msta->rates[i].flags = sta_rates->rate[i].flags; 628c8846e10SFelix Fietkau 629c8846e10SFelix Fietkau if (msta->rates[i].idx < 0 || !msta->rates[i].count) 630c8846e10SFelix Fietkau break; 631c8846e10SFelix Fietkau } 632c8846e10SFelix Fietkau msta->n_rates = i; 633c8846e10SFelix Fietkau mt7603_wtbl_set_rates(dev, msta, NULL, msta->rates); 634c8846e10SFelix Fietkau msta->rate_probe = false; 635c8846e10SFelix Fietkau mt7603_wtbl_set_smps(dev, msta, 636c8846e10SFelix Fietkau sta->smps_mode == IEEE80211_SMPS_DYNAMIC); 637c8846e10SFelix Fietkau spin_unlock_bh(&dev->mt76.lock); 638c8846e10SFelix Fietkau } 639c8846e10SFelix Fietkau 640c8846e10SFelix Fietkau static void 641c8846e10SFelix Fietkau mt7603_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class) 642c8846e10SFelix Fietkau { 643c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv; 644c8846e10SFelix Fietkau 645c8846e10SFelix Fietkau dev->coverage_class = coverage_class; 646c8846e10SFelix Fietkau mt7603_mac_set_timing(dev); 647c8846e10SFelix Fietkau } 648c8846e10SFelix Fietkau 6497f17b86aSRyder Lee static void mt7603_tx(struct ieee80211_hw *hw, 6507f17b86aSRyder Lee struct ieee80211_tx_control *control, 651c8846e10SFelix Fietkau struct sk_buff *skb) 652c8846e10SFelix Fietkau { 653c8846e10SFelix Fietkau struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 654c8846e10SFelix Fietkau struct ieee80211_vif *vif = info->control.vif; 655c8846e10SFelix Fietkau struct mt7603_dev *dev = hw->priv; 656c8846e10SFelix Fietkau struct mt76_wcid *wcid = &dev->global_sta.wcid; 657c8846e10SFelix Fietkau 658c8846e10SFelix Fietkau if (control->sta) { 659c8846e10SFelix Fietkau struct mt7603_sta *msta; 660c8846e10SFelix Fietkau 661c8846e10SFelix Fietkau msta = (struct mt7603_sta *)control->sta->drv_priv; 662c8846e10SFelix Fietkau wcid = &msta->wcid; 663c8846e10SFelix Fietkau } else if (vif) { 664c8846e10SFelix Fietkau struct mt7603_vif *mvif; 665c8846e10SFelix Fietkau 666c8846e10SFelix Fietkau mvif = (struct mt7603_vif *)vif->drv_priv; 667c8846e10SFelix Fietkau wcid = &mvif->sta.wcid; 668c8846e10SFelix Fietkau } 669c8846e10SFelix Fietkau 6709fba6d07SFelix Fietkau mt76_tx(&dev->mphy, control->sta, wcid, skb); 671c8846e10SFelix Fietkau } 672c8846e10SFelix Fietkau 673c8846e10SFelix Fietkau const struct ieee80211_ops mt7603_ops = { 674c8846e10SFelix Fietkau .tx = mt7603_tx, 675c8846e10SFelix Fietkau .start = mt7603_start, 676c8846e10SFelix Fietkau .stop = mt7603_stop, 677c8846e10SFelix Fietkau .add_interface = mt7603_add_interface, 678c8846e10SFelix Fietkau .remove_interface = mt7603_remove_interface, 679c8846e10SFelix Fietkau .config = mt7603_config, 680c8846e10SFelix Fietkau .configure_filter = mt7603_configure_filter, 681c8846e10SFelix Fietkau .bss_info_changed = mt7603_bss_info_changed, 682c8846e10SFelix Fietkau .sta_state = mt76_sta_state, 683c8846e10SFelix Fietkau .set_key = mt7603_set_key, 684c8846e10SFelix Fietkau .conf_tx = mt7603_conf_tx, 6858b8ab5c2SLorenzo Bianconi .sw_scan_start = mt76_sw_scan, 6868b8ab5c2SLorenzo Bianconi .sw_scan_complete = mt76_sw_scan_complete, 687c8846e10SFelix Fietkau .flush = mt7603_flush, 688c8846e10SFelix Fietkau .ampdu_action = mt7603_ampdu_action, 689c8846e10SFelix Fietkau .get_txpower = mt76_get_txpower, 690c8846e10SFelix Fietkau .wake_tx_queue = mt76_wake_tx_queue, 691c8846e10SFelix Fietkau .sta_rate_tbl_update = mt7603_sta_rate_tbl_update, 692c8846e10SFelix Fietkau .release_buffered_frames = mt7603_release_buffered_frames, 693c8846e10SFelix Fietkau .set_coverage_class = mt7603_set_coverage_class, 69487d53103SStanislaw Gruszka .set_tim = mt76_set_tim, 695c8846e10SFelix Fietkau .get_survey = mt76_get_survey, 696e49c76d4SLorenzo Bianconi .get_antenna = mt76_get_antenna, 697c8846e10SFelix Fietkau }; 698c8846e10SFelix Fietkau 699c8846e10SFelix Fietkau MODULE_LICENSE("Dual BSD/GPL"); 700c8846e10SFelix Fietkau 701c8846e10SFelix Fietkau static int __init mt7603_init(void) 702c8846e10SFelix Fietkau { 703c8846e10SFelix Fietkau int ret; 704c8846e10SFelix Fietkau 705c8846e10SFelix Fietkau ret = platform_driver_register(&mt76_wmac_driver); 706c8846e10SFelix Fietkau if (ret) 707c8846e10SFelix Fietkau return ret; 708c8846e10SFelix Fietkau 709c8846e10SFelix Fietkau #ifdef CONFIG_PCI 710c8846e10SFelix Fietkau ret = pci_register_driver(&mt7603_pci_driver); 711c8846e10SFelix Fietkau if (ret) 712c8846e10SFelix Fietkau platform_driver_unregister(&mt76_wmac_driver); 713c8846e10SFelix Fietkau #endif 714c8846e10SFelix Fietkau return ret; 715c8846e10SFelix Fietkau } 716c8846e10SFelix Fietkau 717c8846e10SFelix Fietkau static void __exit mt7603_exit(void) 718c8846e10SFelix Fietkau { 719c8846e10SFelix Fietkau #ifdef CONFIG_PCI 720c8846e10SFelix Fietkau pci_unregister_driver(&mt7603_pci_driver); 721c8846e10SFelix Fietkau #endif 722c8846e10SFelix Fietkau platform_driver_unregister(&mt76_wmac_driver); 723c8846e10SFelix Fietkau } 724c8846e10SFelix Fietkau 725c8846e10SFelix Fietkau module_init(mt7603_init); 726c8846e10SFelix Fietkau module_exit(mt7603_exit); 727