1 // SPDX-License-Identifier: ISC
2 
3 #include <linux/of.h>
4 #include "mt7603.h"
5 #include "eeprom.h"
6 
7 static int
8 mt7603_efuse_read(struct mt7603_dev *dev, u32 base, u16 addr, u8 *data)
9 {
10 	u32 val;
11 	int i;
12 
13 	val = mt76_rr(dev, base + MT_EFUSE_CTRL);
14 	val &= ~(MT_EFUSE_CTRL_AIN |
15 		 MT_EFUSE_CTRL_MODE);
16 	val |= FIELD_PREP(MT_EFUSE_CTRL_AIN, addr & ~0xf);
17 	val |= MT_EFUSE_CTRL_KICK;
18 	mt76_wr(dev, base + MT_EFUSE_CTRL, val);
19 
20 	if (!mt76_poll(dev, base + MT_EFUSE_CTRL, MT_EFUSE_CTRL_KICK, 0, 1000))
21 		return -ETIMEDOUT;
22 
23 	udelay(2);
24 
25 	val = mt76_rr(dev, base + MT_EFUSE_CTRL);
26 	if ((val & MT_EFUSE_CTRL_AOUT) == MT_EFUSE_CTRL_AOUT ||
27 	    WARN_ON_ONCE(!(val & MT_EFUSE_CTRL_VALID))) {
28 		memset(data, 0xff, 16);
29 		return 0;
30 	}
31 
32 	for (i = 0; i < 4; i++) {
33 		val = mt76_rr(dev, base + MT_EFUSE_RDATA(i));
34 		put_unaligned_le32(val, data + 4 * i);
35 	}
36 
37 	return 0;
38 }
39 
40 static int
41 mt7603_efuse_init(struct mt7603_dev *dev)
42 {
43 	u32 base = mt7603_reg_map(dev, MT_EFUSE_BASE);
44 	int len = MT7603_EEPROM_SIZE;
45 	void *buf;
46 	int ret, i;
47 
48 	if (mt76_rr(dev, base + MT_EFUSE_BASE_CTRL) & MT_EFUSE_BASE_CTRL_EMPTY)
49 		return 0;
50 
51 	dev->mt76.otp.data = devm_kzalloc(dev->mt76.dev, len, GFP_KERNEL);
52 	dev->mt76.otp.size = len;
53 	if (!dev->mt76.otp.data)
54 		return -ENOMEM;
55 
56 	buf = dev->mt76.otp.data;
57 	for (i = 0; i + 16 <= len; i += 16) {
58 		ret = mt7603_efuse_read(dev, base, i, buf + i);
59 		if (ret)
60 			return ret;
61 	}
62 
63 	return 0;
64 }
65 
66 static bool
67 mt7603_has_cal_free_data(struct mt7603_dev *dev, u8 *efuse)
68 {
69 	if (!efuse[MT_EE_TEMP_SENSOR_CAL])
70 		return false;
71 
72 	if (get_unaligned_le16(efuse + MT_EE_TX_POWER_0_START_2G) == 0)
73 		return false;
74 
75 	if (get_unaligned_le16(efuse + MT_EE_TX_POWER_1_START_2G) == 0)
76 		return false;
77 
78 	if (!efuse[MT_EE_CP_FT_VERSION])
79 		return false;
80 
81 	if (!efuse[MT_EE_XTAL_FREQ_OFFSET])
82 		return false;
83 
84 	if (!efuse[MT_EE_XTAL_WF_RFCAL])
85 		return false;
86 
87 	return true;
88 }
89 
90 static void
91 mt7603_apply_cal_free_data(struct mt7603_dev *dev, u8 *efuse)
92 {
93 	static const u8 cal_free_bytes[] = {
94 		MT_EE_TEMP_SENSOR_CAL,
95 		MT_EE_CP_FT_VERSION,
96 		MT_EE_XTAL_FREQ_OFFSET,
97 		MT_EE_XTAL_WF_RFCAL,
98 		/* Skip for MT7628 */
99 		MT_EE_TX_POWER_0_START_2G,
100 		MT_EE_TX_POWER_0_START_2G + 1,
101 		MT_EE_TX_POWER_1_START_2G,
102 		MT_EE_TX_POWER_1_START_2G + 1,
103 	};
104 	struct device_node *np = dev->mt76.dev->of_node;
105 	u8 *eeprom = dev->mt76.eeprom.data;
106 	int n = ARRAY_SIZE(cal_free_bytes);
107 	int i;
108 
109 	if (!np || !of_property_read_bool(np, "mediatek,eeprom-merge-otp"))
110 		return;
111 
112 	if (!mt7603_has_cal_free_data(dev, efuse))
113 		return;
114 
115 	if (is_mt7628(dev))
116 		n -= 4;
117 
118 	for (i = 0; i < n; i++) {
119 		int offset = cal_free_bytes[i];
120 
121 		eeprom[offset] = efuse[offset];
122 	}
123 }
124 
125 static int
126 mt7603_eeprom_load(struct mt7603_dev *dev)
127 {
128 	int ret;
129 
130 	ret = mt76_eeprom_init(&dev->mt76, MT7603_EEPROM_SIZE);
131 	if (ret < 0)
132 		return ret;
133 
134 	return mt7603_efuse_init(dev);
135 }
136 
137 static int mt7603_check_eeprom(struct mt76_dev *dev)
138 {
139 	u16 val = get_unaligned_le16(dev->eeprom.data);
140 
141 	switch (val) {
142 	case 0x7628:
143 	case 0x7603:
144 		return 0;
145 	default:
146 		return -EINVAL;
147 	}
148 }
149 
150 int mt7603_eeprom_init(struct mt7603_dev *dev)
151 {
152 	int ret;
153 
154 	ret = mt7603_eeprom_load(dev);
155 	if (ret < 0)
156 		return ret;
157 
158 	if (dev->mt76.otp.data) {
159 		if (mt7603_check_eeprom(&dev->mt76) == 0)
160 			mt7603_apply_cal_free_data(dev, dev->mt76.otp.data);
161 		else
162 			memcpy(dev->mt76.eeprom.data, dev->mt76.otp.data,
163 			       MT7603_EEPROM_SIZE);
164 	}
165 
166 	dev->mt76.cap.has_2ghz = true;
167 	memcpy(dev->mt76.macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
168 	       ETH_ALEN);
169 
170 	mt76_eeprom_override(&dev->mt76);
171 
172 	return 0;
173 }
174