1 // SPDX-License-Identifier: ISC 2 3 #include "mt7603.h" 4 #include "mac.h" 5 #include "../dma.h" 6 7 static int 8 mt7603_init_tx_queue(struct mt7603_dev *dev, struct mt76_sw_queue *q, 9 int idx, int n_desc) 10 { 11 struct mt76_queue *hwq; 12 int err; 13 14 hwq = devm_kzalloc(dev->mt76.dev, sizeof(*hwq), GFP_KERNEL); 15 if (!hwq) 16 return -ENOMEM; 17 18 err = mt76_queue_alloc(dev, hwq, idx, n_desc, 0, MT_TX_RING_BASE); 19 if (err < 0) 20 return err; 21 22 INIT_LIST_HEAD(&q->swq); 23 q->q = hwq; 24 25 mt7603_irq_enable(dev, MT_INT_TX_DONE(idx)); 26 27 return 0; 28 } 29 30 static void 31 mt7603_rx_loopback_skb(struct mt7603_dev *dev, struct sk_buff *skb) 32 { 33 static const u8 tid_to_ac[8] = { 34 IEEE80211_AC_BE, 35 IEEE80211_AC_BK, 36 IEEE80211_AC_BK, 37 IEEE80211_AC_BE, 38 IEEE80211_AC_VI, 39 IEEE80211_AC_VI, 40 IEEE80211_AC_VO, 41 IEEE80211_AC_VO 42 }; 43 __le32 *txd = (__le32 *)skb->data; 44 struct ieee80211_hdr *hdr; 45 struct ieee80211_sta *sta; 46 struct mt7603_sta *msta; 47 struct mt76_wcid *wcid; 48 void *priv; 49 int idx; 50 u32 val; 51 u8 tid = 0; 52 53 if (skb->len < MT_TXD_SIZE + sizeof(struct ieee80211_hdr)) 54 goto free; 55 56 val = le32_to_cpu(txd[1]); 57 idx = FIELD_GET(MT_TXD1_WLAN_IDX, val); 58 skb->priority = FIELD_GET(MT_TXD1_TID, val); 59 60 if (idx >= MT7603_WTBL_STA - 1) 61 goto free; 62 63 wcid = rcu_dereference(dev->mt76.wcid[idx]); 64 if (!wcid) 65 goto free; 66 67 priv = msta = container_of(wcid, struct mt7603_sta, wcid); 68 val = le32_to_cpu(txd[0]); 69 val &= ~(MT_TXD0_P_IDX | MT_TXD0_Q_IDX); 70 val |= FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_HW_QUEUE_MGMT); 71 txd[0] = cpu_to_le32(val); 72 73 sta = container_of(priv, struct ieee80211_sta, drv_priv); 74 hdr = (struct ieee80211_hdr *)&skb->data[MT_TXD_SIZE]; 75 if (ieee80211_is_data_qos(hdr->frame_control)) 76 tid = *ieee80211_get_qos_ctl(hdr) & 77 IEEE80211_QOS_CTL_TAG1D_MASK; 78 skb_set_queue_mapping(skb, tid_to_ac[tid]); 79 ieee80211_sta_set_buffered(sta, tid, true); 80 81 spin_lock_bh(&dev->ps_lock); 82 __skb_queue_tail(&msta->psq, skb); 83 if (skb_queue_len(&msta->psq) >= 64) { 84 skb = __skb_dequeue(&msta->psq); 85 dev_kfree_skb(skb); 86 } 87 spin_unlock_bh(&dev->ps_lock); 88 return; 89 90 free: 91 dev_kfree_skb(skb); 92 } 93 94 void mt7603_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 95 struct sk_buff *skb) 96 { 97 struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76); 98 __le32 *rxd = (__le32 *)skb->data; 99 __le32 *end = (__le32 *)&skb->data[skb->len]; 100 enum rx_pkt_type type; 101 102 type = FIELD_GET(MT_RXD0_PKT_TYPE, le32_to_cpu(rxd[0])); 103 104 if (q == MT_RXQ_MCU) { 105 if (type == PKT_TYPE_RX_EVENT) 106 mt76_mcu_rx_event(&dev->mt76, skb); 107 else 108 mt7603_rx_loopback_skb(dev, skb); 109 return; 110 } 111 112 switch (type) { 113 case PKT_TYPE_TXS: 114 for (rxd++; rxd + 5 <= end; rxd += 5) 115 mt7603_mac_add_txs(dev, rxd); 116 dev_kfree_skb(skb); 117 break; 118 case PKT_TYPE_RX_EVENT: 119 mt76_mcu_rx_event(&dev->mt76, skb); 120 return; 121 case PKT_TYPE_NORMAL: 122 if (mt7603_mac_fill_rx(dev, skb) == 0) { 123 mt76_rx(&dev->mt76, q, skb); 124 return; 125 } 126 /* fall through */ 127 default: 128 dev_kfree_skb(skb); 129 break; 130 } 131 } 132 133 static int 134 mt7603_init_rx_queue(struct mt7603_dev *dev, struct mt76_queue *q, 135 int idx, int n_desc, int bufsize) 136 { 137 int err; 138 139 err = mt76_queue_alloc(dev, q, idx, n_desc, bufsize, 140 MT_RX_RING_BASE); 141 if (err < 0) 142 return err; 143 144 mt7603_irq_enable(dev, MT_INT_RX_DONE(idx)); 145 146 return 0; 147 } 148 149 static int mt7603_poll_tx(struct napi_struct *napi, int budget) 150 { 151 struct mt7603_dev *dev; 152 int i; 153 154 dev = container_of(napi, struct mt7603_dev, mt76.tx_napi); 155 dev->tx_dma_check = 0; 156 157 for (i = MT_TXQ_MCU; i >= 0; i--) 158 mt76_queue_tx_cleanup(dev, i, false); 159 160 if (napi_complete_done(napi, 0)) 161 mt7603_irq_enable(dev, MT_INT_TX_DONE_ALL); 162 163 for (i = MT_TXQ_MCU; i >= 0; i--) 164 mt76_queue_tx_cleanup(dev, i, false); 165 166 mt7603_mac_sta_poll(dev); 167 168 tasklet_schedule(&dev->mt76.tx_tasklet); 169 170 return 0; 171 } 172 173 int mt7603_dma_init(struct mt7603_dev *dev) 174 { 175 static const u8 wmm_queue_map[] = { 176 [IEEE80211_AC_BK] = 0, 177 [IEEE80211_AC_BE] = 1, 178 [IEEE80211_AC_VI] = 2, 179 [IEEE80211_AC_VO] = 3, 180 }; 181 int ret; 182 int i; 183 184 mt76_dma_attach(&dev->mt76); 185 186 mt76_clear(dev, MT_WPDMA_GLO_CFG, 187 MT_WPDMA_GLO_CFG_TX_DMA_EN | 188 MT_WPDMA_GLO_CFG_RX_DMA_EN | 189 MT_WPDMA_GLO_CFG_DMA_BURST_SIZE | 190 MT_WPDMA_GLO_CFG_TX_WRITEBACK_DONE); 191 192 mt76_wr(dev, MT_WPDMA_RST_IDX, ~0); 193 mt7603_pse_client_reset(dev); 194 195 for (i = 0; i < ARRAY_SIZE(wmm_queue_map); i++) { 196 ret = mt7603_init_tx_queue(dev, &dev->mt76.q_tx[i], 197 wmm_queue_map[i], 198 MT_TX_RING_SIZE); 199 if (ret) 200 return ret; 201 } 202 203 ret = mt7603_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_PSD], 204 MT_TX_HW_QUEUE_MGMT, MT_TX_RING_SIZE); 205 if (ret) 206 return ret; 207 208 ret = mt7603_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_MCU], 209 MT_TX_HW_QUEUE_MCU, MT_MCU_RING_SIZE); 210 if (ret) 211 return ret; 212 213 ret = mt7603_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_BEACON], 214 MT_TX_HW_QUEUE_BCN, MT_MCU_RING_SIZE); 215 if (ret) 216 return ret; 217 218 ret = mt7603_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_CAB], 219 MT_TX_HW_QUEUE_BMC, MT_MCU_RING_SIZE); 220 if (ret) 221 return ret; 222 223 ret = mt7603_init_rx_queue(dev, &dev->mt76.q_rx[MT_RXQ_MCU], 1, 224 MT7603_MCU_RX_RING_SIZE, MT_RX_BUF_SIZE); 225 if (ret) 226 return ret; 227 228 ret = mt7603_init_rx_queue(dev, &dev->mt76.q_rx[MT_RXQ_MAIN], 0, 229 MT7603_RX_RING_SIZE, MT_RX_BUF_SIZE); 230 if (ret) 231 return ret; 232 233 mt76_wr(dev, MT_DELAY_INT_CFG, 0); 234 ret = mt76_init_queues(dev); 235 if (ret) 236 return ret; 237 238 netif_tx_napi_add(&dev->mt76.napi_dev, &dev->mt76.tx_napi, 239 mt7603_poll_tx, NAPI_POLL_WEIGHT); 240 napi_enable(&dev->mt76.tx_napi); 241 242 return 0; 243 } 244 245 void mt7603_dma_cleanup(struct mt7603_dev *dev) 246 { 247 mt76_clear(dev, MT_WPDMA_GLO_CFG, 248 MT_WPDMA_GLO_CFG_TX_DMA_EN | 249 MT_WPDMA_GLO_CFG_RX_DMA_EN | 250 MT_WPDMA_GLO_CFG_TX_WRITEBACK_DONE); 251 252 tasklet_kill(&dev->mt76.tx_tasklet); 253 mt76_dma_cleanup(&dev->mt76); 254 } 255