1 /* 2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name> 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef __MT76_H 18 #define __MT76_H 19 20 #include <linux/kernel.h> 21 #include <linux/io.h> 22 #include <linux/spinlock.h> 23 #include <linux/skbuff.h> 24 #include <linux/leds.h> 25 #include <linux/usb.h> 26 #include <net/mac80211.h> 27 #include "util.h" 28 29 #define MT_TX_RING_SIZE 256 30 #define MT_MCU_RING_SIZE 32 31 #define MT_RX_BUF_SIZE 2048 32 33 struct mt76_dev; 34 struct mt76_wcid; 35 36 struct mt76_reg_pair { 37 u32 reg; 38 u32 value; 39 }; 40 41 enum mt76_bus_type { 42 MT76_BUS_MMIO, 43 MT76_BUS_USB, 44 }; 45 46 struct mt76_bus_ops { 47 u32 (*rr)(struct mt76_dev *dev, u32 offset); 48 void (*wr)(struct mt76_dev *dev, u32 offset, u32 val); 49 u32 (*rmw)(struct mt76_dev *dev, u32 offset, u32 mask, u32 val); 50 void (*copy)(struct mt76_dev *dev, u32 offset, const void *data, 51 int len); 52 int (*wr_rp)(struct mt76_dev *dev, u32 base, 53 const struct mt76_reg_pair *rp, int len); 54 int (*rd_rp)(struct mt76_dev *dev, u32 base, 55 struct mt76_reg_pair *rp, int len); 56 enum mt76_bus_type type; 57 }; 58 59 #define mt76_is_usb(dev) ((dev)->mt76.bus->type == MT76_BUS_USB) 60 #define mt76_is_mmio(dev) ((dev)->mt76.bus->type == MT76_BUS_MMIO) 61 62 enum mt76_txq_id { 63 MT_TXQ_VO = IEEE80211_AC_VO, 64 MT_TXQ_VI = IEEE80211_AC_VI, 65 MT_TXQ_BE = IEEE80211_AC_BE, 66 MT_TXQ_BK = IEEE80211_AC_BK, 67 MT_TXQ_PSD, 68 MT_TXQ_MCU, 69 MT_TXQ_BEACON, 70 MT_TXQ_CAB, 71 __MT_TXQ_MAX 72 }; 73 74 enum mt76_rxq_id { 75 MT_RXQ_MAIN, 76 MT_RXQ_MCU, 77 __MT_RXQ_MAX 78 }; 79 80 struct mt76_queue_buf { 81 dma_addr_t addr; 82 int len; 83 }; 84 85 struct mt76u_buf { 86 struct mt76_dev *dev; 87 struct urb *urb; 88 size_t len; 89 bool done; 90 }; 91 92 struct mt76_queue_entry { 93 union { 94 void *buf; 95 struct sk_buff *skb; 96 }; 97 union { 98 struct mt76_txwi_cache *txwi; 99 struct mt76u_buf ubuf; 100 }; 101 bool schedule; 102 }; 103 104 struct mt76_queue_regs { 105 u32 desc_base; 106 u32 ring_size; 107 u32 cpu_idx; 108 u32 dma_idx; 109 } __packed __aligned(4); 110 111 struct mt76_queue { 112 struct mt76_queue_regs __iomem *regs; 113 114 spinlock_t lock; 115 struct mt76_queue_entry *entry; 116 struct mt76_desc *desc; 117 118 struct list_head swq; 119 int swq_queued; 120 121 u16 first; 122 u16 head; 123 u16 tail; 124 int ndesc; 125 int queued; 126 int buf_size; 127 128 u8 buf_offset; 129 u8 hw_idx; 130 131 dma_addr_t desc_dma; 132 struct sk_buff *rx_head; 133 struct page_frag_cache rx_page; 134 spinlock_t rx_page_lock; 135 }; 136 137 struct mt76_mcu_ops { 138 int (*mcu_send_msg)(struct mt76_dev *dev, int cmd, const void *data, 139 int len, bool wait_resp); 140 int (*mcu_wr_rp)(struct mt76_dev *dev, u32 base, 141 const struct mt76_reg_pair *rp, int len); 142 int (*mcu_rd_rp)(struct mt76_dev *dev, u32 base, 143 struct mt76_reg_pair *rp, int len); 144 }; 145 146 struct mt76_queue_ops { 147 int (*init)(struct mt76_dev *dev); 148 149 int (*alloc)(struct mt76_dev *dev, struct mt76_queue *q); 150 151 int (*add_buf)(struct mt76_dev *dev, struct mt76_queue *q, 152 struct mt76_queue_buf *buf, int nbufs, u32 info, 153 struct sk_buff *skb, void *txwi); 154 155 int (*tx_queue_skb)(struct mt76_dev *dev, struct mt76_queue *q, 156 struct sk_buff *skb, struct mt76_wcid *wcid, 157 struct ieee80211_sta *sta); 158 159 void *(*dequeue)(struct mt76_dev *dev, struct mt76_queue *q, bool flush, 160 int *len, u32 *info, bool *more); 161 162 void (*rx_reset)(struct mt76_dev *dev, enum mt76_rxq_id qid); 163 164 void (*tx_cleanup)(struct mt76_dev *dev, enum mt76_txq_id qid, 165 bool flush); 166 167 void (*kick)(struct mt76_dev *dev, struct mt76_queue *q); 168 }; 169 170 enum mt76_wcid_flags { 171 MT_WCID_FLAG_CHECK_PS, 172 MT_WCID_FLAG_PS, 173 }; 174 175 #define MT76_N_WCIDS 128 176 177 struct mt76_wcid { 178 struct mt76_rx_tid __rcu *aggr[IEEE80211_NUM_TIDS]; 179 180 struct work_struct aggr_work; 181 182 unsigned long flags; 183 184 u8 idx; 185 u8 hw_key_idx; 186 187 u8 sta:1; 188 189 u8 rx_check_pn; 190 u8 rx_key_pn[IEEE80211_NUM_TIDS][6]; 191 192 __le16 tx_rate; 193 bool tx_rate_set; 194 u8 tx_rate_nss; 195 s8 max_txpwr_adj; 196 bool sw_iv; 197 198 u8 packet_id; 199 }; 200 201 struct mt76_txq { 202 struct list_head list; 203 struct mt76_queue *hwq; 204 struct mt76_wcid *wcid; 205 206 struct sk_buff_head retry_q; 207 208 u16 agg_ssn; 209 bool send_bar; 210 bool aggr; 211 }; 212 213 struct mt76_txwi_cache { 214 u32 txwi[8]; 215 dma_addr_t dma_addr; 216 struct list_head list; 217 }; 218 219 220 struct mt76_rx_tid { 221 struct rcu_head rcu_head; 222 223 struct mt76_dev *dev; 224 225 spinlock_t lock; 226 struct delayed_work reorder_work; 227 228 u16 head; 229 u8 size; 230 u8 nframes; 231 232 u8 started:1, stopped:1, timer_pending:1; 233 234 struct sk_buff *reorder_buf[]; 235 }; 236 237 #define MT_TX_CB_DMA_DONE BIT(0) 238 #define MT_TX_CB_TXS_DONE BIT(1) 239 #define MT_TX_CB_TXS_FAILED BIT(2) 240 241 #define MT_PACKET_ID_MASK GENMASK(7, 0) 242 #define MT_PACKET_ID_NO_ACK MT_PACKET_ID_MASK 243 244 #define MT_TX_STATUS_SKB_TIMEOUT HZ 245 246 struct mt76_tx_cb { 247 unsigned long jiffies; 248 u8 wcid; 249 u8 pktid; 250 u8 flags; 251 }; 252 253 enum { 254 MT76_STATE_INITIALIZED, 255 MT76_STATE_RUNNING, 256 MT76_STATE_MCU_RUNNING, 257 MT76_SCANNING, 258 MT76_RESET, 259 MT76_OFFCHANNEL, 260 MT76_REMOVED, 261 MT76_READING_STATS, 262 }; 263 264 struct mt76_hw_cap { 265 bool has_2ghz; 266 bool has_5ghz; 267 }; 268 269 struct mt76_driver_ops { 270 u16 txwi_size; 271 272 void (*update_survey)(struct mt76_dev *dev); 273 274 int (*tx_prepare_skb)(struct mt76_dev *dev, void *txwi_ptr, 275 struct sk_buff *skb, struct mt76_queue *q, 276 struct mt76_wcid *wcid, 277 struct ieee80211_sta *sta, u32 *tx_info); 278 279 void (*tx_complete_skb)(struct mt76_dev *dev, struct mt76_queue *q, 280 struct mt76_queue_entry *e, bool flush); 281 282 bool (*tx_status_data)(struct mt76_dev *dev, u8 *update); 283 284 void (*rx_skb)(struct mt76_dev *dev, enum mt76_rxq_id q, 285 struct sk_buff *skb); 286 287 void (*rx_poll_complete)(struct mt76_dev *dev, enum mt76_rxq_id q); 288 289 void (*sta_ps)(struct mt76_dev *dev, struct ieee80211_sta *sta, 290 bool ps); 291 292 int (*sta_add)(struct mt76_dev *dev, struct ieee80211_vif *vif, 293 struct ieee80211_sta *sta); 294 295 void (*sta_remove)(struct mt76_dev *dev, struct ieee80211_vif *vif, 296 struct ieee80211_sta *sta); 297 }; 298 299 struct mt76_channel_state { 300 u64 cc_active; 301 u64 cc_busy; 302 }; 303 304 struct mt76_sband { 305 struct ieee80211_supported_band sband; 306 struct mt76_channel_state *chan; 307 }; 308 309 struct mt76_rate_power { 310 union { 311 struct { 312 s8 cck[4]; 313 s8 ofdm[8]; 314 s8 stbc[10]; 315 s8 ht[16]; 316 s8 vht[10]; 317 }; 318 s8 all[48]; 319 }; 320 }; 321 322 /* addr req mask */ 323 #define MT_VEND_TYPE_EEPROM BIT(31) 324 #define MT_VEND_TYPE_CFG BIT(30) 325 #define MT_VEND_TYPE_MASK (MT_VEND_TYPE_EEPROM | MT_VEND_TYPE_CFG) 326 327 #define MT_VEND_ADDR(type, n) (MT_VEND_TYPE_##type | (n)) 328 enum mt_vendor_req { 329 MT_VEND_DEV_MODE = 0x1, 330 MT_VEND_WRITE = 0x2, 331 MT_VEND_MULTI_WRITE = 0x6, 332 MT_VEND_MULTI_READ = 0x7, 333 MT_VEND_READ_EEPROM = 0x9, 334 MT_VEND_WRITE_FCE = 0x42, 335 MT_VEND_WRITE_CFG = 0x46, 336 MT_VEND_READ_CFG = 0x47, 337 }; 338 339 enum mt76u_in_ep { 340 MT_EP_IN_PKT_RX, 341 MT_EP_IN_CMD_RESP, 342 __MT_EP_IN_MAX, 343 }; 344 345 enum mt76u_out_ep { 346 MT_EP_OUT_INBAND_CMD, 347 MT_EP_OUT_AC_BK, 348 MT_EP_OUT_AC_BE, 349 MT_EP_OUT_AC_VI, 350 MT_EP_OUT_AC_VO, 351 MT_EP_OUT_HCCA, 352 __MT_EP_OUT_MAX, 353 }; 354 355 #define MT_SG_MAX_SIZE 8 356 #define MT_NUM_TX_ENTRIES 256 357 #define MT_NUM_RX_ENTRIES 128 358 #define MCU_RESP_URB_SIZE 1024 359 struct mt76_usb { 360 struct mutex usb_ctrl_mtx; 361 u8 data[32]; 362 363 struct tasklet_struct rx_tasklet; 364 struct tasklet_struct tx_tasklet; 365 struct delayed_work stat_work; 366 367 u8 out_ep[__MT_EP_OUT_MAX]; 368 u16 out_max_packet; 369 u8 in_ep[__MT_EP_IN_MAX]; 370 u16 in_max_packet; 371 372 struct mt76u_mcu { 373 struct mutex mutex; 374 struct completion cmpl; 375 struct mt76u_buf res; 376 u32 msg_seq; 377 378 /* multiple reads */ 379 struct mt76_reg_pair *rp; 380 int rp_len; 381 u32 base; 382 bool burst; 383 } mcu; 384 }; 385 386 struct mt76_mmio { 387 struct mt76e_mcu { 388 struct mutex mutex; 389 390 wait_queue_head_t wait; 391 struct sk_buff_head res_q; 392 393 u32 msg_seq; 394 } mcu; 395 void __iomem *regs; 396 spinlock_t irq_lock; 397 u32 irqmask; 398 }; 399 400 struct mt76_dev { 401 struct ieee80211_hw *hw; 402 struct cfg80211_chan_def chandef; 403 struct ieee80211_channel *main_chan; 404 405 spinlock_t lock; 406 spinlock_t cc_lock; 407 408 struct mutex mutex; 409 410 const struct mt76_bus_ops *bus; 411 const struct mt76_driver_ops *drv; 412 const struct mt76_mcu_ops *mcu_ops; 413 struct device *dev; 414 415 struct net_device napi_dev; 416 spinlock_t rx_lock; 417 struct napi_struct napi[__MT_RXQ_MAX]; 418 struct sk_buff_head rx_skb[__MT_RXQ_MAX]; 419 420 struct list_head txwi_cache; 421 struct mt76_queue q_tx[__MT_TXQ_MAX]; 422 struct mt76_queue q_rx[__MT_RXQ_MAX]; 423 const struct mt76_queue_ops *queue_ops; 424 425 wait_queue_head_t tx_wait; 426 struct sk_buff_head status_list; 427 428 unsigned long wcid_mask[MT76_N_WCIDS / BITS_PER_LONG]; 429 430 struct mt76_wcid global_wcid; 431 struct mt76_wcid __rcu *wcid[MT76_N_WCIDS]; 432 433 u8 macaddr[ETH_ALEN]; 434 u32 rev; 435 unsigned long state; 436 437 u8 antenna_mask; 438 u16 chainmask; 439 440 struct mt76_sband sband_2g; 441 struct mt76_sband sband_5g; 442 struct debugfs_blob_wrapper eeprom; 443 struct debugfs_blob_wrapper otp; 444 struct mt76_hw_cap cap; 445 446 struct mt76_rate_power rate_power; 447 int txpower_conf; 448 int txpower_cur; 449 450 u32 debugfs_reg; 451 452 struct led_classdev led_cdev; 453 char led_name[32]; 454 bool led_al; 455 u8 led_pin; 456 457 u32 rxfilter; 458 459 union { 460 struct mt76_mmio mmio; 461 struct mt76_usb usb; 462 }; 463 }; 464 465 enum mt76_phy_type { 466 MT_PHY_TYPE_CCK, 467 MT_PHY_TYPE_OFDM, 468 MT_PHY_TYPE_HT, 469 MT_PHY_TYPE_HT_GF, 470 MT_PHY_TYPE_VHT, 471 }; 472 473 struct mt76_rx_status { 474 struct mt76_wcid *wcid; 475 476 unsigned long reorder_time; 477 478 u8 iv[6]; 479 480 u8 aggr:1; 481 u8 tid; 482 u16 seqno; 483 484 u16 freq; 485 u32 flag; 486 u8 enc_flags; 487 u8 encoding:2, bw:3; 488 u8 rate_idx; 489 u8 nss; 490 u8 band; 491 u8 signal; 492 u8 chains; 493 s8 chain_signal[IEEE80211_MAX_CHAINS]; 494 }; 495 496 #define __mt76_rr(dev, ...) (dev)->bus->rr((dev), __VA_ARGS__) 497 #define __mt76_wr(dev, ...) (dev)->bus->wr((dev), __VA_ARGS__) 498 #define __mt76_rmw(dev, ...) (dev)->bus->rmw((dev), __VA_ARGS__) 499 #define __mt76_wr_copy(dev, ...) (dev)->bus->copy((dev), __VA_ARGS__) 500 501 #define __mt76_set(dev, offset, val) __mt76_rmw(dev, offset, 0, val) 502 #define __mt76_clear(dev, offset, val) __mt76_rmw(dev, offset, val, 0) 503 504 #define mt76_rr(dev, ...) (dev)->mt76.bus->rr(&((dev)->mt76), __VA_ARGS__) 505 #define mt76_wr(dev, ...) (dev)->mt76.bus->wr(&((dev)->mt76), __VA_ARGS__) 506 #define mt76_rmw(dev, ...) (dev)->mt76.bus->rmw(&((dev)->mt76), __VA_ARGS__) 507 #define mt76_wr_copy(dev, ...) (dev)->mt76.bus->copy(&((dev)->mt76), __VA_ARGS__) 508 #define mt76_wr_rp(dev, ...) (dev)->mt76.bus->wr_rp(&((dev)->mt76), __VA_ARGS__) 509 #define mt76_rd_rp(dev, ...) (dev)->mt76.bus->rd_rp(&((dev)->mt76), __VA_ARGS__) 510 511 #define mt76_mcu_send_msg(dev, ...) (dev)->mt76.mcu_ops->mcu_send_msg(&((dev)->mt76), __VA_ARGS__) 512 513 #define mt76_set(dev, offset, val) mt76_rmw(dev, offset, 0, val) 514 #define mt76_clear(dev, offset, val) mt76_rmw(dev, offset, val, 0) 515 516 #define mt76_get_field(_dev, _reg, _field) \ 517 FIELD_GET(_field, mt76_rr(dev, _reg)) 518 519 #define mt76_rmw_field(_dev, _reg, _field, _val) \ 520 mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val)) 521 522 #define __mt76_rmw_field(_dev, _reg, _field, _val) \ 523 __mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val)) 524 525 #define mt76_hw(dev) (dev)->mt76.hw 526 527 bool __mt76_poll(struct mt76_dev *dev, u32 offset, u32 mask, u32 val, 528 int timeout); 529 530 #define mt76_poll(dev, ...) __mt76_poll(&((dev)->mt76), __VA_ARGS__) 531 532 bool __mt76_poll_msec(struct mt76_dev *dev, u32 offset, u32 mask, u32 val, 533 int timeout); 534 535 #define mt76_poll_msec(dev, ...) __mt76_poll_msec(&((dev)->mt76), __VA_ARGS__) 536 537 void mt76_mmio_init(struct mt76_dev *dev, void __iomem *regs); 538 539 static inline u16 mt76_chip(struct mt76_dev *dev) 540 { 541 return dev->rev >> 16; 542 } 543 544 static inline u16 mt76_rev(struct mt76_dev *dev) 545 { 546 return dev->rev & 0xffff; 547 } 548 549 #define mt76xx_chip(dev) mt76_chip(&((dev)->mt76)) 550 #define mt76xx_rev(dev) mt76_rev(&((dev)->mt76)) 551 552 #define mt76_init_queues(dev) (dev)->mt76.queue_ops->init(&((dev)->mt76)) 553 #define mt76_queue_alloc(dev, ...) (dev)->mt76.queue_ops->alloc(&((dev)->mt76), __VA_ARGS__) 554 #define mt76_queue_add_buf(dev, ...) (dev)->mt76.queue_ops->add_buf(&((dev)->mt76), __VA_ARGS__) 555 #define mt76_queue_rx_reset(dev, ...) (dev)->mt76.queue_ops->rx_reset(&((dev)->mt76), __VA_ARGS__) 556 #define mt76_queue_tx_cleanup(dev, ...) (dev)->mt76.queue_ops->tx_cleanup(&((dev)->mt76), __VA_ARGS__) 557 #define mt76_queue_kick(dev, ...) (dev)->mt76.queue_ops->kick(&((dev)->mt76), __VA_ARGS__) 558 559 static inline struct mt76_channel_state * 560 mt76_channel_state(struct mt76_dev *dev, struct ieee80211_channel *c) 561 { 562 struct mt76_sband *msband; 563 int idx; 564 565 if (c->band == NL80211_BAND_2GHZ) 566 msband = &dev->sband_2g; 567 else 568 msband = &dev->sband_5g; 569 570 idx = c - &msband->sband.channels[0]; 571 return &msband->chan[idx]; 572 } 573 574 struct mt76_dev *mt76_alloc_device(unsigned int size, 575 const struct ieee80211_ops *ops); 576 int mt76_register_device(struct mt76_dev *dev, bool vht, 577 struct ieee80211_rate *rates, int n_rates); 578 void mt76_unregister_device(struct mt76_dev *dev); 579 580 struct dentry *mt76_register_debugfs(struct mt76_dev *dev); 581 void mt76_seq_puts_array(struct seq_file *file, const char *str, 582 s8 *val, int len); 583 584 int mt76_eeprom_init(struct mt76_dev *dev, int len); 585 void mt76_eeprom_override(struct mt76_dev *dev); 586 587 /* increment with wrap-around */ 588 static inline int mt76_incr(int val, int size) 589 { 590 return (val + 1) & (size - 1); 591 } 592 593 /* decrement with wrap-around */ 594 static inline int mt76_decr(int val, int size) 595 { 596 return (val - 1) & (size - 1); 597 } 598 599 u8 mt76_ac_to_hwq(u8 ac); 600 601 static inline struct ieee80211_txq * 602 mtxq_to_txq(struct mt76_txq *mtxq) 603 { 604 void *ptr = mtxq; 605 606 return container_of(ptr, struct ieee80211_txq, drv_priv); 607 } 608 609 static inline struct ieee80211_sta * 610 wcid_to_sta(struct mt76_wcid *wcid) 611 { 612 void *ptr = wcid; 613 614 if (!wcid || !wcid->sta) 615 return NULL; 616 617 return container_of(ptr, struct ieee80211_sta, drv_priv); 618 } 619 620 static inline struct mt76_tx_cb *mt76_tx_skb_cb(struct sk_buff *skb) 621 { 622 BUILD_BUG_ON(sizeof(struct mt76_tx_cb) > 623 sizeof(IEEE80211_SKB_CB(skb)->status.status_driver_data)); 624 return ((void *) IEEE80211_SKB_CB(skb)->status.status_driver_data); 625 } 626 627 int mt76_dma_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q, 628 struct sk_buff *skb, struct mt76_wcid *wcid, 629 struct ieee80211_sta *sta); 630 631 void mt76_rx(struct mt76_dev *dev, enum mt76_rxq_id q, struct sk_buff *skb); 632 void mt76_tx(struct mt76_dev *dev, struct ieee80211_sta *sta, 633 struct mt76_wcid *wcid, struct sk_buff *skb); 634 void mt76_txq_init(struct mt76_dev *dev, struct ieee80211_txq *txq); 635 void mt76_txq_remove(struct mt76_dev *dev, struct ieee80211_txq *txq); 636 void mt76_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq); 637 void mt76_stop_tx_queues(struct mt76_dev *dev, struct ieee80211_sta *sta, 638 bool send_bar); 639 void mt76_txq_schedule(struct mt76_dev *dev, struct mt76_queue *hwq); 640 void mt76_txq_schedule_all(struct mt76_dev *dev); 641 void mt76_release_buffered_frames(struct ieee80211_hw *hw, 642 struct ieee80211_sta *sta, 643 u16 tids, int nframes, 644 enum ieee80211_frame_release_type reason, 645 bool more_data); 646 void mt76_set_channel(struct mt76_dev *dev); 647 int mt76_get_survey(struct ieee80211_hw *hw, int idx, 648 struct survey_info *survey); 649 void mt76_set_stream_caps(struct mt76_dev *dev, bool vht); 650 651 int mt76_rx_aggr_start(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid, 652 u16 ssn, u8 size); 653 void mt76_rx_aggr_stop(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid); 654 655 void mt76_wcid_key_setup(struct mt76_dev *dev, struct mt76_wcid *wcid, 656 struct ieee80211_key_conf *key); 657 658 void mt76_tx_status_lock(struct mt76_dev *dev, struct sk_buff_head *list) 659 __acquires(&dev->status_list.lock); 660 void mt76_tx_status_unlock(struct mt76_dev *dev, struct sk_buff_head *list) 661 __releases(&dev->status_list.lock); 662 663 int mt76_tx_status_skb_add(struct mt76_dev *dev, struct mt76_wcid *wcid, 664 struct sk_buff *skb); 665 struct sk_buff *mt76_tx_status_skb_get(struct mt76_dev *dev, 666 struct mt76_wcid *wcid, int pktid, 667 struct sk_buff_head *list); 668 void mt76_tx_status_skb_done(struct mt76_dev *dev, struct sk_buff *skb, 669 struct sk_buff_head *list); 670 void mt76_tx_complete_skb(struct mt76_dev *dev, struct sk_buff *skb); 671 void mt76_tx_status_check(struct mt76_dev *dev, struct mt76_wcid *wcid, 672 bool flush); 673 int mt76_sta_state(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 674 struct ieee80211_sta *sta, 675 enum ieee80211_sta_state old_state, 676 enum ieee80211_sta_state new_state); 677 678 struct ieee80211_sta *mt76_rx_convert(struct sk_buff *skb); 679 680 /* internal */ 681 void mt76_tx_free(struct mt76_dev *dev); 682 struct mt76_txwi_cache *mt76_get_txwi(struct mt76_dev *dev); 683 void mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t); 684 void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames, 685 struct napi_struct *napi); 686 void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q, 687 struct napi_struct *napi); 688 void mt76_rx_aggr_reorder(struct sk_buff *skb, struct sk_buff_head *frames); 689 690 /* usb */ 691 static inline bool mt76u_urb_error(struct urb *urb) 692 { 693 return urb->status && 694 urb->status != -ECONNRESET && 695 urb->status != -ESHUTDOWN && 696 urb->status != -ENOENT; 697 } 698 699 /* Map hardware queues to usb endpoints */ 700 static inline u8 q2ep(u8 qid) 701 { 702 /* TODO: take management packets to queue 5 */ 703 return qid + 1; 704 } 705 706 static inline bool mt76u_check_sg(struct mt76_dev *dev) 707 { 708 struct usb_interface *intf = to_usb_interface(dev->dev); 709 struct usb_device *udev = interface_to_usbdev(intf); 710 711 return (udev->bus->sg_tablesize > 0 && 712 (udev->bus->no_sg_constraint || 713 udev->speed == USB_SPEED_WIRELESS)); 714 } 715 716 int mt76u_vendor_request(struct mt76_dev *dev, u8 req, 717 u8 req_type, u16 val, u16 offset, 718 void *buf, size_t len); 719 void mt76u_single_wr(struct mt76_dev *dev, const u8 req, 720 const u16 offset, const u32 val); 721 int mt76u_init(struct mt76_dev *dev, struct usb_interface *intf); 722 void mt76u_deinit(struct mt76_dev *dev); 723 int mt76u_buf_alloc(struct mt76_dev *dev, struct mt76u_buf *buf, 724 int nsgs, int len, int sglen, gfp_t gfp); 725 void mt76u_buf_free(struct mt76u_buf *buf); 726 int mt76u_submit_buf(struct mt76_dev *dev, int dir, int index, 727 struct mt76u_buf *buf, gfp_t gfp, 728 usb_complete_t complete_fn, void *context); 729 int mt76u_submit_rx_buffers(struct mt76_dev *dev); 730 int mt76u_alloc_queues(struct mt76_dev *dev); 731 void mt76u_stop_queues(struct mt76_dev *dev); 732 void mt76u_stop_stat_wk(struct mt76_dev *dev); 733 void mt76u_queues_deinit(struct mt76_dev *dev); 734 735 void mt76u_mcu_complete_urb(struct urb *urb); 736 int mt76u_mcu_init_rx(struct mt76_dev *dev); 737 void mt76u_mcu_deinit(struct mt76_dev *dev); 738 739 #endif 740