1 /* SPDX-License-Identifier: ISC */ 2 /* 3 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name> 4 */ 5 6 #ifndef __MT76_H 7 #define __MT76_H 8 9 #include <linux/kernel.h> 10 #include <linux/io.h> 11 #include <linux/spinlock.h> 12 #include <linux/skbuff.h> 13 #include <linux/leds.h> 14 #include <linux/usb.h> 15 #include <linux/average.h> 16 #include <net/mac80211.h> 17 #include "util.h" 18 19 #define MT_TX_RING_SIZE 256 20 #define MT_MCU_RING_SIZE 32 21 #define MT_RX_BUF_SIZE 2048 22 #define MT_SKB_HEAD_LEN 128 23 24 struct mt76_dev; 25 struct mt76_wcid; 26 27 struct mt76_reg_pair { 28 u32 reg; 29 u32 value; 30 }; 31 32 enum mt76_bus_type { 33 MT76_BUS_MMIO, 34 MT76_BUS_USB, 35 }; 36 37 struct mt76_bus_ops { 38 u32 (*rr)(struct mt76_dev *dev, u32 offset); 39 void (*wr)(struct mt76_dev *dev, u32 offset, u32 val); 40 u32 (*rmw)(struct mt76_dev *dev, u32 offset, u32 mask, u32 val); 41 void (*write_copy)(struct mt76_dev *dev, u32 offset, const void *data, 42 int len); 43 void (*read_copy)(struct mt76_dev *dev, u32 offset, void *data, 44 int len); 45 int (*wr_rp)(struct mt76_dev *dev, u32 base, 46 const struct mt76_reg_pair *rp, int len); 47 int (*rd_rp)(struct mt76_dev *dev, u32 base, 48 struct mt76_reg_pair *rp, int len); 49 enum mt76_bus_type type; 50 }; 51 52 #define mt76_is_usb(dev) ((dev)->mt76.bus->type == MT76_BUS_USB) 53 #define mt76_is_mmio(dev) ((dev)->mt76.bus->type == MT76_BUS_MMIO) 54 55 enum mt76_txq_id { 56 MT_TXQ_VO = IEEE80211_AC_VO, 57 MT_TXQ_VI = IEEE80211_AC_VI, 58 MT_TXQ_BE = IEEE80211_AC_BE, 59 MT_TXQ_BK = IEEE80211_AC_BK, 60 MT_TXQ_PSD, 61 MT_TXQ_MCU, 62 MT_TXQ_BEACON, 63 MT_TXQ_CAB, 64 MT_TXQ_FWDL, 65 __MT_TXQ_MAX 66 }; 67 68 enum mt76_rxq_id { 69 MT_RXQ_MAIN, 70 MT_RXQ_MCU, 71 __MT_RXQ_MAX 72 }; 73 74 struct mt76_queue_buf { 75 dma_addr_t addr; 76 int len; 77 }; 78 79 struct mt76_tx_info { 80 struct mt76_queue_buf buf[32]; 81 struct sk_buff *skb; 82 int nbuf; 83 u32 info; 84 }; 85 86 struct mt76_queue_entry { 87 union { 88 void *buf; 89 struct sk_buff *skb; 90 }; 91 union { 92 struct mt76_txwi_cache *txwi; 93 struct urb *urb; 94 }; 95 enum mt76_txq_id qid; 96 bool schedule; 97 bool done; 98 }; 99 100 struct mt76_queue_regs { 101 u32 desc_base; 102 u32 ring_size; 103 u32 cpu_idx; 104 u32 dma_idx; 105 } __packed __aligned(4); 106 107 struct mt76_queue { 108 struct mt76_queue_regs __iomem *regs; 109 110 spinlock_t lock; 111 struct mt76_queue_entry *entry; 112 struct mt76_desc *desc; 113 114 u16 first; 115 u16 head; 116 u16 tail; 117 int ndesc; 118 int queued; 119 int buf_size; 120 bool stopped; 121 122 u8 buf_offset; 123 u8 hw_idx; 124 125 dma_addr_t desc_dma; 126 struct sk_buff *rx_head; 127 struct page_frag_cache rx_page; 128 }; 129 130 struct mt76_sw_queue { 131 struct mt76_queue *q; 132 133 struct list_head swq; 134 int swq_queued; 135 }; 136 137 struct mt76_mcu_ops { 138 int (*mcu_send_msg)(struct mt76_dev *dev, int cmd, const void *data, 139 int len, bool wait_resp); 140 int (*mcu_wr_rp)(struct mt76_dev *dev, u32 base, 141 const struct mt76_reg_pair *rp, int len); 142 int (*mcu_rd_rp)(struct mt76_dev *dev, u32 base, 143 struct mt76_reg_pair *rp, int len); 144 int (*mcu_restart)(struct mt76_dev *dev); 145 }; 146 147 struct mt76_queue_ops { 148 int (*init)(struct mt76_dev *dev); 149 150 int (*alloc)(struct mt76_dev *dev, struct mt76_queue *q, 151 int idx, int n_desc, int bufsize, 152 u32 ring_base); 153 154 int (*add_buf)(struct mt76_dev *dev, struct mt76_queue *q, 155 struct mt76_queue_buf *buf, int nbufs, u32 info, 156 struct sk_buff *skb, void *txwi); 157 158 int (*tx_queue_skb)(struct mt76_dev *dev, enum mt76_txq_id qid, 159 struct sk_buff *skb, struct mt76_wcid *wcid, 160 struct ieee80211_sta *sta); 161 162 int (*tx_queue_skb_raw)(struct mt76_dev *dev, enum mt76_txq_id qid, 163 struct sk_buff *skb, u32 tx_info); 164 165 void *(*dequeue)(struct mt76_dev *dev, struct mt76_queue *q, bool flush, 166 int *len, u32 *info, bool *more); 167 168 void (*rx_reset)(struct mt76_dev *dev, enum mt76_rxq_id qid); 169 170 void (*tx_cleanup)(struct mt76_dev *dev, enum mt76_txq_id qid, 171 bool flush); 172 173 void (*kick)(struct mt76_dev *dev, struct mt76_queue *q); 174 }; 175 176 enum mt76_wcid_flags { 177 MT_WCID_FLAG_CHECK_PS, 178 MT_WCID_FLAG_PS, 179 }; 180 181 #define MT76_N_WCIDS 128 182 183 DECLARE_EWMA(signal, 10, 8); 184 185 #define MT_WCID_TX_INFO_RATE GENMASK(15, 0) 186 #define MT_WCID_TX_INFO_NSS GENMASK(17, 16) 187 #define MT_WCID_TX_INFO_TXPWR_ADJ GENMASK(25, 18) 188 #define MT_WCID_TX_INFO_SET BIT(31) 189 190 struct mt76_wcid { 191 struct mt76_rx_tid __rcu *aggr[IEEE80211_NUM_TIDS]; 192 193 struct work_struct aggr_work; 194 195 unsigned long flags; 196 197 struct ewma_signal rssi; 198 int inactive_count; 199 200 u8 idx; 201 u8 hw_key_idx; 202 203 u8 sta:1; 204 205 u8 rx_check_pn; 206 u8 rx_key_pn[IEEE80211_NUM_TIDS][6]; 207 u16 cipher; 208 209 u32 tx_info; 210 bool sw_iv; 211 212 u8 packet_id; 213 }; 214 215 struct mt76_txq { 216 struct mt76_sw_queue *swq; 217 struct mt76_wcid *wcid; 218 219 struct sk_buff_head retry_q; 220 221 u16 agg_ssn; 222 bool send_bar; 223 bool aggr; 224 }; 225 226 struct mt76_txwi_cache { 227 struct list_head list; 228 dma_addr_t dma_addr; 229 230 struct sk_buff *skb; 231 }; 232 233 struct mt76_rx_tid { 234 struct rcu_head rcu_head; 235 236 struct mt76_dev *dev; 237 238 spinlock_t lock; 239 struct delayed_work reorder_work; 240 241 u16 head; 242 u8 size; 243 u8 nframes; 244 245 u8 started:1, stopped:1, timer_pending:1; 246 247 struct sk_buff *reorder_buf[]; 248 }; 249 250 #define MT_TX_CB_DMA_DONE BIT(0) 251 #define MT_TX_CB_TXS_DONE BIT(1) 252 #define MT_TX_CB_TXS_FAILED BIT(2) 253 254 #define MT_PACKET_ID_MASK GENMASK(6, 0) 255 #define MT_PACKET_ID_NO_ACK 0 256 #define MT_PACKET_ID_NO_SKB 1 257 #define MT_PACKET_ID_FIRST 2 258 #define MT_PACKET_ID_HAS_RATE BIT(7) 259 260 #define MT_TX_STATUS_SKB_TIMEOUT HZ 261 262 struct mt76_tx_cb { 263 unsigned long jiffies; 264 u8 wcid; 265 u8 pktid; 266 u8 flags; 267 }; 268 269 enum { 270 MT76_STATE_INITIALIZED, 271 MT76_STATE_RUNNING, 272 MT76_STATE_MCU_RUNNING, 273 MT76_SCANNING, 274 MT76_RESET, 275 MT76_REMOVED, 276 MT76_READING_STATS, 277 }; 278 279 struct mt76_hw_cap { 280 bool has_2ghz; 281 bool has_5ghz; 282 }; 283 284 #define MT_TXWI_NO_FREE BIT(0) 285 286 struct mt76_driver_ops { 287 bool tx_aligned4_skbs; 288 u32 txwi_flags; 289 u16 txwi_size; 290 291 void (*update_survey)(struct mt76_dev *dev); 292 293 int (*tx_prepare_skb)(struct mt76_dev *dev, void *txwi_ptr, 294 enum mt76_txq_id qid, struct mt76_wcid *wcid, 295 struct ieee80211_sta *sta, 296 struct mt76_tx_info *tx_info); 297 298 void (*tx_complete_skb)(struct mt76_dev *dev, enum mt76_txq_id qid, 299 struct mt76_queue_entry *e); 300 301 bool (*tx_status_data)(struct mt76_dev *dev, u8 *update); 302 303 void (*rx_skb)(struct mt76_dev *dev, enum mt76_rxq_id q, 304 struct sk_buff *skb); 305 306 void (*rx_poll_complete)(struct mt76_dev *dev, enum mt76_rxq_id q); 307 308 void (*sta_ps)(struct mt76_dev *dev, struct ieee80211_sta *sta, 309 bool ps); 310 311 int (*sta_add)(struct mt76_dev *dev, struct ieee80211_vif *vif, 312 struct ieee80211_sta *sta); 313 314 void (*sta_assoc)(struct mt76_dev *dev, struct ieee80211_vif *vif, 315 struct ieee80211_sta *sta); 316 317 void (*sta_remove)(struct mt76_dev *dev, struct ieee80211_vif *vif, 318 struct ieee80211_sta *sta); 319 }; 320 321 struct mt76_channel_state { 322 u64 cc_active; 323 u64 cc_busy; 324 }; 325 326 struct mt76_sband { 327 struct ieee80211_supported_band sband; 328 struct mt76_channel_state *chan; 329 }; 330 331 struct mt76_rate_power { 332 union { 333 struct { 334 s8 cck[4]; 335 s8 ofdm[8]; 336 s8 stbc[10]; 337 s8 ht[16]; 338 s8 vht[10]; 339 }; 340 s8 all[48]; 341 }; 342 }; 343 344 /* addr req mask */ 345 #define MT_VEND_TYPE_EEPROM BIT(31) 346 #define MT_VEND_TYPE_CFG BIT(30) 347 #define MT_VEND_TYPE_MASK (MT_VEND_TYPE_EEPROM | MT_VEND_TYPE_CFG) 348 349 #define MT_VEND_ADDR(type, n) (MT_VEND_TYPE_##type | (n)) 350 enum mt_vendor_req { 351 MT_VEND_DEV_MODE = 0x1, 352 MT_VEND_WRITE = 0x2, 353 MT_VEND_MULTI_WRITE = 0x6, 354 MT_VEND_MULTI_READ = 0x7, 355 MT_VEND_READ_EEPROM = 0x9, 356 MT_VEND_WRITE_FCE = 0x42, 357 MT_VEND_WRITE_CFG = 0x46, 358 MT_VEND_READ_CFG = 0x47, 359 }; 360 361 enum mt76u_in_ep { 362 MT_EP_IN_PKT_RX, 363 MT_EP_IN_CMD_RESP, 364 __MT_EP_IN_MAX, 365 }; 366 367 enum mt76u_out_ep { 368 MT_EP_OUT_INBAND_CMD, 369 MT_EP_OUT_AC_BK, 370 MT_EP_OUT_AC_BE, 371 MT_EP_OUT_AC_VI, 372 MT_EP_OUT_AC_VO, 373 MT_EP_OUT_HCCA, 374 __MT_EP_OUT_MAX, 375 }; 376 377 #define MT_TX_SG_MAX_SIZE 8 378 #define MT_RX_SG_MAX_SIZE 1 379 #define MT_NUM_TX_ENTRIES 256 380 #define MT_NUM_RX_ENTRIES 128 381 #define MCU_RESP_URB_SIZE 1024 382 struct mt76_usb { 383 struct mutex usb_ctrl_mtx; 384 union { 385 u8 data[32]; 386 __le32 reg_val; 387 }; 388 389 struct tasklet_struct rx_tasklet; 390 struct delayed_work stat_work; 391 392 u8 out_ep[__MT_EP_OUT_MAX]; 393 u8 in_ep[__MT_EP_IN_MAX]; 394 bool sg_en; 395 396 struct mt76u_mcu { 397 struct mutex mutex; 398 u8 *data; 399 u32 msg_seq; 400 401 /* multiple reads */ 402 struct mt76_reg_pair *rp; 403 int rp_len; 404 u32 base; 405 bool burst; 406 } mcu; 407 }; 408 409 struct mt76_mmio { 410 struct mt76e_mcu { 411 struct mutex mutex; 412 413 wait_queue_head_t wait; 414 struct sk_buff_head res_q; 415 416 u32 msg_seq; 417 } mcu; 418 void __iomem *regs; 419 spinlock_t irq_lock; 420 u32 irqmask; 421 }; 422 423 struct mt76_dev { 424 struct ieee80211_hw *hw; 425 struct cfg80211_chan_def chandef; 426 struct ieee80211_channel *main_chan; 427 428 spinlock_t lock; 429 spinlock_t cc_lock; 430 431 struct mutex mutex; 432 433 const struct mt76_bus_ops *bus; 434 const struct mt76_driver_ops *drv; 435 const struct mt76_mcu_ops *mcu_ops; 436 struct device *dev; 437 438 struct net_device napi_dev; 439 spinlock_t rx_lock; 440 struct napi_struct napi[__MT_RXQ_MAX]; 441 struct sk_buff_head rx_skb[__MT_RXQ_MAX]; 442 443 struct list_head txwi_cache; 444 struct mt76_sw_queue q_tx[__MT_TXQ_MAX]; 445 struct mt76_queue q_rx[__MT_RXQ_MAX]; 446 const struct mt76_queue_ops *queue_ops; 447 int tx_dma_idx[4]; 448 449 struct tasklet_struct tx_tasklet; 450 struct napi_struct tx_napi; 451 struct delayed_work mac_work; 452 453 wait_queue_head_t tx_wait; 454 struct sk_buff_head status_list; 455 456 unsigned long wcid_mask[MT76_N_WCIDS / BITS_PER_LONG]; 457 458 struct mt76_wcid global_wcid; 459 struct mt76_wcid __rcu *wcid[MT76_N_WCIDS]; 460 461 u8 macaddr[ETH_ALEN]; 462 u32 rev; 463 unsigned long state; 464 465 u8 antenna_mask; 466 u16 chainmask; 467 468 struct tasklet_struct pre_tbtt_tasklet; 469 int beacon_int; 470 u8 beacon_mask; 471 472 struct mt76_sband sband_2g; 473 struct mt76_sband sband_5g; 474 struct debugfs_blob_wrapper eeprom; 475 struct debugfs_blob_wrapper otp; 476 struct mt76_hw_cap cap; 477 478 struct mt76_rate_power rate_power; 479 int txpower_conf; 480 int txpower_cur; 481 482 enum nl80211_dfs_regions region; 483 484 u32 debugfs_reg; 485 486 struct led_classdev led_cdev; 487 char led_name[32]; 488 bool led_al; 489 u8 led_pin; 490 491 u8 csa_complete; 492 493 ktime_t survey_time; 494 495 u32 rxfilter; 496 497 union { 498 struct mt76_mmio mmio; 499 struct mt76_usb usb; 500 }; 501 }; 502 503 enum mt76_phy_type { 504 MT_PHY_TYPE_CCK, 505 MT_PHY_TYPE_OFDM, 506 MT_PHY_TYPE_HT, 507 MT_PHY_TYPE_HT_GF, 508 MT_PHY_TYPE_VHT, 509 }; 510 511 struct mt76_rx_status { 512 struct mt76_wcid *wcid; 513 514 unsigned long reorder_time; 515 516 u8 iv[6]; 517 518 u8 aggr:1; 519 u8 tid; 520 u16 seqno; 521 522 u16 freq; 523 u32 flag; 524 u8 enc_flags; 525 u8 encoding:2, bw:3; 526 u8 rate_idx; 527 u8 nss; 528 u8 band; 529 s8 signal; 530 u8 chains; 531 s8 chain_signal[IEEE80211_MAX_CHAINS]; 532 }; 533 534 #define __mt76_rr(dev, ...) (dev)->bus->rr((dev), __VA_ARGS__) 535 #define __mt76_wr(dev, ...) (dev)->bus->wr((dev), __VA_ARGS__) 536 #define __mt76_rmw(dev, ...) (dev)->bus->rmw((dev), __VA_ARGS__) 537 #define __mt76_wr_copy(dev, ...) (dev)->bus->write_copy((dev), __VA_ARGS__) 538 #define __mt76_rr_copy(dev, ...) (dev)->bus->read_copy((dev), __VA_ARGS__) 539 540 #define __mt76_set(dev, offset, val) __mt76_rmw(dev, offset, 0, val) 541 #define __mt76_clear(dev, offset, val) __mt76_rmw(dev, offset, val, 0) 542 543 #define mt76_rr(dev, ...) (dev)->mt76.bus->rr(&((dev)->mt76), __VA_ARGS__) 544 #define mt76_wr(dev, ...) (dev)->mt76.bus->wr(&((dev)->mt76), __VA_ARGS__) 545 #define mt76_rmw(dev, ...) (dev)->mt76.bus->rmw(&((dev)->mt76), __VA_ARGS__) 546 #define mt76_wr_copy(dev, ...) (dev)->mt76.bus->write_copy(&((dev)->mt76), __VA_ARGS__) 547 #define mt76_rr_copy(dev, ...) (dev)->mt76.bus->read_copy(&((dev)->mt76), __VA_ARGS__) 548 #define mt76_wr_rp(dev, ...) (dev)->mt76.bus->wr_rp(&((dev)->mt76), __VA_ARGS__) 549 #define mt76_rd_rp(dev, ...) (dev)->mt76.bus->rd_rp(&((dev)->mt76), __VA_ARGS__) 550 551 #define mt76_mcu_send_msg(dev, ...) (dev)->mt76.mcu_ops->mcu_send_msg(&((dev)->mt76), __VA_ARGS__) 552 #define __mt76_mcu_send_msg(dev, ...) (dev)->mcu_ops->mcu_send_msg((dev), __VA_ARGS__) 553 #define mt76_mcu_restart(dev, ...) (dev)->mt76.mcu_ops->mcu_restart(&((dev)->mt76)) 554 #define __mt76_mcu_restart(dev, ...) (dev)->mcu_ops->mcu_restart((dev)) 555 556 #define mt76_set(dev, offset, val) mt76_rmw(dev, offset, 0, val) 557 #define mt76_clear(dev, offset, val) mt76_rmw(dev, offset, val, 0) 558 559 #define mt76_get_field(_dev, _reg, _field) \ 560 FIELD_GET(_field, mt76_rr(dev, _reg)) 561 562 #define mt76_rmw_field(_dev, _reg, _field, _val) \ 563 mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val)) 564 565 #define __mt76_rmw_field(_dev, _reg, _field, _val) \ 566 __mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val)) 567 568 #define mt76_hw(dev) (dev)->mt76.hw 569 570 bool __mt76_poll(struct mt76_dev *dev, u32 offset, u32 mask, u32 val, 571 int timeout); 572 573 #define mt76_poll(dev, ...) __mt76_poll(&((dev)->mt76), __VA_ARGS__) 574 575 bool __mt76_poll_msec(struct mt76_dev *dev, u32 offset, u32 mask, u32 val, 576 int timeout); 577 578 #define mt76_poll_msec(dev, ...) __mt76_poll_msec(&((dev)->mt76), __VA_ARGS__) 579 580 void mt76_mmio_init(struct mt76_dev *dev, void __iomem *regs); 581 582 static inline u16 mt76_chip(struct mt76_dev *dev) 583 { 584 return dev->rev >> 16; 585 } 586 587 static inline u16 mt76_rev(struct mt76_dev *dev) 588 { 589 return dev->rev & 0xffff; 590 } 591 592 #define mt76xx_chip(dev) mt76_chip(&((dev)->mt76)) 593 #define mt76xx_rev(dev) mt76_rev(&((dev)->mt76)) 594 595 #define mt76_init_queues(dev) (dev)->mt76.queue_ops->init(&((dev)->mt76)) 596 #define mt76_queue_alloc(dev, ...) (dev)->mt76.queue_ops->alloc(&((dev)->mt76), __VA_ARGS__) 597 #define mt76_tx_queue_skb_raw(dev, ...) (dev)->mt76.queue_ops->tx_queue_skb_raw(&((dev)->mt76), __VA_ARGS__) 598 #define mt76_tx_queue_skb(dev, ...) (dev)->mt76.queue_ops->tx_queue_skb(&((dev)->mt76), __VA_ARGS__) 599 #define mt76_queue_rx_reset(dev, ...) (dev)->mt76.queue_ops->rx_reset(&((dev)->mt76), __VA_ARGS__) 600 #define mt76_queue_tx_cleanup(dev, ...) (dev)->mt76.queue_ops->tx_cleanup(&((dev)->mt76), __VA_ARGS__) 601 #define mt76_queue_kick(dev, ...) (dev)->mt76.queue_ops->kick(&((dev)->mt76), __VA_ARGS__) 602 603 static inline struct mt76_channel_state * 604 mt76_channel_state(struct mt76_dev *dev, struct ieee80211_channel *c) 605 { 606 struct mt76_sband *msband; 607 int idx; 608 609 if (c->band == NL80211_BAND_2GHZ) 610 msband = &dev->sband_2g; 611 else 612 msband = &dev->sband_5g; 613 614 idx = c - &msband->sband.channels[0]; 615 return &msband->chan[idx]; 616 } 617 618 struct mt76_dev *mt76_alloc_device(struct device *pdev, unsigned int size, 619 const struct ieee80211_ops *ops, 620 const struct mt76_driver_ops *drv_ops); 621 int mt76_register_device(struct mt76_dev *dev, bool vht, 622 struct ieee80211_rate *rates, int n_rates); 623 void mt76_unregister_device(struct mt76_dev *dev); 624 void mt76_free_device(struct mt76_dev *dev); 625 626 struct dentry *mt76_register_debugfs(struct mt76_dev *dev); 627 void mt76_seq_puts_array(struct seq_file *file, const char *str, 628 s8 *val, int len); 629 630 int mt76_eeprom_init(struct mt76_dev *dev, int len); 631 void mt76_eeprom_override(struct mt76_dev *dev); 632 633 static inline u8 * 634 mt76_get_txwi_ptr(struct mt76_dev *dev, struct mt76_txwi_cache *t) 635 { 636 return (u8 *)t - dev->drv->txwi_size; 637 } 638 639 /* increment with wrap-around */ 640 static inline int mt76_incr(int val, int size) 641 { 642 return (val + 1) & (size - 1); 643 } 644 645 /* decrement with wrap-around */ 646 static inline int mt76_decr(int val, int size) 647 { 648 return (val - 1) & (size - 1); 649 } 650 651 u8 mt76_ac_to_hwq(u8 ac); 652 653 static inline struct ieee80211_txq * 654 mtxq_to_txq(struct mt76_txq *mtxq) 655 { 656 void *ptr = mtxq; 657 658 return container_of(ptr, struct ieee80211_txq, drv_priv); 659 } 660 661 static inline struct ieee80211_sta * 662 wcid_to_sta(struct mt76_wcid *wcid) 663 { 664 void *ptr = wcid; 665 666 if (!wcid || !wcid->sta) 667 return NULL; 668 669 return container_of(ptr, struct ieee80211_sta, drv_priv); 670 } 671 672 static inline struct mt76_tx_cb *mt76_tx_skb_cb(struct sk_buff *skb) 673 { 674 BUILD_BUG_ON(sizeof(struct mt76_tx_cb) > 675 sizeof(IEEE80211_SKB_CB(skb)->status.status_driver_data)); 676 return ((void *)IEEE80211_SKB_CB(skb)->status.status_driver_data); 677 } 678 679 static inline void mt76_insert_hdr_pad(struct sk_buff *skb) 680 { 681 int len = ieee80211_get_hdrlen_from_skb(skb); 682 683 if (len % 4 == 0) 684 return; 685 686 skb_push(skb, 2); 687 memmove(skb->data, skb->data + 2, len); 688 689 skb->data[len] = 0; 690 skb->data[len + 1] = 0; 691 } 692 693 static inline bool mt76_is_skb_pktid(u8 pktid) 694 { 695 if (pktid & MT_PACKET_ID_HAS_RATE) 696 return false; 697 698 return pktid >= MT_PACKET_ID_FIRST; 699 } 700 701 void mt76_rx(struct mt76_dev *dev, enum mt76_rxq_id q, struct sk_buff *skb); 702 void mt76_tx(struct mt76_dev *dev, struct ieee80211_sta *sta, 703 struct mt76_wcid *wcid, struct sk_buff *skb); 704 void mt76_txq_init(struct mt76_dev *dev, struct ieee80211_txq *txq); 705 void mt76_txq_remove(struct mt76_dev *dev, struct ieee80211_txq *txq); 706 void mt76_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq); 707 void mt76_stop_tx_queues(struct mt76_dev *dev, struct ieee80211_sta *sta, 708 bool send_bar); 709 void mt76_txq_schedule(struct mt76_dev *dev, enum mt76_txq_id qid); 710 void mt76_txq_schedule_all(struct mt76_dev *dev); 711 void mt76_tx_tasklet(unsigned long data); 712 void mt76_release_buffered_frames(struct ieee80211_hw *hw, 713 struct ieee80211_sta *sta, 714 u16 tids, int nframes, 715 enum ieee80211_frame_release_type reason, 716 bool more_data); 717 bool mt76_has_tx_pending(struct mt76_dev *dev); 718 void mt76_set_channel(struct mt76_dev *dev); 719 int mt76_get_survey(struct ieee80211_hw *hw, int idx, 720 struct survey_info *survey); 721 void mt76_set_stream_caps(struct mt76_dev *dev, bool vht); 722 723 int mt76_rx_aggr_start(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid, 724 u16 ssn, u8 size); 725 void mt76_rx_aggr_stop(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid); 726 727 void mt76_wcid_key_setup(struct mt76_dev *dev, struct mt76_wcid *wcid, 728 struct ieee80211_key_conf *key); 729 730 void mt76_tx_status_lock(struct mt76_dev *dev, struct sk_buff_head *list) 731 __acquires(&dev->status_list.lock); 732 void mt76_tx_status_unlock(struct mt76_dev *dev, struct sk_buff_head *list) 733 __releases(&dev->status_list.lock); 734 735 int mt76_tx_status_skb_add(struct mt76_dev *dev, struct mt76_wcid *wcid, 736 struct sk_buff *skb); 737 struct sk_buff *mt76_tx_status_skb_get(struct mt76_dev *dev, 738 struct mt76_wcid *wcid, int pktid, 739 struct sk_buff_head *list); 740 void mt76_tx_status_skb_done(struct mt76_dev *dev, struct sk_buff *skb, 741 struct sk_buff_head *list); 742 void mt76_tx_complete_skb(struct mt76_dev *dev, struct sk_buff *skb); 743 void mt76_tx_status_check(struct mt76_dev *dev, struct mt76_wcid *wcid, 744 bool flush); 745 int mt76_sta_state(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 746 struct ieee80211_sta *sta, 747 enum ieee80211_sta_state old_state, 748 enum ieee80211_sta_state new_state); 749 void __mt76_sta_remove(struct mt76_dev *dev, struct ieee80211_vif *vif, 750 struct ieee80211_sta *sta); 751 752 int mt76_get_min_avg_rssi(struct mt76_dev *dev); 753 754 int mt76_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 755 int *dbm); 756 757 void mt76_csa_check(struct mt76_dev *dev); 758 void mt76_csa_finish(struct mt76_dev *dev); 759 760 int mt76_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set); 761 void mt76_insert_ccmp_hdr(struct sk_buff *skb, u8 key_id); 762 int mt76_get_rate(struct mt76_dev *dev, 763 struct ieee80211_supported_band *sband, 764 int idx, bool cck); 765 void mt76_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 766 const u8 *mac); 767 void mt76_sw_scan_complete(struct ieee80211_hw *hw, 768 struct ieee80211_vif *vif); 769 770 /* internal */ 771 void mt76_tx_free(struct mt76_dev *dev); 772 struct mt76_txwi_cache *mt76_get_txwi(struct mt76_dev *dev); 773 void mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t); 774 void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames, 775 struct napi_struct *napi); 776 void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q, 777 struct napi_struct *napi); 778 void mt76_rx_aggr_reorder(struct sk_buff *skb, struct sk_buff_head *frames); 779 780 /* usb */ 781 static inline bool mt76u_urb_error(struct urb *urb) 782 { 783 return urb->status && 784 urb->status != -ECONNRESET && 785 urb->status != -ESHUTDOWN && 786 urb->status != -ENOENT; 787 } 788 789 /* Map hardware queues to usb endpoints */ 790 static inline u8 q2ep(u8 qid) 791 { 792 /* TODO: take management packets to queue 5 */ 793 return qid + 1; 794 } 795 796 static inline int 797 mt76u_bulk_msg(struct mt76_dev *dev, void *data, int len, int *actual_len, 798 int timeout) 799 { 800 struct usb_device *udev = to_usb_device(dev->dev); 801 struct mt76_usb *usb = &dev->usb; 802 unsigned int pipe; 803 804 if (actual_len) 805 pipe = usb_rcvbulkpipe(udev, usb->in_ep[MT_EP_IN_CMD_RESP]); 806 else 807 pipe = usb_sndbulkpipe(udev, usb->out_ep[MT_EP_OUT_INBAND_CMD]); 808 809 return usb_bulk_msg(udev, pipe, data, len, actual_len, timeout); 810 } 811 812 int mt76u_vendor_request(struct mt76_dev *dev, u8 req, 813 u8 req_type, u16 val, u16 offset, 814 void *buf, size_t len); 815 void mt76u_single_wr(struct mt76_dev *dev, const u8 req, 816 const u16 offset, const u32 val); 817 int mt76u_init(struct mt76_dev *dev, struct usb_interface *intf); 818 int mt76u_alloc_queues(struct mt76_dev *dev); 819 void mt76u_stop_tx(struct mt76_dev *dev); 820 void mt76u_stop_rx(struct mt76_dev *dev); 821 int mt76u_resume_rx(struct mt76_dev *dev); 822 void mt76u_queues_deinit(struct mt76_dev *dev); 823 824 struct sk_buff * 825 mt76_mcu_msg_alloc(const void *data, int head_len, 826 int data_len, int tail_len); 827 void mt76_mcu_rx_event(struct mt76_dev *dev, struct sk_buff *skb); 828 struct sk_buff *mt76_mcu_get_response(struct mt76_dev *dev, 829 unsigned long expires); 830 831 void mt76_set_irq_mask(struct mt76_dev *dev, u32 addr, u32 clear, u32 set); 832 833 #endif 834