1 /* SPDX-License-Identifier: ISC */ 2 /* 3 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name> 4 */ 5 6 #ifndef __MT76_H 7 #define __MT76_H 8 9 #include <linux/kernel.h> 10 #include <linux/io.h> 11 #include <linux/spinlock.h> 12 #include <linux/skbuff.h> 13 #include <linux/leds.h> 14 #include <linux/usb.h> 15 #include <linux/average.h> 16 #include <net/mac80211.h> 17 #include "util.h" 18 #include "testmode.h" 19 20 #define MT_TX_RING_SIZE 256 21 #define MT_MCU_RING_SIZE 32 22 #define MT_RX_BUF_SIZE 2048 23 #define MT_SKB_HEAD_LEN 128 24 25 struct mt76_dev; 26 struct mt76_phy; 27 struct mt76_wcid; 28 29 struct mt76_reg_pair { 30 u32 reg; 31 u32 value; 32 }; 33 34 enum mt76_bus_type { 35 MT76_BUS_MMIO, 36 MT76_BUS_USB, 37 MT76_BUS_SDIO, 38 }; 39 40 struct mt76_bus_ops { 41 u32 (*rr)(struct mt76_dev *dev, u32 offset); 42 void (*wr)(struct mt76_dev *dev, u32 offset, u32 val); 43 u32 (*rmw)(struct mt76_dev *dev, u32 offset, u32 mask, u32 val); 44 void (*write_copy)(struct mt76_dev *dev, u32 offset, const void *data, 45 int len); 46 void (*read_copy)(struct mt76_dev *dev, u32 offset, void *data, 47 int len); 48 int (*wr_rp)(struct mt76_dev *dev, u32 base, 49 const struct mt76_reg_pair *rp, int len); 50 int (*rd_rp)(struct mt76_dev *dev, u32 base, 51 struct mt76_reg_pair *rp, int len); 52 enum mt76_bus_type type; 53 }; 54 55 #define mt76_is_usb(dev) ((dev)->bus->type == MT76_BUS_USB) 56 #define mt76_is_mmio(dev) ((dev)->bus->type == MT76_BUS_MMIO) 57 #define mt76_is_sdio(dev) ((dev)->bus->type == MT76_BUS_SDIO) 58 59 enum mt76_txq_id { 60 MT_TXQ_VO = IEEE80211_AC_VO, 61 MT_TXQ_VI = IEEE80211_AC_VI, 62 MT_TXQ_BE = IEEE80211_AC_BE, 63 MT_TXQ_BK = IEEE80211_AC_BK, 64 MT_TXQ_PSD, 65 MT_TXQ_MCU, 66 MT_TXQ_MCU_WA, 67 MT_TXQ_BEACON, 68 MT_TXQ_CAB, 69 MT_TXQ_FWDL, 70 __MT_TXQ_MAX 71 }; 72 73 enum mt76_rxq_id { 74 MT_RXQ_MAIN, 75 MT_RXQ_MCU, 76 MT_RXQ_MCU_WA, 77 __MT_RXQ_MAX 78 }; 79 80 struct mt76_queue_buf { 81 dma_addr_t addr; 82 u16 len; 83 bool skip_unmap; 84 }; 85 86 struct mt76_tx_info { 87 struct mt76_queue_buf buf[32]; 88 struct sk_buff *skb; 89 int nbuf; 90 u32 info; 91 }; 92 93 struct mt76_queue_entry { 94 union { 95 void *buf; 96 struct sk_buff *skb; 97 }; 98 union { 99 struct mt76_txwi_cache *txwi; 100 struct urb *urb; 101 int buf_sz; 102 }; 103 enum mt76_txq_id qid; 104 bool skip_buf0:1; 105 bool skip_buf1:1; 106 bool schedule:1; 107 bool done:1; 108 }; 109 110 struct mt76_queue_regs { 111 u32 desc_base; 112 u32 ring_size; 113 u32 cpu_idx; 114 u32 dma_idx; 115 } __packed __aligned(4); 116 117 struct mt76_queue { 118 struct mt76_queue_regs __iomem *regs; 119 120 spinlock_t lock; 121 struct mt76_queue_entry *entry; 122 struct mt76_desc *desc; 123 124 u16 first; 125 u16 head; 126 u16 tail; 127 int ndesc; 128 int queued; 129 int buf_size; 130 bool stopped; 131 132 u8 buf_offset; 133 u8 hw_idx; 134 135 dma_addr_t desc_dma; 136 struct sk_buff *rx_head; 137 struct page_frag_cache rx_page; 138 }; 139 140 struct mt76_sw_queue { 141 struct mt76_queue *q; 142 143 int swq_queued; 144 }; 145 146 struct mt76_mcu_ops { 147 u32 headroom; 148 u32 tailroom; 149 150 int (*mcu_send_msg)(struct mt76_dev *dev, int cmd, const void *data, 151 int len, bool wait_resp); 152 int (*mcu_skb_send_msg)(struct mt76_dev *dev, struct sk_buff *skb, 153 int cmd, bool wait_resp); 154 u32 (*mcu_rr)(struct mt76_dev *dev, u32 offset); 155 void (*mcu_wr)(struct mt76_dev *dev, u32 offset, u32 val); 156 int (*mcu_wr_rp)(struct mt76_dev *dev, u32 base, 157 const struct mt76_reg_pair *rp, int len); 158 int (*mcu_rd_rp)(struct mt76_dev *dev, u32 base, 159 struct mt76_reg_pair *rp, int len); 160 int (*mcu_restart)(struct mt76_dev *dev); 161 }; 162 163 struct mt76_queue_ops { 164 int (*init)(struct mt76_dev *dev); 165 166 int (*alloc)(struct mt76_dev *dev, struct mt76_queue *q, 167 int idx, int n_desc, int bufsize, 168 u32 ring_base); 169 170 int (*tx_queue_skb)(struct mt76_dev *dev, enum mt76_txq_id qid, 171 struct sk_buff *skb, struct mt76_wcid *wcid, 172 struct ieee80211_sta *sta); 173 174 int (*tx_queue_skb_raw)(struct mt76_dev *dev, enum mt76_txq_id qid, 175 struct sk_buff *skb, u32 tx_info); 176 177 void *(*dequeue)(struct mt76_dev *dev, struct mt76_queue *q, bool flush, 178 int *len, u32 *info, bool *more); 179 180 void (*rx_reset)(struct mt76_dev *dev, enum mt76_rxq_id qid); 181 182 void (*tx_cleanup)(struct mt76_dev *dev, enum mt76_txq_id qid, 183 bool flush); 184 185 void (*kick)(struct mt76_dev *dev, struct mt76_queue *q); 186 }; 187 188 enum mt76_wcid_flags { 189 MT_WCID_FLAG_CHECK_PS, 190 MT_WCID_FLAG_PS, 191 }; 192 193 #define MT76_N_WCIDS 288 194 195 /* stored in ieee80211_tx_info::hw_queue */ 196 #define MT_TX_HW_QUEUE_EXT_PHY BIT(3) 197 198 DECLARE_EWMA(signal, 10, 8); 199 200 #define MT_WCID_TX_INFO_RATE GENMASK(15, 0) 201 #define MT_WCID_TX_INFO_NSS GENMASK(17, 16) 202 #define MT_WCID_TX_INFO_TXPWR_ADJ GENMASK(25, 18) 203 #define MT_WCID_TX_INFO_SET BIT(31) 204 205 struct mt76_wcid { 206 struct mt76_rx_tid __rcu *aggr[IEEE80211_NUM_TIDS]; 207 208 unsigned long flags; 209 210 struct ewma_signal rssi; 211 int inactive_count; 212 213 u16 idx; 214 u8 hw_key_idx; 215 216 u8 sta:1; 217 u8 ext_phy:1; 218 u8 amsdu:1; 219 220 u8 rx_check_pn; 221 u8 rx_key_pn[IEEE80211_NUM_TIDS][6]; 222 u16 cipher; 223 224 u32 tx_info; 225 bool sw_iv; 226 227 u8 packet_id; 228 }; 229 230 struct mt76_txq { 231 struct mt76_sw_queue *swq; 232 struct mt76_wcid *wcid; 233 234 struct sk_buff_head retry_q; 235 236 u16 agg_ssn; 237 bool send_bar; 238 bool aggr; 239 }; 240 241 struct mt76_txwi_cache { 242 struct list_head list; 243 dma_addr_t dma_addr; 244 245 struct sk_buff *skb; 246 }; 247 248 struct mt76_rx_tid { 249 struct rcu_head rcu_head; 250 251 struct mt76_dev *dev; 252 253 spinlock_t lock; 254 struct delayed_work reorder_work; 255 256 u16 head; 257 u16 size; 258 u16 nframes; 259 260 u8 num; 261 262 u8 started:1, stopped:1, timer_pending:1; 263 264 struct sk_buff *reorder_buf[]; 265 }; 266 267 #define MT_TX_CB_DMA_DONE BIT(0) 268 #define MT_TX_CB_TXS_DONE BIT(1) 269 #define MT_TX_CB_TXS_FAILED BIT(2) 270 271 #define MT_PACKET_ID_MASK GENMASK(6, 0) 272 #define MT_PACKET_ID_NO_ACK 0 273 #define MT_PACKET_ID_NO_SKB 1 274 #define MT_PACKET_ID_FIRST 2 275 #define MT_PACKET_ID_HAS_RATE BIT(7) 276 277 #define MT_TX_STATUS_SKB_TIMEOUT HZ 278 279 struct mt76_tx_cb { 280 unsigned long jiffies; 281 u16 wcid; 282 u8 pktid; 283 u8 flags; 284 }; 285 286 enum { 287 MT76_STATE_INITIALIZED, 288 MT76_STATE_RUNNING, 289 MT76_STATE_MCU_RUNNING, 290 MT76_SCANNING, 291 MT76_HW_SCANNING, 292 MT76_HW_SCHED_SCANNING, 293 MT76_RESTART, 294 MT76_RESET, 295 MT76_MCU_RESET, 296 MT76_REMOVED, 297 MT76_READING_STATS, 298 MT76_STATE_POWER_OFF, 299 MT76_STATE_SUSPEND, 300 MT76_STATE_ROC, 301 MT76_STATE_PM, 302 }; 303 304 struct mt76_hw_cap { 305 bool has_2ghz; 306 bool has_5ghz; 307 }; 308 309 #define MT_DRV_TXWI_NO_FREE BIT(0) 310 #define MT_DRV_TX_ALIGNED4_SKBS BIT(1) 311 #define MT_DRV_SW_RX_AIRTIME BIT(2) 312 #define MT_DRV_RX_DMA_HDR BIT(3) 313 #define MT_DRV_HW_MGMT_TXQ BIT(4) 314 #define MT_DRV_AMSDU_OFFLOAD BIT(5) 315 316 struct mt76_driver_ops { 317 u32 drv_flags; 318 u32 survey_flags; 319 u16 txwi_size; 320 321 void (*update_survey)(struct mt76_dev *dev); 322 323 int (*tx_prepare_skb)(struct mt76_dev *dev, void *txwi_ptr, 324 enum mt76_txq_id qid, struct mt76_wcid *wcid, 325 struct ieee80211_sta *sta, 326 struct mt76_tx_info *tx_info); 327 328 void (*tx_complete_skb)(struct mt76_dev *dev, 329 struct mt76_queue_entry *e); 330 331 bool (*tx_status_data)(struct mt76_dev *dev, u8 *update); 332 333 void (*rx_skb)(struct mt76_dev *dev, enum mt76_rxq_id q, 334 struct sk_buff *skb); 335 336 void (*rx_poll_complete)(struct mt76_dev *dev, enum mt76_rxq_id q); 337 338 void (*sta_ps)(struct mt76_dev *dev, struct ieee80211_sta *sta, 339 bool ps); 340 341 int (*sta_add)(struct mt76_dev *dev, struct ieee80211_vif *vif, 342 struct ieee80211_sta *sta); 343 344 void (*sta_assoc)(struct mt76_dev *dev, struct ieee80211_vif *vif, 345 struct ieee80211_sta *sta); 346 347 void (*sta_remove)(struct mt76_dev *dev, struct ieee80211_vif *vif, 348 struct ieee80211_sta *sta); 349 }; 350 351 struct mt76_channel_state { 352 u64 cc_active; 353 u64 cc_busy; 354 u64 cc_rx; 355 u64 cc_bss_rx; 356 u64 cc_tx; 357 358 s8 noise; 359 }; 360 361 struct mt76_sband { 362 struct ieee80211_supported_band sband; 363 struct mt76_channel_state *chan; 364 }; 365 366 struct mt76_rate_power { 367 union { 368 struct { 369 s8 cck[4]; 370 s8 ofdm[8]; 371 s8 stbc[10]; 372 s8 ht[16]; 373 s8 vht[10]; 374 }; 375 s8 all[48]; 376 }; 377 }; 378 379 /* addr req mask */ 380 #define MT_VEND_TYPE_EEPROM BIT(31) 381 #define MT_VEND_TYPE_CFG BIT(30) 382 #define MT_VEND_TYPE_MASK (MT_VEND_TYPE_EEPROM | MT_VEND_TYPE_CFG) 383 384 #define MT_VEND_ADDR(type, n) (MT_VEND_TYPE_##type | (n)) 385 enum mt_vendor_req { 386 MT_VEND_DEV_MODE = 0x1, 387 MT_VEND_WRITE = 0x2, 388 MT_VEND_POWER_ON = 0x4, 389 MT_VEND_MULTI_WRITE = 0x6, 390 MT_VEND_MULTI_READ = 0x7, 391 MT_VEND_READ_EEPROM = 0x9, 392 MT_VEND_WRITE_FCE = 0x42, 393 MT_VEND_WRITE_CFG = 0x46, 394 MT_VEND_READ_CFG = 0x47, 395 MT_VEND_READ_EXT = 0x63, 396 MT_VEND_WRITE_EXT = 0x66, 397 MT_VEND_FEATURE_SET = 0x91, 398 }; 399 400 enum mt76u_in_ep { 401 MT_EP_IN_PKT_RX, 402 MT_EP_IN_CMD_RESP, 403 __MT_EP_IN_MAX, 404 }; 405 406 enum mt76u_out_ep { 407 MT_EP_OUT_INBAND_CMD, 408 MT_EP_OUT_AC_BE, 409 MT_EP_OUT_AC_BK, 410 MT_EP_OUT_AC_VI, 411 MT_EP_OUT_AC_VO, 412 MT_EP_OUT_HCCA, 413 __MT_EP_OUT_MAX, 414 }; 415 416 struct mt76_mcu { 417 struct mutex mutex; 418 u32 msg_seq; 419 420 struct sk_buff_head res_q; 421 wait_queue_head_t wait; 422 }; 423 424 #define MT_TX_SG_MAX_SIZE 8 425 #define MT_RX_SG_MAX_SIZE 4 426 #define MT_NUM_TX_ENTRIES 256 427 #define MT_NUM_RX_ENTRIES 128 428 #define MCU_RESP_URB_SIZE 1024 429 struct mt76_usb { 430 struct mutex usb_ctrl_mtx; 431 u8 *data; 432 u16 data_len; 433 434 struct tasklet_struct rx_tasklet; 435 struct work_struct stat_work; 436 437 u8 out_ep[__MT_EP_OUT_MAX]; 438 u8 in_ep[__MT_EP_IN_MAX]; 439 bool sg_en; 440 441 struct mt76u_mcu { 442 u8 *data; 443 /* multiple reads */ 444 struct mt76_reg_pair *rp; 445 int rp_len; 446 u32 base; 447 bool burst; 448 } mcu; 449 }; 450 451 struct mt76_sdio { 452 struct workqueue_struct *txrx_wq; 453 struct { 454 struct work_struct xmit_work; 455 struct work_struct status_work; 456 } tx; 457 struct { 458 struct work_struct recv_work; 459 struct work_struct net_work; 460 } rx; 461 462 struct work_struct stat_work; 463 464 struct sdio_func *func; 465 void *intr_data; 466 467 struct { 468 struct mutex lock; 469 int pse_data_quota; 470 int ple_data_quota; 471 int pse_mcu_quota; 472 int deficit; 473 } sched; 474 }; 475 476 struct mt76_mmio { 477 void __iomem *regs; 478 spinlock_t irq_lock; 479 u32 irqmask; 480 }; 481 482 struct mt76_rx_status { 483 union { 484 struct mt76_wcid *wcid; 485 u16 wcid_idx; 486 }; 487 488 unsigned long reorder_time; 489 490 u32 ampdu_ref; 491 492 u8 iv[6]; 493 494 u8 ext_phy:1; 495 u8 aggr:1; 496 u8 tid; 497 u16 seqno; 498 499 u16 freq; 500 u32 flag; 501 u8 enc_flags; 502 u8 encoding:2, bw:3, he_ru:3; 503 u8 he_gi:2, he_dcm:1; 504 u8 rate_idx; 505 u8 nss; 506 u8 band; 507 s8 signal; 508 u8 chains; 509 s8 chain_signal[IEEE80211_MAX_CHAINS]; 510 }; 511 512 struct mt76_testmode_ops { 513 int (*set_state)(struct mt76_dev *dev, enum mt76_testmode_state state); 514 int (*set_params)(struct mt76_dev *dev, struct nlattr **tb, 515 enum mt76_testmode_state new_state); 516 int (*dump_stats)(struct mt76_dev *dev, struct sk_buff *msg); 517 }; 518 519 struct mt76_testmode_data { 520 enum mt76_testmode_state state; 521 522 u32 param_set[DIV_ROUND_UP(NUM_MT76_TM_ATTRS, 32)]; 523 struct sk_buff *tx_skb; 524 525 u32 tx_count; 526 u16 tx_msdu_len; 527 528 u8 tx_rate_mode; 529 u8 tx_rate_idx; 530 u8 tx_rate_nss; 531 u8 tx_rate_sgi; 532 u8 tx_rate_ldpc; 533 534 u8 tx_antenna_mask; 535 536 u32 freq_offset; 537 538 u8 tx_power[4]; 539 u8 tx_power_control; 540 541 const char *mtd_name; 542 u32 mtd_offset; 543 544 u32 tx_pending; 545 u32 tx_queued; 546 u32 tx_done; 547 struct { 548 u64 packets[__MT_RXQ_MAX]; 549 u64 fcs_error[__MT_RXQ_MAX]; 550 } rx_stats; 551 }; 552 553 struct mt76_phy { 554 struct ieee80211_hw *hw; 555 struct mt76_dev *dev; 556 void *priv; 557 558 unsigned long state; 559 560 struct cfg80211_chan_def chandef; 561 struct ieee80211_channel *main_chan; 562 563 struct mt76_channel_state *chan_state; 564 ktime_t survey_time; 565 566 struct mt76_sband sband_2g; 567 struct mt76_sband sband_5g; 568 569 u32 vif_mask; 570 571 int txpower_cur; 572 u8 antenna_mask; 573 }; 574 575 struct mt76_dev { 576 struct mt76_phy phy; /* must be first */ 577 578 struct mt76_phy *phy2; 579 580 struct ieee80211_hw *hw; 581 582 spinlock_t lock; 583 spinlock_t cc_lock; 584 585 u32 cur_cc_bss_rx; 586 587 struct mt76_rx_status rx_ampdu_status; 588 u32 rx_ampdu_len; 589 u32 rx_ampdu_ref; 590 591 struct mutex mutex; 592 593 const struct mt76_bus_ops *bus; 594 const struct mt76_driver_ops *drv; 595 const struct mt76_mcu_ops *mcu_ops; 596 struct device *dev; 597 598 struct mt76_mcu mcu; 599 600 struct net_device napi_dev; 601 spinlock_t rx_lock; 602 struct napi_struct napi[__MT_RXQ_MAX]; 603 struct sk_buff_head rx_skb[__MT_RXQ_MAX]; 604 605 struct list_head txwi_cache; 606 struct mt76_sw_queue q_tx[2 * __MT_TXQ_MAX]; 607 struct mt76_queue q_rx[__MT_RXQ_MAX]; 608 const struct mt76_queue_ops *queue_ops; 609 int tx_dma_idx[4]; 610 611 struct tasklet_struct tx_tasklet; 612 struct napi_struct tx_napi; 613 struct delayed_work mac_work; 614 615 wait_queue_head_t tx_wait; 616 struct sk_buff_head status_list; 617 618 u32 wcid_mask[DIV_ROUND_UP(MT76_N_WCIDS, 32)]; 619 u32 wcid_phy_mask[DIV_ROUND_UP(MT76_N_WCIDS, 32)]; 620 621 struct mt76_wcid global_wcid; 622 struct mt76_wcid __rcu *wcid[MT76_N_WCIDS]; 623 624 u8 macaddr[ETH_ALEN]; 625 u32 rev; 626 627 u32 aggr_stats[32]; 628 629 struct tasklet_struct pre_tbtt_tasklet; 630 int beacon_int; 631 u8 beacon_mask; 632 633 struct debugfs_blob_wrapper eeprom; 634 struct debugfs_blob_wrapper otp; 635 struct mt76_hw_cap cap; 636 637 struct mt76_rate_power rate_power; 638 639 enum nl80211_dfs_regions region; 640 641 u32 debugfs_reg; 642 643 struct led_classdev led_cdev; 644 char led_name[32]; 645 bool led_al; 646 u8 led_pin; 647 648 u8 csa_complete; 649 650 u32 rxfilter; 651 652 #ifdef CONFIG_NL80211_TESTMODE 653 const struct mt76_testmode_ops *test_ops; 654 struct mt76_testmode_data test; 655 #endif 656 657 struct workqueue_struct *wq; 658 659 union { 660 struct mt76_mmio mmio; 661 struct mt76_usb usb; 662 struct mt76_sdio sdio; 663 }; 664 }; 665 666 enum mt76_phy_type { 667 MT_PHY_TYPE_CCK, 668 MT_PHY_TYPE_OFDM, 669 MT_PHY_TYPE_HT, 670 MT_PHY_TYPE_HT_GF, 671 MT_PHY_TYPE_VHT, 672 MT_PHY_TYPE_HE_SU = 8, 673 MT_PHY_TYPE_HE_EXT_SU, 674 MT_PHY_TYPE_HE_TB, 675 MT_PHY_TYPE_HE_MU, 676 }; 677 678 #define __mt76_rr(dev, ...) (dev)->bus->rr((dev), __VA_ARGS__) 679 #define __mt76_wr(dev, ...) (dev)->bus->wr((dev), __VA_ARGS__) 680 #define __mt76_rmw(dev, ...) (dev)->bus->rmw((dev), __VA_ARGS__) 681 #define __mt76_wr_copy(dev, ...) (dev)->bus->write_copy((dev), __VA_ARGS__) 682 #define __mt76_rr_copy(dev, ...) (dev)->bus->read_copy((dev), __VA_ARGS__) 683 684 #define __mt76_set(dev, offset, val) __mt76_rmw(dev, offset, 0, val) 685 #define __mt76_clear(dev, offset, val) __mt76_rmw(dev, offset, val, 0) 686 687 #define mt76_rr(dev, ...) (dev)->mt76.bus->rr(&((dev)->mt76), __VA_ARGS__) 688 #define mt76_wr(dev, ...) (dev)->mt76.bus->wr(&((dev)->mt76), __VA_ARGS__) 689 #define mt76_rmw(dev, ...) (dev)->mt76.bus->rmw(&((dev)->mt76), __VA_ARGS__) 690 #define mt76_wr_copy(dev, ...) (dev)->mt76.bus->write_copy(&((dev)->mt76), __VA_ARGS__) 691 #define mt76_rr_copy(dev, ...) (dev)->mt76.bus->read_copy(&((dev)->mt76), __VA_ARGS__) 692 #define mt76_wr_rp(dev, ...) (dev)->mt76.bus->wr_rp(&((dev)->mt76), __VA_ARGS__) 693 #define mt76_rd_rp(dev, ...) (dev)->mt76.bus->rd_rp(&((dev)->mt76), __VA_ARGS__) 694 695 #define mt76_mcu_send_msg(dev, ...) (dev)->mt76.mcu_ops->mcu_send_msg(&((dev)->mt76), __VA_ARGS__) 696 697 #define __mt76_mcu_send_msg(dev, ...) (dev)->mcu_ops->mcu_send_msg((dev), __VA_ARGS__) 698 #define __mt76_mcu_skb_send_msg(dev, ...) (dev)->mcu_ops->mcu_skb_send_msg((dev), __VA_ARGS__) 699 #define mt76_mcu_restart(dev, ...) (dev)->mt76.mcu_ops->mcu_restart(&((dev)->mt76)) 700 #define __mt76_mcu_restart(dev, ...) (dev)->mcu_ops->mcu_restart((dev)) 701 702 #define mt76_set(dev, offset, val) mt76_rmw(dev, offset, 0, val) 703 #define mt76_clear(dev, offset, val) mt76_rmw(dev, offset, val, 0) 704 705 #define mt76_get_field(_dev, _reg, _field) \ 706 FIELD_GET(_field, mt76_rr(dev, _reg)) 707 708 #define mt76_rmw_field(_dev, _reg, _field, _val) \ 709 mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val)) 710 711 #define __mt76_rmw_field(_dev, _reg, _field, _val) \ 712 __mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val)) 713 714 #define mt76_hw(dev) (dev)->mphy.hw 715 716 static inline struct ieee80211_hw * 717 mt76_wcid_hw(struct mt76_dev *dev, u16 wcid) 718 { 719 if (wcid <= MT76_N_WCIDS && 720 mt76_wcid_mask_test(dev->wcid_phy_mask, wcid)) 721 return dev->phy2->hw; 722 723 return dev->phy.hw; 724 } 725 726 bool __mt76_poll(struct mt76_dev *dev, u32 offset, u32 mask, u32 val, 727 int timeout); 728 729 #define mt76_poll(dev, ...) __mt76_poll(&((dev)->mt76), __VA_ARGS__) 730 731 bool __mt76_poll_msec(struct mt76_dev *dev, u32 offset, u32 mask, u32 val, 732 int timeout); 733 734 #define mt76_poll_msec(dev, ...) __mt76_poll_msec(&((dev)->mt76), __VA_ARGS__) 735 736 void mt76_mmio_init(struct mt76_dev *dev, void __iomem *regs); 737 void mt76_pci_disable_aspm(struct pci_dev *pdev); 738 739 static inline u16 mt76_chip(struct mt76_dev *dev) 740 { 741 return dev->rev >> 16; 742 } 743 744 static inline u16 mt76_rev(struct mt76_dev *dev) 745 { 746 return dev->rev & 0xffff; 747 } 748 749 #define mt76xx_chip(dev) mt76_chip(&((dev)->mt76)) 750 #define mt76xx_rev(dev) mt76_rev(&((dev)->mt76)) 751 752 #define mt76_init_queues(dev) (dev)->mt76.queue_ops->init(&((dev)->mt76)) 753 #define mt76_queue_alloc(dev, ...) (dev)->mt76.queue_ops->alloc(&((dev)->mt76), __VA_ARGS__) 754 #define mt76_tx_queue_skb_raw(dev, ...) (dev)->mt76.queue_ops->tx_queue_skb_raw(&((dev)->mt76), __VA_ARGS__) 755 #define mt76_tx_queue_skb(dev, ...) (dev)->mt76.queue_ops->tx_queue_skb(&((dev)->mt76), __VA_ARGS__) 756 #define mt76_queue_rx_reset(dev, ...) (dev)->mt76.queue_ops->rx_reset(&((dev)->mt76), __VA_ARGS__) 757 #define mt76_queue_tx_cleanup(dev, ...) (dev)->mt76.queue_ops->tx_cleanup(&((dev)->mt76), __VA_ARGS__) 758 #define mt76_queue_kick(dev, ...) (dev)->mt76.queue_ops->kick(&((dev)->mt76), __VA_ARGS__) 759 760 #define mt76_for_each_q_rx(dev, i) \ 761 for (i = 0; i < ARRAY_SIZE((dev)->q_rx) && \ 762 (dev)->q_rx[i].ndesc; i++) 763 764 struct mt76_dev *mt76_alloc_device(struct device *pdev, unsigned int size, 765 const struct ieee80211_ops *ops, 766 const struct mt76_driver_ops *drv_ops); 767 int mt76_register_device(struct mt76_dev *dev, bool vht, 768 struct ieee80211_rate *rates, int n_rates); 769 void mt76_unregister_device(struct mt76_dev *dev); 770 void mt76_free_device(struct mt76_dev *dev); 771 void mt76_unregister_phy(struct mt76_phy *phy); 772 773 struct mt76_phy *mt76_alloc_phy(struct mt76_dev *dev, unsigned int size, 774 const struct ieee80211_ops *ops); 775 int mt76_register_phy(struct mt76_phy *phy); 776 777 struct dentry *mt76_register_debugfs(struct mt76_dev *dev); 778 int mt76_queues_read(struct seq_file *s, void *data); 779 void mt76_seq_puts_array(struct seq_file *file, const char *str, 780 s8 *val, int len); 781 782 int mt76_eeprom_init(struct mt76_dev *dev, int len); 783 void mt76_eeprom_override(struct mt76_dev *dev); 784 785 static inline struct mt76_phy * 786 mt76_dev_phy(struct mt76_dev *dev, bool phy_ext) 787 { 788 if (phy_ext && dev->phy2) 789 return dev->phy2; 790 return &dev->phy; 791 } 792 793 static inline struct ieee80211_hw * 794 mt76_phy_hw(struct mt76_dev *dev, bool phy_ext) 795 { 796 return mt76_dev_phy(dev, phy_ext)->hw; 797 } 798 799 static inline u8 * 800 mt76_get_txwi_ptr(struct mt76_dev *dev, struct mt76_txwi_cache *t) 801 { 802 return (u8 *)t - dev->drv->txwi_size; 803 } 804 805 /* increment with wrap-around */ 806 static inline int mt76_incr(int val, int size) 807 { 808 return (val + 1) & (size - 1); 809 } 810 811 /* decrement with wrap-around */ 812 static inline int mt76_decr(int val, int size) 813 { 814 return (val - 1) & (size - 1); 815 } 816 817 u8 mt76_ac_to_hwq(u8 ac); 818 819 static inline struct ieee80211_txq * 820 mtxq_to_txq(struct mt76_txq *mtxq) 821 { 822 void *ptr = mtxq; 823 824 return container_of(ptr, struct ieee80211_txq, drv_priv); 825 } 826 827 static inline struct ieee80211_sta * 828 wcid_to_sta(struct mt76_wcid *wcid) 829 { 830 void *ptr = wcid; 831 832 if (!wcid || !wcid->sta) 833 return NULL; 834 835 return container_of(ptr, struct ieee80211_sta, drv_priv); 836 } 837 838 static inline struct mt76_tx_cb *mt76_tx_skb_cb(struct sk_buff *skb) 839 { 840 BUILD_BUG_ON(sizeof(struct mt76_tx_cb) > 841 sizeof(IEEE80211_SKB_CB(skb)->status.status_driver_data)); 842 return ((void *)IEEE80211_SKB_CB(skb)->status.status_driver_data); 843 } 844 845 static inline void *mt76_skb_get_hdr(struct sk_buff *skb) 846 { 847 struct mt76_rx_status mstat; 848 u8 *data = skb->data; 849 850 /* Alignment concerns */ 851 BUILD_BUG_ON(sizeof(struct ieee80211_radiotap_he) % 4); 852 BUILD_BUG_ON(sizeof(struct ieee80211_radiotap_he_mu) % 4); 853 854 mstat = *((struct mt76_rx_status *)skb->cb); 855 856 if (mstat.flag & RX_FLAG_RADIOTAP_HE) 857 data += sizeof(struct ieee80211_radiotap_he); 858 if (mstat.flag & RX_FLAG_RADIOTAP_HE_MU) 859 data += sizeof(struct ieee80211_radiotap_he_mu); 860 861 return data; 862 } 863 864 static inline void mt76_insert_hdr_pad(struct sk_buff *skb) 865 { 866 int len = ieee80211_get_hdrlen_from_skb(skb); 867 868 if (len % 4 == 0) 869 return; 870 871 skb_push(skb, 2); 872 memmove(skb->data, skb->data + 2, len); 873 874 skb->data[len] = 0; 875 skb->data[len + 1] = 0; 876 } 877 878 static inline bool mt76_is_skb_pktid(u8 pktid) 879 { 880 if (pktid & MT_PACKET_ID_HAS_RATE) 881 return false; 882 883 return pktid >= MT_PACKET_ID_FIRST; 884 } 885 886 static inline u8 mt76_tx_power_nss_delta(u8 nss) 887 { 888 static const u8 nss_delta[4] = { 0, 6, 9, 12 }; 889 890 return nss_delta[nss - 1]; 891 } 892 893 static inline bool mt76_testmode_enabled(struct mt76_dev *dev) 894 { 895 #ifdef CONFIG_NL80211_TESTMODE 896 return dev->test.state != MT76_TM_STATE_OFF; 897 #else 898 return false; 899 #endif 900 } 901 902 void mt76_rx(struct mt76_dev *dev, enum mt76_rxq_id q, struct sk_buff *skb); 903 void mt76_tx(struct mt76_phy *dev, struct ieee80211_sta *sta, 904 struct mt76_wcid *wcid, struct sk_buff *skb); 905 void mt76_txq_init(struct mt76_dev *dev, struct ieee80211_txq *txq); 906 void mt76_txq_remove(struct mt76_dev *dev, struct ieee80211_txq *txq); 907 void mt76_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq); 908 void mt76_stop_tx_queues(struct mt76_dev *dev, struct ieee80211_sta *sta, 909 bool send_bar); 910 void mt76_tx_check_agg_ssn(struct ieee80211_sta *sta, struct sk_buff *skb); 911 void mt76_txq_schedule(struct mt76_phy *phy, enum mt76_txq_id qid); 912 void mt76_txq_schedule_all(struct mt76_phy *phy); 913 void mt76_tx_tasklet(unsigned long data); 914 void mt76_release_buffered_frames(struct ieee80211_hw *hw, 915 struct ieee80211_sta *sta, 916 u16 tids, int nframes, 917 enum ieee80211_frame_release_type reason, 918 bool more_data); 919 bool mt76_has_tx_pending(struct mt76_phy *phy); 920 void mt76_set_channel(struct mt76_phy *phy); 921 void mt76_update_survey(struct mt76_dev *dev); 922 void mt76_update_survey_active_time(struct mt76_phy *phy, ktime_t time); 923 int mt76_get_survey(struct ieee80211_hw *hw, int idx, 924 struct survey_info *survey); 925 void mt76_set_stream_caps(struct mt76_phy *phy, bool vht); 926 927 int mt76_rx_aggr_start(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid, 928 u16 ssn, u16 size); 929 void mt76_rx_aggr_stop(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid); 930 931 void mt76_wcid_key_setup(struct mt76_dev *dev, struct mt76_wcid *wcid, 932 struct ieee80211_key_conf *key); 933 934 void mt76_tx_status_lock(struct mt76_dev *dev, struct sk_buff_head *list) 935 __acquires(&dev->status_list.lock); 936 void mt76_tx_status_unlock(struct mt76_dev *dev, struct sk_buff_head *list) 937 __releases(&dev->status_list.lock); 938 939 int mt76_tx_status_skb_add(struct mt76_dev *dev, struct mt76_wcid *wcid, 940 struct sk_buff *skb); 941 struct sk_buff *mt76_tx_status_skb_get(struct mt76_dev *dev, 942 struct mt76_wcid *wcid, int pktid, 943 struct sk_buff_head *list); 944 void mt76_tx_status_skb_done(struct mt76_dev *dev, struct sk_buff *skb, 945 struct sk_buff_head *list); 946 void mt76_tx_complete_skb(struct mt76_dev *dev, struct sk_buff *skb); 947 void mt76_tx_status_check(struct mt76_dev *dev, struct mt76_wcid *wcid, 948 bool flush); 949 int mt76_sta_state(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 950 struct ieee80211_sta *sta, 951 enum ieee80211_sta_state old_state, 952 enum ieee80211_sta_state new_state); 953 void __mt76_sta_remove(struct mt76_dev *dev, struct ieee80211_vif *vif, 954 struct ieee80211_sta *sta); 955 void mt76_sta_pre_rcu_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 956 struct ieee80211_sta *sta); 957 958 int mt76_get_min_avg_rssi(struct mt76_dev *dev, bool ext_phy); 959 960 int mt76_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 961 int *dbm); 962 963 void mt76_csa_check(struct mt76_dev *dev); 964 void mt76_csa_finish(struct mt76_dev *dev); 965 966 int mt76_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant); 967 int mt76_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set); 968 void mt76_insert_ccmp_hdr(struct sk_buff *skb, u8 key_id); 969 int mt76_get_rate(struct mt76_dev *dev, 970 struct ieee80211_supported_band *sband, 971 int idx, bool cck); 972 void mt76_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 973 const u8 *mac); 974 void mt76_sw_scan_complete(struct ieee80211_hw *hw, 975 struct ieee80211_vif *vif); 976 int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 977 void *data, int len); 978 int mt76_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *skb, 979 struct netlink_callback *cb, void *data, int len); 980 int mt76_testmode_set_state(struct mt76_dev *dev, enum mt76_testmode_state state); 981 982 static inline void mt76_testmode_reset(struct mt76_dev *dev, bool disable) 983 { 984 #ifdef CONFIG_NL80211_TESTMODE 985 enum mt76_testmode_state state = MT76_TM_STATE_IDLE; 986 987 if (disable || dev->test.state == MT76_TM_STATE_OFF) 988 state = MT76_TM_STATE_OFF; 989 990 mt76_testmode_set_state(dev, state); 991 #endif 992 } 993 994 995 /* internal */ 996 static inline struct ieee80211_hw * 997 mt76_tx_status_get_hw(struct mt76_dev *dev, struct sk_buff *skb) 998 { 999 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 1000 struct ieee80211_hw *hw = dev->phy.hw; 1001 1002 if ((info->hw_queue & MT_TX_HW_QUEUE_EXT_PHY) && dev->phy2) 1003 hw = dev->phy2->hw; 1004 1005 info->hw_queue &= ~MT_TX_HW_QUEUE_EXT_PHY; 1006 1007 return hw; 1008 } 1009 1010 void mt76_tx_free(struct mt76_dev *dev); 1011 struct mt76_txwi_cache *mt76_get_txwi(struct mt76_dev *dev); 1012 void mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t); 1013 void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames, 1014 struct napi_struct *napi); 1015 void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q, 1016 struct napi_struct *napi); 1017 void mt76_rx_aggr_reorder(struct sk_buff *skb, struct sk_buff_head *frames); 1018 void mt76_testmode_tx_pending(struct mt76_dev *dev); 1019 void mt76_queue_tx_complete(struct mt76_dev *dev, struct mt76_queue *q, 1020 struct mt76_queue_entry *e); 1021 1022 /* usb */ 1023 static inline bool mt76u_urb_error(struct urb *urb) 1024 { 1025 return urb->status && 1026 urb->status != -ECONNRESET && 1027 urb->status != -ESHUTDOWN && 1028 urb->status != -ENOENT; 1029 } 1030 1031 /* Map hardware queues to usb endpoints */ 1032 static inline u8 q2ep(u8 qid) 1033 { 1034 /* TODO: take management packets to queue 5 */ 1035 return qid + 1; 1036 } 1037 1038 static inline int 1039 mt76u_bulk_msg(struct mt76_dev *dev, void *data, int len, int *actual_len, 1040 int timeout, int ep) 1041 { 1042 struct usb_interface *uintf = to_usb_interface(dev->dev); 1043 struct usb_device *udev = interface_to_usbdev(uintf); 1044 struct mt76_usb *usb = &dev->usb; 1045 unsigned int pipe; 1046 1047 if (actual_len) 1048 pipe = usb_rcvbulkpipe(udev, usb->in_ep[ep]); 1049 else 1050 pipe = usb_sndbulkpipe(udev, usb->out_ep[ep]); 1051 1052 return usb_bulk_msg(udev, pipe, data, len, actual_len, timeout); 1053 } 1054 1055 int mt76_skb_adjust_pad(struct sk_buff *skb); 1056 int mt76u_vendor_request(struct mt76_dev *dev, u8 req, 1057 u8 req_type, u16 val, u16 offset, 1058 void *buf, size_t len); 1059 void mt76u_single_wr(struct mt76_dev *dev, const u8 req, 1060 const u16 offset, const u32 val); 1061 int mt76u_init(struct mt76_dev *dev, struct usb_interface *intf, 1062 bool ext); 1063 int mt76u_alloc_mcu_queue(struct mt76_dev *dev); 1064 int mt76u_alloc_queues(struct mt76_dev *dev); 1065 void mt76u_stop_tx(struct mt76_dev *dev); 1066 void mt76u_stop_rx(struct mt76_dev *dev); 1067 int mt76u_resume_rx(struct mt76_dev *dev); 1068 void mt76u_queues_deinit(struct mt76_dev *dev); 1069 1070 int mt76s_init(struct mt76_dev *dev, struct sdio_func *func, 1071 const struct mt76_bus_ops *bus_ops); 1072 int mt76s_alloc_queues(struct mt76_dev *dev); 1073 void mt76s_stop_txrx(struct mt76_dev *dev); 1074 void mt76s_deinit(struct mt76_dev *dev); 1075 1076 struct sk_buff * 1077 mt76_mcu_msg_alloc(struct mt76_dev *dev, const void *data, 1078 int data_len); 1079 void mt76_mcu_rx_event(struct mt76_dev *dev, struct sk_buff *skb); 1080 struct sk_buff *mt76_mcu_get_response(struct mt76_dev *dev, 1081 unsigned long expires); 1082 1083 void mt76_set_irq_mask(struct mt76_dev *dev, u32 addr, u32 clear, u32 set); 1084 1085 #endif 1086