1 /* SPDX-License-Identifier: ISC */ 2 /* 3 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name> 4 */ 5 6 #ifndef __MT76_H 7 #define __MT76_H 8 9 #include <linux/kernel.h> 10 #include <linux/io.h> 11 #include <linux/spinlock.h> 12 #include <linux/skbuff.h> 13 #include <linux/leds.h> 14 #include <linux/usb.h> 15 #include <linux/average.h> 16 #include <net/mac80211.h> 17 #include "util.h" 18 #include "testmode.h" 19 20 #define MT_TX_RING_SIZE 256 21 #define MT_MCU_RING_SIZE 32 22 #define MT_RX_BUF_SIZE 2048 23 #define MT_SKB_HEAD_LEN 128 24 25 struct mt76_dev; 26 struct mt76_phy; 27 struct mt76_wcid; 28 29 struct mt76_reg_pair { 30 u32 reg; 31 u32 value; 32 }; 33 34 enum mt76_bus_type { 35 MT76_BUS_MMIO, 36 MT76_BUS_USB, 37 MT76_BUS_SDIO, 38 }; 39 40 struct mt76_bus_ops { 41 u32 (*rr)(struct mt76_dev *dev, u32 offset); 42 void (*wr)(struct mt76_dev *dev, u32 offset, u32 val); 43 u32 (*rmw)(struct mt76_dev *dev, u32 offset, u32 mask, u32 val); 44 void (*write_copy)(struct mt76_dev *dev, u32 offset, const void *data, 45 int len); 46 void (*read_copy)(struct mt76_dev *dev, u32 offset, void *data, 47 int len); 48 int (*wr_rp)(struct mt76_dev *dev, u32 base, 49 const struct mt76_reg_pair *rp, int len); 50 int (*rd_rp)(struct mt76_dev *dev, u32 base, 51 struct mt76_reg_pair *rp, int len); 52 enum mt76_bus_type type; 53 }; 54 55 #define mt76_is_usb(dev) ((dev)->bus->type == MT76_BUS_USB) 56 #define mt76_is_mmio(dev) ((dev)->bus->type == MT76_BUS_MMIO) 57 #define mt76_is_sdio(dev) ((dev)->bus->type == MT76_BUS_SDIO) 58 59 enum mt76_txq_id { 60 MT_TXQ_VO = IEEE80211_AC_VO, 61 MT_TXQ_VI = IEEE80211_AC_VI, 62 MT_TXQ_BE = IEEE80211_AC_BE, 63 MT_TXQ_BK = IEEE80211_AC_BK, 64 MT_TXQ_PSD, 65 MT_TXQ_MCU, 66 MT_TXQ_MCU_WA, 67 MT_TXQ_BEACON, 68 MT_TXQ_CAB, 69 MT_TXQ_FWDL, 70 __MT_TXQ_MAX 71 }; 72 73 enum mt76_rxq_id { 74 MT_RXQ_MAIN, 75 MT_RXQ_MCU, 76 MT_RXQ_MCU_WA, 77 __MT_RXQ_MAX 78 }; 79 80 struct mt76_queue_buf { 81 dma_addr_t addr; 82 int len; 83 }; 84 85 struct mt76_tx_info { 86 struct mt76_queue_buf buf[32]; 87 struct sk_buff *skb; 88 int nbuf; 89 u32 info; 90 }; 91 92 struct mt76_queue_entry { 93 union { 94 void *buf; 95 struct sk_buff *skb; 96 }; 97 union { 98 struct mt76_txwi_cache *txwi; 99 struct urb *urb; 100 int buf_sz; 101 }; 102 enum mt76_txq_id qid; 103 bool skip_buf0:1; 104 bool schedule:1; 105 bool done:1; 106 }; 107 108 struct mt76_queue_regs { 109 u32 desc_base; 110 u32 ring_size; 111 u32 cpu_idx; 112 u32 dma_idx; 113 } __packed __aligned(4); 114 115 struct mt76_queue { 116 struct mt76_queue_regs __iomem *regs; 117 118 spinlock_t lock; 119 struct mt76_queue_entry *entry; 120 struct mt76_desc *desc; 121 122 u16 first; 123 u16 head; 124 u16 tail; 125 int ndesc; 126 int queued; 127 int buf_size; 128 bool stopped; 129 130 u8 buf_offset; 131 u8 hw_idx; 132 133 dma_addr_t desc_dma; 134 struct sk_buff *rx_head; 135 struct page_frag_cache rx_page; 136 }; 137 138 struct mt76_sw_queue { 139 struct mt76_queue *q; 140 141 struct list_head swq; 142 int swq_queued; 143 }; 144 145 struct mt76_mcu_ops { 146 u32 headroom; 147 u32 tailroom; 148 149 int (*mcu_send_msg)(struct mt76_dev *dev, int cmd, const void *data, 150 int len, bool wait_resp); 151 int (*mcu_skb_send_msg)(struct mt76_dev *dev, struct sk_buff *skb, 152 int cmd, bool wait_resp); 153 u32 (*mcu_rr)(struct mt76_dev *dev, u32 offset); 154 void (*mcu_wr)(struct mt76_dev *dev, u32 offset, u32 val); 155 int (*mcu_wr_rp)(struct mt76_dev *dev, u32 base, 156 const struct mt76_reg_pair *rp, int len); 157 int (*mcu_rd_rp)(struct mt76_dev *dev, u32 base, 158 struct mt76_reg_pair *rp, int len); 159 int (*mcu_restart)(struct mt76_dev *dev); 160 }; 161 162 struct mt76_queue_ops { 163 int (*init)(struct mt76_dev *dev); 164 165 int (*alloc)(struct mt76_dev *dev, struct mt76_queue *q, 166 int idx, int n_desc, int bufsize, 167 u32 ring_base); 168 169 int (*tx_queue_skb)(struct mt76_dev *dev, enum mt76_txq_id qid, 170 struct sk_buff *skb, struct mt76_wcid *wcid, 171 struct ieee80211_sta *sta); 172 173 int (*tx_queue_skb_raw)(struct mt76_dev *dev, enum mt76_txq_id qid, 174 struct sk_buff *skb, u32 tx_info); 175 176 void *(*dequeue)(struct mt76_dev *dev, struct mt76_queue *q, bool flush, 177 int *len, u32 *info, bool *more); 178 179 void (*rx_reset)(struct mt76_dev *dev, enum mt76_rxq_id qid); 180 181 void (*tx_cleanup)(struct mt76_dev *dev, enum mt76_txq_id qid, 182 bool flush); 183 184 void (*kick)(struct mt76_dev *dev, struct mt76_queue *q); 185 }; 186 187 enum mt76_wcid_flags { 188 MT_WCID_FLAG_CHECK_PS, 189 MT_WCID_FLAG_PS, 190 }; 191 192 #define MT76_N_WCIDS 288 193 194 /* stored in ieee80211_tx_info::hw_queue */ 195 #define MT_TX_HW_QUEUE_EXT_PHY BIT(3) 196 197 DECLARE_EWMA(signal, 10, 8); 198 199 #define MT_WCID_TX_INFO_RATE GENMASK(15, 0) 200 #define MT_WCID_TX_INFO_NSS GENMASK(17, 16) 201 #define MT_WCID_TX_INFO_TXPWR_ADJ GENMASK(25, 18) 202 #define MT_WCID_TX_INFO_SET BIT(31) 203 204 struct mt76_wcid { 205 struct mt76_rx_tid __rcu *aggr[IEEE80211_NUM_TIDS]; 206 207 unsigned long flags; 208 209 struct ewma_signal rssi; 210 int inactive_count; 211 212 u16 idx; 213 u8 hw_key_idx; 214 215 u8 sta:1; 216 u8 ext_phy:1; 217 218 u8 rx_check_pn; 219 u8 rx_key_pn[IEEE80211_NUM_TIDS][6]; 220 u16 cipher; 221 222 u32 tx_info; 223 bool sw_iv; 224 225 u8 packet_id; 226 }; 227 228 struct mt76_txq { 229 struct mt76_sw_queue *swq; 230 struct mt76_wcid *wcid; 231 232 struct sk_buff_head retry_q; 233 234 u16 agg_ssn; 235 bool send_bar; 236 bool aggr; 237 }; 238 239 struct mt76_txwi_cache { 240 struct list_head list; 241 dma_addr_t dma_addr; 242 243 struct sk_buff *skb; 244 }; 245 246 struct mt76_rx_tid { 247 struct rcu_head rcu_head; 248 249 struct mt76_dev *dev; 250 251 spinlock_t lock; 252 struct delayed_work reorder_work; 253 254 u16 head; 255 u16 size; 256 u16 nframes; 257 258 u8 num; 259 260 u8 started:1, stopped:1, timer_pending:1; 261 262 struct sk_buff *reorder_buf[]; 263 }; 264 265 #define MT_TX_CB_DMA_DONE BIT(0) 266 #define MT_TX_CB_TXS_DONE BIT(1) 267 #define MT_TX_CB_TXS_FAILED BIT(2) 268 269 #define MT_PACKET_ID_MASK GENMASK(6, 0) 270 #define MT_PACKET_ID_NO_ACK 0 271 #define MT_PACKET_ID_NO_SKB 1 272 #define MT_PACKET_ID_FIRST 2 273 #define MT_PACKET_ID_HAS_RATE BIT(7) 274 275 #define MT_TX_STATUS_SKB_TIMEOUT HZ 276 277 struct mt76_tx_cb { 278 unsigned long jiffies; 279 u16 wcid; 280 u8 pktid; 281 u8 flags; 282 }; 283 284 enum { 285 MT76_STATE_INITIALIZED, 286 MT76_STATE_RUNNING, 287 MT76_STATE_MCU_RUNNING, 288 MT76_SCANNING, 289 MT76_HW_SCANNING, 290 MT76_HW_SCHED_SCANNING, 291 MT76_RESTART, 292 MT76_RESET, 293 MT76_MCU_RESET, 294 MT76_REMOVED, 295 MT76_READING_STATS, 296 MT76_STATE_POWER_OFF, 297 MT76_STATE_SUSPEND, 298 MT76_STATE_ROC, 299 MT76_STATE_PM, 300 }; 301 302 struct mt76_hw_cap { 303 bool has_2ghz; 304 bool has_5ghz; 305 }; 306 307 #define MT_DRV_TXWI_NO_FREE BIT(0) 308 #define MT_DRV_TX_ALIGNED4_SKBS BIT(1) 309 #define MT_DRV_SW_RX_AIRTIME BIT(2) 310 #define MT_DRV_RX_DMA_HDR BIT(3) 311 #define MT_DRV_HW_MGMT_TXQ BIT(4) 312 313 struct mt76_driver_ops { 314 u32 drv_flags; 315 u32 survey_flags; 316 u16 txwi_size; 317 318 void (*update_survey)(struct mt76_dev *dev); 319 320 int (*tx_prepare_skb)(struct mt76_dev *dev, void *txwi_ptr, 321 enum mt76_txq_id qid, struct mt76_wcid *wcid, 322 struct ieee80211_sta *sta, 323 struct mt76_tx_info *tx_info); 324 325 void (*tx_complete_skb)(struct mt76_dev *dev, enum mt76_txq_id qid, 326 struct mt76_queue_entry *e); 327 328 bool (*tx_status_data)(struct mt76_dev *dev, u8 *update); 329 330 void (*rx_skb)(struct mt76_dev *dev, enum mt76_rxq_id q, 331 struct sk_buff *skb); 332 333 void (*rx_poll_complete)(struct mt76_dev *dev, enum mt76_rxq_id q); 334 335 void (*sta_ps)(struct mt76_dev *dev, struct ieee80211_sta *sta, 336 bool ps); 337 338 int (*sta_add)(struct mt76_dev *dev, struct ieee80211_vif *vif, 339 struct ieee80211_sta *sta); 340 341 void (*sta_assoc)(struct mt76_dev *dev, struct ieee80211_vif *vif, 342 struct ieee80211_sta *sta); 343 344 void (*sta_remove)(struct mt76_dev *dev, struct ieee80211_vif *vif, 345 struct ieee80211_sta *sta); 346 }; 347 348 struct mt76_channel_state { 349 u64 cc_active; 350 u64 cc_busy; 351 u64 cc_rx; 352 u64 cc_bss_rx; 353 u64 cc_tx; 354 355 s8 noise; 356 }; 357 358 struct mt76_sband { 359 struct ieee80211_supported_band sband; 360 struct mt76_channel_state *chan; 361 }; 362 363 struct mt76_rate_power { 364 union { 365 struct { 366 s8 cck[4]; 367 s8 ofdm[8]; 368 s8 stbc[10]; 369 s8 ht[16]; 370 s8 vht[10]; 371 }; 372 s8 all[48]; 373 }; 374 }; 375 376 /* addr req mask */ 377 #define MT_VEND_TYPE_EEPROM BIT(31) 378 #define MT_VEND_TYPE_CFG BIT(30) 379 #define MT_VEND_TYPE_MASK (MT_VEND_TYPE_EEPROM | MT_VEND_TYPE_CFG) 380 381 #define MT_VEND_ADDR(type, n) (MT_VEND_TYPE_##type | (n)) 382 enum mt_vendor_req { 383 MT_VEND_DEV_MODE = 0x1, 384 MT_VEND_WRITE = 0x2, 385 MT_VEND_POWER_ON = 0x4, 386 MT_VEND_MULTI_WRITE = 0x6, 387 MT_VEND_MULTI_READ = 0x7, 388 MT_VEND_READ_EEPROM = 0x9, 389 MT_VEND_WRITE_FCE = 0x42, 390 MT_VEND_WRITE_CFG = 0x46, 391 MT_VEND_READ_CFG = 0x47, 392 MT_VEND_READ_EXT = 0x63, 393 MT_VEND_WRITE_EXT = 0x66, 394 MT_VEND_FEATURE_SET = 0x91, 395 }; 396 397 enum mt76u_in_ep { 398 MT_EP_IN_PKT_RX, 399 MT_EP_IN_CMD_RESP, 400 __MT_EP_IN_MAX, 401 }; 402 403 enum mt76u_out_ep { 404 MT_EP_OUT_INBAND_CMD, 405 MT_EP_OUT_AC_BE, 406 MT_EP_OUT_AC_BK, 407 MT_EP_OUT_AC_VI, 408 MT_EP_OUT_AC_VO, 409 MT_EP_OUT_HCCA, 410 __MT_EP_OUT_MAX, 411 }; 412 413 struct mt76_mcu { 414 struct mutex mutex; 415 u32 msg_seq; 416 417 struct sk_buff_head res_q; 418 wait_queue_head_t wait; 419 }; 420 421 #define MT_TX_SG_MAX_SIZE 8 422 #define MT_RX_SG_MAX_SIZE 4 423 #define MT_NUM_TX_ENTRIES 256 424 #define MT_NUM_RX_ENTRIES 128 425 #define MCU_RESP_URB_SIZE 1024 426 struct mt76_usb { 427 struct mutex usb_ctrl_mtx; 428 u8 *data; 429 u16 data_len; 430 431 struct tasklet_struct rx_tasklet; 432 struct work_struct stat_work; 433 434 u8 out_ep[__MT_EP_OUT_MAX]; 435 u8 in_ep[__MT_EP_IN_MAX]; 436 bool sg_en; 437 438 struct mt76u_mcu { 439 u8 *data; 440 /* multiple reads */ 441 struct mt76_reg_pair *rp; 442 int rp_len; 443 u32 base; 444 bool burst; 445 } mcu; 446 }; 447 448 struct mt76_sdio { 449 struct task_struct *tx_kthread; 450 struct task_struct *kthread; 451 struct work_struct stat_work; 452 453 unsigned long state; 454 455 struct sdio_func *func; 456 457 struct { 458 struct mutex lock; 459 int pse_data_quota; 460 int ple_data_quota; 461 int pse_mcu_quota; 462 int deficit; 463 } sched; 464 }; 465 466 struct mt76_mmio { 467 void __iomem *regs; 468 spinlock_t irq_lock; 469 u32 irqmask; 470 }; 471 472 struct mt76_rx_status { 473 union { 474 struct mt76_wcid *wcid; 475 u16 wcid_idx; 476 }; 477 478 unsigned long reorder_time; 479 480 u32 ampdu_ref; 481 482 u8 iv[6]; 483 484 u8 ext_phy:1; 485 u8 aggr:1; 486 u8 tid; 487 u16 seqno; 488 489 u16 freq; 490 u32 flag; 491 u8 enc_flags; 492 u8 encoding:2, bw:3, he_ru:3; 493 u8 he_gi:2, he_dcm:1; 494 u8 rate_idx; 495 u8 nss; 496 u8 band; 497 s8 signal; 498 u8 chains; 499 s8 chain_signal[IEEE80211_MAX_CHAINS]; 500 }; 501 502 struct mt76_testmode_ops { 503 int (*set_state)(struct mt76_dev *dev, enum mt76_testmode_state state); 504 int (*set_params)(struct mt76_dev *dev, struct nlattr **tb, 505 enum mt76_testmode_state new_state); 506 int (*dump_stats)(struct mt76_dev *dev, struct sk_buff *msg); 507 }; 508 509 struct mt76_testmode_data { 510 enum mt76_testmode_state state; 511 512 u32 param_set[DIV_ROUND_UP(NUM_MT76_TM_ATTRS, 32)]; 513 struct sk_buff *tx_skb; 514 515 u32 tx_count; 516 u16 tx_msdu_len; 517 518 u8 tx_rate_mode; 519 u8 tx_rate_idx; 520 u8 tx_rate_nss; 521 u8 tx_rate_sgi; 522 u8 tx_rate_ldpc; 523 524 u8 tx_antenna_mask; 525 526 u32 freq_offset; 527 528 u8 tx_power[4]; 529 u8 tx_power_control; 530 531 const char *mtd_name; 532 u32 mtd_offset; 533 534 u32 tx_pending; 535 u32 tx_queued; 536 u32 tx_done; 537 struct { 538 u64 packets[__MT_RXQ_MAX]; 539 u64 fcs_error[__MT_RXQ_MAX]; 540 } rx_stats; 541 }; 542 543 struct mt76_phy { 544 struct ieee80211_hw *hw; 545 struct mt76_dev *dev; 546 void *priv; 547 548 unsigned long state; 549 550 struct cfg80211_chan_def chandef; 551 struct ieee80211_channel *main_chan; 552 553 struct mt76_channel_state *chan_state; 554 ktime_t survey_time; 555 556 struct mt76_sband sband_2g; 557 struct mt76_sband sband_5g; 558 559 u32 vif_mask; 560 561 int txpower_cur; 562 u8 antenna_mask; 563 }; 564 565 struct mt76_dev { 566 struct mt76_phy phy; /* must be first */ 567 568 struct mt76_phy *phy2; 569 570 struct ieee80211_hw *hw; 571 572 spinlock_t lock; 573 spinlock_t cc_lock; 574 575 u32 cur_cc_bss_rx; 576 577 struct mt76_rx_status rx_ampdu_status; 578 u32 rx_ampdu_len; 579 u32 rx_ampdu_ref; 580 581 struct mutex mutex; 582 583 const struct mt76_bus_ops *bus; 584 const struct mt76_driver_ops *drv; 585 const struct mt76_mcu_ops *mcu_ops; 586 struct device *dev; 587 588 struct mt76_mcu mcu; 589 590 struct net_device napi_dev; 591 spinlock_t rx_lock; 592 struct napi_struct napi[__MT_RXQ_MAX]; 593 struct sk_buff_head rx_skb[__MT_RXQ_MAX]; 594 595 struct list_head txwi_cache; 596 struct mt76_sw_queue q_tx[2 * __MT_TXQ_MAX]; 597 struct mt76_queue q_rx[__MT_RXQ_MAX]; 598 const struct mt76_queue_ops *queue_ops; 599 int tx_dma_idx[4]; 600 601 struct tasklet_struct tx_tasklet; 602 struct napi_struct tx_napi; 603 struct delayed_work mac_work; 604 605 wait_queue_head_t tx_wait; 606 struct sk_buff_head status_list; 607 608 u32 wcid_mask[DIV_ROUND_UP(MT76_N_WCIDS, 32)]; 609 u32 wcid_phy_mask[DIV_ROUND_UP(MT76_N_WCIDS, 32)]; 610 611 struct mt76_wcid global_wcid; 612 struct mt76_wcid __rcu *wcid[MT76_N_WCIDS]; 613 614 u8 macaddr[ETH_ALEN]; 615 u32 rev; 616 617 u32 aggr_stats[32]; 618 619 struct tasklet_struct pre_tbtt_tasklet; 620 int beacon_int; 621 u8 beacon_mask; 622 623 struct debugfs_blob_wrapper eeprom; 624 struct debugfs_blob_wrapper otp; 625 struct mt76_hw_cap cap; 626 627 struct mt76_rate_power rate_power; 628 629 enum nl80211_dfs_regions region; 630 631 u32 debugfs_reg; 632 633 struct led_classdev led_cdev; 634 char led_name[32]; 635 bool led_al; 636 u8 led_pin; 637 638 u8 csa_complete; 639 640 u32 rxfilter; 641 642 #ifdef CONFIG_NL80211_TESTMODE 643 const struct mt76_testmode_ops *test_ops; 644 struct mt76_testmode_data test; 645 #endif 646 647 struct workqueue_struct *wq; 648 649 union { 650 struct mt76_mmio mmio; 651 struct mt76_usb usb; 652 struct mt76_sdio sdio; 653 }; 654 }; 655 656 enum mt76_phy_type { 657 MT_PHY_TYPE_CCK, 658 MT_PHY_TYPE_OFDM, 659 MT_PHY_TYPE_HT, 660 MT_PHY_TYPE_HT_GF, 661 MT_PHY_TYPE_VHT, 662 MT_PHY_TYPE_HE_SU = 8, 663 MT_PHY_TYPE_HE_EXT_SU, 664 MT_PHY_TYPE_HE_TB, 665 MT_PHY_TYPE_HE_MU, 666 }; 667 668 #define __mt76_rr(dev, ...) (dev)->bus->rr((dev), __VA_ARGS__) 669 #define __mt76_wr(dev, ...) (dev)->bus->wr((dev), __VA_ARGS__) 670 #define __mt76_rmw(dev, ...) (dev)->bus->rmw((dev), __VA_ARGS__) 671 #define __mt76_wr_copy(dev, ...) (dev)->bus->write_copy((dev), __VA_ARGS__) 672 #define __mt76_rr_copy(dev, ...) (dev)->bus->read_copy((dev), __VA_ARGS__) 673 674 #define __mt76_set(dev, offset, val) __mt76_rmw(dev, offset, 0, val) 675 #define __mt76_clear(dev, offset, val) __mt76_rmw(dev, offset, val, 0) 676 677 #define mt76_rr(dev, ...) (dev)->mt76.bus->rr(&((dev)->mt76), __VA_ARGS__) 678 #define mt76_wr(dev, ...) (dev)->mt76.bus->wr(&((dev)->mt76), __VA_ARGS__) 679 #define mt76_rmw(dev, ...) (dev)->mt76.bus->rmw(&((dev)->mt76), __VA_ARGS__) 680 #define mt76_wr_copy(dev, ...) (dev)->mt76.bus->write_copy(&((dev)->mt76), __VA_ARGS__) 681 #define mt76_rr_copy(dev, ...) (dev)->mt76.bus->read_copy(&((dev)->mt76), __VA_ARGS__) 682 #define mt76_wr_rp(dev, ...) (dev)->mt76.bus->wr_rp(&((dev)->mt76), __VA_ARGS__) 683 #define mt76_rd_rp(dev, ...) (dev)->mt76.bus->rd_rp(&((dev)->mt76), __VA_ARGS__) 684 685 #define mt76_mcu_send_msg(dev, ...) (dev)->mt76.mcu_ops->mcu_send_msg(&((dev)->mt76), __VA_ARGS__) 686 687 #define __mt76_mcu_send_msg(dev, ...) (dev)->mcu_ops->mcu_send_msg((dev), __VA_ARGS__) 688 #define __mt76_mcu_skb_send_msg(dev, ...) (dev)->mcu_ops->mcu_skb_send_msg((dev), __VA_ARGS__) 689 #define mt76_mcu_restart(dev, ...) (dev)->mt76.mcu_ops->mcu_restart(&((dev)->mt76)) 690 #define __mt76_mcu_restart(dev, ...) (dev)->mcu_ops->mcu_restart((dev)) 691 692 #define mt76_set(dev, offset, val) mt76_rmw(dev, offset, 0, val) 693 #define mt76_clear(dev, offset, val) mt76_rmw(dev, offset, val, 0) 694 695 #define mt76_get_field(_dev, _reg, _field) \ 696 FIELD_GET(_field, mt76_rr(dev, _reg)) 697 698 #define mt76_rmw_field(_dev, _reg, _field, _val) \ 699 mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val)) 700 701 #define __mt76_rmw_field(_dev, _reg, _field, _val) \ 702 __mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val)) 703 704 #define mt76_hw(dev) (dev)->mphy.hw 705 706 static inline struct ieee80211_hw * 707 mt76_wcid_hw(struct mt76_dev *dev, u16 wcid) 708 { 709 if (wcid <= MT76_N_WCIDS && 710 mt76_wcid_mask_test(dev->wcid_phy_mask, wcid)) 711 return dev->phy2->hw; 712 713 return dev->phy.hw; 714 } 715 716 bool __mt76_poll(struct mt76_dev *dev, u32 offset, u32 mask, u32 val, 717 int timeout); 718 719 #define mt76_poll(dev, ...) __mt76_poll(&((dev)->mt76), __VA_ARGS__) 720 721 bool __mt76_poll_msec(struct mt76_dev *dev, u32 offset, u32 mask, u32 val, 722 int timeout); 723 724 #define mt76_poll_msec(dev, ...) __mt76_poll_msec(&((dev)->mt76), __VA_ARGS__) 725 726 void mt76_mmio_init(struct mt76_dev *dev, void __iomem *regs); 727 void mt76_pci_disable_aspm(struct pci_dev *pdev); 728 729 static inline u16 mt76_chip(struct mt76_dev *dev) 730 { 731 return dev->rev >> 16; 732 } 733 734 static inline u16 mt76_rev(struct mt76_dev *dev) 735 { 736 return dev->rev & 0xffff; 737 } 738 739 #define mt76xx_chip(dev) mt76_chip(&((dev)->mt76)) 740 #define mt76xx_rev(dev) mt76_rev(&((dev)->mt76)) 741 742 #define mt76_init_queues(dev) (dev)->mt76.queue_ops->init(&((dev)->mt76)) 743 #define mt76_queue_alloc(dev, ...) (dev)->mt76.queue_ops->alloc(&((dev)->mt76), __VA_ARGS__) 744 #define mt76_tx_queue_skb_raw(dev, ...) (dev)->mt76.queue_ops->tx_queue_skb_raw(&((dev)->mt76), __VA_ARGS__) 745 #define mt76_tx_queue_skb(dev, ...) (dev)->mt76.queue_ops->tx_queue_skb(&((dev)->mt76), __VA_ARGS__) 746 #define mt76_queue_rx_reset(dev, ...) (dev)->mt76.queue_ops->rx_reset(&((dev)->mt76), __VA_ARGS__) 747 #define mt76_queue_tx_cleanup(dev, ...) (dev)->mt76.queue_ops->tx_cleanup(&((dev)->mt76), __VA_ARGS__) 748 #define mt76_queue_kick(dev, ...) (dev)->mt76.queue_ops->kick(&((dev)->mt76), __VA_ARGS__) 749 750 #define mt76_for_each_q_rx(dev, i) \ 751 for (i = 0; i < ARRAY_SIZE((dev)->q_rx) && \ 752 (dev)->q_rx[i].ndesc; i++) 753 754 struct mt76_dev *mt76_alloc_device(struct device *pdev, unsigned int size, 755 const struct ieee80211_ops *ops, 756 const struct mt76_driver_ops *drv_ops); 757 int mt76_register_device(struct mt76_dev *dev, bool vht, 758 struct ieee80211_rate *rates, int n_rates); 759 void mt76_unregister_device(struct mt76_dev *dev); 760 void mt76_free_device(struct mt76_dev *dev); 761 void mt76_unregister_phy(struct mt76_phy *phy); 762 763 struct mt76_phy *mt76_alloc_phy(struct mt76_dev *dev, unsigned int size, 764 const struct ieee80211_ops *ops); 765 int mt76_register_phy(struct mt76_phy *phy); 766 767 struct dentry *mt76_register_debugfs(struct mt76_dev *dev); 768 int mt76_queues_read(struct seq_file *s, void *data); 769 void mt76_seq_puts_array(struct seq_file *file, const char *str, 770 s8 *val, int len); 771 772 int mt76_eeprom_init(struct mt76_dev *dev, int len); 773 void mt76_eeprom_override(struct mt76_dev *dev); 774 775 static inline struct mt76_phy * 776 mt76_dev_phy(struct mt76_dev *dev, bool phy_ext) 777 { 778 if (phy_ext && dev->phy2) 779 return dev->phy2; 780 return &dev->phy; 781 } 782 783 static inline struct ieee80211_hw * 784 mt76_phy_hw(struct mt76_dev *dev, bool phy_ext) 785 { 786 return mt76_dev_phy(dev, phy_ext)->hw; 787 } 788 789 static inline u8 * 790 mt76_get_txwi_ptr(struct mt76_dev *dev, struct mt76_txwi_cache *t) 791 { 792 return (u8 *)t - dev->drv->txwi_size; 793 } 794 795 /* increment with wrap-around */ 796 static inline int mt76_incr(int val, int size) 797 { 798 return (val + 1) & (size - 1); 799 } 800 801 /* decrement with wrap-around */ 802 static inline int mt76_decr(int val, int size) 803 { 804 return (val - 1) & (size - 1); 805 } 806 807 u8 mt76_ac_to_hwq(u8 ac); 808 809 static inline struct ieee80211_txq * 810 mtxq_to_txq(struct mt76_txq *mtxq) 811 { 812 void *ptr = mtxq; 813 814 return container_of(ptr, struct ieee80211_txq, drv_priv); 815 } 816 817 static inline struct ieee80211_sta * 818 wcid_to_sta(struct mt76_wcid *wcid) 819 { 820 void *ptr = wcid; 821 822 if (!wcid || !wcid->sta) 823 return NULL; 824 825 return container_of(ptr, struct ieee80211_sta, drv_priv); 826 } 827 828 static inline struct mt76_tx_cb *mt76_tx_skb_cb(struct sk_buff *skb) 829 { 830 BUILD_BUG_ON(sizeof(struct mt76_tx_cb) > 831 sizeof(IEEE80211_SKB_CB(skb)->status.status_driver_data)); 832 return ((void *)IEEE80211_SKB_CB(skb)->status.status_driver_data); 833 } 834 835 static inline void *mt76_skb_get_hdr(struct sk_buff *skb) 836 { 837 struct mt76_rx_status mstat; 838 u8 *data = skb->data; 839 840 /* Alignment concerns */ 841 BUILD_BUG_ON(sizeof(struct ieee80211_radiotap_he) % 4); 842 BUILD_BUG_ON(sizeof(struct ieee80211_radiotap_he_mu) % 4); 843 844 mstat = *((struct mt76_rx_status *)skb->cb); 845 846 if (mstat.flag & RX_FLAG_RADIOTAP_HE) 847 data += sizeof(struct ieee80211_radiotap_he); 848 if (mstat.flag & RX_FLAG_RADIOTAP_HE_MU) 849 data += sizeof(struct ieee80211_radiotap_he_mu); 850 851 return data; 852 } 853 854 static inline void mt76_insert_hdr_pad(struct sk_buff *skb) 855 { 856 int len = ieee80211_get_hdrlen_from_skb(skb); 857 858 if (len % 4 == 0) 859 return; 860 861 skb_push(skb, 2); 862 memmove(skb->data, skb->data + 2, len); 863 864 skb->data[len] = 0; 865 skb->data[len + 1] = 0; 866 } 867 868 static inline bool mt76_is_skb_pktid(u8 pktid) 869 { 870 if (pktid & MT_PACKET_ID_HAS_RATE) 871 return false; 872 873 return pktid >= MT_PACKET_ID_FIRST; 874 } 875 876 static inline u8 mt76_tx_power_nss_delta(u8 nss) 877 { 878 static const u8 nss_delta[4] = { 0, 6, 9, 12 }; 879 880 return nss_delta[nss - 1]; 881 } 882 883 static inline bool mt76_testmode_enabled(struct mt76_dev *dev) 884 { 885 #ifdef CONFIG_NL80211_TESTMODE 886 return dev->test.state != MT76_TM_STATE_OFF; 887 #else 888 return false; 889 #endif 890 } 891 892 void mt76_rx(struct mt76_dev *dev, enum mt76_rxq_id q, struct sk_buff *skb); 893 void mt76_tx(struct mt76_phy *dev, struct ieee80211_sta *sta, 894 struct mt76_wcid *wcid, struct sk_buff *skb); 895 void mt76_txq_init(struct mt76_dev *dev, struct ieee80211_txq *txq); 896 void mt76_txq_remove(struct mt76_dev *dev, struct ieee80211_txq *txq); 897 void mt76_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq); 898 void mt76_stop_tx_queues(struct mt76_dev *dev, struct ieee80211_sta *sta, 899 bool send_bar); 900 void mt76_txq_schedule(struct mt76_phy *phy, enum mt76_txq_id qid); 901 void mt76_txq_schedule_all(struct mt76_phy *phy); 902 void mt76_tx_tasklet(unsigned long data); 903 void mt76_release_buffered_frames(struct ieee80211_hw *hw, 904 struct ieee80211_sta *sta, 905 u16 tids, int nframes, 906 enum ieee80211_frame_release_type reason, 907 bool more_data); 908 bool mt76_has_tx_pending(struct mt76_phy *phy); 909 void mt76_set_channel(struct mt76_phy *phy); 910 void mt76_update_survey(struct mt76_dev *dev); 911 void mt76_update_survey_active_time(struct mt76_phy *phy, ktime_t time); 912 int mt76_get_survey(struct ieee80211_hw *hw, int idx, 913 struct survey_info *survey); 914 void mt76_set_stream_caps(struct mt76_phy *phy, bool vht); 915 916 int mt76_rx_aggr_start(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid, 917 u16 ssn, u16 size); 918 void mt76_rx_aggr_stop(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid); 919 920 void mt76_wcid_key_setup(struct mt76_dev *dev, struct mt76_wcid *wcid, 921 struct ieee80211_key_conf *key); 922 923 void mt76_tx_status_lock(struct mt76_dev *dev, struct sk_buff_head *list) 924 __acquires(&dev->status_list.lock); 925 void mt76_tx_status_unlock(struct mt76_dev *dev, struct sk_buff_head *list) 926 __releases(&dev->status_list.lock); 927 928 int mt76_tx_status_skb_add(struct mt76_dev *dev, struct mt76_wcid *wcid, 929 struct sk_buff *skb); 930 struct sk_buff *mt76_tx_status_skb_get(struct mt76_dev *dev, 931 struct mt76_wcid *wcid, int pktid, 932 struct sk_buff_head *list); 933 void mt76_tx_status_skb_done(struct mt76_dev *dev, struct sk_buff *skb, 934 struct sk_buff_head *list); 935 void mt76_tx_complete_skb(struct mt76_dev *dev, struct sk_buff *skb); 936 void mt76_tx_status_check(struct mt76_dev *dev, struct mt76_wcid *wcid, 937 bool flush); 938 int mt76_sta_state(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 939 struct ieee80211_sta *sta, 940 enum ieee80211_sta_state old_state, 941 enum ieee80211_sta_state new_state); 942 void __mt76_sta_remove(struct mt76_dev *dev, struct ieee80211_vif *vif, 943 struct ieee80211_sta *sta); 944 void mt76_sta_pre_rcu_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 945 struct ieee80211_sta *sta); 946 947 int mt76_get_min_avg_rssi(struct mt76_dev *dev, bool ext_phy); 948 949 int mt76_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 950 int *dbm); 951 952 void mt76_csa_check(struct mt76_dev *dev); 953 void mt76_csa_finish(struct mt76_dev *dev); 954 955 int mt76_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant); 956 int mt76_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set); 957 void mt76_insert_ccmp_hdr(struct sk_buff *skb, u8 key_id); 958 int mt76_get_rate(struct mt76_dev *dev, 959 struct ieee80211_supported_band *sband, 960 int idx, bool cck); 961 void mt76_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 962 const u8 *mac); 963 void mt76_sw_scan_complete(struct ieee80211_hw *hw, 964 struct ieee80211_vif *vif); 965 int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 966 void *data, int len); 967 int mt76_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *skb, 968 struct netlink_callback *cb, void *data, int len); 969 int mt76_testmode_set_state(struct mt76_dev *dev, enum mt76_testmode_state state); 970 971 static inline void mt76_testmode_reset(struct mt76_dev *dev, bool disable) 972 { 973 #ifdef CONFIG_NL80211_TESTMODE 974 enum mt76_testmode_state state = MT76_TM_STATE_IDLE; 975 976 if (disable || dev->test.state == MT76_TM_STATE_OFF) 977 state = MT76_TM_STATE_OFF; 978 979 mt76_testmode_set_state(dev, state); 980 #endif 981 } 982 983 984 /* internal */ 985 static inline struct ieee80211_hw * 986 mt76_tx_status_get_hw(struct mt76_dev *dev, struct sk_buff *skb) 987 { 988 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 989 struct ieee80211_hw *hw = dev->phy.hw; 990 991 if ((info->hw_queue & MT_TX_HW_QUEUE_EXT_PHY) && dev->phy2) 992 hw = dev->phy2->hw; 993 994 info->hw_queue &= ~MT_TX_HW_QUEUE_EXT_PHY; 995 996 return hw; 997 } 998 999 void mt76_tx_free(struct mt76_dev *dev); 1000 struct mt76_txwi_cache *mt76_get_txwi(struct mt76_dev *dev); 1001 void mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t); 1002 void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames, 1003 struct napi_struct *napi); 1004 void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q, 1005 struct napi_struct *napi); 1006 void mt76_rx_aggr_reorder(struct sk_buff *skb, struct sk_buff_head *frames); 1007 void mt76_testmode_tx_pending(struct mt76_dev *dev); 1008 1009 /* usb */ 1010 static inline bool mt76u_urb_error(struct urb *urb) 1011 { 1012 return urb->status && 1013 urb->status != -ECONNRESET && 1014 urb->status != -ESHUTDOWN && 1015 urb->status != -ENOENT; 1016 } 1017 1018 /* Map hardware queues to usb endpoints */ 1019 static inline u8 q2ep(u8 qid) 1020 { 1021 /* TODO: take management packets to queue 5 */ 1022 return qid + 1; 1023 } 1024 1025 static inline int 1026 mt76u_bulk_msg(struct mt76_dev *dev, void *data, int len, int *actual_len, 1027 int timeout, int ep) 1028 { 1029 struct usb_interface *uintf = to_usb_interface(dev->dev); 1030 struct usb_device *udev = interface_to_usbdev(uintf); 1031 struct mt76_usb *usb = &dev->usb; 1032 unsigned int pipe; 1033 1034 if (actual_len) 1035 pipe = usb_rcvbulkpipe(udev, usb->in_ep[ep]); 1036 else 1037 pipe = usb_sndbulkpipe(udev, usb->out_ep[ep]); 1038 1039 return usb_bulk_msg(udev, pipe, data, len, actual_len, timeout); 1040 } 1041 1042 int mt76_skb_adjust_pad(struct sk_buff *skb); 1043 int mt76u_vendor_request(struct mt76_dev *dev, u8 req, 1044 u8 req_type, u16 val, u16 offset, 1045 void *buf, size_t len); 1046 void mt76u_single_wr(struct mt76_dev *dev, const u8 req, 1047 const u16 offset, const u32 val); 1048 int mt76u_init(struct mt76_dev *dev, struct usb_interface *intf, 1049 bool ext); 1050 int mt76u_alloc_mcu_queue(struct mt76_dev *dev); 1051 int mt76u_alloc_queues(struct mt76_dev *dev); 1052 void mt76u_stop_tx(struct mt76_dev *dev); 1053 void mt76u_stop_rx(struct mt76_dev *dev); 1054 int mt76u_resume_rx(struct mt76_dev *dev); 1055 void mt76u_queues_deinit(struct mt76_dev *dev); 1056 1057 int mt76s_init(struct mt76_dev *dev, struct sdio_func *func, 1058 const struct mt76_bus_ops *bus_ops); 1059 int mt76s_alloc_queues(struct mt76_dev *dev); 1060 void mt76s_stop_txrx(struct mt76_dev *dev); 1061 void mt76s_deinit(struct mt76_dev *dev); 1062 1063 struct sk_buff * 1064 mt76_mcu_msg_alloc(struct mt76_dev *dev, const void *data, 1065 int data_len); 1066 void mt76_mcu_rx_event(struct mt76_dev *dev, struct sk_buff *skb); 1067 struct sk_buff *mt76_mcu_get_response(struct mt76_dev *dev, 1068 unsigned long expires); 1069 1070 void mt76_set_irq_mask(struct mt76_dev *dev, u32 addr, u32 clear, u32 set); 1071 1072 #endif 1073