1 /*
2  * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #include "mt76.h"
18 #include "trace.h"
19 
20 static u32 mt76_mmio_rr(struct mt76_dev *dev, u32 offset)
21 {
22 	u32 val;
23 
24 	val = readl(dev->mmio.regs + offset);
25 	trace_reg_rr(dev, offset, val);
26 
27 	return val;
28 }
29 
30 static void mt76_mmio_wr(struct mt76_dev *dev, u32 offset, u32 val)
31 {
32 	trace_reg_wr(dev, offset, val);
33 	writel(val, dev->mmio.regs + offset);
34 }
35 
36 static u32 mt76_mmio_rmw(struct mt76_dev *dev, u32 offset, u32 mask, u32 val)
37 {
38 	val |= mt76_mmio_rr(dev, offset) & ~mask;
39 	mt76_mmio_wr(dev, offset, val);
40 	return val;
41 }
42 
43 static void mt76_mmio_copy(struct mt76_dev *dev, u32 offset, const void *data,
44 			   int len)
45 {
46 	__iowrite32_copy(dev->mmio.regs + offset, data, len >> 2);
47 }
48 
49 static int mt76_mmio_wr_rp(struct mt76_dev *dev, u32 base,
50 			   const struct mt76_reg_pair *data, int len)
51 {
52 	while (len > 0) {
53 		mt76_mmio_wr(dev, data->reg, data->value);
54 		data++;
55 		len--;
56 	}
57 
58 	return 0;
59 }
60 
61 static int mt76_mmio_rd_rp(struct mt76_dev *dev, u32 base,
62 			   struct mt76_reg_pair *data, int len)
63 {
64 	while (len > 0) {
65 		data->value = mt76_mmio_rr(dev, data->reg);
66 		data++;
67 		len--;
68 	}
69 
70 	return 0;
71 }
72 
73 void mt76_set_irq_mask(struct mt76_dev *dev, u32 addr,
74 		       u32 clear, u32 set)
75 {
76 	unsigned long flags;
77 
78 	spin_lock_irqsave(&dev->mmio.irq_lock, flags);
79 	dev->mmio.irqmask &= ~clear;
80 	dev->mmio.irqmask |= set;
81 	mt76_mmio_wr(dev, addr, dev->mmio.irqmask);
82 	spin_unlock_irqrestore(&dev->mmio.irq_lock, flags);
83 }
84 EXPORT_SYMBOL_GPL(mt76_set_irq_mask);
85 
86 void mt76_mmio_init(struct mt76_dev *dev, void __iomem *regs)
87 {
88 	static const struct mt76_bus_ops mt76_mmio_ops = {
89 		.rr = mt76_mmio_rr,
90 		.rmw = mt76_mmio_rmw,
91 		.wr = mt76_mmio_wr,
92 		.copy = mt76_mmio_copy,
93 		.wr_rp = mt76_mmio_wr_rp,
94 		.rd_rp = mt76_mmio_rd_rp,
95 		.type = MT76_BUS_MMIO,
96 	};
97 
98 	dev->bus = &mt76_mmio_ops;
99 	dev->mmio.regs = regs;
100 
101 	skb_queue_head_init(&dev->mmio.mcu.res_q);
102 	init_waitqueue_head(&dev->mmio.mcu.wait);
103 	spin_lock_init(&dev->mmio.irq_lock);
104 	mutex_init(&dev->mmio.mcu.mutex);
105 }
106 EXPORT_SYMBOL_GPL(mt76_mmio_init);
107