1 /* 2 * Marvell Wireless LAN device driver: PCIE specific handling 3 * 4 * Copyright (C) 2011-2014, Marvell International Ltd. 5 * 6 * This software file (the "File") is distributed by Marvell International 7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991 8 * (the "License"). You may use, redistribute and/or modify this File in 9 * accordance with the terms and conditions of the License, a copy of which 10 * is available by writing to the Free Software Foundation, Inc., 11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the 12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. 13 * 14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about 17 * this warranty disclaimer. 18 */ 19 20 #include <linux/firmware.h> 21 22 #include "decl.h" 23 #include "ioctl.h" 24 #include "util.h" 25 #include "fw.h" 26 #include "main.h" 27 #include "wmm.h" 28 #include "11n.h" 29 #include "pcie.h" 30 31 #define PCIE_VERSION "1.0" 32 #define DRV_NAME "Marvell mwifiex PCIe" 33 34 static struct mwifiex_if_ops pcie_ops; 35 36 static const struct of_device_id mwifiex_pcie_of_match_table[] = { 37 { .compatible = "pci11ab,2b42" }, 38 { .compatible = "pci1b4b,2b42" }, 39 { } 40 }; 41 42 static int mwifiex_pcie_probe_of(struct device *dev) 43 { 44 if (!of_match_node(mwifiex_pcie_of_match_table, dev->of_node)) { 45 dev_err(dev, "required compatible string missing\n"); 46 return -EINVAL; 47 } 48 49 return 0; 50 } 51 52 static void mwifiex_pcie_work(struct work_struct *work); 53 54 static int 55 mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb, 56 size_t size, int flags) 57 { 58 struct pcie_service_card *card = adapter->card; 59 struct mwifiex_dma_mapping mapping; 60 61 mapping.addr = pci_map_single(card->dev, skb->data, size, flags); 62 if (pci_dma_mapping_error(card->dev, mapping.addr)) { 63 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n"); 64 return -1; 65 } 66 mapping.len = size; 67 mwifiex_store_mapping(skb, &mapping); 68 return 0; 69 } 70 71 static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter, 72 struct sk_buff *skb, int flags) 73 { 74 struct pcie_service_card *card = adapter->card; 75 struct mwifiex_dma_mapping mapping; 76 77 mwifiex_get_mapping(skb, &mapping); 78 pci_unmap_single(card->dev, mapping.addr, mapping.len, flags); 79 } 80 81 /* 82 * This function writes data into PCIE card register. 83 */ 84 static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data) 85 { 86 struct pcie_service_card *card = adapter->card; 87 88 iowrite32(data, card->pci_mmap1 + reg); 89 90 return 0; 91 } 92 93 /* This function reads data from PCIE card register. 94 */ 95 static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data) 96 { 97 struct pcie_service_card *card = adapter->card; 98 99 *data = ioread32(card->pci_mmap1 + reg); 100 if (*data == 0xffffffff) 101 return 0xffffffff; 102 103 return 0; 104 } 105 106 /* This function reads u8 data from PCIE card register. */ 107 static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter, 108 int reg, u8 *data) 109 { 110 struct pcie_service_card *card = adapter->card; 111 112 *data = ioread8(card->pci_mmap1 + reg); 113 114 return 0; 115 } 116 117 /* 118 * This function reads sleep cookie and checks if FW is ready 119 */ 120 static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter) 121 { 122 u32 *cookie_addr; 123 struct pcie_service_card *card = adapter->card; 124 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 125 126 if (!reg->sleep_cookie) 127 return true; 128 129 if (card->sleep_cookie_vbase) { 130 cookie_addr = (u32 *)card->sleep_cookie_vbase; 131 mwifiex_dbg(adapter, INFO, 132 "info: ACCESS_HW: sleep cookie=0x%x\n", 133 *cookie_addr); 134 if (*cookie_addr == FW_AWAKE_COOKIE) 135 return true; 136 } 137 138 return false; 139 } 140 141 #ifdef CONFIG_PM_SLEEP 142 /* 143 * Kernel needs to suspend all functions separately. Therefore all 144 * registered functions must have drivers with suspend and resume 145 * methods. Failing that the kernel simply removes the whole card. 146 * 147 * If already not suspended, this function allocates and sends a host 148 * sleep activate request to the firmware and turns off the traffic. 149 */ 150 static int mwifiex_pcie_suspend(struct device *dev) 151 { 152 struct mwifiex_adapter *adapter; 153 struct pcie_service_card *card; 154 struct pci_dev *pdev = to_pci_dev(dev); 155 156 card = pci_get_drvdata(pdev); 157 158 /* Might still be loading firmware */ 159 wait_for_completion(&card->fw_done); 160 161 adapter = card->adapter; 162 if (!adapter) { 163 dev_err(dev, "adapter is not valid\n"); 164 return 0; 165 } 166 167 mwifiex_enable_wake(adapter); 168 169 /* Enable the Host Sleep */ 170 if (!mwifiex_enable_hs(adapter)) { 171 mwifiex_dbg(adapter, ERROR, 172 "cmd: failed to suspend\n"); 173 adapter->hs_enabling = false; 174 mwifiex_disable_wake(adapter); 175 return -EFAULT; 176 } 177 178 flush_workqueue(adapter->workqueue); 179 180 /* Indicate device suspended */ 181 adapter->is_suspended = true; 182 adapter->hs_enabling = false; 183 184 return 0; 185 } 186 187 /* 188 * Kernel needs to suspend all functions separately. Therefore all 189 * registered functions must have drivers with suspend and resume 190 * methods. Failing that the kernel simply removes the whole card. 191 * 192 * If already not resumed, this function turns on the traffic and 193 * sends a host sleep cancel request to the firmware. 194 */ 195 static int mwifiex_pcie_resume(struct device *dev) 196 { 197 struct mwifiex_adapter *adapter; 198 struct pcie_service_card *card; 199 struct pci_dev *pdev = to_pci_dev(dev); 200 201 card = pci_get_drvdata(pdev); 202 203 if (!card->adapter) { 204 dev_err(dev, "adapter structure is not valid\n"); 205 return 0; 206 } 207 208 adapter = card->adapter; 209 210 if (!adapter->is_suspended) { 211 mwifiex_dbg(adapter, WARN, 212 "Device already resumed\n"); 213 return 0; 214 } 215 216 adapter->is_suspended = false; 217 218 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA), 219 MWIFIEX_ASYNC_CMD); 220 mwifiex_disable_wake(adapter); 221 222 return 0; 223 } 224 #endif 225 226 /* 227 * This function probes an mwifiex device and registers it. It allocates 228 * the card structure, enables PCIE function number and initiates the 229 * device registration and initialization procedure by adding a logical 230 * interface. 231 */ 232 static int mwifiex_pcie_probe(struct pci_dev *pdev, 233 const struct pci_device_id *ent) 234 { 235 struct pcie_service_card *card; 236 int ret; 237 238 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n", 239 pdev->vendor, pdev->device, pdev->revision); 240 241 card = devm_kzalloc(&pdev->dev, sizeof(*card), GFP_KERNEL); 242 if (!card) 243 return -ENOMEM; 244 245 init_completion(&card->fw_done); 246 247 card->dev = pdev; 248 249 if (ent->driver_data) { 250 struct mwifiex_pcie_device *data = (void *)ent->driver_data; 251 card->pcie.reg = data->reg; 252 card->pcie.blksz_fw_dl = data->blksz_fw_dl; 253 card->pcie.tx_buf_size = data->tx_buf_size; 254 card->pcie.can_dump_fw = data->can_dump_fw; 255 card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl; 256 card->pcie.num_mem_types = data->num_mem_types; 257 card->pcie.can_ext_scan = data->can_ext_scan; 258 INIT_WORK(&card->work, mwifiex_pcie_work); 259 } 260 261 /* device tree node parsing and platform specific configuration*/ 262 if (pdev->dev.of_node) { 263 ret = mwifiex_pcie_probe_of(&pdev->dev); 264 if (ret) 265 return ret; 266 } 267 268 if (mwifiex_add_card(card, &card->fw_done, &pcie_ops, 269 MWIFIEX_PCIE, &pdev->dev)) { 270 pr_err("%s failed\n", __func__); 271 return -1; 272 } 273 274 return 0; 275 } 276 277 /* 278 * This function removes the interface and frees up the card structure. 279 */ 280 static void mwifiex_pcie_remove(struct pci_dev *pdev) 281 { 282 struct pcie_service_card *card; 283 struct mwifiex_adapter *adapter; 284 struct mwifiex_private *priv; 285 const struct mwifiex_pcie_card_reg *reg; 286 u32 fw_status; 287 int ret; 288 289 card = pci_get_drvdata(pdev); 290 291 wait_for_completion(&card->fw_done); 292 293 adapter = card->adapter; 294 if (!adapter || !adapter->priv_num) 295 return; 296 297 cancel_work_sync(&card->work); 298 299 reg = card->pcie.reg; 300 if (reg) 301 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status); 302 else 303 fw_status = -1; 304 305 if (fw_status == FIRMWARE_READY_PCIE && !adapter->mfg_mode) { 306 mwifiex_deauthenticate_all(adapter); 307 308 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 309 310 mwifiex_disable_auto_ds(priv); 311 312 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN); 313 } 314 315 mwifiex_remove_card(adapter); 316 } 317 318 static void mwifiex_pcie_shutdown(struct pci_dev *pdev) 319 { 320 mwifiex_pcie_remove(pdev); 321 322 return; 323 } 324 325 static const struct pci_device_id mwifiex_ids[] = { 326 { 327 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P, 328 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 329 .driver_data = (unsigned long)&mwifiex_pcie8766, 330 }, 331 { 332 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897, 333 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 334 .driver_data = (unsigned long)&mwifiex_pcie8897, 335 }, 336 { 337 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 338 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 339 .driver_data = (unsigned long)&mwifiex_pcie8997, 340 }, 341 { 342 PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 343 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 344 .driver_data = (unsigned long)&mwifiex_pcie8997, 345 }, 346 {}, 347 }; 348 349 MODULE_DEVICE_TABLE(pci, mwifiex_ids); 350 351 static void mwifiex_pcie_reset_notify(struct pci_dev *pdev, bool prepare) 352 { 353 struct mwifiex_adapter *adapter; 354 struct pcie_service_card *card; 355 356 if (!pdev) { 357 pr_err("%s: PCIe device is not specified\n", __func__); 358 return; 359 } 360 361 card = (struct pcie_service_card *)pci_get_drvdata(pdev); 362 if (!card || !card->adapter) { 363 pr_err("%s: Card or adapter structure is not valid (%ld)\n", 364 __func__, (long)card); 365 return; 366 } 367 368 adapter = card->adapter; 369 mwifiex_dbg(adapter, INFO, 370 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d %s\n", 371 __func__, pdev->vendor, pdev->device, 372 pdev->revision, 373 prepare ? "Pre-FLR" : "Post-FLR"); 374 375 if (prepare) { 376 /* Kernel would be performing FLR after this notification. 377 * Cleanup all software without cleaning anything related to 378 * PCIe and HW. 379 */ 380 mwifiex_shutdown_sw(adapter); 381 adapter->surprise_removed = true; 382 } else { 383 /* Kernel stores and restores PCIe function context before and 384 * after performing FLR respectively. Reconfigure the software 385 * and firmware including firmware redownload 386 */ 387 adapter->surprise_removed = false; 388 mwifiex_reinit_sw(adapter); 389 } 390 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__); 391 } 392 393 static const struct pci_error_handlers mwifiex_pcie_err_handler[] = { 394 { .reset_notify = mwifiex_pcie_reset_notify, }, 395 }; 396 397 #ifdef CONFIG_PM_SLEEP 398 /* Power Management Hooks */ 399 static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend, 400 mwifiex_pcie_resume); 401 #endif 402 403 /* PCI Device Driver */ 404 static struct pci_driver __refdata mwifiex_pcie = { 405 .name = "mwifiex_pcie", 406 .id_table = mwifiex_ids, 407 .probe = mwifiex_pcie_probe, 408 .remove = mwifiex_pcie_remove, 409 #ifdef CONFIG_PM_SLEEP 410 .driver = { 411 .pm = &mwifiex_pcie_pm_ops, 412 }, 413 #endif 414 .shutdown = mwifiex_pcie_shutdown, 415 .err_handler = mwifiex_pcie_err_handler, 416 }; 417 418 /* 419 * This function adds delay loop to ensure FW is awake before proceeding. 420 */ 421 static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter) 422 { 423 int i = 0; 424 425 while (mwifiex_pcie_ok_to_access_hw(adapter)) { 426 i++; 427 usleep_range(10, 20); 428 /* 50ms max wait */ 429 if (i == 5000) 430 break; 431 } 432 433 return; 434 } 435 436 static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter, 437 u32 max_delay_loop_cnt) 438 { 439 struct pcie_service_card *card = adapter->card; 440 u8 *buffer; 441 u32 sleep_cookie, count; 442 struct sk_buff *cmdrsp = card->cmdrsp_buf; 443 444 for (count = 0; count < max_delay_loop_cnt; count++) { 445 pci_dma_sync_single_for_cpu(card->dev, 446 MWIFIEX_SKB_DMA_ADDR(cmdrsp), 447 sizeof(sleep_cookie), 448 PCI_DMA_FROMDEVICE); 449 buffer = cmdrsp->data; 450 sleep_cookie = READ_ONCE(*(u32 *)buffer); 451 452 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) { 453 mwifiex_dbg(adapter, INFO, 454 "sleep cookie found at count %d\n", count); 455 break; 456 } 457 pci_dma_sync_single_for_device(card->dev, 458 MWIFIEX_SKB_DMA_ADDR(cmdrsp), 459 sizeof(sleep_cookie), 460 PCI_DMA_FROMDEVICE); 461 usleep_range(20, 30); 462 } 463 464 if (count >= max_delay_loop_cnt) 465 mwifiex_dbg(adapter, INFO, 466 "max count reached while accessing sleep cookie\n"); 467 } 468 469 /* This function wakes up the card by reading fw_status register. */ 470 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) 471 { 472 struct pcie_service_card *card = adapter->card; 473 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 474 475 mwifiex_dbg(adapter, EVENT, 476 "event: Wakeup device...\n"); 477 478 if (reg->sleep_cookie) 479 mwifiex_pcie_dev_wakeup_delay(adapter); 480 481 /* Accessing fw_status register will wakeup device */ 482 if (mwifiex_write_reg(adapter, reg->fw_status, FIRMWARE_READY_PCIE)) { 483 mwifiex_dbg(adapter, ERROR, 484 "Writing fw_status register failed\n"); 485 return -1; 486 } 487 488 if (reg->sleep_cookie) { 489 mwifiex_pcie_dev_wakeup_delay(adapter); 490 mwifiex_dbg(adapter, INFO, 491 "PCIE wakeup: Setting PS_STATE_AWAKE\n"); 492 adapter->ps_state = PS_STATE_AWAKE; 493 } 494 495 return 0; 496 } 497 498 /* 499 * This function is called after the card has woken up. 500 * 501 * The card configuration register is reset. 502 */ 503 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter) 504 { 505 mwifiex_dbg(adapter, CMD, 506 "cmd: Wakeup device completed\n"); 507 508 return 0; 509 } 510 511 /* 512 * This function disables the host interrupt. 513 * 514 * The host interrupt mask is read, the disable bit is reset and 515 * written back to the card host interrupt mask register. 516 */ 517 static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter) 518 { 519 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 520 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 521 0x00000000)) { 522 mwifiex_dbg(adapter, ERROR, 523 "Disable host interrupt failed\n"); 524 return -1; 525 } 526 } 527 528 atomic_set(&adapter->tx_hw_pending, 0); 529 return 0; 530 } 531 532 static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter) 533 { 534 WARN_ON(mwifiex_pcie_disable_host_int(adapter)); 535 } 536 537 /* 538 * This function enables the host interrupt. 539 * 540 * The host interrupt enable mask is written to the card 541 * host interrupt mask register. 542 */ 543 static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter) 544 { 545 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 546 /* Simply write the mask to the register */ 547 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 548 HOST_INTR_MASK)) { 549 mwifiex_dbg(adapter, ERROR, 550 "Enable host interrupt failed\n"); 551 return -1; 552 } 553 } 554 555 return 0; 556 } 557 558 /* 559 * This function initializes TX buffer ring descriptors 560 */ 561 static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter) 562 { 563 struct pcie_service_card *card = adapter->card; 564 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 565 struct mwifiex_pcie_buf_desc *desc; 566 struct mwifiex_pfu_buf_desc *desc2; 567 int i; 568 569 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 570 card->tx_buf_list[i] = NULL; 571 if (reg->pfu_enabled) { 572 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 573 (sizeof(*desc2) * i); 574 desc2 = card->txbd_ring[i]; 575 memset(desc2, 0, sizeof(*desc2)); 576 } else { 577 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 578 (sizeof(*desc) * i); 579 desc = card->txbd_ring[i]; 580 memset(desc, 0, sizeof(*desc)); 581 } 582 } 583 584 return 0; 585 } 586 587 /* This function initializes RX buffer ring descriptors. Each SKB is allocated 588 * here and after mapping PCI memory, its physical address is assigned to 589 * PCIE Rx buffer descriptor's physical address. 590 */ 591 static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter) 592 { 593 struct pcie_service_card *card = adapter->card; 594 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 595 struct sk_buff *skb; 596 struct mwifiex_pcie_buf_desc *desc; 597 struct mwifiex_pfu_buf_desc *desc2; 598 dma_addr_t buf_pa; 599 int i; 600 601 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 602 /* Allocate skb here so that firmware can DMA data from it */ 603 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 604 GFP_KERNEL); 605 if (!skb) { 606 mwifiex_dbg(adapter, ERROR, 607 "Unable to allocate skb for RX ring.\n"); 608 kfree(card->rxbd_ring_vbase); 609 return -ENOMEM; 610 } 611 612 if (mwifiex_map_pci_memory(adapter, skb, 613 MWIFIEX_RX_DATA_BUF_SIZE, 614 PCI_DMA_FROMDEVICE)) 615 return -1; 616 617 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 618 619 mwifiex_dbg(adapter, INFO, 620 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 621 skb, skb->len, skb->data, (u32)buf_pa, 622 (u32)((u64)buf_pa >> 32)); 623 624 card->rx_buf_list[i] = skb; 625 if (reg->pfu_enabled) { 626 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase + 627 (sizeof(*desc2) * i); 628 desc2 = card->rxbd_ring[i]; 629 desc2->paddr = buf_pa; 630 desc2->len = (u16)skb->len; 631 desc2->frag_len = (u16)skb->len; 632 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop; 633 desc2->offset = 0; 634 } else { 635 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase + 636 (sizeof(*desc) * i)); 637 desc = card->rxbd_ring[i]; 638 desc->paddr = buf_pa; 639 desc->len = (u16)skb->len; 640 desc->flags = 0; 641 } 642 } 643 644 return 0; 645 } 646 647 /* This function initializes event buffer ring descriptors. Each SKB is 648 * allocated here and after mapping PCI memory, its physical address is assigned 649 * to PCIE Rx buffer descriptor's physical address 650 */ 651 static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter) 652 { 653 struct pcie_service_card *card = adapter->card; 654 struct mwifiex_evt_buf_desc *desc; 655 struct sk_buff *skb; 656 dma_addr_t buf_pa; 657 int i; 658 659 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 660 /* Allocate skb here so that firmware can DMA data from it */ 661 skb = dev_alloc_skb(MAX_EVENT_SIZE); 662 if (!skb) { 663 mwifiex_dbg(adapter, ERROR, 664 "Unable to allocate skb for EVENT buf.\n"); 665 kfree(card->evtbd_ring_vbase); 666 return -ENOMEM; 667 } 668 skb_put(skb, MAX_EVENT_SIZE); 669 670 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE, 671 PCI_DMA_FROMDEVICE)) 672 return -1; 673 674 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 675 676 mwifiex_dbg(adapter, EVENT, 677 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 678 skb, skb->len, skb->data, (u32)buf_pa, 679 (u32)((u64)buf_pa >> 32)); 680 681 card->evt_buf_list[i] = skb; 682 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase + 683 (sizeof(*desc) * i)); 684 desc = card->evtbd_ring[i]; 685 desc->paddr = buf_pa; 686 desc->len = (u16)skb->len; 687 desc->flags = 0; 688 } 689 690 return 0; 691 } 692 693 /* This function cleans up TX buffer rings. If any of the buffer list has valid 694 * SKB address, associated SKB is freed. 695 */ 696 static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter) 697 { 698 struct pcie_service_card *card = adapter->card; 699 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 700 struct sk_buff *skb; 701 struct mwifiex_pcie_buf_desc *desc; 702 struct mwifiex_pfu_buf_desc *desc2; 703 int i; 704 705 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 706 if (reg->pfu_enabled) { 707 desc2 = card->txbd_ring[i]; 708 if (card->tx_buf_list[i]) { 709 skb = card->tx_buf_list[i]; 710 mwifiex_unmap_pci_memory(adapter, skb, 711 PCI_DMA_TODEVICE); 712 dev_kfree_skb_any(skb); 713 } 714 memset(desc2, 0, sizeof(*desc2)); 715 } else { 716 desc = card->txbd_ring[i]; 717 if (card->tx_buf_list[i]) { 718 skb = card->tx_buf_list[i]; 719 mwifiex_unmap_pci_memory(adapter, skb, 720 PCI_DMA_TODEVICE); 721 dev_kfree_skb_any(skb); 722 } 723 memset(desc, 0, sizeof(*desc)); 724 } 725 card->tx_buf_list[i] = NULL; 726 } 727 728 atomic_set(&adapter->tx_hw_pending, 0); 729 return; 730 } 731 732 /* This function cleans up RX buffer rings. If any of the buffer list has valid 733 * SKB address, associated SKB is freed. 734 */ 735 static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter) 736 { 737 struct pcie_service_card *card = adapter->card; 738 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 739 struct mwifiex_pcie_buf_desc *desc; 740 struct mwifiex_pfu_buf_desc *desc2; 741 struct sk_buff *skb; 742 int i; 743 744 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 745 if (reg->pfu_enabled) { 746 desc2 = card->rxbd_ring[i]; 747 if (card->rx_buf_list[i]) { 748 skb = card->rx_buf_list[i]; 749 mwifiex_unmap_pci_memory(adapter, skb, 750 PCI_DMA_FROMDEVICE); 751 dev_kfree_skb_any(skb); 752 } 753 memset(desc2, 0, sizeof(*desc2)); 754 } else { 755 desc = card->rxbd_ring[i]; 756 if (card->rx_buf_list[i]) { 757 skb = card->rx_buf_list[i]; 758 mwifiex_unmap_pci_memory(adapter, skb, 759 PCI_DMA_FROMDEVICE); 760 dev_kfree_skb_any(skb); 761 } 762 memset(desc, 0, sizeof(*desc)); 763 } 764 card->rx_buf_list[i] = NULL; 765 } 766 767 return; 768 } 769 770 /* This function cleans up event buffer rings. If any of the buffer list has 771 * valid SKB address, associated SKB is freed. 772 */ 773 static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter) 774 { 775 struct pcie_service_card *card = adapter->card; 776 struct mwifiex_evt_buf_desc *desc; 777 struct sk_buff *skb; 778 int i; 779 780 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 781 desc = card->evtbd_ring[i]; 782 if (card->evt_buf_list[i]) { 783 skb = card->evt_buf_list[i]; 784 mwifiex_unmap_pci_memory(adapter, skb, 785 PCI_DMA_FROMDEVICE); 786 dev_kfree_skb_any(skb); 787 } 788 card->evt_buf_list[i] = NULL; 789 memset(desc, 0, sizeof(*desc)); 790 } 791 792 return; 793 } 794 795 /* This function creates buffer descriptor ring for TX 796 */ 797 static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter) 798 { 799 struct pcie_service_card *card = adapter->card; 800 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 801 802 /* 803 * driver maintaines the write pointer and firmware maintaines the read 804 * pointer. The write pointer starts at 0 (zero) while the read pointer 805 * starts at zero with rollover bit set 806 */ 807 card->txbd_wrptr = 0; 808 809 if (reg->pfu_enabled) 810 card->txbd_rdptr = 0; 811 else 812 card->txbd_rdptr |= reg->tx_rollover_ind; 813 814 /* allocate shared memory for the BD ring and divide the same in to 815 several descriptors */ 816 if (reg->pfu_enabled) 817 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 818 MWIFIEX_MAX_TXRX_BD; 819 else 820 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 821 MWIFIEX_MAX_TXRX_BD; 822 823 mwifiex_dbg(adapter, INFO, 824 "info: txbd_ring: Allocating %d bytes\n", 825 card->txbd_ring_size); 826 card->txbd_ring_vbase = pci_alloc_consistent(card->dev, 827 card->txbd_ring_size, 828 &card->txbd_ring_pbase); 829 if (!card->txbd_ring_vbase) { 830 mwifiex_dbg(adapter, ERROR, 831 "allocate consistent memory (%d bytes) failed!\n", 832 card->txbd_ring_size); 833 return -ENOMEM; 834 } 835 mwifiex_dbg(adapter, DATA, 836 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n", 837 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase, 838 (u32)((u64)card->txbd_ring_pbase >> 32), 839 card->txbd_ring_size); 840 841 return mwifiex_init_txq_ring(adapter); 842 } 843 844 static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter) 845 { 846 struct pcie_service_card *card = adapter->card; 847 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 848 849 mwifiex_cleanup_txq_ring(adapter); 850 851 if (card->txbd_ring_vbase) 852 pci_free_consistent(card->dev, card->txbd_ring_size, 853 card->txbd_ring_vbase, 854 card->txbd_ring_pbase); 855 card->txbd_ring_size = 0; 856 card->txbd_wrptr = 0; 857 card->txbd_rdptr = 0 | reg->tx_rollover_ind; 858 card->txbd_ring_vbase = NULL; 859 card->txbd_ring_pbase = 0; 860 861 return 0; 862 } 863 864 /* 865 * This function creates buffer descriptor ring for RX 866 */ 867 static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter) 868 { 869 struct pcie_service_card *card = adapter->card; 870 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 871 872 /* 873 * driver maintaines the read pointer and firmware maintaines the write 874 * pointer. The write pointer starts at 0 (zero) while the read pointer 875 * starts at zero with rollover bit set 876 */ 877 card->rxbd_wrptr = 0; 878 card->rxbd_rdptr = reg->rx_rollover_ind; 879 880 if (reg->pfu_enabled) 881 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 882 MWIFIEX_MAX_TXRX_BD; 883 else 884 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 885 MWIFIEX_MAX_TXRX_BD; 886 887 mwifiex_dbg(adapter, INFO, 888 "info: rxbd_ring: Allocating %d bytes\n", 889 card->rxbd_ring_size); 890 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev, 891 card->rxbd_ring_size, 892 &card->rxbd_ring_pbase); 893 if (!card->rxbd_ring_vbase) { 894 mwifiex_dbg(adapter, ERROR, 895 "allocate consistent memory (%d bytes) failed!\n", 896 card->rxbd_ring_size); 897 return -ENOMEM; 898 } 899 900 mwifiex_dbg(adapter, DATA, 901 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n", 902 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase, 903 (u32)((u64)card->rxbd_ring_pbase >> 32), 904 card->rxbd_ring_size); 905 906 return mwifiex_init_rxq_ring(adapter); 907 } 908 909 /* 910 * This function deletes Buffer descriptor ring for RX 911 */ 912 static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter) 913 { 914 struct pcie_service_card *card = adapter->card; 915 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 916 917 mwifiex_cleanup_rxq_ring(adapter); 918 919 if (card->rxbd_ring_vbase) 920 pci_free_consistent(card->dev, card->rxbd_ring_size, 921 card->rxbd_ring_vbase, 922 card->rxbd_ring_pbase); 923 card->rxbd_ring_size = 0; 924 card->rxbd_wrptr = 0; 925 card->rxbd_rdptr = 0 | reg->rx_rollover_ind; 926 card->rxbd_ring_vbase = NULL; 927 card->rxbd_ring_pbase = 0; 928 929 return 0; 930 } 931 932 /* 933 * This function creates buffer descriptor ring for Events 934 */ 935 static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter) 936 { 937 struct pcie_service_card *card = adapter->card; 938 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 939 940 /* 941 * driver maintaines the read pointer and firmware maintaines the write 942 * pointer. The write pointer starts at 0 (zero) while the read pointer 943 * starts at zero with rollover bit set 944 */ 945 card->evtbd_wrptr = 0; 946 card->evtbd_rdptr = reg->evt_rollover_ind; 947 948 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) * 949 MWIFIEX_MAX_EVT_BD; 950 951 mwifiex_dbg(adapter, INFO, 952 "info: evtbd_ring: Allocating %d bytes\n", 953 card->evtbd_ring_size); 954 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev, 955 card->evtbd_ring_size, 956 &card->evtbd_ring_pbase); 957 if (!card->evtbd_ring_vbase) { 958 mwifiex_dbg(adapter, ERROR, 959 "allocate consistent memory (%d bytes) failed!\n", 960 card->evtbd_ring_size); 961 return -ENOMEM; 962 } 963 964 mwifiex_dbg(adapter, EVENT, 965 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n", 966 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase, 967 (u32)((u64)card->evtbd_ring_pbase >> 32), 968 card->evtbd_ring_size); 969 970 return mwifiex_pcie_init_evt_ring(adapter); 971 } 972 973 /* 974 * This function deletes Buffer descriptor ring for Events 975 */ 976 static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter) 977 { 978 struct pcie_service_card *card = adapter->card; 979 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 980 981 mwifiex_cleanup_evt_ring(adapter); 982 983 if (card->evtbd_ring_vbase) 984 pci_free_consistent(card->dev, card->evtbd_ring_size, 985 card->evtbd_ring_vbase, 986 card->evtbd_ring_pbase); 987 card->evtbd_wrptr = 0; 988 card->evtbd_rdptr = 0 | reg->evt_rollover_ind; 989 card->evtbd_ring_size = 0; 990 card->evtbd_ring_vbase = NULL; 991 card->evtbd_ring_pbase = 0; 992 993 return 0; 994 } 995 996 /* 997 * This function allocates a buffer for CMDRSP 998 */ 999 static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter) 1000 { 1001 struct pcie_service_card *card = adapter->card; 1002 struct sk_buff *skb; 1003 1004 /* Allocate memory for receiving command response data */ 1005 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 1006 if (!skb) { 1007 mwifiex_dbg(adapter, ERROR, 1008 "Unable to allocate skb for command response data.\n"); 1009 return -ENOMEM; 1010 } 1011 skb_put(skb, MWIFIEX_UPLD_SIZE); 1012 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1013 PCI_DMA_FROMDEVICE)) 1014 return -1; 1015 1016 card->cmdrsp_buf = skb; 1017 1018 return 0; 1019 } 1020 1021 /* 1022 * This function deletes a buffer for CMDRSP 1023 */ 1024 static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter) 1025 { 1026 struct pcie_service_card *card; 1027 1028 if (!adapter) 1029 return 0; 1030 1031 card = adapter->card; 1032 1033 if (card && card->cmdrsp_buf) { 1034 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf, 1035 PCI_DMA_FROMDEVICE); 1036 dev_kfree_skb_any(card->cmdrsp_buf); 1037 } 1038 1039 if (card && card->cmd_buf) { 1040 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1041 PCI_DMA_TODEVICE); 1042 } 1043 return 0; 1044 } 1045 1046 /* 1047 * This function allocates a buffer for sleep cookie 1048 */ 1049 static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter) 1050 { 1051 struct pcie_service_card *card = adapter->card; 1052 1053 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32), 1054 &card->sleep_cookie_pbase); 1055 if (!card->sleep_cookie_vbase) { 1056 mwifiex_dbg(adapter, ERROR, 1057 "pci_alloc_consistent failed!\n"); 1058 return -ENOMEM; 1059 } 1060 /* Init val of Sleep Cookie */ 1061 *(u32 *)card->sleep_cookie_vbase = FW_AWAKE_COOKIE; 1062 1063 mwifiex_dbg(adapter, INFO, 1064 "alloc_scook: sleep cookie=0x%x\n", 1065 *((u32 *)card->sleep_cookie_vbase)); 1066 1067 return 0; 1068 } 1069 1070 /* 1071 * This function deletes buffer for sleep cookie 1072 */ 1073 static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter) 1074 { 1075 struct pcie_service_card *card; 1076 1077 if (!adapter) 1078 return 0; 1079 1080 card = adapter->card; 1081 1082 if (card && card->sleep_cookie_vbase) { 1083 pci_free_consistent(card->dev, sizeof(u32), 1084 card->sleep_cookie_vbase, 1085 card->sleep_cookie_pbase); 1086 card->sleep_cookie_vbase = NULL; 1087 } 1088 1089 return 0; 1090 } 1091 1092 /* This function flushes the TX buffer descriptor ring 1093 * This function defined as handler is also called while cleaning TXRX 1094 * during disconnect/ bss stop. 1095 */ 1096 static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter) 1097 { 1098 struct pcie_service_card *card = adapter->card; 1099 1100 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) { 1101 card->txbd_flush = 1; 1102 /* write pointer already set at last send 1103 * send dnld-rdy intr again, wait for completion. 1104 */ 1105 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1106 CPU_INTR_DNLD_RDY)) { 1107 mwifiex_dbg(adapter, ERROR, 1108 "failed to assert dnld-rdy interrupt.\n"); 1109 return -1; 1110 } 1111 } 1112 return 0; 1113 } 1114 1115 /* 1116 * This function unmaps and frees downloaded data buffer 1117 */ 1118 static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter) 1119 { 1120 struct sk_buff *skb; 1121 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0; 1122 struct mwifiex_pcie_buf_desc *desc; 1123 struct mwifiex_pfu_buf_desc *desc2; 1124 struct pcie_service_card *card = adapter->card; 1125 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1126 1127 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1128 mwifiex_pm_wakeup_card(adapter); 1129 1130 /* Read the TX ring read pointer set by firmware */ 1131 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) { 1132 mwifiex_dbg(adapter, ERROR, 1133 "SEND COMP: failed to read reg->tx_rdptr\n"); 1134 return -1; 1135 } 1136 1137 mwifiex_dbg(adapter, DATA, 1138 "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n", 1139 card->txbd_rdptr, rdptr); 1140 1141 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1142 /* free from previous txbd_rdptr to current txbd_rdptr */ 1143 while (((card->txbd_rdptr & reg->tx_mask) != 1144 (rdptr & reg->tx_mask)) || 1145 ((card->txbd_rdptr & reg->tx_rollover_ind) != 1146 (rdptr & reg->tx_rollover_ind))) { 1147 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >> 1148 reg->tx_start_ptr; 1149 1150 skb = card->tx_buf_list[wrdoneidx]; 1151 1152 if (skb) { 1153 mwifiex_dbg(adapter, DATA, 1154 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n", 1155 skb, wrdoneidx); 1156 mwifiex_unmap_pci_memory(adapter, skb, 1157 PCI_DMA_TODEVICE); 1158 1159 unmap_count++; 1160 1161 if (card->txbd_flush) 1162 mwifiex_write_data_complete(adapter, skb, 0, 1163 -1); 1164 else 1165 mwifiex_write_data_complete(adapter, skb, 0, 0); 1166 atomic_dec(&adapter->tx_hw_pending); 1167 } 1168 1169 card->tx_buf_list[wrdoneidx] = NULL; 1170 1171 if (reg->pfu_enabled) { 1172 desc2 = card->txbd_ring[wrdoneidx]; 1173 memset(desc2, 0, sizeof(*desc2)); 1174 } else { 1175 desc = card->txbd_ring[wrdoneidx]; 1176 memset(desc, 0, sizeof(*desc)); 1177 } 1178 switch (card->dev->device) { 1179 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1180 card->txbd_rdptr++; 1181 break; 1182 case PCIE_DEVICE_ID_MARVELL_88W8897: 1183 case PCIE_DEVICE_ID_MARVELL_88W8997: 1184 card->txbd_rdptr += reg->ring_tx_start_ptr; 1185 break; 1186 } 1187 1188 1189 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs) 1190 card->txbd_rdptr = ((card->txbd_rdptr & 1191 reg->tx_rollover_ind) ^ 1192 reg->tx_rollover_ind); 1193 } 1194 1195 if (unmap_count) 1196 adapter->data_sent = false; 1197 1198 if (card->txbd_flush) { 1199 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) 1200 card->txbd_flush = 0; 1201 else 1202 mwifiex_clean_pcie_ring_buf(adapter); 1203 } 1204 1205 return 0; 1206 } 1207 1208 /* This function sends data buffer to device. First 4 bytes of payload 1209 * are filled with payload length and payload type. Then this payload 1210 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly. 1211 * Download ready interrupt to FW is deffered if Tx ring is not full and 1212 * additional payload can be accomodated. 1213 * Caller must ensure tx_param parameter to this function is not NULL. 1214 */ 1215 static int 1216 mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb, 1217 struct mwifiex_tx_param *tx_param) 1218 { 1219 struct pcie_service_card *card = adapter->card; 1220 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1221 u32 wrindx, num_tx_buffs, rx_val; 1222 int ret; 1223 dma_addr_t buf_pa; 1224 struct mwifiex_pcie_buf_desc *desc = NULL; 1225 struct mwifiex_pfu_buf_desc *desc2 = NULL; 1226 __le16 *tmp; 1227 1228 if (!(skb->data && skb->len)) { 1229 mwifiex_dbg(adapter, ERROR, 1230 "%s(): invalid parameter <%p, %#x>\n", 1231 __func__, skb->data, skb->len); 1232 return -1; 1233 } 1234 1235 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1236 mwifiex_pm_wakeup_card(adapter); 1237 1238 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1239 mwifiex_dbg(adapter, DATA, 1240 "info: SEND DATA: <Rd: %#x, Wr: %#x>\n", 1241 card->txbd_rdptr, card->txbd_wrptr); 1242 if (mwifiex_pcie_txbd_not_full(card)) { 1243 u8 *payload; 1244 1245 adapter->data_sent = true; 1246 payload = skb->data; 1247 tmp = (__le16 *)&payload[0]; 1248 *tmp = cpu_to_le16((u16)skb->len); 1249 tmp = (__le16 *)&payload[2]; 1250 *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA); 1251 1252 if (mwifiex_map_pci_memory(adapter, skb, skb->len, 1253 PCI_DMA_TODEVICE)) 1254 return -1; 1255 1256 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr; 1257 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1258 card->tx_buf_list[wrindx] = skb; 1259 atomic_inc(&adapter->tx_hw_pending); 1260 1261 if (reg->pfu_enabled) { 1262 desc2 = card->txbd_ring[wrindx]; 1263 desc2->paddr = buf_pa; 1264 desc2->len = (u16)skb->len; 1265 desc2->frag_len = (u16)skb->len; 1266 desc2->offset = 0; 1267 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1268 MWIFIEX_BD_FLAG_LAST_DESC; 1269 } else { 1270 desc = card->txbd_ring[wrindx]; 1271 desc->paddr = buf_pa; 1272 desc->len = (u16)skb->len; 1273 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1274 MWIFIEX_BD_FLAG_LAST_DESC; 1275 } 1276 1277 switch (card->dev->device) { 1278 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1279 card->txbd_wrptr++; 1280 break; 1281 case PCIE_DEVICE_ID_MARVELL_88W8897: 1282 case PCIE_DEVICE_ID_MARVELL_88W8997: 1283 card->txbd_wrptr += reg->ring_tx_start_ptr; 1284 break; 1285 } 1286 1287 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs) 1288 card->txbd_wrptr = ((card->txbd_wrptr & 1289 reg->tx_rollover_ind) ^ 1290 reg->tx_rollover_ind); 1291 1292 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask; 1293 /* Write the TX ring write pointer in to reg->tx_wrptr */ 1294 if (mwifiex_write_reg(adapter, reg->tx_wrptr, 1295 card->txbd_wrptr | rx_val)) { 1296 mwifiex_dbg(adapter, ERROR, 1297 "SEND DATA: failed to write reg->tx_wrptr\n"); 1298 ret = -1; 1299 goto done_unmap; 1300 } 1301 if ((mwifiex_pcie_txbd_not_full(card)) && 1302 tx_param->next_pkt_len) { 1303 /* have more packets and TxBD still can hold more */ 1304 mwifiex_dbg(adapter, DATA, 1305 "SEND DATA: delay dnld-rdy interrupt.\n"); 1306 adapter->data_sent = false; 1307 } else { 1308 /* Send the TX ready interrupt */ 1309 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1310 CPU_INTR_DNLD_RDY)) { 1311 mwifiex_dbg(adapter, ERROR, 1312 "SEND DATA: failed to assert dnld-rdy interrupt.\n"); 1313 ret = -1; 1314 goto done_unmap; 1315 } 1316 } 1317 mwifiex_dbg(adapter, DATA, 1318 "info: SEND DATA: Updated <Rd: %#x, Wr:\t" 1319 "%#x> and sent packet to firmware successfully\n", 1320 card->txbd_rdptr, card->txbd_wrptr); 1321 } else { 1322 mwifiex_dbg(adapter, DATA, 1323 "info: TX Ring full, can't send packets to fw\n"); 1324 adapter->data_sent = true; 1325 /* Send the TX ready interrupt */ 1326 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1327 CPU_INTR_DNLD_RDY)) 1328 mwifiex_dbg(adapter, ERROR, 1329 "SEND DATA: failed to assert door-bell intr\n"); 1330 return -EBUSY; 1331 } 1332 1333 return -EINPROGRESS; 1334 done_unmap: 1335 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1336 card->tx_buf_list[wrindx] = NULL; 1337 atomic_dec(&adapter->tx_hw_pending); 1338 if (reg->pfu_enabled) 1339 memset(desc2, 0, sizeof(*desc2)); 1340 else 1341 memset(desc, 0, sizeof(*desc)); 1342 1343 return ret; 1344 } 1345 1346 /* 1347 * This function handles received buffer ring and 1348 * dispatches packets to upper 1349 */ 1350 static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter) 1351 { 1352 struct pcie_service_card *card = adapter->card; 1353 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1354 u32 wrptr, rd_index, tx_val; 1355 dma_addr_t buf_pa; 1356 int ret = 0; 1357 struct sk_buff *skb_tmp = NULL; 1358 struct mwifiex_pcie_buf_desc *desc; 1359 struct mwifiex_pfu_buf_desc *desc2; 1360 1361 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1362 mwifiex_pm_wakeup_card(adapter); 1363 1364 /* Read the RX ring Write pointer set by firmware */ 1365 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1366 mwifiex_dbg(adapter, ERROR, 1367 "RECV DATA: failed to read reg->rx_wrptr\n"); 1368 ret = -1; 1369 goto done; 1370 } 1371 card->rxbd_wrptr = wrptr; 1372 1373 while (((wrptr & reg->rx_mask) != 1374 (card->rxbd_rdptr & reg->rx_mask)) || 1375 ((wrptr & reg->rx_rollover_ind) == 1376 (card->rxbd_rdptr & reg->rx_rollover_ind))) { 1377 struct sk_buff *skb_data; 1378 u16 rx_len; 1379 __le16 pkt_len; 1380 1381 rd_index = card->rxbd_rdptr & reg->rx_mask; 1382 skb_data = card->rx_buf_list[rd_index]; 1383 1384 /* If skb allocation was failed earlier for Rx packet, 1385 * rx_buf_list[rd_index] would have been left with a NULL. 1386 */ 1387 if (!skb_data) 1388 return -ENOMEM; 1389 1390 mwifiex_unmap_pci_memory(adapter, skb_data, PCI_DMA_FROMDEVICE); 1391 card->rx_buf_list[rd_index] = NULL; 1392 1393 /* Get data length from interface header - 1394 * first 2 bytes for len, next 2 bytes is for type 1395 */ 1396 pkt_len = *((__le16 *)skb_data->data); 1397 rx_len = le16_to_cpu(pkt_len); 1398 if (WARN_ON(rx_len <= INTF_HEADER_LEN || 1399 rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) { 1400 mwifiex_dbg(adapter, ERROR, 1401 "Invalid RX len %d, Rd=%#x, Wr=%#x\n", 1402 rx_len, card->rxbd_rdptr, wrptr); 1403 dev_kfree_skb_any(skb_data); 1404 } else { 1405 skb_put(skb_data, rx_len); 1406 mwifiex_dbg(adapter, DATA, 1407 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n", 1408 card->rxbd_rdptr, wrptr, rx_len); 1409 skb_pull(skb_data, INTF_HEADER_LEN); 1410 if (adapter->rx_work_enabled) { 1411 skb_queue_tail(&adapter->rx_data_q, skb_data); 1412 adapter->data_received = true; 1413 atomic_inc(&adapter->rx_pending); 1414 } else { 1415 mwifiex_handle_rx_packet(adapter, skb_data); 1416 } 1417 } 1418 1419 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 1420 GFP_KERNEL); 1421 if (!skb_tmp) { 1422 mwifiex_dbg(adapter, ERROR, 1423 "Unable to allocate skb.\n"); 1424 return -ENOMEM; 1425 } 1426 1427 if (mwifiex_map_pci_memory(adapter, skb_tmp, 1428 MWIFIEX_RX_DATA_BUF_SIZE, 1429 PCI_DMA_FROMDEVICE)) 1430 return -1; 1431 1432 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp); 1433 1434 mwifiex_dbg(adapter, INFO, 1435 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n", 1436 skb_tmp, rd_index); 1437 card->rx_buf_list[rd_index] = skb_tmp; 1438 1439 if (reg->pfu_enabled) { 1440 desc2 = card->rxbd_ring[rd_index]; 1441 desc2->paddr = buf_pa; 1442 desc2->len = skb_tmp->len; 1443 desc2->frag_len = skb_tmp->len; 1444 desc2->offset = 0; 1445 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop; 1446 } else { 1447 desc = card->rxbd_ring[rd_index]; 1448 desc->paddr = buf_pa; 1449 desc->len = skb_tmp->len; 1450 desc->flags = 0; 1451 } 1452 1453 if ((++card->rxbd_rdptr & reg->rx_mask) == 1454 MWIFIEX_MAX_TXRX_BD) { 1455 card->rxbd_rdptr = ((card->rxbd_rdptr & 1456 reg->rx_rollover_ind) ^ 1457 reg->rx_rollover_ind); 1458 } 1459 mwifiex_dbg(adapter, DATA, 1460 "info: RECV DATA: <Rd: %#x, Wr: %#x>\n", 1461 card->rxbd_rdptr, wrptr); 1462 1463 tx_val = card->txbd_wrptr & reg->tx_wrap_mask; 1464 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1465 if (mwifiex_write_reg(adapter, reg->rx_rdptr, 1466 card->rxbd_rdptr | tx_val)) { 1467 mwifiex_dbg(adapter, DATA, 1468 "RECV DATA: failed to write reg->rx_rdptr\n"); 1469 ret = -1; 1470 goto done; 1471 } 1472 1473 /* Read the RX ring Write pointer set by firmware */ 1474 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1475 mwifiex_dbg(adapter, ERROR, 1476 "RECV DATA: failed to read reg->rx_wrptr\n"); 1477 ret = -1; 1478 goto done; 1479 } 1480 mwifiex_dbg(adapter, DATA, 1481 "info: RECV DATA: Rcvd packet from fw successfully\n"); 1482 card->rxbd_wrptr = wrptr; 1483 } 1484 1485 done: 1486 return ret; 1487 } 1488 1489 /* 1490 * This function downloads the boot command to device 1491 */ 1492 static int 1493 mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1494 { 1495 dma_addr_t buf_pa; 1496 struct pcie_service_card *card = adapter->card; 1497 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1498 1499 if (!(skb->data && skb->len)) { 1500 mwifiex_dbg(adapter, ERROR, 1501 "Invalid parameter in %s <%p. len %d>\n", 1502 __func__, skb->data, skb->len); 1503 return -1; 1504 } 1505 1506 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE)) 1507 return -1; 1508 1509 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1510 1511 /* Write the lower 32bits of the physical address to low command 1512 * address scratch register 1513 */ 1514 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) { 1515 mwifiex_dbg(adapter, ERROR, 1516 "%s: failed to write download command to boot code.\n", 1517 __func__); 1518 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1519 return -1; 1520 } 1521 1522 /* Write the upper 32bits of the physical address to high command 1523 * address scratch register 1524 */ 1525 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1526 (u32)((u64)buf_pa >> 32))) { 1527 mwifiex_dbg(adapter, ERROR, 1528 "%s: failed to write download command to boot code.\n", 1529 __func__); 1530 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1531 return -1; 1532 } 1533 1534 /* Write the command length to cmd_size scratch register */ 1535 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) { 1536 mwifiex_dbg(adapter, ERROR, 1537 "%s: failed to write command len to cmd_size scratch reg\n", 1538 __func__); 1539 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1540 return -1; 1541 } 1542 1543 /* Ring the door bell */ 1544 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1545 CPU_INTR_DOOR_BELL)) { 1546 mwifiex_dbg(adapter, ERROR, 1547 "%s: failed to assert door-bell intr\n", __func__); 1548 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1549 return -1; 1550 } 1551 1552 return 0; 1553 } 1554 1555 /* This function init rx port in firmware which in turn enables to receive data 1556 * from device before transmitting any packet. 1557 */ 1558 static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter) 1559 { 1560 struct pcie_service_card *card = adapter->card; 1561 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1562 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask; 1563 1564 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1565 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr | 1566 tx_wrap)) { 1567 mwifiex_dbg(adapter, ERROR, 1568 "RECV DATA: failed to write reg->rx_rdptr\n"); 1569 return -1; 1570 } 1571 return 0; 1572 } 1573 1574 /* This function downloads commands to the device 1575 */ 1576 static int 1577 mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1578 { 1579 struct pcie_service_card *card = adapter->card; 1580 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1581 int ret = 0; 1582 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa; 1583 u8 *payload = (u8 *)skb->data; 1584 1585 if (!(skb->data && skb->len)) { 1586 mwifiex_dbg(adapter, ERROR, 1587 "Invalid parameter in %s <%p, %#x>\n", 1588 __func__, skb->data, skb->len); 1589 return -1; 1590 } 1591 1592 /* Make sure a command response buffer is available */ 1593 if (!card->cmdrsp_buf) { 1594 mwifiex_dbg(adapter, ERROR, 1595 "No response buffer available, send command failed\n"); 1596 return -EBUSY; 1597 } 1598 1599 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1600 mwifiex_pm_wakeup_card(adapter); 1601 1602 adapter->cmd_sent = true; 1603 1604 *(__le16 *)&payload[0] = cpu_to_le16((u16)skb->len); 1605 *(__le16 *)&payload[2] = cpu_to_le16(MWIFIEX_TYPE_CMD); 1606 1607 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE)) 1608 return -1; 1609 1610 card->cmd_buf = skb; 1611 1612 /* To send a command, the driver will: 1613 1. Write the 64bit physical address of the data buffer to 1614 cmd response address low + cmd response address high 1615 2. Ring the door bell (i.e. set the door bell interrupt) 1616 1617 In response to door bell interrupt, the firmware will perform 1618 the DMA of the command packet (first header to obtain the total 1619 length and then rest of the command). 1620 */ 1621 1622 if (card->cmdrsp_buf) { 1623 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf); 1624 /* Write the lower 32bits of the cmdrsp buffer physical 1625 address */ 1626 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 1627 (u32)cmdrsp_buf_pa)) { 1628 mwifiex_dbg(adapter, ERROR, 1629 "Failed to write download cmd to boot code.\n"); 1630 ret = -1; 1631 goto done; 1632 } 1633 /* Write the upper 32bits of the cmdrsp buffer physical 1634 address */ 1635 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 1636 (u32)((u64)cmdrsp_buf_pa >> 32))) { 1637 mwifiex_dbg(adapter, ERROR, 1638 "Failed to write download cmd to boot code.\n"); 1639 ret = -1; 1640 goto done; 1641 } 1642 } 1643 1644 cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf); 1645 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */ 1646 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, 1647 (u32)cmd_buf_pa)) { 1648 mwifiex_dbg(adapter, ERROR, 1649 "Failed to write download cmd to boot code.\n"); 1650 ret = -1; 1651 goto done; 1652 } 1653 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */ 1654 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1655 (u32)((u64)cmd_buf_pa >> 32))) { 1656 mwifiex_dbg(adapter, ERROR, 1657 "Failed to write download cmd to boot code.\n"); 1658 ret = -1; 1659 goto done; 1660 } 1661 1662 /* Write the command length to reg->cmd_size */ 1663 if (mwifiex_write_reg(adapter, reg->cmd_size, 1664 card->cmd_buf->len)) { 1665 mwifiex_dbg(adapter, ERROR, 1666 "Failed to write cmd len to reg->cmd_size\n"); 1667 ret = -1; 1668 goto done; 1669 } 1670 1671 /* Ring the door bell */ 1672 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1673 CPU_INTR_DOOR_BELL)) { 1674 mwifiex_dbg(adapter, ERROR, 1675 "Failed to assert door-bell intr\n"); 1676 ret = -1; 1677 goto done; 1678 } 1679 1680 done: 1681 if (ret) 1682 adapter->cmd_sent = false; 1683 1684 return 0; 1685 } 1686 1687 /* 1688 * This function handles command complete interrupt 1689 */ 1690 static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter) 1691 { 1692 struct pcie_service_card *card = adapter->card; 1693 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1694 struct sk_buff *skb = card->cmdrsp_buf; 1695 int count = 0; 1696 u16 rx_len; 1697 __le16 pkt_len; 1698 1699 mwifiex_dbg(adapter, CMD, 1700 "info: Rx CMD Response\n"); 1701 1702 if (adapter->curr_cmd) 1703 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_FROMDEVICE); 1704 else 1705 pci_dma_sync_single_for_cpu(card->dev, 1706 MWIFIEX_SKB_DMA_ADDR(skb), 1707 MWIFIEX_UPLD_SIZE, 1708 PCI_DMA_FROMDEVICE); 1709 1710 /* Unmap the command as a response has been received. */ 1711 if (card->cmd_buf) { 1712 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1713 PCI_DMA_TODEVICE); 1714 card->cmd_buf = NULL; 1715 } 1716 1717 pkt_len = *((__le16 *)skb->data); 1718 rx_len = le16_to_cpu(pkt_len); 1719 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 1720 skb_trim(skb, rx_len); 1721 1722 if (!adapter->curr_cmd) { 1723 if (adapter->ps_state == PS_STATE_SLEEP_CFM) { 1724 pci_dma_sync_single_for_device(card->dev, 1725 MWIFIEX_SKB_DMA_ADDR(skb), 1726 MWIFIEX_SLEEP_COOKIE_SIZE, 1727 PCI_DMA_FROMDEVICE); 1728 if (mwifiex_write_reg(adapter, 1729 PCIE_CPU_INT_EVENT, 1730 CPU_INTR_SLEEP_CFM_DONE)) { 1731 mwifiex_dbg(adapter, ERROR, 1732 "Write register failed\n"); 1733 return -1; 1734 } 1735 mwifiex_delay_for_sleep_cookie(adapter, 1736 MWIFIEX_MAX_DELAY_COUNT); 1737 mwifiex_unmap_pci_memory(adapter, skb, 1738 PCI_DMA_FROMDEVICE); 1739 skb_pull(skb, INTF_HEADER_LEN); 1740 while (reg->sleep_cookie && (count++ < 10) && 1741 mwifiex_pcie_ok_to_access_hw(adapter)) 1742 usleep_range(50, 60); 1743 mwifiex_pcie_enable_host_int(adapter); 1744 mwifiex_process_sleep_confirm_resp(adapter, skb->data, 1745 skb->len); 1746 } else { 1747 mwifiex_dbg(adapter, ERROR, 1748 "There is no command but got cmdrsp\n"); 1749 } 1750 memcpy(adapter->upld_buf, skb->data, 1751 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len)); 1752 skb_push(skb, INTF_HEADER_LEN); 1753 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1754 PCI_DMA_FROMDEVICE)) 1755 return -1; 1756 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) { 1757 skb_pull(skb, INTF_HEADER_LEN); 1758 adapter->curr_cmd->resp_skb = skb; 1759 adapter->cmd_resp_received = true; 1760 /* Take the pointer and set it to CMD node and will 1761 return in the response complete callback */ 1762 card->cmdrsp_buf = NULL; 1763 1764 /* Clear the cmd-rsp buffer address in scratch registers. This 1765 will prevent firmware from writing to the same response 1766 buffer again. */ 1767 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) { 1768 mwifiex_dbg(adapter, ERROR, 1769 "cmd_done: failed to clear cmd_rsp_addr_lo\n"); 1770 return -1; 1771 } 1772 /* Write the upper 32bits of the cmdrsp buffer physical 1773 address */ 1774 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) { 1775 mwifiex_dbg(adapter, ERROR, 1776 "cmd_done: failed to clear cmd_rsp_addr_hi\n"); 1777 return -1; 1778 } 1779 } 1780 1781 return 0; 1782 } 1783 1784 /* 1785 * Command Response processing complete handler 1786 */ 1787 static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter, 1788 struct sk_buff *skb) 1789 { 1790 struct pcie_service_card *card = adapter->card; 1791 1792 if (skb) { 1793 card->cmdrsp_buf = skb; 1794 skb_push(card->cmdrsp_buf, INTF_HEADER_LEN); 1795 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1796 PCI_DMA_FROMDEVICE)) 1797 return -1; 1798 } 1799 1800 return 0; 1801 } 1802 1803 /* 1804 * This function handles firmware event ready interrupt 1805 */ 1806 static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter) 1807 { 1808 struct pcie_service_card *card = adapter->card; 1809 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1810 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 1811 u32 wrptr, event; 1812 struct mwifiex_evt_buf_desc *desc; 1813 1814 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1815 mwifiex_pm_wakeup_card(adapter); 1816 1817 if (adapter->event_received) { 1818 mwifiex_dbg(adapter, EVENT, 1819 "info: Event being processed,\t" 1820 "do not process this interrupt just yet\n"); 1821 return 0; 1822 } 1823 1824 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 1825 mwifiex_dbg(adapter, ERROR, 1826 "info: Invalid read pointer...\n"); 1827 return -1; 1828 } 1829 1830 /* Read the event ring write pointer set by firmware */ 1831 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 1832 mwifiex_dbg(adapter, ERROR, 1833 "EventReady: failed to read reg->evt_wrptr\n"); 1834 return -1; 1835 } 1836 1837 mwifiex_dbg(adapter, EVENT, 1838 "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>", 1839 card->evtbd_rdptr, wrptr); 1840 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr 1841 & MWIFIEX_EVTBD_MASK)) || 1842 ((wrptr & reg->evt_rollover_ind) == 1843 (card->evtbd_rdptr & reg->evt_rollover_ind))) { 1844 struct sk_buff *skb_cmd; 1845 __le16 data_len = 0; 1846 u16 evt_len; 1847 1848 mwifiex_dbg(adapter, INFO, 1849 "info: Read Index: %d\n", rdptr); 1850 skb_cmd = card->evt_buf_list[rdptr]; 1851 mwifiex_unmap_pci_memory(adapter, skb_cmd, PCI_DMA_FROMDEVICE); 1852 1853 /* Take the pointer and set it to event pointer in adapter 1854 and will return back after event handling callback */ 1855 card->evt_buf_list[rdptr] = NULL; 1856 desc = card->evtbd_ring[rdptr]; 1857 memset(desc, 0, sizeof(*desc)); 1858 1859 event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN]; 1860 adapter->event_cause = event; 1861 /* The first 4bytes will be the event transfer header 1862 len is 2 bytes followed by type which is 2 bytes */ 1863 memcpy(&data_len, skb_cmd->data, sizeof(__le16)); 1864 evt_len = le16_to_cpu(data_len); 1865 skb_trim(skb_cmd, evt_len); 1866 skb_pull(skb_cmd, INTF_HEADER_LEN); 1867 mwifiex_dbg(adapter, EVENT, 1868 "info: Event length: %d\n", evt_len); 1869 1870 if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE)) 1871 memcpy(adapter->event_body, skb_cmd->data + 1872 MWIFIEX_EVENT_HEADER_LEN, evt_len - 1873 MWIFIEX_EVENT_HEADER_LEN); 1874 1875 adapter->event_received = true; 1876 adapter->event_skb = skb_cmd; 1877 1878 /* Do not update the event read pointer here, wait till the 1879 buffer is released. This is just to make things simpler, 1880 we need to find a better method of managing these buffers. 1881 */ 1882 } else { 1883 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1884 CPU_INTR_EVENT_DONE)) { 1885 mwifiex_dbg(adapter, ERROR, 1886 "Write register failed\n"); 1887 return -1; 1888 } 1889 } 1890 1891 return 0; 1892 } 1893 1894 /* 1895 * Event processing complete handler 1896 */ 1897 static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter, 1898 struct sk_buff *skb) 1899 { 1900 struct pcie_service_card *card = adapter->card; 1901 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1902 int ret = 0; 1903 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 1904 u32 wrptr; 1905 struct mwifiex_evt_buf_desc *desc; 1906 1907 if (!skb) 1908 return 0; 1909 1910 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 1911 mwifiex_dbg(adapter, ERROR, 1912 "event_complete: Invalid rdptr 0x%x\n", 1913 rdptr); 1914 return -EINVAL; 1915 } 1916 1917 /* Read the event ring write pointer set by firmware */ 1918 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 1919 mwifiex_dbg(adapter, ERROR, 1920 "event_complete: failed to read reg->evt_wrptr\n"); 1921 return -1; 1922 } 1923 1924 if (!card->evt_buf_list[rdptr]) { 1925 skb_push(skb, INTF_HEADER_LEN); 1926 skb_put(skb, MAX_EVENT_SIZE - skb->len); 1927 if (mwifiex_map_pci_memory(adapter, skb, 1928 MAX_EVENT_SIZE, 1929 PCI_DMA_FROMDEVICE)) 1930 return -1; 1931 card->evt_buf_list[rdptr] = skb; 1932 desc = card->evtbd_ring[rdptr]; 1933 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb); 1934 desc->len = (u16)skb->len; 1935 desc->flags = 0; 1936 skb = NULL; 1937 } else { 1938 mwifiex_dbg(adapter, ERROR, 1939 "info: ERROR: buf still valid at index %d, <%p, %p>\n", 1940 rdptr, card->evt_buf_list[rdptr], skb); 1941 } 1942 1943 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) { 1944 card->evtbd_rdptr = ((card->evtbd_rdptr & 1945 reg->evt_rollover_ind) ^ 1946 reg->evt_rollover_ind); 1947 } 1948 1949 mwifiex_dbg(adapter, EVENT, 1950 "info: Updated <Rd: 0x%x, Wr: 0x%x>", 1951 card->evtbd_rdptr, wrptr); 1952 1953 /* Write the event ring read pointer in to reg->evt_rdptr */ 1954 if (mwifiex_write_reg(adapter, reg->evt_rdptr, 1955 card->evtbd_rdptr)) { 1956 mwifiex_dbg(adapter, ERROR, 1957 "event_complete: failed to read reg->evt_rdptr\n"); 1958 return -1; 1959 } 1960 1961 mwifiex_dbg(adapter, EVENT, 1962 "info: Check Events Again\n"); 1963 ret = mwifiex_pcie_process_event_ready(adapter); 1964 1965 return ret; 1966 } 1967 1968 /* 1969 * This function downloads the firmware to the card. 1970 * 1971 * Firmware is downloaded to the card in blocks. Every block download 1972 * is tested for CRC errors, and retried a number of times before 1973 * returning failure. 1974 */ 1975 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter, 1976 struct mwifiex_fw_image *fw) 1977 { 1978 int ret; 1979 u8 *firmware = fw->fw_buf; 1980 u32 firmware_len = fw->fw_len; 1981 u32 offset = 0; 1982 struct sk_buff *skb; 1983 u32 txlen, tx_blocks = 0, tries, len; 1984 u32 block_retry_cnt = 0; 1985 struct pcie_service_card *card = adapter->card; 1986 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1987 1988 if (!firmware || !firmware_len) { 1989 mwifiex_dbg(adapter, ERROR, 1990 "No firmware image found! Terminating download\n"); 1991 return -1; 1992 } 1993 1994 mwifiex_dbg(adapter, INFO, 1995 "info: Downloading FW image (%d bytes)\n", 1996 firmware_len); 1997 1998 if (mwifiex_pcie_disable_host_int(adapter)) { 1999 mwifiex_dbg(adapter, ERROR, 2000 "%s: Disabling interrupts failed.\n", __func__); 2001 return -1; 2002 } 2003 2004 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 2005 if (!skb) { 2006 ret = -ENOMEM; 2007 goto done; 2008 } 2009 2010 /* Perform firmware data transfer */ 2011 do { 2012 u32 ireg_intr = 0; 2013 2014 /* More data? */ 2015 if (offset >= firmware_len) 2016 break; 2017 2018 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2019 ret = mwifiex_read_reg(adapter, reg->cmd_size, 2020 &len); 2021 if (ret) { 2022 mwifiex_dbg(adapter, FATAL, 2023 "Failed reading len from boot code\n"); 2024 goto done; 2025 } 2026 if (len) 2027 break; 2028 usleep_range(10, 20); 2029 } 2030 2031 if (!len) { 2032 break; 2033 } else if (len > MWIFIEX_UPLD_SIZE) { 2034 mwifiex_dbg(adapter, ERROR, 2035 "FW download failure @ %d, invalid length %d\n", 2036 offset, len); 2037 ret = -1; 2038 goto done; 2039 } 2040 2041 txlen = len; 2042 2043 if (len & BIT(0)) { 2044 block_retry_cnt++; 2045 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) { 2046 mwifiex_dbg(adapter, ERROR, 2047 "FW download failure @ %d, over max\t" 2048 "retry count\n", offset); 2049 ret = -1; 2050 goto done; 2051 } 2052 mwifiex_dbg(adapter, ERROR, 2053 "FW CRC error indicated by the\t" 2054 "helper: len = 0x%04X, txlen = %d\n", 2055 len, txlen); 2056 len &= ~BIT(0); 2057 /* Setting this to 0 to resend from same offset */ 2058 txlen = 0; 2059 } else { 2060 block_retry_cnt = 0; 2061 /* Set blocksize to transfer - checking for 2062 last block */ 2063 if (firmware_len - offset < txlen) 2064 txlen = firmware_len - offset; 2065 2066 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) / 2067 card->pcie.blksz_fw_dl; 2068 2069 /* Copy payload to buffer */ 2070 memmove(skb->data, &firmware[offset], txlen); 2071 } 2072 2073 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 2074 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl); 2075 2076 /* Send the boot command to device */ 2077 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) { 2078 mwifiex_dbg(adapter, ERROR, 2079 "Failed to send firmware download command\n"); 2080 ret = -1; 2081 goto done; 2082 } 2083 2084 /* Wait for the command done interrupt */ 2085 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2086 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS, 2087 &ireg_intr)) { 2088 mwifiex_dbg(adapter, ERROR, 2089 "%s: Failed to read\t" 2090 "interrupt status during fw dnld.\n", 2091 __func__); 2092 mwifiex_unmap_pci_memory(adapter, skb, 2093 PCI_DMA_TODEVICE); 2094 ret = -1; 2095 goto done; 2096 } 2097 if (!(ireg_intr & CPU_INTR_DOOR_BELL)) 2098 break; 2099 usleep_range(10, 20); 2100 } 2101 if (ireg_intr & CPU_INTR_DOOR_BELL) { 2102 mwifiex_dbg(adapter, ERROR, "%s: Card failed to ACK download\n", 2103 __func__); 2104 mwifiex_unmap_pci_memory(adapter, skb, 2105 PCI_DMA_TODEVICE); 2106 ret = -1; 2107 goto done; 2108 } 2109 2110 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 2111 2112 offset += txlen; 2113 } while (true); 2114 2115 mwifiex_dbg(adapter, MSG, 2116 "info: FW download over, size %d bytes\n", offset); 2117 2118 ret = 0; 2119 2120 done: 2121 dev_kfree_skb_any(skb); 2122 return ret; 2123 } 2124 2125 /* 2126 * This function checks the firmware status in card. 2127 */ 2128 static int 2129 mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num) 2130 { 2131 int ret = 0; 2132 u32 firmware_stat; 2133 struct pcie_service_card *card = adapter->card; 2134 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2135 u32 tries; 2136 2137 /* Mask spurios interrupts */ 2138 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK, 2139 HOST_INTR_MASK)) { 2140 mwifiex_dbg(adapter, ERROR, 2141 "Write register failed\n"); 2142 return -1; 2143 } 2144 2145 mwifiex_dbg(adapter, INFO, 2146 "Setting driver ready signature\n"); 2147 if (mwifiex_write_reg(adapter, reg->drv_rdy, 2148 FIRMWARE_READY_PCIE)) { 2149 mwifiex_dbg(adapter, ERROR, 2150 "Failed to write driver ready signature\n"); 2151 return -1; 2152 } 2153 2154 /* Wait for firmware initialization event */ 2155 for (tries = 0; tries < poll_num; tries++) { 2156 if (mwifiex_read_reg(adapter, reg->fw_status, 2157 &firmware_stat)) 2158 ret = -1; 2159 else 2160 ret = 0; 2161 2162 mwifiex_dbg(adapter, INFO, "Try %d if FW is ready <%d,%#x>", 2163 tries, ret, firmware_stat); 2164 2165 if (ret) 2166 continue; 2167 if (firmware_stat == FIRMWARE_READY_PCIE) { 2168 ret = 0; 2169 break; 2170 } else { 2171 msleep(100); 2172 ret = -1; 2173 } 2174 } 2175 2176 return ret; 2177 } 2178 2179 /* This function checks if WLAN is the winner. 2180 */ 2181 static int 2182 mwifiex_check_winner_status(struct mwifiex_adapter *adapter) 2183 { 2184 u32 winner = 0; 2185 int ret = 0; 2186 struct pcie_service_card *card = adapter->card; 2187 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2188 2189 if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) { 2190 ret = -1; 2191 } else if (!winner) { 2192 mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n"); 2193 adapter->winner = 1; 2194 } else { 2195 mwifiex_dbg(adapter, ERROR, 2196 "PCI-E is not the winner <%#x>", winner); 2197 } 2198 2199 return ret; 2200 } 2201 2202 /* 2203 * This function reads the interrupt status from card. 2204 */ 2205 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter, 2206 int msg_id) 2207 { 2208 u32 pcie_ireg; 2209 unsigned long flags; 2210 struct pcie_service_card *card = adapter->card; 2211 2212 if (card->msi_enable) { 2213 spin_lock_irqsave(&adapter->int_lock, flags); 2214 adapter->int_status = 1; 2215 spin_unlock_irqrestore(&adapter->int_lock, flags); 2216 return; 2217 } 2218 2219 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 2220 return; 2221 2222 if (card->msix_enable && msg_id >= 0) { 2223 pcie_ireg = BIT(msg_id); 2224 } else { 2225 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2226 &pcie_ireg)) { 2227 mwifiex_dbg(adapter, ERROR, "Read register failed\n"); 2228 return; 2229 } 2230 2231 if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg) 2232 return; 2233 2234 2235 mwifiex_pcie_disable_host_int(adapter); 2236 2237 /* Clear the pending interrupts */ 2238 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS, 2239 ~pcie_ireg)) { 2240 mwifiex_dbg(adapter, ERROR, 2241 "Write register failed\n"); 2242 return; 2243 } 2244 } 2245 2246 if (!adapter->pps_uapsd_mode && 2247 adapter->ps_state == PS_STATE_SLEEP && 2248 mwifiex_pcie_ok_to_access_hw(adapter)) { 2249 /* Potentially for PCIe we could get other 2250 * interrupts like shared. Don't change power 2251 * state until cookie is set 2252 */ 2253 adapter->ps_state = PS_STATE_AWAKE; 2254 adapter->pm_wakeup_fw_try = false; 2255 del_timer(&adapter->wakeup_timer); 2256 } 2257 2258 spin_lock_irqsave(&adapter->int_lock, flags); 2259 adapter->int_status |= pcie_ireg; 2260 spin_unlock_irqrestore(&adapter->int_lock, flags); 2261 mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg); 2262 } 2263 2264 /* 2265 * Interrupt handler for PCIe root port 2266 * 2267 * This function reads the interrupt status from firmware and assigns 2268 * the main process in workqueue which will handle the interrupt. 2269 */ 2270 static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context) 2271 { 2272 struct mwifiex_msix_context *ctx = context; 2273 struct pci_dev *pdev = ctx->dev; 2274 struct pcie_service_card *card; 2275 struct mwifiex_adapter *adapter; 2276 2277 if (!pdev) { 2278 pr_err("info: %s: pdev is NULL\n", __func__); 2279 goto exit; 2280 } 2281 2282 card = pci_get_drvdata(pdev); 2283 2284 if (!card->adapter) { 2285 pr_err("info: %s: card=%p adapter=%p\n", __func__, card, 2286 card ? card->adapter : NULL); 2287 goto exit; 2288 } 2289 adapter = card->adapter; 2290 2291 if (adapter->surprise_removed) 2292 goto exit; 2293 2294 if (card->msix_enable) 2295 mwifiex_interrupt_status(adapter, ctx->msg_id); 2296 else 2297 mwifiex_interrupt_status(adapter, -1); 2298 2299 mwifiex_queue_main_work(adapter); 2300 2301 exit: 2302 return IRQ_HANDLED; 2303 } 2304 2305 /* 2306 * This function checks the current interrupt status. 2307 * 2308 * The following interrupts are checked and handled by this function - 2309 * - Data sent 2310 * - Command sent 2311 * - Command received 2312 * - Packets received 2313 * - Events received 2314 * 2315 * In case of Rx packets received, the packets are uploaded from card to 2316 * host and processed accordingly. 2317 */ 2318 static int mwifiex_process_pcie_int(struct mwifiex_adapter *adapter) 2319 { 2320 int ret; 2321 u32 pcie_ireg = 0; 2322 unsigned long flags; 2323 struct pcie_service_card *card = adapter->card; 2324 2325 spin_lock_irqsave(&adapter->int_lock, flags); 2326 if (!card->msi_enable) { 2327 /* Clear out unused interrupts */ 2328 pcie_ireg = adapter->int_status; 2329 } 2330 adapter->int_status = 0; 2331 spin_unlock_irqrestore(&adapter->int_lock, flags); 2332 2333 if (card->msi_enable) { 2334 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 2335 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2336 &pcie_ireg)) { 2337 mwifiex_dbg(adapter, ERROR, 2338 "Read register failed\n"); 2339 return -1; 2340 } 2341 2342 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) { 2343 if (mwifiex_write_reg(adapter, 2344 PCIE_HOST_INT_STATUS, 2345 ~pcie_ireg)) { 2346 mwifiex_dbg(adapter, ERROR, 2347 "Write register failed\n"); 2348 return -1; 2349 } 2350 if (!adapter->pps_uapsd_mode && 2351 adapter->ps_state == PS_STATE_SLEEP) { 2352 adapter->ps_state = PS_STATE_AWAKE; 2353 adapter->pm_wakeup_fw_try = false; 2354 del_timer(&adapter->wakeup_timer); 2355 } 2356 } 2357 } 2358 } 2359 2360 if (pcie_ireg & HOST_INTR_DNLD_DONE) { 2361 pcie_ireg &= ~HOST_INTR_DNLD_DONE; 2362 mwifiex_dbg(adapter, INTR, "info: TX DNLD Done\n"); 2363 ret = mwifiex_pcie_send_data_complete(adapter); 2364 if (ret) 2365 return ret; 2366 } 2367 if (pcie_ireg & HOST_INTR_UPLD_RDY) { 2368 pcie_ireg &= ~HOST_INTR_UPLD_RDY; 2369 mwifiex_dbg(adapter, INTR, "info: Rx DATA\n"); 2370 ret = mwifiex_pcie_process_recv_data(adapter); 2371 if (ret) 2372 return ret; 2373 } 2374 if (pcie_ireg & HOST_INTR_EVENT_RDY) { 2375 pcie_ireg &= ~HOST_INTR_EVENT_RDY; 2376 mwifiex_dbg(adapter, INTR, "info: Rx EVENT\n"); 2377 ret = mwifiex_pcie_process_event_ready(adapter); 2378 if (ret) 2379 return ret; 2380 } 2381 if (pcie_ireg & HOST_INTR_CMD_DONE) { 2382 pcie_ireg &= ~HOST_INTR_CMD_DONE; 2383 if (adapter->cmd_sent) { 2384 mwifiex_dbg(adapter, INTR, 2385 "info: CMD sent Interrupt\n"); 2386 adapter->cmd_sent = false; 2387 } 2388 /* Handle command response */ 2389 ret = mwifiex_pcie_process_cmd_complete(adapter); 2390 if (ret) 2391 return ret; 2392 } 2393 2394 mwifiex_dbg(adapter, INTR, 2395 "info: cmd_sent=%d data_sent=%d\n", 2396 adapter->cmd_sent, adapter->data_sent); 2397 if (!card->msi_enable && adapter->ps_state != PS_STATE_SLEEP) 2398 mwifiex_pcie_enable_host_int(adapter); 2399 2400 return 0; 2401 } 2402 2403 static int mwifiex_process_msix_int(struct mwifiex_adapter *adapter) 2404 { 2405 int ret; 2406 u32 pcie_ireg; 2407 unsigned long flags; 2408 2409 spin_lock_irqsave(&adapter->int_lock, flags); 2410 /* Clear out unused interrupts */ 2411 pcie_ireg = adapter->int_status; 2412 adapter->int_status = 0; 2413 spin_unlock_irqrestore(&adapter->int_lock, flags); 2414 2415 if (pcie_ireg & HOST_INTR_DNLD_DONE) { 2416 mwifiex_dbg(adapter, INTR, 2417 "info: TX DNLD Done\n"); 2418 ret = mwifiex_pcie_send_data_complete(adapter); 2419 if (ret) 2420 return ret; 2421 } 2422 if (pcie_ireg & HOST_INTR_UPLD_RDY) { 2423 mwifiex_dbg(adapter, INTR, 2424 "info: Rx DATA\n"); 2425 ret = mwifiex_pcie_process_recv_data(adapter); 2426 if (ret) 2427 return ret; 2428 } 2429 if (pcie_ireg & HOST_INTR_EVENT_RDY) { 2430 mwifiex_dbg(adapter, INTR, 2431 "info: Rx EVENT\n"); 2432 ret = mwifiex_pcie_process_event_ready(adapter); 2433 if (ret) 2434 return ret; 2435 } 2436 2437 if (pcie_ireg & HOST_INTR_CMD_DONE) { 2438 if (adapter->cmd_sent) { 2439 mwifiex_dbg(adapter, INTR, 2440 "info: CMD sent Interrupt\n"); 2441 adapter->cmd_sent = false; 2442 } 2443 /* Handle command response */ 2444 ret = mwifiex_pcie_process_cmd_complete(adapter); 2445 if (ret) 2446 return ret; 2447 } 2448 2449 mwifiex_dbg(adapter, INTR, 2450 "info: cmd_sent=%d data_sent=%d\n", 2451 adapter->cmd_sent, adapter->data_sent); 2452 2453 return 0; 2454 } 2455 2456 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter) 2457 { 2458 struct pcie_service_card *card = adapter->card; 2459 2460 if (card->msix_enable) 2461 return mwifiex_process_msix_int(adapter); 2462 else 2463 return mwifiex_process_pcie_int(adapter); 2464 } 2465 2466 /* 2467 * This function downloads data from driver to card. 2468 * 2469 * Both commands and data packets are transferred to the card by this 2470 * function. 2471 * 2472 * This function adds the PCIE specific header to the front of the buffer 2473 * before transferring. The header contains the length of the packet and 2474 * the type. The firmware handles the packets based upon this set type. 2475 */ 2476 static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type, 2477 struct sk_buff *skb, 2478 struct mwifiex_tx_param *tx_param) 2479 { 2480 if (!skb) { 2481 mwifiex_dbg(adapter, ERROR, 2482 "Passed NULL skb to %s\n", __func__); 2483 return -1; 2484 } 2485 2486 if (type == MWIFIEX_TYPE_DATA) 2487 return mwifiex_pcie_send_data(adapter, skb, tx_param); 2488 else if (type == MWIFIEX_TYPE_CMD) 2489 return mwifiex_pcie_send_cmd(adapter, skb); 2490 2491 return 0; 2492 } 2493 2494 /* Function to dump PCIE scratch registers in case of FW crash 2495 */ 2496 static int 2497 mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf) 2498 { 2499 char *p = drv_buf; 2500 char buf[256], *ptr; 2501 int i; 2502 u32 value; 2503 struct pcie_service_card *card = adapter->card; 2504 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2505 int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG, 2506 PCIE_SCRATCH_13_REG, 2507 PCIE_SCRATCH_14_REG}; 2508 2509 if (!p) 2510 return 0; 2511 2512 mwifiex_dbg(adapter, MSG, "PCIE register dump start\n"); 2513 2514 if (mwifiex_read_reg(adapter, reg->fw_status, &value)) { 2515 mwifiex_dbg(adapter, ERROR, "failed to read firmware status"); 2516 return 0; 2517 } 2518 2519 ptr = buf; 2520 mwifiex_dbg(adapter, MSG, "pcie scratch register:"); 2521 for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) { 2522 mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value); 2523 ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n", 2524 pcie_scratch_reg[i], value); 2525 } 2526 2527 mwifiex_dbg(adapter, MSG, "%s\n", buf); 2528 p += sprintf(p, "%s\n", buf); 2529 2530 mwifiex_dbg(adapter, MSG, "PCIE register dump end\n"); 2531 2532 return p - drv_buf; 2533 } 2534 2535 /* This function read/write firmware */ 2536 static enum rdwr_status 2537 mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag) 2538 { 2539 int ret, tries; 2540 u8 ctrl_data; 2541 u32 fw_status; 2542 struct pcie_service_card *card = adapter->card; 2543 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2544 2545 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) 2546 return RDWR_STATUS_FAILURE; 2547 2548 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2549 reg->fw_dump_host_ready); 2550 if (ret) { 2551 mwifiex_dbg(adapter, ERROR, 2552 "PCIE write err\n"); 2553 return RDWR_STATUS_FAILURE; 2554 } 2555 2556 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2557 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data); 2558 if (ctrl_data == FW_DUMP_DONE) 2559 return RDWR_STATUS_SUCCESS; 2560 if (doneflag && ctrl_data == doneflag) 2561 return RDWR_STATUS_DONE; 2562 if (ctrl_data != reg->fw_dump_host_ready) { 2563 mwifiex_dbg(adapter, WARN, 2564 "The ctrl reg was changed, re-try again!\n"); 2565 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2566 reg->fw_dump_host_ready); 2567 if (ret) { 2568 mwifiex_dbg(adapter, ERROR, 2569 "PCIE write err\n"); 2570 return RDWR_STATUS_FAILURE; 2571 } 2572 } 2573 usleep_range(100, 200); 2574 } 2575 2576 mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n"); 2577 return RDWR_STATUS_FAILURE; 2578 } 2579 2580 /* This function dump firmware memory to file */ 2581 static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter) 2582 { 2583 struct pcie_service_card *card = adapter->card; 2584 const struct mwifiex_pcie_card_reg *creg = card->pcie.reg; 2585 unsigned int reg, reg_start, reg_end; 2586 u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num; 2587 u8 idx, i, read_reg, doneflag = 0; 2588 enum rdwr_status stat; 2589 u32 memory_size; 2590 int ret; 2591 2592 if (!card->pcie.can_dump_fw) 2593 return; 2594 2595 for (idx = 0; idx < adapter->num_mem_types; idx++) { 2596 struct memory_type_mapping *entry = 2597 &adapter->mem_type_mapping_tbl[idx]; 2598 2599 if (entry->mem_ptr) { 2600 vfree(entry->mem_ptr); 2601 entry->mem_ptr = NULL; 2602 } 2603 entry->mem_size = 0; 2604 } 2605 2606 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n"); 2607 2608 /* Read the number of the memories which will dump */ 2609 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2610 if (stat == RDWR_STATUS_FAILURE) 2611 return; 2612 2613 reg = creg->fw_dump_start; 2614 mwifiex_read_reg_byte(adapter, reg, &fw_dump_num); 2615 2616 /* W8997 chipset firmware dump will be restore in single region*/ 2617 if (fw_dump_num == 0) 2618 dump_num = 1; 2619 else 2620 dump_num = fw_dump_num; 2621 2622 /* Read the length of every memory which will dump */ 2623 for (idx = 0; idx < dump_num; idx++) { 2624 struct memory_type_mapping *entry = 2625 &adapter->mem_type_mapping_tbl[idx]; 2626 memory_size = 0; 2627 if (fw_dump_num != 0) { 2628 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2629 if (stat == RDWR_STATUS_FAILURE) 2630 return; 2631 2632 reg = creg->fw_dump_start; 2633 for (i = 0; i < 4; i++) { 2634 mwifiex_read_reg_byte(adapter, reg, &read_reg); 2635 memory_size |= (read_reg << (i * 8)); 2636 reg++; 2637 } 2638 } else { 2639 memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE; 2640 } 2641 2642 if (memory_size == 0) { 2643 mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n"); 2644 ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl, 2645 creg->fw_dump_read_done); 2646 if (ret) { 2647 mwifiex_dbg(adapter, ERROR, "PCIE write err\n"); 2648 return; 2649 } 2650 break; 2651 } 2652 2653 mwifiex_dbg(adapter, DUMP, 2654 "%s_SIZE=0x%x\n", entry->mem_name, memory_size); 2655 entry->mem_ptr = vmalloc(memory_size + 1); 2656 entry->mem_size = memory_size; 2657 if (!entry->mem_ptr) { 2658 mwifiex_dbg(adapter, ERROR, 2659 "Vmalloc %s failed\n", entry->mem_name); 2660 return; 2661 } 2662 dbg_ptr = entry->mem_ptr; 2663 end_ptr = dbg_ptr + memory_size; 2664 2665 doneflag = entry->done_flag; 2666 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n", 2667 entry->mem_name); 2668 2669 do { 2670 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2671 if (RDWR_STATUS_FAILURE == stat) 2672 return; 2673 2674 reg_start = creg->fw_dump_start; 2675 reg_end = creg->fw_dump_end; 2676 for (reg = reg_start; reg <= reg_end; reg++) { 2677 mwifiex_read_reg_byte(adapter, reg, dbg_ptr); 2678 if (dbg_ptr < end_ptr) { 2679 dbg_ptr++; 2680 continue; 2681 } 2682 mwifiex_dbg(adapter, ERROR, 2683 "pre-allocated buf not enough\n"); 2684 tmp_ptr = 2685 vzalloc(memory_size + MWIFIEX_SIZE_4K); 2686 if (!tmp_ptr) 2687 return; 2688 memcpy(tmp_ptr, entry->mem_ptr, memory_size); 2689 vfree(entry->mem_ptr); 2690 entry->mem_ptr = tmp_ptr; 2691 tmp_ptr = NULL; 2692 dbg_ptr = entry->mem_ptr + memory_size; 2693 memory_size += MWIFIEX_SIZE_4K; 2694 end_ptr = entry->mem_ptr + memory_size; 2695 } 2696 2697 if (stat != RDWR_STATUS_DONE) 2698 continue; 2699 2700 mwifiex_dbg(adapter, DUMP, 2701 "%s done: size=0x%tx\n", 2702 entry->mem_name, dbg_ptr - entry->mem_ptr); 2703 break; 2704 } while (true); 2705 } 2706 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n"); 2707 } 2708 2709 static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter) 2710 { 2711 int drv_info_size; 2712 void *drv_info; 2713 2714 drv_info_size = mwifiex_drv_info_dump(adapter, &drv_info); 2715 mwifiex_pcie_fw_dump(adapter); 2716 mwifiex_upload_device_dump(adapter, drv_info, drv_info_size); 2717 } 2718 2719 static void mwifiex_pcie_work(struct work_struct *work) 2720 { 2721 struct pcie_service_card *card = 2722 container_of(work, struct pcie_service_card, work); 2723 2724 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 2725 &card->work_flags)) 2726 mwifiex_pcie_device_dump_work(card->adapter); 2727 } 2728 2729 /* This function dumps FW information */ 2730 static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter) 2731 { 2732 struct pcie_service_card *card = adapter->card; 2733 2734 if (test_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags)) 2735 return; 2736 2737 set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags); 2738 2739 schedule_work(&card->work); 2740 } 2741 2742 static void mwifiex_pcie_free_buffers(struct mwifiex_adapter *adapter) 2743 { 2744 struct pcie_service_card *card = adapter->card; 2745 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2746 2747 if (reg->sleep_cookie) 2748 mwifiex_pcie_delete_sleep_cookie_buf(adapter); 2749 2750 mwifiex_pcie_delete_cmdrsp_buf(adapter); 2751 mwifiex_pcie_delete_evtbd_ring(adapter); 2752 mwifiex_pcie_delete_rxbd_ring(adapter); 2753 mwifiex_pcie_delete_txbd_ring(adapter); 2754 card->cmdrsp_buf = NULL; 2755 } 2756 2757 /* 2758 * This function initializes the PCI-E host memory space, WCB rings, etc. 2759 * 2760 * The following initializations steps are followed - 2761 * - Allocate TXBD ring buffers 2762 * - Allocate RXBD ring buffers 2763 * - Allocate event BD ring buffers 2764 * - Allocate command response ring buffer 2765 * - Allocate sleep cookie buffer 2766 */ 2767 static int mwifiex_init_pcie(struct mwifiex_adapter *adapter) 2768 { 2769 struct pcie_service_card *card = adapter->card; 2770 int ret; 2771 struct pci_dev *pdev = card->dev; 2772 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2773 2774 pci_set_drvdata(pdev, card); 2775 2776 ret = pci_enable_device(pdev); 2777 if (ret) 2778 goto err_enable_dev; 2779 2780 pci_set_master(pdev); 2781 2782 pr_notice("try set_consistent_dma_mask(32)\n"); 2783 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2784 if (ret) { 2785 pr_err("set_dma_mask(32) failed\n"); 2786 goto err_set_dma_mask; 2787 } 2788 2789 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 2790 if (ret) { 2791 pr_err("set_consistent_dma_mask(64) failed\n"); 2792 goto err_set_dma_mask; 2793 } 2794 2795 ret = pci_request_region(pdev, 0, DRV_NAME); 2796 if (ret) { 2797 pr_err("req_reg(0) error\n"); 2798 goto err_req_region0; 2799 } 2800 card->pci_mmap = pci_iomap(pdev, 0, 0); 2801 if (!card->pci_mmap) { 2802 pr_err("iomap(0) error\n"); 2803 ret = -EIO; 2804 goto err_iomap0; 2805 } 2806 ret = pci_request_region(pdev, 2, DRV_NAME); 2807 if (ret) { 2808 pr_err("req_reg(2) error\n"); 2809 goto err_req_region2; 2810 } 2811 card->pci_mmap1 = pci_iomap(pdev, 2, 0); 2812 if (!card->pci_mmap1) { 2813 pr_err("iomap(2) error\n"); 2814 ret = -EIO; 2815 goto err_iomap2; 2816 } 2817 2818 pr_notice("PCI memory map Virt0: %p PCI memory map Virt2: %p\n", 2819 card->pci_mmap, card->pci_mmap1); 2820 2821 card->cmdrsp_buf = NULL; 2822 ret = mwifiex_pcie_create_txbd_ring(adapter); 2823 if (ret) 2824 goto err_cre_txbd; 2825 ret = mwifiex_pcie_create_rxbd_ring(adapter); 2826 if (ret) 2827 goto err_cre_rxbd; 2828 ret = mwifiex_pcie_create_evtbd_ring(adapter); 2829 if (ret) 2830 goto err_cre_evtbd; 2831 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter); 2832 if (ret) 2833 goto err_alloc_cmdbuf; 2834 if (reg->sleep_cookie) { 2835 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter); 2836 if (ret) 2837 goto err_alloc_cookie; 2838 } else { 2839 card->sleep_cookie_vbase = NULL; 2840 } 2841 return ret; 2842 2843 err_alloc_cookie: 2844 mwifiex_pcie_delete_cmdrsp_buf(adapter); 2845 err_alloc_cmdbuf: 2846 mwifiex_pcie_delete_evtbd_ring(adapter); 2847 err_cre_evtbd: 2848 mwifiex_pcie_delete_rxbd_ring(adapter); 2849 err_cre_rxbd: 2850 mwifiex_pcie_delete_txbd_ring(adapter); 2851 err_cre_txbd: 2852 pci_iounmap(pdev, card->pci_mmap1); 2853 err_iomap2: 2854 pci_release_region(pdev, 2); 2855 err_req_region2: 2856 pci_iounmap(pdev, card->pci_mmap); 2857 err_iomap0: 2858 pci_release_region(pdev, 0); 2859 err_req_region0: 2860 err_set_dma_mask: 2861 pci_disable_device(pdev); 2862 err_enable_dev: 2863 return ret; 2864 } 2865 2866 /* 2867 * This function cleans up the allocated card buffers. 2868 */ 2869 static void mwifiex_cleanup_pcie(struct mwifiex_adapter *adapter) 2870 { 2871 struct pcie_service_card *card = adapter->card; 2872 struct pci_dev *pdev = card->dev; 2873 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2874 int ret; 2875 u32 fw_status; 2876 2877 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status); 2878 if (fw_status == FIRMWARE_READY_PCIE) { 2879 mwifiex_dbg(adapter, INFO, 2880 "Clearing driver ready signature\n"); 2881 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 2882 mwifiex_dbg(adapter, ERROR, 2883 "Failed to write driver not-ready signature\n"); 2884 } 2885 2886 mwifiex_pcie_free_buffers(adapter); 2887 2888 if (pdev) { 2889 pci_iounmap(pdev, card->pci_mmap); 2890 pci_iounmap(pdev, card->pci_mmap1); 2891 pci_disable_device(pdev); 2892 pci_release_region(pdev, 2); 2893 pci_release_region(pdev, 0); 2894 } 2895 } 2896 2897 static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter) 2898 { 2899 int ret, i, j; 2900 struct pcie_service_card *card = adapter->card; 2901 struct pci_dev *pdev = card->dev; 2902 2903 if (card->pcie.reg->msix_support) { 2904 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 2905 card->msix_entries[i].entry = i; 2906 ret = pci_enable_msix_exact(pdev, card->msix_entries, 2907 MWIFIEX_NUM_MSIX_VECTORS); 2908 if (!ret) { 2909 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) { 2910 card->msix_ctx[i].dev = pdev; 2911 card->msix_ctx[i].msg_id = i; 2912 2913 ret = request_irq(card->msix_entries[i].vector, 2914 mwifiex_pcie_interrupt, 0, 2915 "MWIFIEX_PCIE_MSIX", 2916 &card->msix_ctx[i]); 2917 if (ret) 2918 break; 2919 } 2920 2921 if (ret) { 2922 mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n", 2923 ret); 2924 for (j = 0; j < i; j++) 2925 free_irq(card->msix_entries[j].vector, 2926 &card->msix_ctx[i]); 2927 pci_disable_msix(pdev); 2928 } else { 2929 mwifiex_dbg(adapter, MSG, "MSIx enabled!"); 2930 card->msix_enable = 1; 2931 return 0; 2932 } 2933 } 2934 } 2935 2936 if (pci_enable_msi(pdev) != 0) 2937 pci_disable_msi(pdev); 2938 else 2939 card->msi_enable = 1; 2940 2941 mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable); 2942 2943 card->share_irq_ctx.dev = pdev; 2944 card->share_irq_ctx.msg_id = -1; 2945 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED, 2946 "MRVL_PCIE", &card->share_irq_ctx); 2947 if (ret) { 2948 pr_err("request_irq failed: ret=%d\n", ret); 2949 return -1; 2950 } 2951 2952 return 0; 2953 } 2954 2955 /* 2956 * This function gets the firmware name for downloading by revision id 2957 * 2958 * Read revision id register to get revision id 2959 */ 2960 static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter) 2961 { 2962 int revision_id = 0; 2963 int version, magic; 2964 struct pcie_service_card *card = adapter->card; 2965 2966 switch (card->dev->device) { 2967 case PCIE_DEVICE_ID_MARVELL_88W8766P: 2968 strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME); 2969 break; 2970 case PCIE_DEVICE_ID_MARVELL_88W8897: 2971 mwifiex_write_reg(adapter, 0x0c58, 0x80c00000); 2972 mwifiex_read_reg(adapter, 0x0c58, &revision_id); 2973 revision_id &= 0xff00; 2974 switch (revision_id) { 2975 case PCIE8897_A0: 2976 strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME); 2977 break; 2978 case PCIE8897_B0: 2979 strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME); 2980 break; 2981 default: 2982 strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME); 2983 2984 break; 2985 } 2986 break; 2987 case PCIE_DEVICE_ID_MARVELL_88W8997: 2988 mwifiex_read_reg(adapter, 0x8, &revision_id); 2989 mwifiex_read_reg(adapter, 0x0cd0, &version); 2990 mwifiex_read_reg(adapter, 0x0cd4, &magic); 2991 revision_id &= 0xff; 2992 version &= 0x7; 2993 magic &= 0xff; 2994 if (revision_id == PCIE8997_A1 && 2995 magic == CHIP_MAGIC_VALUE && 2996 version == CHIP_VER_PCIEUART) 2997 strcpy(adapter->fw_name, PCIEUART8997_FW_NAME_V4); 2998 else 2999 strcpy(adapter->fw_name, PCIEUSB8997_FW_NAME_V4); 3000 break; 3001 default: 3002 break; 3003 } 3004 } 3005 3006 /* 3007 * This function registers the PCIE device. 3008 * 3009 * PCIE IRQ is claimed, block size is set and driver data is initialized. 3010 */ 3011 static int mwifiex_register_dev(struct mwifiex_adapter *adapter) 3012 { 3013 struct pcie_service_card *card = adapter->card; 3014 3015 /* save adapter pointer in card */ 3016 card->adapter = adapter; 3017 3018 if (mwifiex_pcie_request_irq(adapter)) 3019 return -1; 3020 3021 adapter->tx_buf_size = card->pcie.tx_buf_size; 3022 adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl; 3023 adapter->num_mem_types = card->pcie.num_mem_types; 3024 adapter->ext_scan = card->pcie.can_ext_scan; 3025 mwifiex_pcie_get_fw_name(adapter); 3026 3027 return 0; 3028 } 3029 3030 /* 3031 * This function unregisters the PCIE device. 3032 * 3033 * The PCIE IRQ is released, the function is disabled and driver 3034 * data is set to null. 3035 */ 3036 static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter) 3037 { 3038 struct pcie_service_card *card = adapter->card; 3039 struct pci_dev *pdev = card->dev; 3040 int i; 3041 3042 if (card->msix_enable) { 3043 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3044 synchronize_irq(card->msix_entries[i].vector); 3045 3046 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3047 free_irq(card->msix_entries[i].vector, 3048 &card->msix_ctx[i]); 3049 3050 card->msix_enable = 0; 3051 pci_disable_msix(pdev); 3052 } else { 3053 mwifiex_dbg(adapter, INFO, 3054 "%s(): calling free_irq()\n", __func__); 3055 free_irq(card->dev->irq, &card->share_irq_ctx); 3056 3057 if (card->msi_enable) 3058 pci_disable_msi(pdev); 3059 } 3060 card->adapter = NULL; 3061 } 3062 3063 /* This function initializes the PCI-E host memory space, WCB rings, etc. 3064 * 3065 * The following initializations steps are followed - 3066 * - Allocate TXBD ring buffers 3067 * - Allocate RXBD ring buffers 3068 * - Allocate event BD ring buffers 3069 * - Allocate command response ring buffer 3070 * - Allocate sleep cookie buffer 3071 * Part of mwifiex_init_pcie(), not reset the PCIE registers 3072 */ 3073 static void mwifiex_pcie_up_dev(struct mwifiex_adapter *adapter) 3074 { 3075 struct pcie_service_card *card = adapter->card; 3076 int ret; 3077 struct pci_dev *pdev = card->dev; 3078 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 3079 3080 /* Bluetooth is not on pcie interface. Download Wifi only firmware 3081 * during pcie FLR, so that bluetooth part of firmware which is 3082 * already running doesn't get affected. 3083 */ 3084 strcpy(adapter->fw_name, PCIE8997_DEFAULT_WIFIFW_NAME); 3085 3086 /* tx_buf_size might be changed to 3584 by firmware during 3087 * data transfer, we should reset it to default size. 3088 */ 3089 adapter->tx_buf_size = card->pcie.tx_buf_size; 3090 3091 card->cmdrsp_buf = NULL; 3092 ret = mwifiex_pcie_create_txbd_ring(adapter); 3093 if (ret) { 3094 mwifiex_dbg(adapter, ERROR, "Failed to create txbd ring\n"); 3095 goto err_cre_txbd; 3096 } 3097 3098 ret = mwifiex_pcie_create_rxbd_ring(adapter); 3099 if (ret) { 3100 mwifiex_dbg(adapter, ERROR, "Failed to create rxbd ring\n"); 3101 goto err_cre_rxbd; 3102 } 3103 3104 ret = mwifiex_pcie_create_evtbd_ring(adapter); 3105 if (ret) { 3106 mwifiex_dbg(adapter, ERROR, "Failed to create evtbd ring\n"); 3107 goto err_cre_evtbd; 3108 } 3109 3110 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter); 3111 if (ret) { 3112 mwifiex_dbg(adapter, ERROR, "Failed to allocate cmdbuf buffer\n"); 3113 goto err_alloc_cmdbuf; 3114 } 3115 3116 if (reg->sleep_cookie) { 3117 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter); 3118 if (ret) { 3119 mwifiex_dbg(adapter, ERROR, "Failed to allocate sleep_cookie buffer\n"); 3120 goto err_alloc_cookie; 3121 } 3122 } else { 3123 card->sleep_cookie_vbase = NULL; 3124 } 3125 return; 3126 3127 err_alloc_cookie: 3128 mwifiex_pcie_delete_cmdrsp_buf(adapter); 3129 err_alloc_cmdbuf: 3130 mwifiex_pcie_delete_evtbd_ring(adapter); 3131 err_cre_evtbd: 3132 mwifiex_pcie_delete_rxbd_ring(adapter); 3133 err_cre_rxbd: 3134 mwifiex_pcie_delete_txbd_ring(adapter); 3135 err_cre_txbd: 3136 pci_iounmap(pdev, card->pci_mmap1); 3137 } 3138 3139 /* This function cleans up the PCI-E host memory space. */ 3140 static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter) 3141 { 3142 struct pcie_service_card *card = adapter->card; 3143 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 3144 3145 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 3146 mwifiex_dbg(adapter, ERROR, "Failed to write driver not-ready signature\n"); 3147 3148 adapter->seq_num = 0; 3149 3150 mwifiex_pcie_free_buffers(adapter); 3151 } 3152 3153 static struct mwifiex_if_ops pcie_ops = { 3154 .init_if = mwifiex_init_pcie, 3155 .cleanup_if = mwifiex_cleanup_pcie, 3156 .check_fw_status = mwifiex_check_fw_status, 3157 .check_winner_status = mwifiex_check_winner_status, 3158 .prog_fw = mwifiex_prog_fw_w_helper, 3159 .register_dev = mwifiex_register_dev, 3160 .unregister_dev = mwifiex_unregister_dev, 3161 .enable_int = mwifiex_pcie_enable_host_int, 3162 .disable_int = mwifiex_pcie_disable_host_int_noerr, 3163 .process_int_status = mwifiex_process_int_status, 3164 .host_to_card = mwifiex_pcie_host_to_card, 3165 .wakeup = mwifiex_pm_wakeup_card, 3166 .wakeup_complete = mwifiex_pm_wakeup_card_complete, 3167 3168 /* PCIE specific */ 3169 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete, 3170 .event_complete = mwifiex_pcie_event_complete, 3171 .update_mp_end_port = NULL, 3172 .cleanup_mpa_buf = NULL, 3173 .init_fw_port = mwifiex_pcie_init_fw_port, 3174 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf, 3175 .reg_dump = mwifiex_pcie_reg_dump, 3176 .device_dump = mwifiex_pcie_device_dump, 3177 .down_dev = mwifiex_pcie_down_dev, 3178 .up_dev = mwifiex_pcie_up_dev, 3179 }; 3180 3181 module_pci_driver(mwifiex_pcie); 3182 3183 MODULE_AUTHOR("Marvell International Ltd."); 3184 MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION); 3185 MODULE_VERSION(PCIE_VERSION); 3186 MODULE_LICENSE("GPL v2"); 3187