1 /* 2 * Marvell Wireless LAN device driver: PCIE specific handling 3 * 4 * Copyright (C) 2011-2014, Marvell International Ltd. 5 * 6 * This software file (the "File") is distributed by Marvell International 7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991 8 * (the "License"). You may use, redistribute and/or modify this File in 9 * accordance with the terms and conditions of the License, a copy of which 10 * is available by writing to the Free Software Foundation, Inc., 11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the 12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. 13 * 14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about 17 * this warranty disclaimer. 18 */ 19 20 #include <linux/firmware.h> 21 22 #include "decl.h" 23 #include "ioctl.h" 24 #include "util.h" 25 #include "fw.h" 26 #include "main.h" 27 #include "wmm.h" 28 #include "11n.h" 29 #include "pcie.h" 30 31 #define PCIE_VERSION "1.0" 32 #define DRV_NAME "Marvell mwifiex PCIe" 33 34 static struct mwifiex_if_ops pcie_ops; 35 36 static const struct of_device_id mwifiex_pcie_of_match_table[] = { 37 { .compatible = "pci11ab,2b42" }, 38 { .compatible = "pci1b4b,2b42" }, 39 { } 40 }; 41 42 static int mwifiex_pcie_probe_of(struct device *dev) 43 { 44 if (!of_match_node(mwifiex_pcie_of_match_table, dev->of_node)) { 45 dev_err(dev, "required compatible string missing\n"); 46 return -EINVAL; 47 } 48 49 return 0; 50 } 51 52 static void mwifiex_pcie_work(struct work_struct *work); 53 54 static int 55 mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb, 56 size_t size, int flags) 57 { 58 struct pcie_service_card *card = adapter->card; 59 struct mwifiex_dma_mapping mapping; 60 61 mapping.addr = pci_map_single(card->dev, skb->data, size, flags); 62 if (pci_dma_mapping_error(card->dev, mapping.addr)) { 63 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n"); 64 return -1; 65 } 66 mapping.len = size; 67 mwifiex_store_mapping(skb, &mapping); 68 return 0; 69 } 70 71 static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter, 72 struct sk_buff *skb, int flags) 73 { 74 struct pcie_service_card *card = adapter->card; 75 struct mwifiex_dma_mapping mapping; 76 77 mwifiex_get_mapping(skb, &mapping); 78 pci_unmap_single(card->dev, mapping.addr, mapping.len, flags); 79 } 80 81 /* 82 * This function writes data into PCIE card register. 83 */ 84 static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data) 85 { 86 struct pcie_service_card *card = adapter->card; 87 88 iowrite32(data, card->pci_mmap1 + reg); 89 90 return 0; 91 } 92 93 /* This function reads data from PCIE card register. 94 */ 95 static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data) 96 { 97 struct pcie_service_card *card = adapter->card; 98 99 *data = ioread32(card->pci_mmap1 + reg); 100 if (*data == 0xffffffff) 101 return 0xffffffff; 102 103 return 0; 104 } 105 106 /* This function reads u8 data from PCIE card register. */ 107 static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter, 108 int reg, u8 *data) 109 { 110 struct pcie_service_card *card = adapter->card; 111 112 *data = ioread8(card->pci_mmap1 + reg); 113 114 return 0; 115 } 116 117 /* 118 * This function reads sleep cookie and checks if FW is ready 119 */ 120 static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter) 121 { 122 u32 cookie_value; 123 struct pcie_service_card *card = adapter->card; 124 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 125 126 if (!reg->sleep_cookie) 127 return true; 128 129 if (card->sleep_cookie_vbase) { 130 cookie_value = get_unaligned_le32(card->sleep_cookie_vbase); 131 mwifiex_dbg(adapter, INFO, 132 "info: ACCESS_HW: sleep cookie=0x%x\n", 133 cookie_value); 134 if (cookie_value == FW_AWAKE_COOKIE) 135 return true; 136 } 137 138 return false; 139 } 140 141 #ifdef CONFIG_PM_SLEEP 142 /* 143 * Kernel needs to suspend all functions separately. Therefore all 144 * registered functions must have drivers with suspend and resume 145 * methods. Failing that the kernel simply removes the whole card. 146 * 147 * If already not suspended, this function allocates and sends a host 148 * sleep activate request to the firmware and turns off the traffic. 149 */ 150 static int mwifiex_pcie_suspend(struct device *dev) 151 { 152 struct mwifiex_adapter *adapter; 153 struct pcie_service_card *card; 154 struct pci_dev *pdev = to_pci_dev(dev); 155 156 card = pci_get_drvdata(pdev); 157 158 /* Might still be loading firmware */ 159 wait_for_completion(&card->fw_done); 160 161 adapter = card->adapter; 162 if (!adapter) { 163 dev_err(dev, "adapter is not valid\n"); 164 return 0; 165 } 166 167 mwifiex_enable_wake(adapter); 168 169 /* Enable the Host Sleep */ 170 if (!mwifiex_enable_hs(adapter)) { 171 mwifiex_dbg(adapter, ERROR, 172 "cmd: failed to suspend\n"); 173 adapter->hs_enabling = false; 174 mwifiex_disable_wake(adapter); 175 return -EFAULT; 176 } 177 178 flush_workqueue(adapter->workqueue); 179 180 /* Indicate device suspended */ 181 adapter->is_suspended = true; 182 adapter->hs_enabling = false; 183 184 return 0; 185 } 186 187 /* 188 * Kernel needs to suspend all functions separately. Therefore all 189 * registered functions must have drivers with suspend and resume 190 * methods. Failing that the kernel simply removes the whole card. 191 * 192 * If already not resumed, this function turns on the traffic and 193 * sends a host sleep cancel request to the firmware. 194 */ 195 static int mwifiex_pcie_resume(struct device *dev) 196 { 197 struct mwifiex_adapter *adapter; 198 struct pcie_service_card *card; 199 struct pci_dev *pdev = to_pci_dev(dev); 200 201 card = pci_get_drvdata(pdev); 202 203 if (!card->adapter) { 204 dev_err(dev, "adapter structure is not valid\n"); 205 return 0; 206 } 207 208 adapter = card->adapter; 209 210 if (!adapter->is_suspended) { 211 mwifiex_dbg(adapter, WARN, 212 "Device already resumed\n"); 213 return 0; 214 } 215 216 adapter->is_suspended = false; 217 218 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA), 219 MWIFIEX_ASYNC_CMD); 220 mwifiex_disable_wake(adapter); 221 222 return 0; 223 } 224 #endif 225 226 /* 227 * This function probes an mwifiex device and registers it. It allocates 228 * the card structure, enables PCIE function number and initiates the 229 * device registration and initialization procedure by adding a logical 230 * interface. 231 */ 232 static int mwifiex_pcie_probe(struct pci_dev *pdev, 233 const struct pci_device_id *ent) 234 { 235 struct pcie_service_card *card; 236 int ret; 237 238 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n", 239 pdev->vendor, pdev->device, pdev->revision); 240 241 card = devm_kzalloc(&pdev->dev, sizeof(*card), GFP_KERNEL); 242 if (!card) 243 return -ENOMEM; 244 245 init_completion(&card->fw_done); 246 247 card->dev = pdev; 248 249 if (ent->driver_data) { 250 struct mwifiex_pcie_device *data = (void *)ent->driver_data; 251 card->pcie.reg = data->reg; 252 card->pcie.blksz_fw_dl = data->blksz_fw_dl; 253 card->pcie.tx_buf_size = data->tx_buf_size; 254 card->pcie.can_dump_fw = data->can_dump_fw; 255 card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl; 256 card->pcie.num_mem_types = data->num_mem_types; 257 card->pcie.can_ext_scan = data->can_ext_scan; 258 INIT_WORK(&card->work, mwifiex_pcie_work); 259 } 260 261 /* device tree node parsing and platform specific configuration*/ 262 if (pdev->dev.of_node) { 263 ret = mwifiex_pcie_probe_of(&pdev->dev); 264 if (ret) 265 return ret; 266 } 267 268 if (mwifiex_add_card(card, &card->fw_done, &pcie_ops, 269 MWIFIEX_PCIE, &pdev->dev)) { 270 pr_err("%s failed\n", __func__); 271 return -1; 272 } 273 274 return 0; 275 } 276 277 /* 278 * This function removes the interface and frees up the card structure. 279 */ 280 static void mwifiex_pcie_remove(struct pci_dev *pdev) 281 { 282 struct pcie_service_card *card; 283 struct mwifiex_adapter *adapter; 284 struct mwifiex_private *priv; 285 const struct mwifiex_pcie_card_reg *reg; 286 u32 fw_status; 287 int ret; 288 289 card = pci_get_drvdata(pdev); 290 291 wait_for_completion(&card->fw_done); 292 293 adapter = card->adapter; 294 if (!adapter || !adapter->priv_num) 295 return; 296 297 reg = card->pcie.reg; 298 if (reg) 299 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status); 300 else 301 fw_status = -1; 302 303 if (fw_status == FIRMWARE_READY_PCIE && !adapter->mfg_mode) { 304 mwifiex_deauthenticate_all(adapter); 305 306 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 307 308 mwifiex_disable_auto_ds(priv); 309 310 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN); 311 } 312 313 mwifiex_remove_card(adapter); 314 } 315 316 static void mwifiex_pcie_shutdown(struct pci_dev *pdev) 317 { 318 mwifiex_pcie_remove(pdev); 319 320 return; 321 } 322 323 static const struct pci_device_id mwifiex_ids[] = { 324 { 325 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P, 326 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 327 .driver_data = (unsigned long)&mwifiex_pcie8766, 328 }, 329 { 330 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897, 331 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 332 .driver_data = (unsigned long)&mwifiex_pcie8897, 333 }, 334 { 335 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 336 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 337 .driver_data = (unsigned long)&mwifiex_pcie8997, 338 }, 339 { 340 PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 341 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 342 .driver_data = (unsigned long)&mwifiex_pcie8997, 343 }, 344 {}, 345 }; 346 347 MODULE_DEVICE_TABLE(pci, mwifiex_ids); 348 349 /* 350 * Cleanup all software without cleaning anything related to PCIe and HW. 351 */ 352 static void mwifiex_pcie_reset_prepare(struct pci_dev *pdev) 353 { 354 struct pcie_service_card *card = pci_get_drvdata(pdev); 355 struct mwifiex_adapter *adapter = card->adapter; 356 357 if (!adapter) { 358 dev_err(&pdev->dev, "%s: adapter structure is not valid\n", 359 __func__); 360 return; 361 } 362 363 mwifiex_dbg(adapter, INFO, 364 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Pre-FLR\n", 365 __func__, pdev->vendor, pdev->device, pdev->revision); 366 367 mwifiex_shutdown_sw(adapter); 368 clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags); 369 clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags); 370 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__); 371 } 372 373 /* 374 * Kernel stores and restores PCIe function context before and after performing 375 * FLR respectively. Reconfigure the software and firmware including firmware 376 * redownload. 377 */ 378 static void mwifiex_pcie_reset_done(struct pci_dev *pdev) 379 { 380 struct pcie_service_card *card = pci_get_drvdata(pdev); 381 struct mwifiex_adapter *adapter = card->adapter; 382 int ret; 383 384 if (!adapter) { 385 dev_err(&pdev->dev, "%s: adapter structure is not valid\n", 386 __func__); 387 return; 388 } 389 390 mwifiex_dbg(adapter, INFO, 391 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Post-FLR\n", 392 __func__, pdev->vendor, pdev->device, pdev->revision); 393 394 ret = mwifiex_reinit_sw(adapter); 395 if (ret) 396 dev_err(&pdev->dev, "reinit failed: %d\n", ret); 397 else 398 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__); 399 } 400 401 static const struct pci_error_handlers mwifiex_pcie_err_handler = { 402 .reset_prepare = mwifiex_pcie_reset_prepare, 403 .reset_done = mwifiex_pcie_reset_done, 404 }; 405 406 #ifdef CONFIG_PM_SLEEP 407 /* Power Management Hooks */ 408 static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend, 409 mwifiex_pcie_resume); 410 #endif 411 412 /* PCI Device Driver */ 413 static struct pci_driver __refdata mwifiex_pcie = { 414 .name = "mwifiex_pcie", 415 .id_table = mwifiex_ids, 416 .probe = mwifiex_pcie_probe, 417 .remove = mwifiex_pcie_remove, 418 #ifdef CONFIG_PM_SLEEP 419 .driver = { 420 .pm = &mwifiex_pcie_pm_ops, 421 }, 422 #endif 423 .shutdown = mwifiex_pcie_shutdown, 424 .err_handler = &mwifiex_pcie_err_handler, 425 }; 426 427 /* 428 * This function adds delay loop to ensure FW is awake before proceeding. 429 */ 430 static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter) 431 { 432 int i = 0; 433 434 while (mwifiex_pcie_ok_to_access_hw(adapter)) { 435 i++; 436 usleep_range(10, 20); 437 /* 50ms max wait */ 438 if (i == 5000) 439 break; 440 } 441 442 return; 443 } 444 445 static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter, 446 u32 max_delay_loop_cnt) 447 { 448 struct pcie_service_card *card = adapter->card; 449 u8 *buffer; 450 u32 sleep_cookie, count; 451 struct sk_buff *cmdrsp = card->cmdrsp_buf; 452 453 for (count = 0; count < max_delay_loop_cnt; count++) { 454 pci_dma_sync_single_for_cpu(card->dev, 455 MWIFIEX_SKB_DMA_ADDR(cmdrsp), 456 sizeof(sleep_cookie), 457 PCI_DMA_FROMDEVICE); 458 buffer = cmdrsp->data; 459 sleep_cookie = get_unaligned_le32(buffer); 460 461 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) { 462 mwifiex_dbg(adapter, INFO, 463 "sleep cookie found at count %d\n", count); 464 break; 465 } 466 pci_dma_sync_single_for_device(card->dev, 467 MWIFIEX_SKB_DMA_ADDR(cmdrsp), 468 sizeof(sleep_cookie), 469 PCI_DMA_FROMDEVICE); 470 usleep_range(20, 30); 471 } 472 473 if (count >= max_delay_loop_cnt) 474 mwifiex_dbg(adapter, INFO, 475 "max count reached while accessing sleep cookie\n"); 476 } 477 478 /* This function wakes up the card by reading fw_status register. */ 479 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) 480 { 481 struct pcie_service_card *card = adapter->card; 482 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 483 484 mwifiex_dbg(adapter, EVENT, 485 "event: Wakeup device...\n"); 486 487 if (reg->sleep_cookie) 488 mwifiex_pcie_dev_wakeup_delay(adapter); 489 490 /* Accessing fw_status register will wakeup device */ 491 if (mwifiex_write_reg(adapter, reg->fw_status, FIRMWARE_READY_PCIE)) { 492 mwifiex_dbg(adapter, ERROR, 493 "Writing fw_status register failed\n"); 494 return -1; 495 } 496 497 if (reg->sleep_cookie) { 498 mwifiex_pcie_dev_wakeup_delay(adapter); 499 mwifiex_dbg(adapter, INFO, 500 "PCIE wakeup: Setting PS_STATE_AWAKE\n"); 501 adapter->ps_state = PS_STATE_AWAKE; 502 } 503 504 return 0; 505 } 506 507 /* 508 * This function is called after the card has woken up. 509 * 510 * The card configuration register is reset. 511 */ 512 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter) 513 { 514 mwifiex_dbg(adapter, CMD, 515 "cmd: Wakeup device completed\n"); 516 517 return 0; 518 } 519 520 /* 521 * This function disables the host interrupt. 522 * 523 * The host interrupt mask is read, the disable bit is reset and 524 * written back to the card host interrupt mask register. 525 */ 526 static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter) 527 { 528 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 529 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 530 0x00000000)) { 531 mwifiex_dbg(adapter, ERROR, 532 "Disable host interrupt failed\n"); 533 return -1; 534 } 535 } 536 537 atomic_set(&adapter->tx_hw_pending, 0); 538 return 0; 539 } 540 541 static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter) 542 { 543 WARN_ON(mwifiex_pcie_disable_host_int(adapter)); 544 } 545 546 /* 547 * This function enables the host interrupt. 548 * 549 * The host interrupt enable mask is written to the card 550 * host interrupt mask register. 551 */ 552 static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter) 553 { 554 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 555 /* Simply write the mask to the register */ 556 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 557 HOST_INTR_MASK)) { 558 mwifiex_dbg(adapter, ERROR, 559 "Enable host interrupt failed\n"); 560 return -1; 561 } 562 } 563 564 return 0; 565 } 566 567 /* 568 * This function initializes TX buffer ring descriptors 569 */ 570 static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter) 571 { 572 struct pcie_service_card *card = adapter->card; 573 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 574 struct mwifiex_pcie_buf_desc *desc; 575 struct mwifiex_pfu_buf_desc *desc2; 576 int i; 577 578 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 579 card->tx_buf_list[i] = NULL; 580 if (reg->pfu_enabled) { 581 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 582 (sizeof(*desc2) * i); 583 desc2 = card->txbd_ring[i]; 584 memset(desc2, 0, sizeof(*desc2)); 585 } else { 586 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 587 (sizeof(*desc) * i); 588 desc = card->txbd_ring[i]; 589 memset(desc, 0, sizeof(*desc)); 590 } 591 } 592 593 return 0; 594 } 595 596 /* This function initializes RX buffer ring descriptors. Each SKB is allocated 597 * here and after mapping PCI memory, its physical address is assigned to 598 * PCIE Rx buffer descriptor's physical address. 599 */ 600 static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter) 601 { 602 struct pcie_service_card *card = adapter->card; 603 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 604 struct sk_buff *skb; 605 struct mwifiex_pcie_buf_desc *desc; 606 struct mwifiex_pfu_buf_desc *desc2; 607 dma_addr_t buf_pa; 608 int i; 609 610 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 611 /* Allocate skb here so that firmware can DMA data from it */ 612 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 613 GFP_KERNEL); 614 if (!skb) { 615 mwifiex_dbg(adapter, ERROR, 616 "Unable to allocate skb for RX ring.\n"); 617 kfree(card->rxbd_ring_vbase); 618 return -ENOMEM; 619 } 620 621 if (mwifiex_map_pci_memory(adapter, skb, 622 MWIFIEX_RX_DATA_BUF_SIZE, 623 PCI_DMA_FROMDEVICE)) 624 return -1; 625 626 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 627 628 mwifiex_dbg(adapter, INFO, 629 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 630 skb, skb->len, skb->data, (u32)buf_pa, 631 (u32)((u64)buf_pa >> 32)); 632 633 card->rx_buf_list[i] = skb; 634 if (reg->pfu_enabled) { 635 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase + 636 (sizeof(*desc2) * i); 637 desc2 = card->rxbd_ring[i]; 638 desc2->paddr = buf_pa; 639 desc2->len = (u16)skb->len; 640 desc2->frag_len = (u16)skb->len; 641 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop; 642 desc2->offset = 0; 643 } else { 644 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase + 645 (sizeof(*desc) * i)); 646 desc = card->rxbd_ring[i]; 647 desc->paddr = buf_pa; 648 desc->len = (u16)skb->len; 649 desc->flags = 0; 650 } 651 } 652 653 return 0; 654 } 655 656 /* This function initializes event buffer ring descriptors. Each SKB is 657 * allocated here and after mapping PCI memory, its physical address is assigned 658 * to PCIE Rx buffer descriptor's physical address 659 */ 660 static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter) 661 { 662 struct pcie_service_card *card = adapter->card; 663 struct mwifiex_evt_buf_desc *desc; 664 struct sk_buff *skb; 665 dma_addr_t buf_pa; 666 int i; 667 668 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 669 /* Allocate skb here so that firmware can DMA data from it */ 670 skb = dev_alloc_skb(MAX_EVENT_SIZE); 671 if (!skb) { 672 mwifiex_dbg(adapter, ERROR, 673 "Unable to allocate skb for EVENT buf.\n"); 674 kfree(card->evtbd_ring_vbase); 675 return -ENOMEM; 676 } 677 skb_put(skb, MAX_EVENT_SIZE); 678 679 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE, 680 PCI_DMA_FROMDEVICE)) 681 return -1; 682 683 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 684 685 mwifiex_dbg(adapter, EVENT, 686 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 687 skb, skb->len, skb->data, (u32)buf_pa, 688 (u32)((u64)buf_pa >> 32)); 689 690 card->evt_buf_list[i] = skb; 691 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase + 692 (sizeof(*desc) * i)); 693 desc = card->evtbd_ring[i]; 694 desc->paddr = buf_pa; 695 desc->len = (u16)skb->len; 696 desc->flags = 0; 697 } 698 699 return 0; 700 } 701 702 /* This function cleans up TX buffer rings. If any of the buffer list has valid 703 * SKB address, associated SKB is freed. 704 */ 705 static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter) 706 { 707 struct pcie_service_card *card = adapter->card; 708 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 709 struct sk_buff *skb; 710 struct mwifiex_pcie_buf_desc *desc; 711 struct mwifiex_pfu_buf_desc *desc2; 712 int i; 713 714 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 715 if (reg->pfu_enabled) { 716 desc2 = card->txbd_ring[i]; 717 if (card->tx_buf_list[i]) { 718 skb = card->tx_buf_list[i]; 719 mwifiex_unmap_pci_memory(adapter, skb, 720 PCI_DMA_TODEVICE); 721 dev_kfree_skb_any(skb); 722 } 723 memset(desc2, 0, sizeof(*desc2)); 724 } else { 725 desc = card->txbd_ring[i]; 726 if (card->tx_buf_list[i]) { 727 skb = card->tx_buf_list[i]; 728 mwifiex_unmap_pci_memory(adapter, skb, 729 PCI_DMA_TODEVICE); 730 dev_kfree_skb_any(skb); 731 } 732 memset(desc, 0, sizeof(*desc)); 733 } 734 card->tx_buf_list[i] = NULL; 735 } 736 737 atomic_set(&adapter->tx_hw_pending, 0); 738 return; 739 } 740 741 /* This function cleans up RX buffer rings. If any of the buffer list has valid 742 * SKB address, associated SKB is freed. 743 */ 744 static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter) 745 { 746 struct pcie_service_card *card = adapter->card; 747 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 748 struct mwifiex_pcie_buf_desc *desc; 749 struct mwifiex_pfu_buf_desc *desc2; 750 struct sk_buff *skb; 751 int i; 752 753 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 754 if (reg->pfu_enabled) { 755 desc2 = card->rxbd_ring[i]; 756 if (card->rx_buf_list[i]) { 757 skb = card->rx_buf_list[i]; 758 mwifiex_unmap_pci_memory(adapter, skb, 759 PCI_DMA_FROMDEVICE); 760 dev_kfree_skb_any(skb); 761 } 762 memset(desc2, 0, sizeof(*desc2)); 763 } else { 764 desc = card->rxbd_ring[i]; 765 if (card->rx_buf_list[i]) { 766 skb = card->rx_buf_list[i]; 767 mwifiex_unmap_pci_memory(adapter, skb, 768 PCI_DMA_FROMDEVICE); 769 dev_kfree_skb_any(skb); 770 } 771 memset(desc, 0, sizeof(*desc)); 772 } 773 card->rx_buf_list[i] = NULL; 774 } 775 776 return; 777 } 778 779 /* This function cleans up event buffer rings. If any of the buffer list has 780 * valid SKB address, associated SKB is freed. 781 */ 782 static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter) 783 { 784 struct pcie_service_card *card = adapter->card; 785 struct mwifiex_evt_buf_desc *desc; 786 struct sk_buff *skb; 787 int i; 788 789 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 790 desc = card->evtbd_ring[i]; 791 if (card->evt_buf_list[i]) { 792 skb = card->evt_buf_list[i]; 793 mwifiex_unmap_pci_memory(adapter, skb, 794 PCI_DMA_FROMDEVICE); 795 dev_kfree_skb_any(skb); 796 } 797 card->evt_buf_list[i] = NULL; 798 memset(desc, 0, sizeof(*desc)); 799 } 800 801 return; 802 } 803 804 /* This function creates buffer descriptor ring for TX 805 */ 806 static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter) 807 { 808 struct pcie_service_card *card = adapter->card; 809 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 810 811 /* 812 * driver maintaines the write pointer and firmware maintaines the read 813 * pointer. The write pointer starts at 0 (zero) while the read pointer 814 * starts at zero with rollover bit set 815 */ 816 card->txbd_wrptr = 0; 817 818 if (reg->pfu_enabled) 819 card->txbd_rdptr = 0; 820 else 821 card->txbd_rdptr |= reg->tx_rollover_ind; 822 823 /* allocate shared memory for the BD ring and divide the same in to 824 several descriptors */ 825 if (reg->pfu_enabled) 826 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 827 MWIFIEX_MAX_TXRX_BD; 828 else 829 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 830 MWIFIEX_MAX_TXRX_BD; 831 832 mwifiex_dbg(adapter, INFO, 833 "info: txbd_ring: Allocating %d bytes\n", 834 card->txbd_ring_size); 835 card->txbd_ring_vbase = pci_alloc_consistent(card->dev, 836 card->txbd_ring_size, 837 &card->txbd_ring_pbase); 838 if (!card->txbd_ring_vbase) { 839 mwifiex_dbg(adapter, ERROR, 840 "allocate consistent memory (%d bytes) failed!\n", 841 card->txbd_ring_size); 842 return -ENOMEM; 843 } 844 mwifiex_dbg(adapter, DATA, 845 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n", 846 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase, 847 (u32)((u64)card->txbd_ring_pbase >> 32), 848 card->txbd_ring_size); 849 850 return mwifiex_init_txq_ring(adapter); 851 } 852 853 static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter) 854 { 855 struct pcie_service_card *card = adapter->card; 856 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 857 858 mwifiex_cleanup_txq_ring(adapter); 859 860 if (card->txbd_ring_vbase) 861 pci_free_consistent(card->dev, card->txbd_ring_size, 862 card->txbd_ring_vbase, 863 card->txbd_ring_pbase); 864 card->txbd_ring_size = 0; 865 card->txbd_wrptr = 0; 866 card->txbd_rdptr = 0 | reg->tx_rollover_ind; 867 card->txbd_ring_vbase = NULL; 868 card->txbd_ring_pbase = 0; 869 870 return 0; 871 } 872 873 /* 874 * This function creates buffer descriptor ring for RX 875 */ 876 static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter) 877 { 878 struct pcie_service_card *card = adapter->card; 879 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 880 881 /* 882 * driver maintaines the read pointer and firmware maintaines the write 883 * pointer. The write pointer starts at 0 (zero) while the read pointer 884 * starts at zero with rollover bit set 885 */ 886 card->rxbd_wrptr = 0; 887 card->rxbd_rdptr = reg->rx_rollover_ind; 888 889 if (reg->pfu_enabled) 890 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 891 MWIFIEX_MAX_TXRX_BD; 892 else 893 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 894 MWIFIEX_MAX_TXRX_BD; 895 896 mwifiex_dbg(adapter, INFO, 897 "info: rxbd_ring: Allocating %d bytes\n", 898 card->rxbd_ring_size); 899 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev, 900 card->rxbd_ring_size, 901 &card->rxbd_ring_pbase); 902 if (!card->rxbd_ring_vbase) { 903 mwifiex_dbg(adapter, ERROR, 904 "allocate consistent memory (%d bytes) failed!\n", 905 card->rxbd_ring_size); 906 return -ENOMEM; 907 } 908 909 mwifiex_dbg(adapter, DATA, 910 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n", 911 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase, 912 (u32)((u64)card->rxbd_ring_pbase >> 32), 913 card->rxbd_ring_size); 914 915 return mwifiex_init_rxq_ring(adapter); 916 } 917 918 /* 919 * This function deletes Buffer descriptor ring for RX 920 */ 921 static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter) 922 { 923 struct pcie_service_card *card = adapter->card; 924 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 925 926 mwifiex_cleanup_rxq_ring(adapter); 927 928 if (card->rxbd_ring_vbase) 929 pci_free_consistent(card->dev, card->rxbd_ring_size, 930 card->rxbd_ring_vbase, 931 card->rxbd_ring_pbase); 932 card->rxbd_ring_size = 0; 933 card->rxbd_wrptr = 0; 934 card->rxbd_rdptr = 0 | reg->rx_rollover_ind; 935 card->rxbd_ring_vbase = NULL; 936 card->rxbd_ring_pbase = 0; 937 938 return 0; 939 } 940 941 /* 942 * This function creates buffer descriptor ring for Events 943 */ 944 static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter) 945 { 946 struct pcie_service_card *card = adapter->card; 947 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 948 949 /* 950 * driver maintaines the read pointer and firmware maintaines the write 951 * pointer. The write pointer starts at 0 (zero) while the read pointer 952 * starts at zero with rollover bit set 953 */ 954 card->evtbd_wrptr = 0; 955 card->evtbd_rdptr = reg->evt_rollover_ind; 956 957 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) * 958 MWIFIEX_MAX_EVT_BD; 959 960 mwifiex_dbg(adapter, INFO, 961 "info: evtbd_ring: Allocating %d bytes\n", 962 card->evtbd_ring_size); 963 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev, 964 card->evtbd_ring_size, 965 &card->evtbd_ring_pbase); 966 if (!card->evtbd_ring_vbase) { 967 mwifiex_dbg(adapter, ERROR, 968 "allocate consistent memory (%d bytes) failed!\n", 969 card->evtbd_ring_size); 970 return -ENOMEM; 971 } 972 973 mwifiex_dbg(adapter, EVENT, 974 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n", 975 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase, 976 (u32)((u64)card->evtbd_ring_pbase >> 32), 977 card->evtbd_ring_size); 978 979 return mwifiex_pcie_init_evt_ring(adapter); 980 } 981 982 /* 983 * This function deletes Buffer descriptor ring for Events 984 */ 985 static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter) 986 { 987 struct pcie_service_card *card = adapter->card; 988 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 989 990 mwifiex_cleanup_evt_ring(adapter); 991 992 if (card->evtbd_ring_vbase) 993 pci_free_consistent(card->dev, card->evtbd_ring_size, 994 card->evtbd_ring_vbase, 995 card->evtbd_ring_pbase); 996 card->evtbd_wrptr = 0; 997 card->evtbd_rdptr = 0 | reg->evt_rollover_ind; 998 card->evtbd_ring_size = 0; 999 card->evtbd_ring_vbase = NULL; 1000 card->evtbd_ring_pbase = 0; 1001 1002 return 0; 1003 } 1004 1005 /* 1006 * This function allocates a buffer for CMDRSP 1007 */ 1008 static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter) 1009 { 1010 struct pcie_service_card *card = adapter->card; 1011 struct sk_buff *skb; 1012 1013 /* Allocate memory for receiving command response data */ 1014 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 1015 if (!skb) { 1016 mwifiex_dbg(adapter, ERROR, 1017 "Unable to allocate skb for command response data.\n"); 1018 return -ENOMEM; 1019 } 1020 skb_put(skb, MWIFIEX_UPLD_SIZE); 1021 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1022 PCI_DMA_FROMDEVICE)) 1023 return -1; 1024 1025 card->cmdrsp_buf = skb; 1026 1027 return 0; 1028 } 1029 1030 /* 1031 * This function deletes a buffer for CMDRSP 1032 */ 1033 static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter) 1034 { 1035 struct pcie_service_card *card; 1036 1037 if (!adapter) 1038 return 0; 1039 1040 card = adapter->card; 1041 1042 if (card && card->cmdrsp_buf) { 1043 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf, 1044 PCI_DMA_FROMDEVICE); 1045 dev_kfree_skb_any(card->cmdrsp_buf); 1046 card->cmdrsp_buf = NULL; 1047 } 1048 1049 if (card && card->cmd_buf) { 1050 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1051 PCI_DMA_TODEVICE); 1052 dev_kfree_skb_any(card->cmd_buf); 1053 card->cmd_buf = NULL; 1054 } 1055 return 0; 1056 } 1057 1058 /* 1059 * This function allocates a buffer for sleep cookie 1060 */ 1061 static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter) 1062 { 1063 struct pcie_service_card *card = adapter->card; 1064 u32 tmp; 1065 1066 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32), 1067 &card->sleep_cookie_pbase); 1068 if (!card->sleep_cookie_vbase) { 1069 mwifiex_dbg(adapter, ERROR, 1070 "pci_alloc_consistent failed!\n"); 1071 return -ENOMEM; 1072 } 1073 /* Init val of Sleep Cookie */ 1074 tmp = FW_AWAKE_COOKIE; 1075 put_unaligned(tmp, card->sleep_cookie_vbase); 1076 1077 mwifiex_dbg(adapter, INFO, 1078 "alloc_scook: sleep cookie=0x%x\n", 1079 get_unaligned(card->sleep_cookie_vbase)); 1080 1081 return 0; 1082 } 1083 1084 /* 1085 * This function deletes buffer for sleep cookie 1086 */ 1087 static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter) 1088 { 1089 struct pcie_service_card *card; 1090 1091 if (!adapter) 1092 return 0; 1093 1094 card = adapter->card; 1095 1096 if (card && card->sleep_cookie_vbase) { 1097 pci_free_consistent(card->dev, sizeof(u32), 1098 card->sleep_cookie_vbase, 1099 card->sleep_cookie_pbase); 1100 card->sleep_cookie_vbase = NULL; 1101 } 1102 1103 return 0; 1104 } 1105 1106 /* This function flushes the TX buffer descriptor ring 1107 * This function defined as handler is also called while cleaning TXRX 1108 * during disconnect/ bss stop. 1109 */ 1110 static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter) 1111 { 1112 struct pcie_service_card *card = adapter->card; 1113 1114 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) { 1115 card->txbd_flush = 1; 1116 /* write pointer already set at last send 1117 * send dnld-rdy intr again, wait for completion. 1118 */ 1119 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1120 CPU_INTR_DNLD_RDY)) { 1121 mwifiex_dbg(adapter, ERROR, 1122 "failed to assert dnld-rdy interrupt.\n"); 1123 return -1; 1124 } 1125 } 1126 return 0; 1127 } 1128 1129 /* 1130 * This function unmaps and frees downloaded data buffer 1131 */ 1132 static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter) 1133 { 1134 struct sk_buff *skb; 1135 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0; 1136 struct mwifiex_pcie_buf_desc *desc; 1137 struct mwifiex_pfu_buf_desc *desc2; 1138 struct pcie_service_card *card = adapter->card; 1139 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1140 1141 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1142 mwifiex_pm_wakeup_card(adapter); 1143 1144 /* Read the TX ring read pointer set by firmware */ 1145 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) { 1146 mwifiex_dbg(adapter, ERROR, 1147 "SEND COMP: failed to read reg->tx_rdptr\n"); 1148 return -1; 1149 } 1150 1151 mwifiex_dbg(adapter, DATA, 1152 "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n", 1153 card->txbd_rdptr, rdptr); 1154 1155 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1156 /* free from previous txbd_rdptr to current txbd_rdptr */ 1157 while (((card->txbd_rdptr & reg->tx_mask) != 1158 (rdptr & reg->tx_mask)) || 1159 ((card->txbd_rdptr & reg->tx_rollover_ind) != 1160 (rdptr & reg->tx_rollover_ind))) { 1161 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >> 1162 reg->tx_start_ptr; 1163 1164 skb = card->tx_buf_list[wrdoneidx]; 1165 1166 if (skb) { 1167 mwifiex_dbg(adapter, DATA, 1168 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n", 1169 skb, wrdoneidx); 1170 mwifiex_unmap_pci_memory(adapter, skb, 1171 PCI_DMA_TODEVICE); 1172 1173 unmap_count++; 1174 1175 if (card->txbd_flush) 1176 mwifiex_write_data_complete(adapter, skb, 0, 1177 -1); 1178 else 1179 mwifiex_write_data_complete(adapter, skb, 0, 0); 1180 atomic_dec(&adapter->tx_hw_pending); 1181 } 1182 1183 card->tx_buf_list[wrdoneidx] = NULL; 1184 1185 if (reg->pfu_enabled) { 1186 desc2 = card->txbd_ring[wrdoneidx]; 1187 memset(desc2, 0, sizeof(*desc2)); 1188 } else { 1189 desc = card->txbd_ring[wrdoneidx]; 1190 memset(desc, 0, sizeof(*desc)); 1191 } 1192 switch (card->dev->device) { 1193 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1194 card->txbd_rdptr++; 1195 break; 1196 case PCIE_DEVICE_ID_MARVELL_88W8897: 1197 case PCIE_DEVICE_ID_MARVELL_88W8997: 1198 card->txbd_rdptr += reg->ring_tx_start_ptr; 1199 break; 1200 } 1201 1202 1203 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs) 1204 card->txbd_rdptr = ((card->txbd_rdptr & 1205 reg->tx_rollover_ind) ^ 1206 reg->tx_rollover_ind); 1207 } 1208 1209 if (unmap_count) 1210 adapter->data_sent = false; 1211 1212 if (card->txbd_flush) { 1213 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) 1214 card->txbd_flush = 0; 1215 else 1216 mwifiex_clean_pcie_ring_buf(adapter); 1217 } 1218 1219 return 0; 1220 } 1221 1222 /* This function sends data buffer to device. First 4 bytes of payload 1223 * are filled with payload length and payload type. Then this payload 1224 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly. 1225 * Download ready interrupt to FW is deffered if Tx ring is not full and 1226 * additional payload can be accomodated. 1227 * Caller must ensure tx_param parameter to this function is not NULL. 1228 */ 1229 static int 1230 mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb, 1231 struct mwifiex_tx_param *tx_param) 1232 { 1233 struct pcie_service_card *card = adapter->card; 1234 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1235 u32 wrindx, num_tx_buffs, rx_val; 1236 int ret; 1237 dma_addr_t buf_pa; 1238 struct mwifiex_pcie_buf_desc *desc = NULL; 1239 struct mwifiex_pfu_buf_desc *desc2 = NULL; 1240 1241 if (!(skb->data && skb->len)) { 1242 mwifiex_dbg(adapter, ERROR, 1243 "%s(): invalid parameter <%p, %#x>\n", 1244 __func__, skb->data, skb->len); 1245 return -1; 1246 } 1247 1248 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1249 mwifiex_pm_wakeup_card(adapter); 1250 1251 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1252 mwifiex_dbg(adapter, DATA, 1253 "info: SEND DATA: <Rd: %#x, Wr: %#x>\n", 1254 card->txbd_rdptr, card->txbd_wrptr); 1255 if (mwifiex_pcie_txbd_not_full(card)) { 1256 u8 *payload; 1257 1258 adapter->data_sent = true; 1259 payload = skb->data; 1260 put_unaligned_le16((u16)skb->len, payload + 0); 1261 put_unaligned_le16(MWIFIEX_TYPE_DATA, payload + 2); 1262 1263 if (mwifiex_map_pci_memory(adapter, skb, skb->len, 1264 PCI_DMA_TODEVICE)) 1265 return -1; 1266 1267 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr; 1268 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1269 card->tx_buf_list[wrindx] = skb; 1270 atomic_inc(&adapter->tx_hw_pending); 1271 1272 if (reg->pfu_enabled) { 1273 desc2 = card->txbd_ring[wrindx]; 1274 desc2->paddr = buf_pa; 1275 desc2->len = (u16)skb->len; 1276 desc2->frag_len = (u16)skb->len; 1277 desc2->offset = 0; 1278 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1279 MWIFIEX_BD_FLAG_LAST_DESC; 1280 } else { 1281 desc = card->txbd_ring[wrindx]; 1282 desc->paddr = buf_pa; 1283 desc->len = (u16)skb->len; 1284 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1285 MWIFIEX_BD_FLAG_LAST_DESC; 1286 } 1287 1288 switch (card->dev->device) { 1289 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1290 card->txbd_wrptr++; 1291 break; 1292 case PCIE_DEVICE_ID_MARVELL_88W8897: 1293 case PCIE_DEVICE_ID_MARVELL_88W8997: 1294 card->txbd_wrptr += reg->ring_tx_start_ptr; 1295 break; 1296 } 1297 1298 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs) 1299 card->txbd_wrptr = ((card->txbd_wrptr & 1300 reg->tx_rollover_ind) ^ 1301 reg->tx_rollover_ind); 1302 1303 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask; 1304 /* Write the TX ring write pointer in to reg->tx_wrptr */ 1305 if (mwifiex_write_reg(adapter, reg->tx_wrptr, 1306 card->txbd_wrptr | rx_val)) { 1307 mwifiex_dbg(adapter, ERROR, 1308 "SEND DATA: failed to write reg->tx_wrptr\n"); 1309 ret = -1; 1310 goto done_unmap; 1311 } 1312 if ((mwifiex_pcie_txbd_not_full(card)) && 1313 tx_param->next_pkt_len) { 1314 /* have more packets and TxBD still can hold more */ 1315 mwifiex_dbg(adapter, DATA, 1316 "SEND DATA: delay dnld-rdy interrupt.\n"); 1317 adapter->data_sent = false; 1318 } else { 1319 /* Send the TX ready interrupt */ 1320 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1321 CPU_INTR_DNLD_RDY)) { 1322 mwifiex_dbg(adapter, ERROR, 1323 "SEND DATA: failed to assert dnld-rdy interrupt.\n"); 1324 ret = -1; 1325 goto done_unmap; 1326 } 1327 } 1328 mwifiex_dbg(adapter, DATA, 1329 "info: SEND DATA: Updated <Rd: %#x, Wr:\t" 1330 "%#x> and sent packet to firmware successfully\n", 1331 card->txbd_rdptr, card->txbd_wrptr); 1332 } else { 1333 mwifiex_dbg(adapter, DATA, 1334 "info: TX Ring full, can't send packets to fw\n"); 1335 adapter->data_sent = true; 1336 /* Send the TX ready interrupt */ 1337 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1338 CPU_INTR_DNLD_RDY)) 1339 mwifiex_dbg(adapter, ERROR, 1340 "SEND DATA: failed to assert door-bell intr\n"); 1341 return -EBUSY; 1342 } 1343 1344 return -EINPROGRESS; 1345 done_unmap: 1346 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1347 card->tx_buf_list[wrindx] = NULL; 1348 atomic_dec(&adapter->tx_hw_pending); 1349 if (reg->pfu_enabled) 1350 memset(desc2, 0, sizeof(*desc2)); 1351 else 1352 memset(desc, 0, sizeof(*desc)); 1353 1354 return ret; 1355 } 1356 1357 /* 1358 * This function handles received buffer ring and 1359 * dispatches packets to upper 1360 */ 1361 static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter) 1362 { 1363 struct pcie_service_card *card = adapter->card; 1364 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1365 u32 wrptr, rd_index, tx_val; 1366 dma_addr_t buf_pa; 1367 int ret = 0; 1368 struct sk_buff *skb_tmp = NULL; 1369 struct mwifiex_pcie_buf_desc *desc; 1370 struct mwifiex_pfu_buf_desc *desc2; 1371 1372 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1373 mwifiex_pm_wakeup_card(adapter); 1374 1375 /* Read the RX ring Write pointer set by firmware */ 1376 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1377 mwifiex_dbg(adapter, ERROR, 1378 "RECV DATA: failed to read reg->rx_wrptr\n"); 1379 ret = -1; 1380 goto done; 1381 } 1382 card->rxbd_wrptr = wrptr; 1383 1384 while (((wrptr & reg->rx_mask) != 1385 (card->rxbd_rdptr & reg->rx_mask)) || 1386 ((wrptr & reg->rx_rollover_ind) == 1387 (card->rxbd_rdptr & reg->rx_rollover_ind))) { 1388 struct sk_buff *skb_data; 1389 u16 rx_len; 1390 1391 rd_index = card->rxbd_rdptr & reg->rx_mask; 1392 skb_data = card->rx_buf_list[rd_index]; 1393 1394 /* If skb allocation was failed earlier for Rx packet, 1395 * rx_buf_list[rd_index] would have been left with a NULL. 1396 */ 1397 if (!skb_data) 1398 return -ENOMEM; 1399 1400 mwifiex_unmap_pci_memory(adapter, skb_data, PCI_DMA_FROMDEVICE); 1401 card->rx_buf_list[rd_index] = NULL; 1402 1403 /* Get data length from interface header - 1404 * first 2 bytes for len, next 2 bytes is for type 1405 */ 1406 rx_len = get_unaligned_le16(skb_data->data); 1407 if (WARN_ON(rx_len <= adapter->intf_hdr_len || 1408 rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) { 1409 mwifiex_dbg(adapter, ERROR, 1410 "Invalid RX len %d, Rd=%#x, Wr=%#x\n", 1411 rx_len, card->rxbd_rdptr, wrptr); 1412 dev_kfree_skb_any(skb_data); 1413 } else { 1414 skb_put(skb_data, rx_len); 1415 mwifiex_dbg(adapter, DATA, 1416 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n", 1417 card->rxbd_rdptr, wrptr, rx_len); 1418 skb_pull(skb_data, adapter->intf_hdr_len); 1419 if (adapter->rx_work_enabled) { 1420 skb_queue_tail(&adapter->rx_data_q, skb_data); 1421 adapter->data_received = true; 1422 atomic_inc(&adapter->rx_pending); 1423 } else { 1424 mwifiex_handle_rx_packet(adapter, skb_data); 1425 } 1426 } 1427 1428 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 1429 GFP_KERNEL); 1430 if (!skb_tmp) { 1431 mwifiex_dbg(adapter, ERROR, 1432 "Unable to allocate skb.\n"); 1433 return -ENOMEM; 1434 } 1435 1436 if (mwifiex_map_pci_memory(adapter, skb_tmp, 1437 MWIFIEX_RX_DATA_BUF_SIZE, 1438 PCI_DMA_FROMDEVICE)) 1439 return -1; 1440 1441 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp); 1442 1443 mwifiex_dbg(adapter, INFO, 1444 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n", 1445 skb_tmp, rd_index); 1446 card->rx_buf_list[rd_index] = skb_tmp; 1447 1448 if (reg->pfu_enabled) { 1449 desc2 = card->rxbd_ring[rd_index]; 1450 desc2->paddr = buf_pa; 1451 desc2->len = skb_tmp->len; 1452 desc2->frag_len = skb_tmp->len; 1453 desc2->offset = 0; 1454 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop; 1455 } else { 1456 desc = card->rxbd_ring[rd_index]; 1457 desc->paddr = buf_pa; 1458 desc->len = skb_tmp->len; 1459 desc->flags = 0; 1460 } 1461 1462 if ((++card->rxbd_rdptr & reg->rx_mask) == 1463 MWIFIEX_MAX_TXRX_BD) { 1464 card->rxbd_rdptr = ((card->rxbd_rdptr & 1465 reg->rx_rollover_ind) ^ 1466 reg->rx_rollover_ind); 1467 } 1468 mwifiex_dbg(adapter, DATA, 1469 "info: RECV DATA: <Rd: %#x, Wr: %#x>\n", 1470 card->rxbd_rdptr, wrptr); 1471 1472 tx_val = card->txbd_wrptr & reg->tx_wrap_mask; 1473 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1474 if (mwifiex_write_reg(adapter, reg->rx_rdptr, 1475 card->rxbd_rdptr | tx_val)) { 1476 mwifiex_dbg(adapter, DATA, 1477 "RECV DATA: failed to write reg->rx_rdptr\n"); 1478 ret = -1; 1479 goto done; 1480 } 1481 1482 /* Read the RX ring Write pointer set by firmware */ 1483 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1484 mwifiex_dbg(adapter, ERROR, 1485 "RECV DATA: failed to read reg->rx_wrptr\n"); 1486 ret = -1; 1487 goto done; 1488 } 1489 mwifiex_dbg(adapter, DATA, 1490 "info: RECV DATA: Rcvd packet from fw successfully\n"); 1491 card->rxbd_wrptr = wrptr; 1492 } 1493 1494 done: 1495 return ret; 1496 } 1497 1498 /* 1499 * This function downloads the boot command to device 1500 */ 1501 static int 1502 mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1503 { 1504 dma_addr_t buf_pa; 1505 struct pcie_service_card *card = adapter->card; 1506 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1507 1508 if (!(skb->data && skb->len)) { 1509 mwifiex_dbg(adapter, ERROR, 1510 "Invalid parameter in %s <%p. len %d>\n", 1511 __func__, skb->data, skb->len); 1512 return -1; 1513 } 1514 1515 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE)) 1516 return -1; 1517 1518 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1519 1520 /* Write the lower 32bits of the physical address to low command 1521 * address scratch register 1522 */ 1523 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) { 1524 mwifiex_dbg(adapter, ERROR, 1525 "%s: failed to write download command to boot code.\n", 1526 __func__); 1527 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1528 return -1; 1529 } 1530 1531 /* Write the upper 32bits of the physical address to high command 1532 * address scratch register 1533 */ 1534 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1535 (u32)((u64)buf_pa >> 32))) { 1536 mwifiex_dbg(adapter, ERROR, 1537 "%s: failed to write download command to boot code.\n", 1538 __func__); 1539 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1540 return -1; 1541 } 1542 1543 /* Write the command length to cmd_size scratch register */ 1544 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) { 1545 mwifiex_dbg(adapter, ERROR, 1546 "%s: failed to write command len to cmd_size scratch reg\n", 1547 __func__); 1548 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1549 return -1; 1550 } 1551 1552 /* Ring the door bell */ 1553 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1554 CPU_INTR_DOOR_BELL)) { 1555 mwifiex_dbg(adapter, ERROR, 1556 "%s: failed to assert door-bell intr\n", __func__); 1557 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1558 return -1; 1559 } 1560 1561 return 0; 1562 } 1563 1564 /* This function init rx port in firmware which in turn enables to receive data 1565 * from device before transmitting any packet. 1566 */ 1567 static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter) 1568 { 1569 struct pcie_service_card *card = adapter->card; 1570 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1571 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask; 1572 1573 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1574 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr | 1575 tx_wrap)) { 1576 mwifiex_dbg(adapter, ERROR, 1577 "RECV DATA: failed to write reg->rx_rdptr\n"); 1578 return -1; 1579 } 1580 return 0; 1581 } 1582 1583 /* This function downloads commands to the device 1584 */ 1585 static int 1586 mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1587 { 1588 struct pcie_service_card *card = adapter->card; 1589 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1590 int ret = 0; 1591 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa; 1592 u8 *payload = (u8 *)skb->data; 1593 1594 if (!(skb->data && skb->len)) { 1595 mwifiex_dbg(adapter, ERROR, 1596 "Invalid parameter in %s <%p, %#x>\n", 1597 __func__, skb->data, skb->len); 1598 return -1; 1599 } 1600 1601 /* Make sure a command response buffer is available */ 1602 if (!card->cmdrsp_buf) { 1603 mwifiex_dbg(adapter, ERROR, 1604 "No response buffer available, send command failed\n"); 1605 return -EBUSY; 1606 } 1607 1608 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1609 mwifiex_pm_wakeup_card(adapter); 1610 1611 adapter->cmd_sent = true; 1612 1613 put_unaligned_le16((u16)skb->len, &payload[0]); 1614 put_unaligned_le16(MWIFIEX_TYPE_CMD, &payload[2]); 1615 1616 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE)) 1617 return -1; 1618 1619 card->cmd_buf = skb; 1620 /* 1621 * Need to keep a reference, since core driver might free up this 1622 * buffer before we've unmapped it. 1623 */ 1624 skb_get(skb); 1625 1626 /* To send a command, the driver will: 1627 1. Write the 64bit physical address of the data buffer to 1628 cmd response address low + cmd response address high 1629 2. Ring the door bell (i.e. set the door bell interrupt) 1630 1631 In response to door bell interrupt, the firmware will perform 1632 the DMA of the command packet (first header to obtain the total 1633 length and then rest of the command). 1634 */ 1635 1636 if (card->cmdrsp_buf) { 1637 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf); 1638 /* Write the lower 32bits of the cmdrsp buffer physical 1639 address */ 1640 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 1641 (u32)cmdrsp_buf_pa)) { 1642 mwifiex_dbg(adapter, ERROR, 1643 "Failed to write download cmd to boot code.\n"); 1644 ret = -1; 1645 goto done; 1646 } 1647 /* Write the upper 32bits of the cmdrsp buffer physical 1648 address */ 1649 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 1650 (u32)((u64)cmdrsp_buf_pa >> 32))) { 1651 mwifiex_dbg(adapter, ERROR, 1652 "Failed to write download cmd to boot code.\n"); 1653 ret = -1; 1654 goto done; 1655 } 1656 } 1657 1658 cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf); 1659 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */ 1660 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, 1661 (u32)cmd_buf_pa)) { 1662 mwifiex_dbg(adapter, ERROR, 1663 "Failed to write download cmd to boot code.\n"); 1664 ret = -1; 1665 goto done; 1666 } 1667 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */ 1668 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1669 (u32)((u64)cmd_buf_pa >> 32))) { 1670 mwifiex_dbg(adapter, ERROR, 1671 "Failed to write download cmd to boot code.\n"); 1672 ret = -1; 1673 goto done; 1674 } 1675 1676 /* Write the command length to reg->cmd_size */ 1677 if (mwifiex_write_reg(adapter, reg->cmd_size, 1678 card->cmd_buf->len)) { 1679 mwifiex_dbg(adapter, ERROR, 1680 "Failed to write cmd len to reg->cmd_size\n"); 1681 ret = -1; 1682 goto done; 1683 } 1684 1685 /* Ring the door bell */ 1686 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1687 CPU_INTR_DOOR_BELL)) { 1688 mwifiex_dbg(adapter, ERROR, 1689 "Failed to assert door-bell intr\n"); 1690 ret = -1; 1691 goto done; 1692 } 1693 1694 done: 1695 if (ret) 1696 adapter->cmd_sent = false; 1697 1698 return 0; 1699 } 1700 1701 /* 1702 * This function handles command complete interrupt 1703 */ 1704 static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter) 1705 { 1706 struct pcie_service_card *card = adapter->card; 1707 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1708 struct sk_buff *skb = card->cmdrsp_buf; 1709 int count = 0; 1710 u16 rx_len; 1711 1712 mwifiex_dbg(adapter, CMD, 1713 "info: Rx CMD Response\n"); 1714 1715 if (adapter->curr_cmd) 1716 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_FROMDEVICE); 1717 else 1718 pci_dma_sync_single_for_cpu(card->dev, 1719 MWIFIEX_SKB_DMA_ADDR(skb), 1720 MWIFIEX_UPLD_SIZE, 1721 PCI_DMA_FROMDEVICE); 1722 1723 /* Unmap the command as a response has been received. */ 1724 if (card->cmd_buf) { 1725 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1726 PCI_DMA_TODEVICE); 1727 dev_kfree_skb_any(card->cmd_buf); 1728 card->cmd_buf = NULL; 1729 } 1730 1731 rx_len = get_unaligned_le16(skb->data); 1732 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 1733 skb_trim(skb, rx_len); 1734 1735 if (!adapter->curr_cmd) { 1736 if (adapter->ps_state == PS_STATE_SLEEP_CFM) { 1737 pci_dma_sync_single_for_device(card->dev, 1738 MWIFIEX_SKB_DMA_ADDR(skb), 1739 MWIFIEX_SLEEP_COOKIE_SIZE, 1740 PCI_DMA_FROMDEVICE); 1741 if (mwifiex_write_reg(adapter, 1742 PCIE_CPU_INT_EVENT, 1743 CPU_INTR_SLEEP_CFM_DONE)) { 1744 mwifiex_dbg(adapter, ERROR, 1745 "Write register failed\n"); 1746 return -1; 1747 } 1748 mwifiex_delay_for_sleep_cookie(adapter, 1749 MWIFIEX_MAX_DELAY_COUNT); 1750 mwifiex_unmap_pci_memory(adapter, skb, 1751 PCI_DMA_FROMDEVICE); 1752 skb_pull(skb, adapter->intf_hdr_len); 1753 while (reg->sleep_cookie && (count++ < 10) && 1754 mwifiex_pcie_ok_to_access_hw(adapter)) 1755 usleep_range(50, 60); 1756 mwifiex_pcie_enable_host_int(adapter); 1757 mwifiex_process_sleep_confirm_resp(adapter, skb->data, 1758 skb->len); 1759 } else { 1760 mwifiex_dbg(adapter, ERROR, 1761 "There is no command but got cmdrsp\n"); 1762 } 1763 memcpy(adapter->upld_buf, skb->data, 1764 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len)); 1765 skb_push(skb, adapter->intf_hdr_len); 1766 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1767 PCI_DMA_FROMDEVICE)) 1768 return -1; 1769 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) { 1770 skb_pull(skb, adapter->intf_hdr_len); 1771 adapter->curr_cmd->resp_skb = skb; 1772 adapter->cmd_resp_received = true; 1773 /* Take the pointer and set it to CMD node and will 1774 return in the response complete callback */ 1775 card->cmdrsp_buf = NULL; 1776 1777 /* Clear the cmd-rsp buffer address in scratch registers. This 1778 will prevent firmware from writing to the same response 1779 buffer again. */ 1780 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) { 1781 mwifiex_dbg(adapter, ERROR, 1782 "cmd_done: failed to clear cmd_rsp_addr_lo\n"); 1783 return -1; 1784 } 1785 /* Write the upper 32bits of the cmdrsp buffer physical 1786 address */ 1787 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) { 1788 mwifiex_dbg(adapter, ERROR, 1789 "cmd_done: failed to clear cmd_rsp_addr_hi\n"); 1790 return -1; 1791 } 1792 } 1793 1794 return 0; 1795 } 1796 1797 /* 1798 * Command Response processing complete handler 1799 */ 1800 static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter, 1801 struct sk_buff *skb) 1802 { 1803 struct pcie_service_card *card = adapter->card; 1804 1805 if (skb) { 1806 card->cmdrsp_buf = skb; 1807 skb_push(card->cmdrsp_buf, adapter->intf_hdr_len); 1808 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1809 PCI_DMA_FROMDEVICE)) 1810 return -1; 1811 } 1812 1813 return 0; 1814 } 1815 1816 /* 1817 * This function handles firmware event ready interrupt 1818 */ 1819 static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter) 1820 { 1821 struct pcie_service_card *card = adapter->card; 1822 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1823 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 1824 u32 wrptr, event; 1825 struct mwifiex_evt_buf_desc *desc; 1826 1827 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1828 mwifiex_pm_wakeup_card(adapter); 1829 1830 if (adapter->event_received) { 1831 mwifiex_dbg(adapter, EVENT, 1832 "info: Event being processed,\t" 1833 "do not process this interrupt just yet\n"); 1834 return 0; 1835 } 1836 1837 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 1838 mwifiex_dbg(adapter, ERROR, 1839 "info: Invalid read pointer...\n"); 1840 return -1; 1841 } 1842 1843 /* Read the event ring write pointer set by firmware */ 1844 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 1845 mwifiex_dbg(adapter, ERROR, 1846 "EventReady: failed to read reg->evt_wrptr\n"); 1847 return -1; 1848 } 1849 1850 mwifiex_dbg(adapter, EVENT, 1851 "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>", 1852 card->evtbd_rdptr, wrptr); 1853 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr 1854 & MWIFIEX_EVTBD_MASK)) || 1855 ((wrptr & reg->evt_rollover_ind) == 1856 (card->evtbd_rdptr & reg->evt_rollover_ind))) { 1857 struct sk_buff *skb_cmd; 1858 __le16 data_len = 0; 1859 u16 evt_len; 1860 1861 mwifiex_dbg(adapter, INFO, 1862 "info: Read Index: %d\n", rdptr); 1863 skb_cmd = card->evt_buf_list[rdptr]; 1864 mwifiex_unmap_pci_memory(adapter, skb_cmd, PCI_DMA_FROMDEVICE); 1865 1866 /* Take the pointer and set it to event pointer in adapter 1867 and will return back after event handling callback */ 1868 card->evt_buf_list[rdptr] = NULL; 1869 desc = card->evtbd_ring[rdptr]; 1870 memset(desc, 0, sizeof(*desc)); 1871 1872 event = get_unaligned_le32( 1873 &skb_cmd->data[adapter->intf_hdr_len]); 1874 adapter->event_cause = event; 1875 /* The first 4bytes will be the event transfer header 1876 len is 2 bytes followed by type which is 2 bytes */ 1877 memcpy(&data_len, skb_cmd->data, sizeof(__le16)); 1878 evt_len = le16_to_cpu(data_len); 1879 skb_trim(skb_cmd, evt_len); 1880 skb_pull(skb_cmd, adapter->intf_hdr_len); 1881 mwifiex_dbg(adapter, EVENT, 1882 "info: Event length: %d\n", evt_len); 1883 1884 if (evt_len > MWIFIEX_EVENT_HEADER_LEN && 1885 evt_len < MAX_EVENT_SIZE) 1886 memcpy(adapter->event_body, skb_cmd->data + 1887 MWIFIEX_EVENT_HEADER_LEN, evt_len - 1888 MWIFIEX_EVENT_HEADER_LEN); 1889 1890 adapter->event_received = true; 1891 adapter->event_skb = skb_cmd; 1892 1893 /* Do not update the event read pointer here, wait till the 1894 buffer is released. This is just to make things simpler, 1895 we need to find a better method of managing these buffers. 1896 */ 1897 } else { 1898 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1899 CPU_INTR_EVENT_DONE)) { 1900 mwifiex_dbg(adapter, ERROR, 1901 "Write register failed\n"); 1902 return -1; 1903 } 1904 } 1905 1906 return 0; 1907 } 1908 1909 /* 1910 * Event processing complete handler 1911 */ 1912 static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter, 1913 struct sk_buff *skb) 1914 { 1915 struct pcie_service_card *card = adapter->card; 1916 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1917 int ret = 0; 1918 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 1919 u32 wrptr; 1920 struct mwifiex_evt_buf_desc *desc; 1921 1922 if (!skb) 1923 return 0; 1924 1925 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 1926 mwifiex_dbg(adapter, ERROR, 1927 "event_complete: Invalid rdptr 0x%x\n", 1928 rdptr); 1929 return -EINVAL; 1930 } 1931 1932 /* Read the event ring write pointer set by firmware */ 1933 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 1934 mwifiex_dbg(adapter, ERROR, 1935 "event_complete: failed to read reg->evt_wrptr\n"); 1936 return -1; 1937 } 1938 1939 if (!card->evt_buf_list[rdptr]) { 1940 skb_push(skb, adapter->intf_hdr_len); 1941 skb_put(skb, MAX_EVENT_SIZE - skb->len); 1942 if (mwifiex_map_pci_memory(adapter, skb, 1943 MAX_EVENT_SIZE, 1944 PCI_DMA_FROMDEVICE)) 1945 return -1; 1946 card->evt_buf_list[rdptr] = skb; 1947 desc = card->evtbd_ring[rdptr]; 1948 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb); 1949 desc->len = (u16)skb->len; 1950 desc->flags = 0; 1951 skb = NULL; 1952 } else { 1953 mwifiex_dbg(adapter, ERROR, 1954 "info: ERROR: buf still valid at index %d, <%p, %p>\n", 1955 rdptr, card->evt_buf_list[rdptr], skb); 1956 } 1957 1958 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) { 1959 card->evtbd_rdptr = ((card->evtbd_rdptr & 1960 reg->evt_rollover_ind) ^ 1961 reg->evt_rollover_ind); 1962 } 1963 1964 mwifiex_dbg(adapter, EVENT, 1965 "info: Updated <Rd: 0x%x, Wr: 0x%x>", 1966 card->evtbd_rdptr, wrptr); 1967 1968 /* Write the event ring read pointer in to reg->evt_rdptr */ 1969 if (mwifiex_write_reg(adapter, reg->evt_rdptr, 1970 card->evtbd_rdptr)) { 1971 mwifiex_dbg(adapter, ERROR, 1972 "event_complete: failed to read reg->evt_rdptr\n"); 1973 return -1; 1974 } 1975 1976 mwifiex_dbg(adapter, EVENT, 1977 "info: Check Events Again\n"); 1978 ret = mwifiex_pcie_process_event_ready(adapter); 1979 1980 return ret; 1981 } 1982 1983 /* Combo firmware image is a combination of 1984 * (1) combo crc heaer, start with CMD5 1985 * (2) bluetooth image, start with CMD7, end with CMD6, data wrapped in CMD1. 1986 * (3) wifi image. 1987 * 1988 * This function bypass the header and bluetooth part, return 1989 * the offset of tail wifi-only part. If the image is already wifi-only, 1990 * that is start with CMD1, return 0. 1991 */ 1992 1993 static int mwifiex_extract_wifi_fw(struct mwifiex_adapter *adapter, 1994 const void *firmware, u32 firmware_len) { 1995 const struct mwifiex_fw_data *fwdata; 1996 u32 offset = 0, data_len, dnld_cmd; 1997 int ret = 0; 1998 bool cmd7_before = false, first_cmd = false; 1999 2000 while (1) { 2001 /* Check for integer and buffer overflow */ 2002 if (offset + sizeof(fwdata->header) < sizeof(fwdata->header) || 2003 offset + sizeof(fwdata->header) >= firmware_len) { 2004 mwifiex_dbg(adapter, ERROR, 2005 "extract wifi-only fw failure!\n"); 2006 ret = -1; 2007 goto done; 2008 } 2009 2010 fwdata = firmware + offset; 2011 dnld_cmd = le32_to_cpu(fwdata->header.dnld_cmd); 2012 data_len = le32_to_cpu(fwdata->header.data_length); 2013 2014 /* Skip past header */ 2015 offset += sizeof(fwdata->header); 2016 2017 switch (dnld_cmd) { 2018 case MWIFIEX_FW_DNLD_CMD_1: 2019 if (offset + data_len < data_len) { 2020 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2021 ret = -1; 2022 goto done; 2023 } 2024 2025 /* Image start with cmd1, already wifi-only firmware */ 2026 if (!first_cmd) { 2027 mwifiex_dbg(adapter, MSG, 2028 "input wifi-only firmware\n"); 2029 return 0; 2030 } 2031 2032 if (!cmd7_before) { 2033 mwifiex_dbg(adapter, ERROR, 2034 "no cmd7 before cmd1!\n"); 2035 ret = -1; 2036 goto done; 2037 } 2038 offset += data_len; 2039 break; 2040 case MWIFIEX_FW_DNLD_CMD_5: 2041 first_cmd = true; 2042 /* Check for integer overflow */ 2043 if (offset + data_len < data_len) { 2044 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2045 ret = -1; 2046 goto done; 2047 } 2048 offset += data_len; 2049 break; 2050 case MWIFIEX_FW_DNLD_CMD_6: 2051 first_cmd = true; 2052 /* Check for integer overflow */ 2053 if (offset + data_len < data_len) { 2054 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2055 ret = -1; 2056 goto done; 2057 } 2058 offset += data_len; 2059 if (offset >= firmware_len) { 2060 mwifiex_dbg(adapter, ERROR, 2061 "extract wifi-only fw failure!\n"); 2062 ret = -1; 2063 } else { 2064 ret = offset; 2065 } 2066 goto done; 2067 case MWIFIEX_FW_DNLD_CMD_7: 2068 first_cmd = true; 2069 cmd7_before = true; 2070 break; 2071 default: 2072 mwifiex_dbg(adapter, ERROR, "unknown dnld_cmd %d\n", 2073 dnld_cmd); 2074 ret = -1; 2075 goto done; 2076 } 2077 } 2078 2079 done: 2080 return ret; 2081 } 2082 2083 /* 2084 * This function downloads the firmware to the card. 2085 * 2086 * Firmware is downloaded to the card in blocks. Every block download 2087 * is tested for CRC errors, and retried a number of times before 2088 * returning failure. 2089 */ 2090 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter, 2091 struct mwifiex_fw_image *fw) 2092 { 2093 int ret; 2094 u8 *firmware = fw->fw_buf; 2095 u32 firmware_len = fw->fw_len; 2096 u32 offset = 0; 2097 struct sk_buff *skb; 2098 u32 txlen, tx_blocks = 0, tries, len, val; 2099 u32 block_retry_cnt = 0; 2100 struct pcie_service_card *card = adapter->card; 2101 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2102 2103 if (!firmware || !firmware_len) { 2104 mwifiex_dbg(adapter, ERROR, 2105 "No firmware image found! Terminating download\n"); 2106 return -1; 2107 } 2108 2109 mwifiex_dbg(adapter, INFO, 2110 "info: Downloading FW image (%d bytes)\n", 2111 firmware_len); 2112 2113 if (mwifiex_pcie_disable_host_int(adapter)) { 2114 mwifiex_dbg(adapter, ERROR, 2115 "%s: Disabling interrupts failed.\n", __func__); 2116 return -1; 2117 } 2118 2119 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 2120 if (!skb) { 2121 ret = -ENOMEM; 2122 goto done; 2123 } 2124 2125 ret = mwifiex_read_reg(adapter, PCIE_SCRATCH_13_REG, &val); 2126 if (ret) { 2127 mwifiex_dbg(adapter, FATAL, "Failed to read scratch register 13\n"); 2128 goto done; 2129 } 2130 2131 /* PCIE FLR case: extract wifi part from combo firmware*/ 2132 if (val == MWIFIEX_PCIE_FLR_HAPPENS) { 2133 ret = mwifiex_extract_wifi_fw(adapter, firmware, firmware_len); 2134 if (ret < 0) { 2135 mwifiex_dbg(adapter, ERROR, "Failed to extract wifi fw\n"); 2136 goto done; 2137 } 2138 offset = ret; 2139 mwifiex_dbg(adapter, MSG, 2140 "info: dnld wifi firmware from %d bytes\n", offset); 2141 } 2142 2143 /* Perform firmware data transfer */ 2144 do { 2145 u32 ireg_intr = 0; 2146 2147 /* More data? */ 2148 if (offset >= firmware_len) 2149 break; 2150 2151 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2152 ret = mwifiex_read_reg(adapter, reg->cmd_size, 2153 &len); 2154 if (ret) { 2155 mwifiex_dbg(adapter, FATAL, 2156 "Failed reading len from boot code\n"); 2157 goto done; 2158 } 2159 if (len) 2160 break; 2161 usleep_range(10, 20); 2162 } 2163 2164 if (!len) { 2165 break; 2166 } else if (len > MWIFIEX_UPLD_SIZE) { 2167 mwifiex_dbg(adapter, ERROR, 2168 "FW download failure @ %d, invalid length %d\n", 2169 offset, len); 2170 ret = -1; 2171 goto done; 2172 } 2173 2174 txlen = len; 2175 2176 if (len & BIT(0)) { 2177 block_retry_cnt++; 2178 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) { 2179 mwifiex_dbg(adapter, ERROR, 2180 "FW download failure @ %d, over max\t" 2181 "retry count\n", offset); 2182 ret = -1; 2183 goto done; 2184 } 2185 mwifiex_dbg(adapter, ERROR, 2186 "FW CRC error indicated by the\t" 2187 "helper: len = 0x%04X, txlen = %d\n", 2188 len, txlen); 2189 len &= ~BIT(0); 2190 /* Setting this to 0 to resend from same offset */ 2191 txlen = 0; 2192 } else { 2193 block_retry_cnt = 0; 2194 /* Set blocksize to transfer - checking for 2195 last block */ 2196 if (firmware_len - offset < txlen) 2197 txlen = firmware_len - offset; 2198 2199 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) / 2200 card->pcie.blksz_fw_dl; 2201 2202 /* Copy payload to buffer */ 2203 memmove(skb->data, &firmware[offset], txlen); 2204 } 2205 2206 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 2207 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl); 2208 2209 /* Send the boot command to device */ 2210 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) { 2211 mwifiex_dbg(adapter, ERROR, 2212 "Failed to send firmware download command\n"); 2213 ret = -1; 2214 goto done; 2215 } 2216 2217 /* Wait for the command done interrupt */ 2218 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2219 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS, 2220 &ireg_intr)) { 2221 mwifiex_dbg(adapter, ERROR, 2222 "%s: Failed to read\t" 2223 "interrupt status during fw dnld.\n", 2224 __func__); 2225 mwifiex_unmap_pci_memory(adapter, skb, 2226 PCI_DMA_TODEVICE); 2227 ret = -1; 2228 goto done; 2229 } 2230 if (!(ireg_intr & CPU_INTR_DOOR_BELL)) 2231 break; 2232 usleep_range(10, 20); 2233 } 2234 if (ireg_intr & CPU_INTR_DOOR_BELL) { 2235 mwifiex_dbg(adapter, ERROR, "%s: Card failed to ACK download\n", 2236 __func__); 2237 mwifiex_unmap_pci_memory(adapter, skb, 2238 PCI_DMA_TODEVICE); 2239 ret = -1; 2240 goto done; 2241 } 2242 2243 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 2244 2245 offset += txlen; 2246 } while (true); 2247 2248 mwifiex_dbg(adapter, MSG, 2249 "info: FW download over, size %d bytes\n", offset); 2250 2251 ret = 0; 2252 2253 done: 2254 dev_kfree_skb_any(skb); 2255 return ret; 2256 } 2257 2258 /* 2259 * This function checks the firmware status in card. 2260 */ 2261 static int 2262 mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num) 2263 { 2264 int ret = 0; 2265 u32 firmware_stat; 2266 struct pcie_service_card *card = adapter->card; 2267 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2268 u32 tries; 2269 2270 /* Mask spurios interrupts */ 2271 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK, 2272 HOST_INTR_MASK)) { 2273 mwifiex_dbg(adapter, ERROR, 2274 "Write register failed\n"); 2275 return -1; 2276 } 2277 2278 mwifiex_dbg(adapter, INFO, 2279 "Setting driver ready signature\n"); 2280 if (mwifiex_write_reg(adapter, reg->drv_rdy, 2281 FIRMWARE_READY_PCIE)) { 2282 mwifiex_dbg(adapter, ERROR, 2283 "Failed to write driver ready signature\n"); 2284 return -1; 2285 } 2286 2287 /* Wait for firmware initialization event */ 2288 for (tries = 0; tries < poll_num; tries++) { 2289 if (mwifiex_read_reg(adapter, reg->fw_status, 2290 &firmware_stat)) 2291 ret = -1; 2292 else 2293 ret = 0; 2294 2295 mwifiex_dbg(adapter, INFO, "Try %d if FW is ready <%d,%#x>", 2296 tries, ret, firmware_stat); 2297 2298 if (ret) 2299 continue; 2300 if (firmware_stat == FIRMWARE_READY_PCIE) { 2301 ret = 0; 2302 break; 2303 } else { 2304 msleep(100); 2305 ret = -1; 2306 } 2307 } 2308 2309 return ret; 2310 } 2311 2312 /* This function checks if WLAN is the winner. 2313 */ 2314 static int 2315 mwifiex_check_winner_status(struct mwifiex_adapter *adapter) 2316 { 2317 u32 winner = 0; 2318 int ret = 0; 2319 struct pcie_service_card *card = adapter->card; 2320 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2321 2322 if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) { 2323 ret = -1; 2324 } else if (!winner) { 2325 mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n"); 2326 adapter->winner = 1; 2327 } else { 2328 mwifiex_dbg(adapter, ERROR, 2329 "PCI-E is not the winner <%#x>", winner); 2330 } 2331 2332 return ret; 2333 } 2334 2335 /* 2336 * This function reads the interrupt status from card. 2337 */ 2338 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter, 2339 int msg_id) 2340 { 2341 u32 pcie_ireg; 2342 unsigned long flags; 2343 struct pcie_service_card *card = adapter->card; 2344 2345 if (card->msi_enable) { 2346 spin_lock_irqsave(&adapter->int_lock, flags); 2347 adapter->int_status = 1; 2348 spin_unlock_irqrestore(&adapter->int_lock, flags); 2349 return; 2350 } 2351 2352 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 2353 return; 2354 2355 if (card->msix_enable && msg_id >= 0) { 2356 pcie_ireg = BIT(msg_id); 2357 } else { 2358 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2359 &pcie_ireg)) { 2360 mwifiex_dbg(adapter, ERROR, "Read register failed\n"); 2361 return; 2362 } 2363 2364 if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg) 2365 return; 2366 2367 2368 mwifiex_pcie_disable_host_int(adapter); 2369 2370 /* Clear the pending interrupts */ 2371 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS, 2372 ~pcie_ireg)) { 2373 mwifiex_dbg(adapter, ERROR, 2374 "Write register failed\n"); 2375 return; 2376 } 2377 } 2378 2379 if (!adapter->pps_uapsd_mode && 2380 adapter->ps_state == PS_STATE_SLEEP && 2381 mwifiex_pcie_ok_to_access_hw(adapter)) { 2382 /* Potentially for PCIe we could get other 2383 * interrupts like shared. Don't change power 2384 * state until cookie is set 2385 */ 2386 adapter->ps_state = PS_STATE_AWAKE; 2387 adapter->pm_wakeup_fw_try = false; 2388 del_timer(&adapter->wakeup_timer); 2389 } 2390 2391 spin_lock_irqsave(&adapter->int_lock, flags); 2392 adapter->int_status |= pcie_ireg; 2393 spin_unlock_irqrestore(&adapter->int_lock, flags); 2394 mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg); 2395 } 2396 2397 /* 2398 * Interrupt handler for PCIe root port 2399 * 2400 * This function reads the interrupt status from firmware and assigns 2401 * the main process in workqueue which will handle the interrupt. 2402 */ 2403 static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context) 2404 { 2405 struct mwifiex_msix_context *ctx = context; 2406 struct pci_dev *pdev = ctx->dev; 2407 struct pcie_service_card *card; 2408 struct mwifiex_adapter *adapter; 2409 2410 card = pci_get_drvdata(pdev); 2411 2412 if (!card->adapter) { 2413 pr_err("info: %s: card=%p adapter=%p\n", __func__, card, 2414 card ? card->adapter : NULL); 2415 goto exit; 2416 } 2417 adapter = card->adapter; 2418 2419 if (adapter->surprise_removed) 2420 goto exit; 2421 2422 if (card->msix_enable) 2423 mwifiex_interrupt_status(adapter, ctx->msg_id); 2424 else 2425 mwifiex_interrupt_status(adapter, -1); 2426 2427 mwifiex_queue_main_work(adapter); 2428 2429 exit: 2430 return IRQ_HANDLED; 2431 } 2432 2433 /* 2434 * This function checks the current interrupt status. 2435 * 2436 * The following interrupts are checked and handled by this function - 2437 * - Data sent 2438 * - Command sent 2439 * - Command received 2440 * - Packets received 2441 * - Events received 2442 * 2443 * In case of Rx packets received, the packets are uploaded from card to 2444 * host and processed accordingly. 2445 */ 2446 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter) 2447 { 2448 int ret; 2449 u32 pcie_ireg = 0; 2450 unsigned long flags; 2451 struct pcie_service_card *card = adapter->card; 2452 2453 spin_lock_irqsave(&adapter->int_lock, flags); 2454 if (!card->msi_enable) { 2455 /* Clear out unused interrupts */ 2456 pcie_ireg = adapter->int_status; 2457 } 2458 adapter->int_status = 0; 2459 spin_unlock_irqrestore(&adapter->int_lock, flags); 2460 2461 if (card->msi_enable) { 2462 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 2463 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2464 &pcie_ireg)) { 2465 mwifiex_dbg(adapter, ERROR, 2466 "Read register failed\n"); 2467 return -1; 2468 } 2469 2470 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) { 2471 if (mwifiex_write_reg(adapter, 2472 PCIE_HOST_INT_STATUS, 2473 ~pcie_ireg)) { 2474 mwifiex_dbg(adapter, ERROR, 2475 "Write register failed\n"); 2476 return -1; 2477 } 2478 if (!adapter->pps_uapsd_mode && 2479 adapter->ps_state == PS_STATE_SLEEP) { 2480 adapter->ps_state = PS_STATE_AWAKE; 2481 adapter->pm_wakeup_fw_try = false; 2482 del_timer(&adapter->wakeup_timer); 2483 } 2484 } 2485 } 2486 } 2487 2488 if (pcie_ireg & HOST_INTR_DNLD_DONE) { 2489 mwifiex_dbg(adapter, INTR, "info: TX DNLD Done\n"); 2490 ret = mwifiex_pcie_send_data_complete(adapter); 2491 if (ret) 2492 return ret; 2493 } 2494 if (pcie_ireg & HOST_INTR_UPLD_RDY) { 2495 mwifiex_dbg(adapter, INTR, "info: Rx DATA\n"); 2496 ret = mwifiex_pcie_process_recv_data(adapter); 2497 if (ret) 2498 return ret; 2499 } 2500 if (pcie_ireg & HOST_INTR_EVENT_RDY) { 2501 mwifiex_dbg(adapter, INTR, "info: Rx EVENT\n"); 2502 ret = mwifiex_pcie_process_event_ready(adapter); 2503 if (ret) 2504 return ret; 2505 } 2506 if (pcie_ireg & HOST_INTR_CMD_DONE) { 2507 if (adapter->cmd_sent) { 2508 mwifiex_dbg(adapter, INTR, 2509 "info: CMD sent Interrupt\n"); 2510 adapter->cmd_sent = false; 2511 } 2512 /* Handle command response */ 2513 ret = mwifiex_pcie_process_cmd_complete(adapter); 2514 if (ret) 2515 return ret; 2516 } 2517 2518 mwifiex_dbg(adapter, INTR, 2519 "info: cmd_sent=%d data_sent=%d\n", 2520 adapter->cmd_sent, adapter->data_sent); 2521 if (!card->msi_enable && !card->msix_enable && 2522 adapter->ps_state != PS_STATE_SLEEP) 2523 mwifiex_pcie_enable_host_int(adapter); 2524 2525 return 0; 2526 } 2527 2528 /* 2529 * This function downloads data from driver to card. 2530 * 2531 * Both commands and data packets are transferred to the card by this 2532 * function. 2533 * 2534 * This function adds the PCIE specific header to the front of the buffer 2535 * before transferring. The header contains the length of the packet and 2536 * the type. The firmware handles the packets based upon this set type. 2537 */ 2538 static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type, 2539 struct sk_buff *skb, 2540 struct mwifiex_tx_param *tx_param) 2541 { 2542 if (!skb) { 2543 mwifiex_dbg(adapter, ERROR, 2544 "Passed NULL skb to %s\n", __func__); 2545 return -1; 2546 } 2547 2548 if (type == MWIFIEX_TYPE_DATA) 2549 return mwifiex_pcie_send_data(adapter, skb, tx_param); 2550 else if (type == MWIFIEX_TYPE_CMD) 2551 return mwifiex_pcie_send_cmd(adapter, skb); 2552 2553 return 0; 2554 } 2555 2556 /* Function to dump PCIE scratch registers in case of FW crash 2557 */ 2558 static int 2559 mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf) 2560 { 2561 char *p = drv_buf; 2562 char buf[256], *ptr; 2563 int i; 2564 u32 value; 2565 struct pcie_service_card *card = adapter->card; 2566 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2567 int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG, 2568 PCIE_SCRATCH_14_REG, 2569 PCIE_SCRATCH_15_REG}; 2570 2571 if (!p) 2572 return 0; 2573 2574 mwifiex_dbg(adapter, MSG, "PCIE register dump start\n"); 2575 2576 if (mwifiex_read_reg(adapter, reg->fw_status, &value)) { 2577 mwifiex_dbg(adapter, ERROR, "failed to read firmware status"); 2578 return 0; 2579 } 2580 2581 ptr = buf; 2582 mwifiex_dbg(adapter, MSG, "pcie scratch register:"); 2583 for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) { 2584 mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value); 2585 ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n", 2586 pcie_scratch_reg[i], value); 2587 } 2588 2589 mwifiex_dbg(adapter, MSG, "%s\n", buf); 2590 p += sprintf(p, "%s\n", buf); 2591 2592 mwifiex_dbg(adapter, MSG, "PCIE register dump end\n"); 2593 2594 return p - drv_buf; 2595 } 2596 2597 /* This function read/write firmware */ 2598 static enum rdwr_status 2599 mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag) 2600 { 2601 int ret, tries; 2602 u8 ctrl_data; 2603 u32 fw_status; 2604 struct pcie_service_card *card = adapter->card; 2605 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2606 2607 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) 2608 return RDWR_STATUS_FAILURE; 2609 2610 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2611 reg->fw_dump_host_ready); 2612 if (ret) { 2613 mwifiex_dbg(adapter, ERROR, 2614 "PCIE write err\n"); 2615 return RDWR_STATUS_FAILURE; 2616 } 2617 2618 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2619 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data); 2620 if (ctrl_data == FW_DUMP_DONE) 2621 return RDWR_STATUS_SUCCESS; 2622 if (doneflag && ctrl_data == doneflag) 2623 return RDWR_STATUS_DONE; 2624 if (ctrl_data != reg->fw_dump_host_ready) { 2625 mwifiex_dbg(adapter, WARN, 2626 "The ctrl reg was changed, re-try again!\n"); 2627 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2628 reg->fw_dump_host_ready); 2629 if (ret) { 2630 mwifiex_dbg(adapter, ERROR, 2631 "PCIE write err\n"); 2632 return RDWR_STATUS_FAILURE; 2633 } 2634 } 2635 usleep_range(100, 200); 2636 } 2637 2638 mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n"); 2639 return RDWR_STATUS_FAILURE; 2640 } 2641 2642 /* This function dump firmware memory to file */ 2643 static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter) 2644 { 2645 struct pcie_service_card *card = adapter->card; 2646 const struct mwifiex_pcie_card_reg *creg = card->pcie.reg; 2647 unsigned int reg, reg_start, reg_end; 2648 u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num; 2649 u8 idx, i, read_reg, doneflag = 0; 2650 enum rdwr_status stat; 2651 u32 memory_size; 2652 int ret; 2653 2654 if (!card->pcie.can_dump_fw) 2655 return; 2656 2657 for (idx = 0; idx < adapter->num_mem_types; idx++) { 2658 struct memory_type_mapping *entry = 2659 &adapter->mem_type_mapping_tbl[idx]; 2660 2661 if (entry->mem_ptr) { 2662 vfree(entry->mem_ptr); 2663 entry->mem_ptr = NULL; 2664 } 2665 entry->mem_size = 0; 2666 } 2667 2668 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n"); 2669 2670 /* Read the number of the memories which will dump */ 2671 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2672 if (stat == RDWR_STATUS_FAILURE) 2673 return; 2674 2675 reg = creg->fw_dump_start; 2676 mwifiex_read_reg_byte(adapter, reg, &fw_dump_num); 2677 2678 /* W8997 chipset firmware dump will be restore in single region*/ 2679 if (fw_dump_num == 0) 2680 dump_num = 1; 2681 else 2682 dump_num = fw_dump_num; 2683 2684 /* Read the length of every memory which will dump */ 2685 for (idx = 0; idx < dump_num; idx++) { 2686 struct memory_type_mapping *entry = 2687 &adapter->mem_type_mapping_tbl[idx]; 2688 memory_size = 0; 2689 if (fw_dump_num != 0) { 2690 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2691 if (stat == RDWR_STATUS_FAILURE) 2692 return; 2693 2694 reg = creg->fw_dump_start; 2695 for (i = 0; i < 4; i++) { 2696 mwifiex_read_reg_byte(adapter, reg, &read_reg); 2697 memory_size |= (read_reg << (i * 8)); 2698 reg++; 2699 } 2700 } else { 2701 memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE; 2702 } 2703 2704 if (memory_size == 0) { 2705 mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n"); 2706 ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl, 2707 creg->fw_dump_read_done); 2708 if (ret) { 2709 mwifiex_dbg(adapter, ERROR, "PCIE write err\n"); 2710 return; 2711 } 2712 break; 2713 } 2714 2715 mwifiex_dbg(adapter, DUMP, 2716 "%s_SIZE=0x%x\n", entry->mem_name, memory_size); 2717 entry->mem_ptr = vmalloc(memory_size + 1); 2718 entry->mem_size = memory_size; 2719 if (!entry->mem_ptr) { 2720 mwifiex_dbg(adapter, ERROR, 2721 "Vmalloc %s failed\n", entry->mem_name); 2722 return; 2723 } 2724 dbg_ptr = entry->mem_ptr; 2725 end_ptr = dbg_ptr + memory_size; 2726 2727 doneflag = entry->done_flag; 2728 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n", 2729 entry->mem_name); 2730 2731 do { 2732 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2733 if (RDWR_STATUS_FAILURE == stat) 2734 return; 2735 2736 reg_start = creg->fw_dump_start; 2737 reg_end = creg->fw_dump_end; 2738 for (reg = reg_start; reg <= reg_end; reg++) { 2739 mwifiex_read_reg_byte(adapter, reg, dbg_ptr); 2740 if (dbg_ptr < end_ptr) { 2741 dbg_ptr++; 2742 continue; 2743 } 2744 mwifiex_dbg(adapter, ERROR, 2745 "pre-allocated buf not enough\n"); 2746 tmp_ptr = 2747 vzalloc(memory_size + MWIFIEX_SIZE_4K); 2748 if (!tmp_ptr) 2749 return; 2750 memcpy(tmp_ptr, entry->mem_ptr, memory_size); 2751 vfree(entry->mem_ptr); 2752 entry->mem_ptr = tmp_ptr; 2753 tmp_ptr = NULL; 2754 dbg_ptr = entry->mem_ptr + memory_size; 2755 memory_size += MWIFIEX_SIZE_4K; 2756 end_ptr = entry->mem_ptr + memory_size; 2757 } 2758 2759 if (stat != RDWR_STATUS_DONE) 2760 continue; 2761 2762 mwifiex_dbg(adapter, DUMP, 2763 "%s done: size=0x%tx\n", 2764 entry->mem_name, dbg_ptr - entry->mem_ptr); 2765 break; 2766 } while (true); 2767 } 2768 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n"); 2769 } 2770 2771 static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter) 2772 { 2773 adapter->devdump_data = vzalloc(MWIFIEX_FW_DUMP_SIZE); 2774 if (!adapter->devdump_data) { 2775 mwifiex_dbg(adapter, ERROR, 2776 "vzalloc devdump data failure!\n"); 2777 return; 2778 } 2779 2780 mwifiex_drv_info_dump(adapter); 2781 mwifiex_pcie_fw_dump(adapter); 2782 mwifiex_prepare_fw_dump_info(adapter); 2783 mwifiex_upload_device_dump(adapter); 2784 } 2785 2786 static void mwifiex_pcie_card_reset_work(struct mwifiex_adapter *adapter) 2787 { 2788 struct pcie_service_card *card = adapter->card; 2789 2790 /* We can't afford to wait here; remove() might be waiting on us. If we 2791 * can't grab the device lock, maybe we'll get another chance later. 2792 */ 2793 pci_try_reset_function(card->dev); 2794 } 2795 2796 static void mwifiex_pcie_work(struct work_struct *work) 2797 { 2798 struct pcie_service_card *card = 2799 container_of(work, struct pcie_service_card, work); 2800 2801 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 2802 &card->work_flags)) 2803 mwifiex_pcie_device_dump_work(card->adapter); 2804 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, 2805 &card->work_flags)) 2806 mwifiex_pcie_card_reset_work(card->adapter); 2807 } 2808 2809 /* This function dumps FW information */ 2810 static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter) 2811 { 2812 struct pcie_service_card *card = adapter->card; 2813 2814 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 2815 &card->work_flags)) 2816 schedule_work(&card->work); 2817 } 2818 2819 static void mwifiex_pcie_card_reset(struct mwifiex_adapter *adapter) 2820 { 2821 struct pcie_service_card *card = adapter->card; 2822 2823 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags)) 2824 schedule_work(&card->work); 2825 } 2826 2827 static int mwifiex_pcie_alloc_buffers(struct mwifiex_adapter *adapter) 2828 { 2829 struct pcie_service_card *card = adapter->card; 2830 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2831 int ret; 2832 2833 card->cmdrsp_buf = NULL; 2834 ret = mwifiex_pcie_create_txbd_ring(adapter); 2835 if (ret) { 2836 mwifiex_dbg(adapter, ERROR, "Failed to create txbd ring\n"); 2837 goto err_cre_txbd; 2838 } 2839 2840 ret = mwifiex_pcie_create_rxbd_ring(adapter); 2841 if (ret) { 2842 mwifiex_dbg(adapter, ERROR, "Failed to create rxbd ring\n"); 2843 goto err_cre_rxbd; 2844 } 2845 2846 ret = mwifiex_pcie_create_evtbd_ring(adapter); 2847 if (ret) { 2848 mwifiex_dbg(adapter, ERROR, "Failed to create evtbd ring\n"); 2849 goto err_cre_evtbd; 2850 } 2851 2852 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter); 2853 if (ret) { 2854 mwifiex_dbg(adapter, ERROR, "Failed to allocate cmdbuf buffer\n"); 2855 goto err_alloc_cmdbuf; 2856 } 2857 2858 if (reg->sleep_cookie) { 2859 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter); 2860 if (ret) { 2861 mwifiex_dbg(adapter, ERROR, "Failed to allocate sleep_cookie buffer\n"); 2862 goto err_alloc_cookie; 2863 } 2864 } else { 2865 card->sleep_cookie_vbase = NULL; 2866 } 2867 2868 return 0; 2869 2870 err_alloc_cookie: 2871 mwifiex_pcie_delete_cmdrsp_buf(adapter); 2872 err_alloc_cmdbuf: 2873 mwifiex_pcie_delete_evtbd_ring(adapter); 2874 err_cre_evtbd: 2875 mwifiex_pcie_delete_rxbd_ring(adapter); 2876 err_cre_rxbd: 2877 mwifiex_pcie_delete_txbd_ring(adapter); 2878 err_cre_txbd: 2879 return ret; 2880 } 2881 2882 static void mwifiex_pcie_free_buffers(struct mwifiex_adapter *adapter) 2883 { 2884 struct pcie_service_card *card = adapter->card; 2885 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2886 2887 if (reg->sleep_cookie) 2888 mwifiex_pcie_delete_sleep_cookie_buf(adapter); 2889 2890 mwifiex_pcie_delete_cmdrsp_buf(adapter); 2891 mwifiex_pcie_delete_evtbd_ring(adapter); 2892 mwifiex_pcie_delete_rxbd_ring(adapter); 2893 mwifiex_pcie_delete_txbd_ring(adapter); 2894 } 2895 2896 /* 2897 * This function initializes the PCI-E host memory space, WCB rings, etc. 2898 */ 2899 static int mwifiex_init_pcie(struct mwifiex_adapter *adapter) 2900 { 2901 struct pcie_service_card *card = adapter->card; 2902 int ret; 2903 struct pci_dev *pdev = card->dev; 2904 2905 pci_set_drvdata(pdev, card); 2906 2907 ret = pci_enable_device(pdev); 2908 if (ret) 2909 goto err_enable_dev; 2910 2911 pci_set_master(pdev); 2912 2913 pr_notice("try set_consistent_dma_mask(32)\n"); 2914 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2915 if (ret) { 2916 pr_err("set_dma_mask(32) failed\n"); 2917 goto err_set_dma_mask; 2918 } 2919 2920 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 2921 if (ret) { 2922 pr_err("set_consistent_dma_mask(64) failed\n"); 2923 goto err_set_dma_mask; 2924 } 2925 2926 ret = pci_request_region(pdev, 0, DRV_NAME); 2927 if (ret) { 2928 pr_err("req_reg(0) error\n"); 2929 goto err_req_region0; 2930 } 2931 card->pci_mmap = pci_iomap(pdev, 0, 0); 2932 if (!card->pci_mmap) { 2933 pr_err("iomap(0) error\n"); 2934 ret = -EIO; 2935 goto err_iomap0; 2936 } 2937 ret = pci_request_region(pdev, 2, DRV_NAME); 2938 if (ret) { 2939 pr_err("req_reg(2) error\n"); 2940 goto err_req_region2; 2941 } 2942 card->pci_mmap1 = pci_iomap(pdev, 2, 0); 2943 if (!card->pci_mmap1) { 2944 pr_err("iomap(2) error\n"); 2945 ret = -EIO; 2946 goto err_iomap2; 2947 } 2948 2949 pr_notice("PCI memory map Virt0: %p PCI memory map Virt2: %p\n", 2950 card->pci_mmap, card->pci_mmap1); 2951 2952 ret = mwifiex_pcie_alloc_buffers(adapter); 2953 if (ret) 2954 goto err_alloc_buffers; 2955 2956 return 0; 2957 2958 err_alloc_buffers: 2959 pci_iounmap(pdev, card->pci_mmap1); 2960 err_iomap2: 2961 pci_release_region(pdev, 2); 2962 err_req_region2: 2963 pci_iounmap(pdev, card->pci_mmap); 2964 err_iomap0: 2965 pci_release_region(pdev, 0); 2966 err_req_region0: 2967 err_set_dma_mask: 2968 pci_disable_device(pdev); 2969 err_enable_dev: 2970 return ret; 2971 } 2972 2973 /* 2974 * This function cleans up the allocated card buffers. 2975 */ 2976 static void mwifiex_cleanup_pcie(struct mwifiex_adapter *adapter) 2977 { 2978 struct pcie_service_card *card = adapter->card; 2979 struct pci_dev *pdev = card->dev; 2980 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2981 int ret; 2982 u32 fw_status; 2983 2984 cancel_work_sync(&card->work); 2985 2986 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status); 2987 if (fw_status == FIRMWARE_READY_PCIE) { 2988 mwifiex_dbg(adapter, INFO, 2989 "Clearing driver ready signature\n"); 2990 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 2991 mwifiex_dbg(adapter, ERROR, 2992 "Failed to write driver not-ready signature\n"); 2993 } 2994 2995 pci_disable_device(pdev); 2996 2997 pci_iounmap(pdev, card->pci_mmap); 2998 pci_iounmap(pdev, card->pci_mmap1); 2999 pci_release_region(pdev, 2); 3000 pci_release_region(pdev, 0); 3001 3002 mwifiex_pcie_free_buffers(adapter); 3003 } 3004 3005 static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter) 3006 { 3007 int ret, i, j; 3008 struct pcie_service_card *card = adapter->card; 3009 struct pci_dev *pdev = card->dev; 3010 3011 if (card->pcie.reg->msix_support) { 3012 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3013 card->msix_entries[i].entry = i; 3014 ret = pci_enable_msix_exact(pdev, card->msix_entries, 3015 MWIFIEX_NUM_MSIX_VECTORS); 3016 if (!ret) { 3017 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) { 3018 card->msix_ctx[i].dev = pdev; 3019 card->msix_ctx[i].msg_id = i; 3020 3021 ret = request_irq(card->msix_entries[i].vector, 3022 mwifiex_pcie_interrupt, 0, 3023 "MWIFIEX_PCIE_MSIX", 3024 &card->msix_ctx[i]); 3025 if (ret) 3026 break; 3027 } 3028 3029 if (ret) { 3030 mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n", 3031 ret); 3032 for (j = 0; j < i; j++) 3033 free_irq(card->msix_entries[j].vector, 3034 &card->msix_ctx[i]); 3035 pci_disable_msix(pdev); 3036 } else { 3037 mwifiex_dbg(adapter, MSG, "MSIx enabled!"); 3038 card->msix_enable = 1; 3039 return 0; 3040 } 3041 } 3042 } 3043 3044 if (pci_enable_msi(pdev) != 0) 3045 pci_disable_msi(pdev); 3046 else 3047 card->msi_enable = 1; 3048 3049 mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable); 3050 3051 card->share_irq_ctx.dev = pdev; 3052 card->share_irq_ctx.msg_id = -1; 3053 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED, 3054 "MRVL_PCIE", &card->share_irq_ctx); 3055 if (ret) { 3056 pr_err("request_irq failed: ret=%d\n", ret); 3057 return -1; 3058 } 3059 3060 return 0; 3061 } 3062 3063 /* 3064 * This function gets the firmware name for downloading by revision id 3065 * 3066 * Read revision id register to get revision id 3067 */ 3068 static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter) 3069 { 3070 int revision_id = 0; 3071 int version, magic; 3072 struct pcie_service_card *card = adapter->card; 3073 3074 switch (card->dev->device) { 3075 case PCIE_DEVICE_ID_MARVELL_88W8766P: 3076 strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME); 3077 break; 3078 case PCIE_DEVICE_ID_MARVELL_88W8897: 3079 mwifiex_write_reg(adapter, 0x0c58, 0x80c00000); 3080 mwifiex_read_reg(adapter, 0x0c58, &revision_id); 3081 revision_id &= 0xff00; 3082 switch (revision_id) { 3083 case PCIE8897_A0: 3084 strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME); 3085 break; 3086 case PCIE8897_B0: 3087 strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME); 3088 break; 3089 default: 3090 strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME); 3091 3092 break; 3093 } 3094 break; 3095 case PCIE_DEVICE_ID_MARVELL_88W8997: 3096 mwifiex_read_reg(adapter, 0x8, &revision_id); 3097 mwifiex_read_reg(adapter, 0x0cd0, &version); 3098 mwifiex_read_reg(adapter, 0x0cd4, &magic); 3099 revision_id &= 0xff; 3100 version &= 0x7; 3101 magic &= 0xff; 3102 if (revision_id == PCIE8997_A1 && 3103 magic == CHIP_MAGIC_VALUE && 3104 version == CHIP_VER_PCIEUART) 3105 strcpy(adapter->fw_name, PCIEUART8997_FW_NAME_V4); 3106 else 3107 strcpy(adapter->fw_name, PCIEUSB8997_FW_NAME_V4); 3108 break; 3109 default: 3110 break; 3111 } 3112 } 3113 3114 /* 3115 * This function registers the PCIE device. 3116 * 3117 * PCIE IRQ is claimed, block size is set and driver data is initialized. 3118 */ 3119 static int mwifiex_register_dev(struct mwifiex_adapter *adapter) 3120 { 3121 struct pcie_service_card *card = adapter->card; 3122 3123 /* save adapter pointer in card */ 3124 card->adapter = adapter; 3125 3126 if (mwifiex_pcie_request_irq(adapter)) 3127 return -1; 3128 3129 adapter->tx_buf_size = card->pcie.tx_buf_size; 3130 adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl; 3131 adapter->num_mem_types = card->pcie.num_mem_types; 3132 adapter->ext_scan = card->pcie.can_ext_scan; 3133 mwifiex_pcie_get_fw_name(adapter); 3134 3135 return 0; 3136 } 3137 3138 /* 3139 * This function unregisters the PCIE device. 3140 * 3141 * The PCIE IRQ is released, the function is disabled and driver 3142 * data is set to null. 3143 */ 3144 static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter) 3145 { 3146 struct pcie_service_card *card = adapter->card; 3147 struct pci_dev *pdev = card->dev; 3148 int i; 3149 3150 if (card->msix_enable) { 3151 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3152 synchronize_irq(card->msix_entries[i].vector); 3153 3154 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3155 free_irq(card->msix_entries[i].vector, 3156 &card->msix_ctx[i]); 3157 3158 card->msix_enable = 0; 3159 pci_disable_msix(pdev); 3160 } else { 3161 mwifiex_dbg(adapter, INFO, 3162 "%s(): calling free_irq()\n", __func__); 3163 free_irq(card->dev->irq, &card->share_irq_ctx); 3164 3165 if (card->msi_enable) 3166 pci_disable_msi(pdev); 3167 } 3168 card->adapter = NULL; 3169 } 3170 3171 /* 3172 * This function initializes the PCI-E host memory space, WCB rings, etc., 3173 * similar to mwifiex_init_pcie(), but without resetting PCI-E state. 3174 */ 3175 static void mwifiex_pcie_up_dev(struct mwifiex_adapter *adapter) 3176 { 3177 struct pcie_service_card *card = adapter->card; 3178 struct pci_dev *pdev = card->dev; 3179 3180 /* tx_buf_size might be changed to 3584 by firmware during 3181 * data transfer, we should reset it to default size. 3182 */ 3183 adapter->tx_buf_size = card->pcie.tx_buf_size; 3184 3185 mwifiex_pcie_alloc_buffers(adapter); 3186 3187 pci_set_master(pdev); 3188 } 3189 3190 /* This function cleans up the PCI-E host memory space. */ 3191 static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter) 3192 { 3193 struct pcie_service_card *card = adapter->card; 3194 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 3195 struct pci_dev *pdev = card->dev; 3196 3197 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 3198 mwifiex_dbg(adapter, ERROR, "Failed to write driver not-ready signature\n"); 3199 3200 pci_clear_master(pdev); 3201 3202 adapter->seq_num = 0; 3203 3204 mwifiex_pcie_free_buffers(adapter); 3205 } 3206 3207 static struct mwifiex_if_ops pcie_ops = { 3208 .init_if = mwifiex_init_pcie, 3209 .cleanup_if = mwifiex_cleanup_pcie, 3210 .check_fw_status = mwifiex_check_fw_status, 3211 .check_winner_status = mwifiex_check_winner_status, 3212 .prog_fw = mwifiex_prog_fw_w_helper, 3213 .register_dev = mwifiex_register_dev, 3214 .unregister_dev = mwifiex_unregister_dev, 3215 .enable_int = mwifiex_pcie_enable_host_int, 3216 .disable_int = mwifiex_pcie_disable_host_int_noerr, 3217 .process_int_status = mwifiex_process_int_status, 3218 .host_to_card = mwifiex_pcie_host_to_card, 3219 .wakeup = mwifiex_pm_wakeup_card, 3220 .wakeup_complete = mwifiex_pm_wakeup_card_complete, 3221 3222 /* PCIE specific */ 3223 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete, 3224 .event_complete = mwifiex_pcie_event_complete, 3225 .update_mp_end_port = NULL, 3226 .cleanup_mpa_buf = NULL, 3227 .init_fw_port = mwifiex_pcie_init_fw_port, 3228 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf, 3229 .card_reset = mwifiex_pcie_card_reset, 3230 .reg_dump = mwifiex_pcie_reg_dump, 3231 .device_dump = mwifiex_pcie_device_dump, 3232 .down_dev = mwifiex_pcie_down_dev, 3233 .up_dev = mwifiex_pcie_up_dev, 3234 }; 3235 3236 module_pci_driver(mwifiex_pcie); 3237 3238 MODULE_AUTHOR("Marvell International Ltd."); 3239 MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION); 3240 MODULE_VERSION(PCIE_VERSION); 3241 MODULE_LICENSE("GPL v2"); 3242