1 /* 2 * Marvell Wireless LAN device driver: PCIE specific handling 3 * 4 * Copyright (C) 2011-2014, Marvell International Ltd. 5 * 6 * This software file (the "File") is distributed by Marvell International 7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991 8 * (the "License"). You may use, redistribute and/or modify this File in 9 * accordance with the terms and conditions of the License, a copy of which 10 * is available by writing to the Free Software Foundation, Inc., 11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the 12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. 13 * 14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about 17 * this warranty disclaimer. 18 */ 19 20 #include <linux/firmware.h> 21 22 #include "decl.h" 23 #include "ioctl.h" 24 #include "util.h" 25 #include "fw.h" 26 #include "main.h" 27 #include "wmm.h" 28 #include "11n.h" 29 #include "pcie.h" 30 31 #define PCIE_VERSION "1.0" 32 #define DRV_NAME "Marvell mwifiex PCIe" 33 34 static u8 user_rmmod; 35 36 static struct mwifiex_if_ops pcie_ops; 37 38 static struct semaphore add_remove_card_sem; 39 40 static int 41 mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb, 42 size_t size, int flags) 43 { 44 struct pcie_service_card *card = adapter->card; 45 struct mwifiex_dma_mapping mapping; 46 47 mapping.addr = pci_map_single(card->dev, skb->data, size, flags); 48 if (pci_dma_mapping_error(card->dev, mapping.addr)) { 49 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n"); 50 return -1; 51 } 52 mapping.len = size; 53 mwifiex_store_mapping(skb, &mapping); 54 return 0; 55 } 56 57 static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter, 58 struct sk_buff *skb, int flags) 59 { 60 struct pcie_service_card *card = adapter->card; 61 struct mwifiex_dma_mapping mapping; 62 63 mwifiex_get_mapping(skb, &mapping); 64 pci_unmap_single(card->dev, mapping.addr, mapping.len, flags); 65 } 66 67 /* 68 * This function reads sleep cookie and checks if FW is ready 69 */ 70 static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter) 71 { 72 u32 *cookie_addr; 73 struct pcie_service_card *card = adapter->card; 74 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 75 76 if (!reg->sleep_cookie) 77 return true; 78 79 if (card->sleep_cookie_vbase) { 80 cookie_addr = (u32 *)card->sleep_cookie_vbase; 81 mwifiex_dbg(adapter, INFO, 82 "info: ACCESS_HW: sleep cookie=0x%x\n", 83 *cookie_addr); 84 if (*cookie_addr == FW_AWAKE_COOKIE) 85 return true; 86 } 87 88 return false; 89 } 90 91 #ifdef CONFIG_PM_SLEEP 92 /* 93 * Kernel needs to suspend all functions separately. Therefore all 94 * registered functions must have drivers with suspend and resume 95 * methods. Failing that the kernel simply removes the whole card. 96 * 97 * If already not suspended, this function allocates and sends a host 98 * sleep activate request to the firmware and turns off the traffic. 99 */ 100 static int mwifiex_pcie_suspend(struct device *dev) 101 { 102 struct mwifiex_adapter *adapter; 103 struct pcie_service_card *card; 104 int hs_actived; 105 struct pci_dev *pdev = to_pci_dev(dev); 106 107 if (pdev) { 108 card = pci_get_drvdata(pdev); 109 if (!card || !card->adapter) { 110 pr_err("Card or adapter structure is not valid\n"); 111 return 0; 112 } 113 } else { 114 pr_err("PCIE device is not specified\n"); 115 return 0; 116 } 117 118 adapter = card->adapter; 119 120 hs_actived = mwifiex_enable_hs(adapter); 121 122 /* Indicate device suspended */ 123 adapter->is_suspended = true; 124 adapter->hs_enabling = false; 125 126 return 0; 127 } 128 129 /* 130 * Kernel needs to suspend all functions separately. Therefore all 131 * registered functions must have drivers with suspend and resume 132 * methods. Failing that the kernel simply removes the whole card. 133 * 134 * If already not resumed, this function turns on the traffic and 135 * sends a host sleep cancel request to the firmware. 136 */ 137 static int mwifiex_pcie_resume(struct device *dev) 138 { 139 struct mwifiex_adapter *adapter; 140 struct pcie_service_card *card; 141 struct pci_dev *pdev = to_pci_dev(dev); 142 143 if (pdev) { 144 card = pci_get_drvdata(pdev); 145 if (!card || !card->adapter) { 146 pr_err("Card or adapter structure is not valid\n"); 147 return 0; 148 } 149 } else { 150 pr_err("PCIE device is not specified\n"); 151 return 0; 152 } 153 154 adapter = card->adapter; 155 156 if (!adapter->is_suspended) { 157 mwifiex_dbg(adapter, WARN, 158 "Device already resumed\n"); 159 return 0; 160 } 161 162 adapter->is_suspended = false; 163 164 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA), 165 MWIFIEX_ASYNC_CMD); 166 167 return 0; 168 } 169 #endif 170 171 /* 172 * This function probes an mwifiex device and registers it. It allocates 173 * the card structure, enables PCIE function number and initiates the 174 * device registration and initialization procedure by adding a logical 175 * interface. 176 */ 177 static int mwifiex_pcie_probe(struct pci_dev *pdev, 178 const struct pci_device_id *ent) 179 { 180 struct pcie_service_card *card; 181 182 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n", 183 pdev->vendor, pdev->device, pdev->revision); 184 185 card = kzalloc(sizeof(struct pcie_service_card), GFP_KERNEL); 186 if (!card) 187 return -ENOMEM; 188 189 card->dev = pdev; 190 191 if (ent->driver_data) { 192 struct mwifiex_pcie_device *data = (void *)ent->driver_data; 193 card->pcie.reg = data->reg; 194 card->pcie.blksz_fw_dl = data->blksz_fw_dl; 195 card->pcie.tx_buf_size = data->tx_buf_size; 196 card->pcie.can_dump_fw = data->can_dump_fw; 197 card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl; 198 card->pcie.num_mem_types = data->num_mem_types; 199 card->pcie.can_ext_scan = data->can_ext_scan; 200 } 201 202 if (mwifiex_add_card(card, &add_remove_card_sem, &pcie_ops, 203 MWIFIEX_PCIE)) { 204 pr_err("%s failed\n", __func__); 205 return -1; 206 } 207 208 return 0; 209 } 210 211 /* 212 * This function removes the interface and frees up the card structure. 213 */ 214 static void mwifiex_pcie_remove(struct pci_dev *pdev) 215 { 216 struct pcie_service_card *card; 217 struct mwifiex_adapter *adapter; 218 struct mwifiex_private *priv; 219 220 card = pci_get_drvdata(pdev); 221 if (!card) 222 return; 223 224 adapter = card->adapter; 225 if (!adapter || !adapter->priv_num) 226 return; 227 228 if (user_rmmod) { 229 #ifdef CONFIG_PM_SLEEP 230 if (adapter->is_suspended) 231 mwifiex_pcie_resume(&pdev->dev); 232 #endif 233 234 mwifiex_deauthenticate_all(adapter); 235 236 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 237 238 mwifiex_disable_auto_ds(priv); 239 240 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN); 241 } 242 243 mwifiex_remove_card(card->adapter, &add_remove_card_sem); 244 } 245 246 static void mwifiex_pcie_shutdown(struct pci_dev *pdev) 247 { 248 user_rmmod = 1; 249 mwifiex_pcie_remove(pdev); 250 251 return; 252 } 253 254 static const struct pci_device_id mwifiex_ids[] = { 255 { 256 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P, 257 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 258 .driver_data = (unsigned long)&mwifiex_pcie8766, 259 }, 260 { 261 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897, 262 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 263 .driver_data = (unsigned long)&mwifiex_pcie8897, 264 }, 265 { 266 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 267 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 268 .driver_data = (unsigned long)&mwifiex_pcie8997, 269 }, 270 { 271 PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 272 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 273 .driver_data = (unsigned long)&mwifiex_pcie8997, 274 }, 275 {}, 276 }; 277 278 MODULE_DEVICE_TABLE(pci, mwifiex_ids); 279 280 #ifdef CONFIG_PM_SLEEP 281 /* Power Management Hooks */ 282 static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend, 283 mwifiex_pcie_resume); 284 #endif 285 286 /* PCI Device Driver */ 287 static struct pci_driver __refdata mwifiex_pcie = { 288 .name = "mwifiex_pcie", 289 .id_table = mwifiex_ids, 290 .probe = mwifiex_pcie_probe, 291 .remove = mwifiex_pcie_remove, 292 #ifdef CONFIG_PM_SLEEP 293 .driver = { 294 .pm = &mwifiex_pcie_pm_ops, 295 }, 296 #endif 297 .shutdown = mwifiex_pcie_shutdown, 298 }; 299 300 /* 301 * This function writes data into PCIE card register. 302 */ 303 static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data) 304 { 305 struct pcie_service_card *card = adapter->card; 306 307 iowrite32(data, card->pci_mmap1 + reg); 308 309 return 0; 310 } 311 312 /* 313 * This function reads data from PCIE card register. 314 */ 315 static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data) 316 { 317 struct pcie_service_card *card = adapter->card; 318 319 *data = ioread32(card->pci_mmap1 + reg); 320 if (*data == 0xffffffff) 321 return 0xffffffff; 322 323 return 0; 324 } 325 326 /* This function reads u8 data from PCIE card register. */ 327 static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter, 328 int reg, u8 *data) 329 { 330 struct pcie_service_card *card = adapter->card; 331 332 *data = ioread8(card->pci_mmap1 + reg); 333 334 return 0; 335 } 336 337 /* 338 * This function adds delay loop to ensure FW is awake before proceeding. 339 */ 340 static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter) 341 { 342 int i = 0; 343 344 while (mwifiex_pcie_ok_to_access_hw(adapter)) { 345 i++; 346 usleep_range(10, 20); 347 /* 50ms max wait */ 348 if (i == 5000) 349 break; 350 } 351 352 return; 353 } 354 355 static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter, 356 u32 max_delay_loop_cnt) 357 { 358 struct pcie_service_card *card = adapter->card; 359 u8 *buffer; 360 u32 sleep_cookie, count; 361 362 for (count = 0; count < max_delay_loop_cnt; count++) { 363 buffer = card->cmdrsp_buf->data - INTF_HEADER_LEN; 364 sleep_cookie = *(u32 *)buffer; 365 366 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) { 367 mwifiex_dbg(adapter, INFO, 368 "sleep cookie found at count %d\n", count); 369 break; 370 } 371 usleep_range(20, 30); 372 } 373 374 if (count >= max_delay_loop_cnt) 375 mwifiex_dbg(adapter, INFO, 376 "max count reached while accessing sleep cookie\n"); 377 } 378 379 /* This function wakes up the card by reading fw_status register. */ 380 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) 381 { 382 u32 fw_status; 383 struct pcie_service_card *card = adapter->card; 384 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 385 386 mwifiex_dbg(adapter, EVENT, 387 "event: Wakeup device...\n"); 388 389 if (reg->sleep_cookie) 390 mwifiex_pcie_dev_wakeup_delay(adapter); 391 392 /* Reading fw_status register will wakeup device */ 393 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) { 394 mwifiex_dbg(adapter, ERROR, 395 "Reading fw_status register failed\n"); 396 return -1; 397 } 398 399 if (reg->sleep_cookie) { 400 mwifiex_pcie_dev_wakeup_delay(adapter); 401 mwifiex_dbg(adapter, INFO, 402 "PCIE wakeup: Setting PS_STATE_AWAKE\n"); 403 adapter->ps_state = PS_STATE_AWAKE; 404 } 405 406 return 0; 407 } 408 409 /* 410 * This function is called after the card has woken up. 411 * 412 * The card configuration register is reset. 413 */ 414 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter) 415 { 416 mwifiex_dbg(adapter, CMD, 417 "cmd: Wakeup device completed\n"); 418 419 return 0; 420 } 421 422 /* 423 * This function disables the host interrupt. 424 * 425 * The host interrupt mask is read, the disable bit is reset and 426 * written back to the card host interrupt mask register. 427 */ 428 static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter) 429 { 430 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 431 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 432 0x00000000)) { 433 mwifiex_dbg(adapter, ERROR, 434 "Disable host interrupt failed\n"); 435 return -1; 436 } 437 } 438 439 return 0; 440 } 441 442 static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter) 443 { 444 WARN_ON(mwifiex_pcie_disable_host_int(adapter)); 445 } 446 447 /* 448 * This function enables the host interrupt. 449 * 450 * The host interrupt enable mask is written to the card 451 * host interrupt mask register. 452 */ 453 static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter) 454 { 455 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 456 /* Simply write the mask to the register */ 457 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 458 HOST_INTR_MASK)) { 459 mwifiex_dbg(adapter, ERROR, 460 "Enable host interrupt failed\n"); 461 return -1; 462 } 463 } 464 465 return 0; 466 } 467 468 /* 469 * This function initializes TX buffer ring descriptors 470 */ 471 static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter) 472 { 473 struct pcie_service_card *card = adapter->card; 474 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 475 struct mwifiex_pcie_buf_desc *desc; 476 struct mwifiex_pfu_buf_desc *desc2; 477 int i; 478 479 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 480 card->tx_buf_list[i] = NULL; 481 if (reg->pfu_enabled) { 482 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 483 (sizeof(*desc2) * i); 484 desc2 = card->txbd_ring[i]; 485 memset(desc2, 0, sizeof(*desc2)); 486 } else { 487 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 488 (sizeof(*desc) * i); 489 desc = card->txbd_ring[i]; 490 memset(desc, 0, sizeof(*desc)); 491 } 492 } 493 494 return 0; 495 } 496 497 /* This function initializes RX buffer ring descriptors. Each SKB is allocated 498 * here and after mapping PCI memory, its physical address is assigned to 499 * PCIE Rx buffer descriptor's physical address. 500 */ 501 static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter) 502 { 503 struct pcie_service_card *card = adapter->card; 504 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 505 struct sk_buff *skb; 506 struct mwifiex_pcie_buf_desc *desc; 507 struct mwifiex_pfu_buf_desc *desc2; 508 dma_addr_t buf_pa; 509 int i; 510 511 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 512 /* Allocate skb here so that firmware can DMA data from it */ 513 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 514 GFP_KERNEL); 515 if (!skb) { 516 mwifiex_dbg(adapter, ERROR, 517 "Unable to allocate skb for RX ring.\n"); 518 kfree(card->rxbd_ring_vbase); 519 return -ENOMEM; 520 } 521 522 if (mwifiex_map_pci_memory(adapter, skb, 523 MWIFIEX_RX_DATA_BUF_SIZE, 524 PCI_DMA_FROMDEVICE)) 525 return -1; 526 527 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 528 529 mwifiex_dbg(adapter, INFO, 530 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 531 skb, skb->len, skb->data, (u32)buf_pa, 532 (u32)((u64)buf_pa >> 32)); 533 534 card->rx_buf_list[i] = skb; 535 if (reg->pfu_enabled) { 536 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase + 537 (sizeof(*desc2) * i); 538 desc2 = card->rxbd_ring[i]; 539 desc2->paddr = buf_pa; 540 desc2->len = (u16)skb->len; 541 desc2->frag_len = (u16)skb->len; 542 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop; 543 desc2->offset = 0; 544 } else { 545 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase + 546 (sizeof(*desc) * i)); 547 desc = card->rxbd_ring[i]; 548 desc->paddr = buf_pa; 549 desc->len = (u16)skb->len; 550 desc->flags = 0; 551 } 552 } 553 554 return 0; 555 } 556 557 /* This function initializes event buffer ring descriptors. Each SKB is 558 * allocated here and after mapping PCI memory, its physical address is assigned 559 * to PCIE Rx buffer descriptor's physical address 560 */ 561 static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter) 562 { 563 struct pcie_service_card *card = adapter->card; 564 struct mwifiex_evt_buf_desc *desc; 565 struct sk_buff *skb; 566 dma_addr_t buf_pa; 567 int i; 568 569 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 570 /* Allocate skb here so that firmware can DMA data from it */ 571 skb = dev_alloc_skb(MAX_EVENT_SIZE); 572 if (!skb) { 573 mwifiex_dbg(adapter, ERROR, 574 "Unable to allocate skb for EVENT buf.\n"); 575 kfree(card->evtbd_ring_vbase); 576 return -ENOMEM; 577 } 578 skb_put(skb, MAX_EVENT_SIZE); 579 580 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE, 581 PCI_DMA_FROMDEVICE)) 582 return -1; 583 584 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 585 586 mwifiex_dbg(adapter, EVENT, 587 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 588 skb, skb->len, skb->data, (u32)buf_pa, 589 (u32)((u64)buf_pa >> 32)); 590 591 card->evt_buf_list[i] = skb; 592 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase + 593 (sizeof(*desc) * i)); 594 desc = card->evtbd_ring[i]; 595 desc->paddr = buf_pa; 596 desc->len = (u16)skb->len; 597 desc->flags = 0; 598 } 599 600 return 0; 601 } 602 603 /* This function cleans up TX buffer rings. If any of the buffer list has valid 604 * SKB address, associated SKB is freed. 605 */ 606 static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter) 607 { 608 struct pcie_service_card *card = adapter->card; 609 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 610 struct sk_buff *skb; 611 struct mwifiex_pcie_buf_desc *desc; 612 struct mwifiex_pfu_buf_desc *desc2; 613 int i; 614 615 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 616 if (reg->pfu_enabled) { 617 desc2 = card->txbd_ring[i]; 618 if (card->tx_buf_list[i]) { 619 skb = card->tx_buf_list[i]; 620 mwifiex_unmap_pci_memory(adapter, skb, 621 PCI_DMA_TODEVICE); 622 dev_kfree_skb_any(skb); 623 } 624 memset(desc2, 0, sizeof(*desc2)); 625 } else { 626 desc = card->txbd_ring[i]; 627 if (card->tx_buf_list[i]) { 628 skb = card->tx_buf_list[i]; 629 mwifiex_unmap_pci_memory(adapter, skb, 630 PCI_DMA_TODEVICE); 631 dev_kfree_skb_any(skb); 632 } 633 memset(desc, 0, sizeof(*desc)); 634 } 635 card->tx_buf_list[i] = NULL; 636 } 637 638 return; 639 } 640 641 /* This function cleans up RX buffer rings. If any of the buffer list has valid 642 * SKB address, associated SKB is freed. 643 */ 644 static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter) 645 { 646 struct pcie_service_card *card = adapter->card; 647 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 648 struct mwifiex_pcie_buf_desc *desc; 649 struct mwifiex_pfu_buf_desc *desc2; 650 struct sk_buff *skb; 651 int i; 652 653 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 654 if (reg->pfu_enabled) { 655 desc2 = card->rxbd_ring[i]; 656 if (card->rx_buf_list[i]) { 657 skb = card->rx_buf_list[i]; 658 mwifiex_unmap_pci_memory(adapter, skb, 659 PCI_DMA_FROMDEVICE); 660 dev_kfree_skb_any(skb); 661 } 662 memset(desc2, 0, sizeof(*desc2)); 663 } else { 664 desc = card->rxbd_ring[i]; 665 if (card->rx_buf_list[i]) { 666 skb = card->rx_buf_list[i]; 667 mwifiex_unmap_pci_memory(adapter, skb, 668 PCI_DMA_FROMDEVICE); 669 dev_kfree_skb_any(skb); 670 } 671 memset(desc, 0, sizeof(*desc)); 672 } 673 card->rx_buf_list[i] = NULL; 674 } 675 676 return; 677 } 678 679 /* This function cleans up event buffer rings. If any of the buffer list has 680 * valid SKB address, associated SKB is freed. 681 */ 682 static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter) 683 { 684 struct pcie_service_card *card = adapter->card; 685 struct mwifiex_evt_buf_desc *desc; 686 struct sk_buff *skb; 687 int i; 688 689 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 690 desc = card->evtbd_ring[i]; 691 if (card->evt_buf_list[i]) { 692 skb = card->evt_buf_list[i]; 693 mwifiex_unmap_pci_memory(adapter, skb, 694 PCI_DMA_FROMDEVICE); 695 dev_kfree_skb_any(skb); 696 } 697 card->evt_buf_list[i] = NULL; 698 memset(desc, 0, sizeof(*desc)); 699 } 700 701 return; 702 } 703 704 /* This function creates buffer descriptor ring for TX 705 */ 706 static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter) 707 { 708 struct pcie_service_card *card = adapter->card; 709 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 710 711 /* 712 * driver maintaines the write pointer and firmware maintaines the read 713 * pointer. The write pointer starts at 0 (zero) while the read pointer 714 * starts at zero with rollover bit set 715 */ 716 card->txbd_wrptr = 0; 717 718 if (reg->pfu_enabled) 719 card->txbd_rdptr = 0; 720 else 721 card->txbd_rdptr |= reg->tx_rollover_ind; 722 723 /* allocate shared memory for the BD ring and divide the same in to 724 several descriptors */ 725 if (reg->pfu_enabled) 726 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 727 MWIFIEX_MAX_TXRX_BD; 728 else 729 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 730 MWIFIEX_MAX_TXRX_BD; 731 732 mwifiex_dbg(adapter, INFO, 733 "info: txbd_ring: Allocating %d bytes\n", 734 card->txbd_ring_size); 735 card->txbd_ring_vbase = pci_alloc_consistent(card->dev, 736 card->txbd_ring_size, 737 &card->txbd_ring_pbase); 738 if (!card->txbd_ring_vbase) { 739 mwifiex_dbg(adapter, ERROR, 740 "allocate consistent memory (%d bytes) failed!\n", 741 card->txbd_ring_size); 742 return -ENOMEM; 743 } 744 mwifiex_dbg(adapter, DATA, 745 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n", 746 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase, 747 (u32)((u64)card->txbd_ring_pbase >> 32), 748 card->txbd_ring_size); 749 750 return mwifiex_init_txq_ring(adapter); 751 } 752 753 static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter) 754 { 755 struct pcie_service_card *card = adapter->card; 756 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 757 758 mwifiex_cleanup_txq_ring(adapter); 759 760 if (card->txbd_ring_vbase) 761 pci_free_consistent(card->dev, card->txbd_ring_size, 762 card->txbd_ring_vbase, 763 card->txbd_ring_pbase); 764 card->txbd_ring_size = 0; 765 card->txbd_wrptr = 0; 766 card->txbd_rdptr = 0 | reg->tx_rollover_ind; 767 card->txbd_ring_vbase = NULL; 768 card->txbd_ring_pbase = 0; 769 770 return 0; 771 } 772 773 /* 774 * This function creates buffer descriptor ring for RX 775 */ 776 static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter) 777 { 778 struct pcie_service_card *card = adapter->card; 779 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 780 781 /* 782 * driver maintaines the read pointer and firmware maintaines the write 783 * pointer. The write pointer starts at 0 (zero) while the read pointer 784 * starts at zero with rollover bit set 785 */ 786 card->rxbd_wrptr = 0; 787 card->rxbd_rdptr = reg->rx_rollover_ind; 788 789 if (reg->pfu_enabled) 790 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 791 MWIFIEX_MAX_TXRX_BD; 792 else 793 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 794 MWIFIEX_MAX_TXRX_BD; 795 796 mwifiex_dbg(adapter, INFO, 797 "info: rxbd_ring: Allocating %d bytes\n", 798 card->rxbd_ring_size); 799 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev, 800 card->rxbd_ring_size, 801 &card->rxbd_ring_pbase); 802 if (!card->rxbd_ring_vbase) { 803 mwifiex_dbg(adapter, ERROR, 804 "allocate consistent memory (%d bytes) failed!\n", 805 card->rxbd_ring_size); 806 return -ENOMEM; 807 } 808 809 mwifiex_dbg(adapter, DATA, 810 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n", 811 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase, 812 (u32)((u64)card->rxbd_ring_pbase >> 32), 813 card->rxbd_ring_size); 814 815 return mwifiex_init_rxq_ring(adapter); 816 } 817 818 /* 819 * This function deletes Buffer descriptor ring for RX 820 */ 821 static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter) 822 { 823 struct pcie_service_card *card = adapter->card; 824 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 825 826 mwifiex_cleanup_rxq_ring(adapter); 827 828 if (card->rxbd_ring_vbase) 829 pci_free_consistent(card->dev, card->rxbd_ring_size, 830 card->rxbd_ring_vbase, 831 card->rxbd_ring_pbase); 832 card->rxbd_ring_size = 0; 833 card->rxbd_wrptr = 0; 834 card->rxbd_rdptr = 0 | reg->rx_rollover_ind; 835 card->rxbd_ring_vbase = NULL; 836 card->rxbd_ring_pbase = 0; 837 838 return 0; 839 } 840 841 /* 842 * This function creates buffer descriptor ring for Events 843 */ 844 static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter) 845 { 846 struct pcie_service_card *card = adapter->card; 847 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 848 849 /* 850 * driver maintaines the read pointer and firmware maintaines the write 851 * pointer. The write pointer starts at 0 (zero) while the read pointer 852 * starts at zero with rollover bit set 853 */ 854 card->evtbd_wrptr = 0; 855 card->evtbd_rdptr = reg->evt_rollover_ind; 856 857 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) * 858 MWIFIEX_MAX_EVT_BD; 859 860 mwifiex_dbg(adapter, INFO, 861 "info: evtbd_ring: Allocating %d bytes\n", 862 card->evtbd_ring_size); 863 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev, 864 card->evtbd_ring_size, 865 &card->evtbd_ring_pbase); 866 if (!card->evtbd_ring_vbase) { 867 mwifiex_dbg(adapter, ERROR, 868 "allocate consistent memory (%d bytes) failed!\n", 869 card->evtbd_ring_size); 870 return -ENOMEM; 871 } 872 873 mwifiex_dbg(adapter, EVENT, 874 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n", 875 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase, 876 (u32)((u64)card->evtbd_ring_pbase >> 32), 877 card->evtbd_ring_size); 878 879 return mwifiex_pcie_init_evt_ring(adapter); 880 } 881 882 /* 883 * This function deletes Buffer descriptor ring for Events 884 */ 885 static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter) 886 { 887 struct pcie_service_card *card = adapter->card; 888 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 889 890 mwifiex_cleanup_evt_ring(adapter); 891 892 if (card->evtbd_ring_vbase) 893 pci_free_consistent(card->dev, card->evtbd_ring_size, 894 card->evtbd_ring_vbase, 895 card->evtbd_ring_pbase); 896 card->evtbd_wrptr = 0; 897 card->evtbd_rdptr = 0 | reg->evt_rollover_ind; 898 card->evtbd_ring_size = 0; 899 card->evtbd_ring_vbase = NULL; 900 card->evtbd_ring_pbase = 0; 901 902 return 0; 903 } 904 905 /* 906 * This function allocates a buffer for CMDRSP 907 */ 908 static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter) 909 { 910 struct pcie_service_card *card = adapter->card; 911 struct sk_buff *skb; 912 913 /* Allocate memory for receiving command response data */ 914 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 915 if (!skb) { 916 mwifiex_dbg(adapter, ERROR, 917 "Unable to allocate skb for command response data.\n"); 918 return -ENOMEM; 919 } 920 skb_put(skb, MWIFIEX_UPLD_SIZE); 921 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 922 PCI_DMA_FROMDEVICE)) 923 return -1; 924 925 card->cmdrsp_buf = skb; 926 927 return 0; 928 } 929 930 /* 931 * This function deletes a buffer for CMDRSP 932 */ 933 static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter) 934 { 935 struct pcie_service_card *card; 936 937 if (!adapter) 938 return 0; 939 940 card = adapter->card; 941 942 if (card && card->cmdrsp_buf) { 943 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf, 944 PCI_DMA_FROMDEVICE); 945 dev_kfree_skb_any(card->cmdrsp_buf); 946 } 947 948 if (card && card->cmd_buf) { 949 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 950 PCI_DMA_TODEVICE); 951 } 952 return 0; 953 } 954 955 /* 956 * This function allocates a buffer for sleep cookie 957 */ 958 static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter) 959 { 960 struct pcie_service_card *card = adapter->card; 961 962 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32), 963 &card->sleep_cookie_pbase); 964 if (!card->sleep_cookie_vbase) { 965 mwifiex_dbg(adapter, ERROR, 966 "pci_alloc_consistent failed!\n"); 967 return -ENOMEM; 968 } 969 /* Init val of Sleep Cookie */ 970 *(u32 *)card->sleep_cookie_vbase = FW_AWAKE_COOKIE; 971 972 mwifiex_dbg(adapter, INFO, 973 "alloc_scook: sleep cookie=0x%x\n", 974 *((u32 *)card->sleep_cookie_vbase)); 975 976 return 0; 977 } 978 979 /* 980 * This function deletes buffer for sleep cookie 981 */ 982 static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter) 983 { 984 struct pcie_service_card *card; 985 986 if (!adapter) 987 return 0; 988 989 card = adapter->card; 990 991 if (card && card->sleep_cookie_vbase) { 992 pci_free_consistent(card->dev, sizeof(u32), 993 card->sleep_cookie_vbase, 994 card->sleep_cookie_pbase); 995 card->sleep_cookie_vbase = NULL; 996 } 997 998 return 0; 999 } 1000 1001 /* This function flushes the TX buffer descriptor ring 1002 * This function defined as handler is also called while cleaning TXRX 1003 * during disconnect/ bss stop. 1004 */ 1005 static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter) 1006 { 1007 struct pcie_service_card *card = adapter->card; 1008 1009 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) { 1010 card->txbd_flush = 1; 1011 /* write pointer already set at last send 1012 * send dnld-rdy intr again, wait for completion. 1013 */ 1014 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1015 CPU_INTR_DNLD_RDY)) { 1016 mwifiex_dbg(adapter, ERROR, 1017 "failed to assert dnld-rdy interrupt.\n"); 1018 return -1; 1019 } 1020 } 1021 return 0; 1022 } 1023 1024 /* 1025 * This function unmaps and frees downloaded data buffer 1026 */ 1027 static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter) 1028 { 1029 struct sk_buff *skb; 1030 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0; 1031 struct mwifiex_pcie_buf_desc *desc; 1032 struct mwifiex_pfu_buf_desc *desc2; 1033 struct pcie_service_card *card = adapter->card; 1034 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1035 1036 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1037 mwifiex_pm_wakeup_card(adapter); 1038 1039 /* Read the TX ring read pointer set by firmware */ 1040 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) { 1041 mwifiex_dbg(adapter, ERROR, 1042 "SEND COMP: failed to read reg->tx_rdptr\n"); 1043 return -1; 1044 } 1045 1046 mwifiex_dbg(adapter, DATA, 1047 "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n", 1048 card->txbd_rdptr, rdptr); 1049 1050 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1051 /* free from previous txbd_rdptr to current txbd_rdptr */ 1052 while (((card->txbd_rdptr & reg->tx_mask) != 1053 (rdptr & reg->tx_mask)) || 1054 ((card->txbd_rdptr & reg->tx_rollover_ind) != 1055 (rdptr & reg->tx_rollover_ind))) { 1056 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >> 1057 reg->tx_start_ptr; 1058 1059 skb = card->tx_buf_list[wrdoneidx]; 1060 1061 if (skb) { 1062 mwifiex_dbg(adapter, DATA, 1063 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n", 1064 skb, wrdoneidx); 1065 mwifiex_unmap_pci_memory(adapter, skb, 1066 PCI_DMA_TODEVICE); 1067 1068 unmap_count++; 1069 1070 if (card->txbd_flush) 1071 mwifiex_write_data_complete(adapter, skb, 0, 1072 -1); 1073 else 1074 mwifiex_write_data_complete(adapter, skb, 0, 0); 1075 } 1076 1077 card->tx_buf_list[wrdoneidx] = NULL; 1078 1079 if (reg->pfu_enabled) { 1080 desc2 = card->txbd_ring[wrdoneidx]; 1081 memset(desc2, 0, sizeof(*desc2)); 1082 } else { 1083 desc = card->txbd_ring[wrdoneidx]; 1084 memset(desc, 0, sizeof(*desc)); 1085 } 1086 switch (card->dev->device) { 1087 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1088 card->txbd_rdptr++; 1089 break; 1090 case PCIE_DEVICE_ID_MARVELL_88W8897: 1091 case PCIE_DEVICE_ID_MARVELL_88W8997: 1092 card->txbd_rdptr += reg->ring_tx_start_ptr; 1093 break; 1094 } 1095 1096 1097 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs) 1098 card->txbd_rdptr = ((card->txbd_rdptr & 1099 reg->tx_rollover_ind) ^ 1100 reg->tx_rollover_ind); 1101 } 1102 1103 if (unmap_count) 1104 adapter->data_sent = false; 1105 1106 if (card->txbd_flush) { 1107 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) 1108 card->txbd_flush = 0; 1109 else 1110 mwifiex_clean_pcie_ring_buf(adapter); 1111 } 1112 1113 return 0; 1114 } 1115 1116 /* This function sends data buffer to device. First 4 bytes of payload 1117 * are filled with payload length and payload type. Then this payload 1118 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly. 1119 * Download ready interrupt to FW is deffered if Tx ring is not full and 1120 * additional payload can be accomodated. 1121 * Caller must ensure tx_param parameter to this function is not NULL. 1122 */ 1123 static int 1124 mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb, 1125 struct mwifiex_tx_param *tx_param) 1126 { 1127 struct pcie_service_card *card = adapter->card; 1128 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1129 u32 wrindx, num_tx_buffs, rx_val; 1130 int ret; 1131 dma_addr_t buf_pa; 1132 struct mwifiex_pcie_buf_desc *desc = NULL; 1133 struct mwifiex_pfu_buf_desc *desc2 = NULL; 1134 __le16 *tmp; 1135 1136 if (!(skb->data && skb->len)) { 1137 mwifiex_dbg(adapter, ERROR, 1138 "%s(): invalid parameter <%p, %#x>\n", 1139 __func__, skb->data, skb->len); 1140 return -1; 1141 } 1142 1143 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1144 mwifiex_pm_wakeup_card(adapter); 1145 1146 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1147 mwifiex_dbg(adapter, DATA, 1148 "info: SEND DATA: <Rd: %#x, Wr: %#x>\n", 1149 card->txbd_rdptr, card->txbd_wrptr); 1150 if (mwifiex_pcie_txbd_not_full(card)) { 1151 u8 *payload; 1152 1153 adapter->data_sent = true; 1154 payload = skb->data; 1155 tmp = (__le16 *)&payload[0]; 1156 *tmp = cpu_to_le16((u16)skb->len); 1157 tmp = (__le16 *)&payload[2]; 1158 *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA); 1159 1160 if (mwifiex_map_pci_memory(adapter, skb, skb->len, 1161 PCI_DMA_TODEVICE)) 1162 return -1; 1163 1164 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr; 1165 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1166 card->tx_buf_list[wrindx] = skb; 1167 1168 if (reg->pfu_enabled) { 1169 desc2 = card->txbd_ring[wrindx]; 1170 desc2->paddr = buf_pa; 1171 desc2->len = (u16)skb->len; 1172 desc2->frag_len = (u16)skb->len; 1173 desc2->offset = 0; 1174 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1175 MWIFIEX_BD_FLAG_LAST_DESC; 1176 } else { 1177 desc = card->txbd_ring[wrindx]; 1178 desc->paddr = buf_pa; 1179 desc->len = (u16)skb->len; 1180 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1181 MWIFIEX_BD_FLAG_LAST_DESC; 1182 } 1183 1184 switch (card->dev->device) { 1185 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1186 card->txbd_wrptr++; 1187 break; 1188 case PCIE_DEVICE_ID_MARVELL_88W8897: 1189 case PCIE_DEVICE_ID_MARVELL_88W8997: 1190 card->txbd_wrptr += reg->ring_tx_start_ptr; 1191 break; 1192 } 1193 1194 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs) 1195 card->txbd_wrptr = ((card->txbd_wrptr & 1196 reg->tx_rollover_ind) ^ 1197 reg->tx_rollover_ind); 1198 1199 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask; 1200 /* Write the TX ring write pointer in to reg->tx_wrptr */ 1201 if (mwifiex_write_reg(adapter, reg->tx_wrptr, 1202 card->txbd_wrptr | rx_val)) { 1203 mwifiex_dbg(adapter, ERROR, 1204 "SEND DATA: failed to write reg->tx_wrptr\n"); 1205 ret = -1; 1206 goto done_unmap; 1207 } 1208 if ((mwifiex_pcie_txbd_not_full(card)) && 1209 tx_param->next_pkt_len) { 1210 /* have more packets and TxBD still can hold more */ 1211 mwifiex_dbg(adapter, DATA, 1212 "SEND DATA: delay dnld-rdy interrupt.\n"); 1213 adapter->data_sent = false; 1214 } else { 1215 /* Send the TX ready interrupt */ 1216 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1217 CPU_INTR_DNLD_RDY)) { 1218 mwifiex_dbg(adapter, ERROR, 1219 "SEND DATA: failed to assert dnld-rdy interrupt.\n"); 1220 ret = -1; 1221 goto done_unmap; 1222 } 1223 } 1224 mwifiex_dbg(adapter, DATA, 1225 "info: SEND DATA: Updated <Rd: %#x, Wr:\t" 1226 "%#x> and sent packet to firmware successfully\n", 1227 card->txbd_rdptr, card->txbd_wrptr); 1228 } else { 1229 mwifiex_dbg(adapter, DATA, 1230 "info: TX Ring full, can't send packets to fw\n"); 1231 adapter->data_sent = true; 1232 /* Send the TX ready interrupt */ 1233 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1234 CPU_INTR_DNLD_RDY)) 1235 mwifiex_dbg(adapter, ERROR, 1236 "SEND DATA: failed to assert door-bell intr\n"); 1237 return -EBUSY; 1238 } 1239 1240 return -EINPROGRESS; 1241 done_unmap: 1242 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1243 card->tx_buf_list[wrindx] = NULL; 1244 if (reg->pfu_enabled) 1245 memset(desc2, 0, sizeof(*desc2)); 1246 else 1247 memset(desc, 0, sizeof(*desc)); 1248 1249 return ret; 1250 } 1251 1252 /* 1253 * This function handles received buffer ring and 1254 * dispatches packets to upper 1255 */ 1256 static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter) 1257 { 1258 struct pcie_service_card *card = adapter->card; 1259 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1260 u32 wrptr, rd_index, tx_val; 1261 dma_addr_t buf_pa; 1262 int ret = 0; 1263 struct sk_buff *skb_tmp = NULL; 1264 struct mwifiex_pcie_buf_desc *desc; 1265 struct mwifiex_pfu_buf_desc *desc2; 1266 1267 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1268 mwifiex_pm_wakeup_card(adapter); 1269 1270 /* Read the RX ring Write pointer set by firmware */ 1271 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1272 mwifiex_dbg(adapter, ERROR, 1273 "RECV DATA: failed to read reg->rx_wrptr\n"); 1274 ret = -1; 1275 goto done; 1276 } 1277 card->rxbd_wrptr = wrptr; 1278 1279 while (((wrptr & reg->rx_mask) != 1280 (card->rxbd_rdptr & reg->rx_mask)) || 1281 ((wrptr & reg->rx_rollover_ind) == 1282 (card->rxbd_rdptr & reg->rx_rollover_ind))) { 1283 struct sk_buff *skb_data; 1284 u16 rx_len; 1285 __le16 pkt_len; 1286 1287 rd_index = card->rxbd_rdptr & reg->rx_mask; 1288 skb_data = card->rx_buf_list[rd_index]; 1289 1290 /* If skb allocation was failed earlier for Rx packet, 1291 * rx_buf_list[rd_index] would have been left with a NULL. 1292 */ 1293 if (!skb_data) 1294 return -ENOMEM; 1295 1296 mwifiex_unmap_pci_memory(adapter, skb_data, PCI_DMA_FROMDEVICE); 1297 card->rx_buf_list[rd_index] = NULL; 1298 1299 /* Get data length from interface header - 1300 * first 2 bytes for len, next 2 bytes is for type 1301 */ 1302 pkt_len = *((__le16 *)skb_data->data); 1303 rx_len = le16_to_cpu(pkt_len); 1304 if (WARN_ON(rx_len <= INTF_HEADER_LEN || 1305 rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) { 1306 mwifiex_dbg(adapter, ERROR, 1307 "Invalid RX len %d, Rd=%#x, Wr=%#x\n", 1308 rx_len, card->rxbd_rdptr, wrptr); 1309 dev_kfree_skb_any(skb_data); 1310 } else { 1311 skb_put(skb_data, rx_len); 1312 mwifiex_dbg(adapter, DATA, 1313 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n", 1314 card->rxbd_rdptr, wrptr, rx_len); 1315 skb_pull(skb_data, INTF_HEADER_LEN); 1316 if (adapter->rx_work_enabled) { 1317 skb_queue_tail(&adapter->rx_data_q, skb_data); 1318 adapter->data_received = true; 1319 atomic_inc(&adapter->rx_pending); 1320 } else { 1321 mwifiex_handle_rx_packet(adapter, skb_data); 1322 } 1323 } 1324 1325 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 1326 GFP_KERNEL); 1327 if (!skb_tmp) { 1328 mwifiex_dbg(adapter, ERROR, 1329 "Unable to allocate skb.\n"); 1330 return -ENOMEM; 1331 } 1332 1333 if (mwifiex_map_pci_memory(adapter, skb_tmp, 1334 MWIFIEX_RX_DATA_BUF_SIZE, 1335 PCI_DMA_FROMDEVICE)) 1336 return -1; 1337 1338 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp); 1339 1340 mwifiex_dbg(adapter, INFO, 1341 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n", 1342 skb_tmp, rd_index); 1343 card->rx_buf_list[rd_index] = skb_tmp; 1344 1345 if (reg->pfu_enabled) { 1346 desc2 = card->rxbd_ring[rd_index]; 1347 desc2->paddr = buf_pa; 1348 desc2->len = skb_tmp->len; 1349 desc2->frag_len = skb_tmp->len; 1350 desc2->offset = 0; 1351 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop; 1352 } else { 1353 desc = card->rxbd_ring[rd_index]; 1354 desc->paddr = buf_pa; 1355 desc->len = skb_tmp->len; 1356 desc->flags = 0; 1357 } 1358 1359 if ((++card->rxbd_rdptr & reg->rx_mask) == 1360 MWIFIEX_MAX_TXRX_BD) { 1361 card->rxbd_rdptr = ((card->rxbd_rdptr & 1362 reg->rx_rollover_ind) ^ 1363 reg->rx_rollover_ind); 1364 } 1365 mwifiex_dbg(adapter, DATA, 1366 "info: RECV DATA: <Rd: %#x, Wr: %#x>\n", 1367 card->rxbd_rdptr, wrptr); 1368 1369 tx_val = card->txbd_wrptr & reg->tx_wrap_mask; 1370 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1371 if (mwifiex_write_reg(adapter, reg->rx_rdptr, 1372 card->rxbd_rdptr | tx_val)) { 1373 mwifiex_dbg(adapter, DATA, 1374 "RECV DATA: failed to write reg->rx_rdptr\n"); 1375 ret = -1; 1376 goto done; 1377 } 1378 1379 /* Read the RX ring Write pointer set by firmware */ 1380 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1381 mwifiex_dbg(adapter, ERROR, 1382 "RECV DATA: failed to read reg->rx_wrptr\n"); 1383 ret = -1; 1384 goto done; 1385 } 1386 mwifiex_dbg(adapter, DATA, 1387 "info: RECV DATA: Rcvd packet from fw successfully\n"); 1388 card->rxbd_wrptr = wrptr; 1389 } 1390 1391 done: 1392 return ret; 1393 } 1394 1395 /* 1396 * This function downloads the boot command to device 1397 */ 1398 static int 1399 mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1400 { 1401 dma_addr_t buf_pa; 1402 struct pcie_service_card *card = adapter->card; 1403 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1404 1405 if (!(skb->data && skb->len)) { 1406 mwifiex_dbg(adapter, ERROR, 1407 "Invalid parameter in %s <%p. len %d>\n", 1408 __func__, skb->data, skb->len); 1409 return -1; 1410 } 1411 1412 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE)) 1413 return -1; 1414 1415 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1416 1417 /* Write the lower 32bits of the physical address to low command 1418 * address scratch register 1419 */ 1420 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) { 1421 mwifiex_dbg(adapter, ERROR, 1422 "%s: failed to write download command to boot code.\n", 1423 __func__); 1424 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1425 return -1; 1426 } 1427 1428 /* Write the upper 32bits of the physical address to high command 1429 * address scratch register 1430 */ 1431 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1432 (u32)((u64)buf_pa >> 32))) { 1433 mwifiex_dbg(adapter, ERROR, 1434 "%s: failed to write download command to boot code.\n", 1435 __func__); 1436 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1437 return -1; 1438 } 1439 1440 /* Write the command length to cmd_size scratch register */ 1441 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) { 1442 mwifiex_dbg(adapter, ERROR, 1443 "%s: failed to write command len to cmd_size scratch reg\n", 1444 __func__); 1445 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1446 return -1; 1447 } 1448 1449 /* Ring the door bell */ 1450 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1451 CPU_INTR_DOOR_BELL)) { 1452 mwifiex_dbg(adapter, ERROR, 1453 "%s: failed to assert door-bell intr\n", __func__); 1454 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1455 return -1; 1456 } 1457 1458 return 0; 1459 } 1460 1461 /* This function init rx port in firmware which in turn enables to receive data 1462 * from device before transmitting any packet. 1463 */ 1464 static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter) 1465 { 1466 struct pcie_service_card *card = adapter->card; 1467 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1468 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask; 1469 1470 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1471 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr | 1472 tx_wrap)) { 1473 mwifiex_dbg(adapter, ERROR, 1474 "RECV DATA: failed to write reg->rx_rdptr\n"); 1475 return -1; 1476 } 1477 return 0; 1478 } 1479 1480 /* This function downloads commands to the device 1481 */ 1482 static int 1483 mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1484 { 1485 struct pcie_service_card *card = adapter->card; 1486 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1487 int ret = 0; 1488 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa; 1489 u8 *payload = (u8 *)skb->data; 1490 1491 if (!(skb->data && skb->len)) { 1492 mwifiex_dbg(adapter, ERROR, 1493 "Invalid parameter in %s <%p, %#x>\n", 1494 __func__, skb->data, skb->len); 1495 return -1; 1496 } 1497 1498 /* Make sure a command response buffer is available */ 1499 if (!card->cmdrsp_buf) { 1500 mwifiex_dbg(adapter, ERROR, 1501 "No response buffer available, send command failed\n"); 1502 return -EBUSY; 1503 } 1504 1505 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1506 mwifiex_pm_wakeup_card(adapter); 1507 1508 adapter->cmd_sent = true; 1509 1510 *(__le16 *)&payload[0] = cpu_to_le16((u16)skb->len); 1511 *(__le16 *)&payload[2] = cpu_to_le16(MWIFIEX_TYPE_CMD); 1512 1513 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE)) 1514 return -1; 1515 1516 card->cmd_buf = skb; 1517 1518 /* To send a command, the driver will: 1519 1. Write the 64bit physical address of the data buffer to 1520 cmd response address low + cmd response address high 1521 2. Ring the door bell (i.e. set the door bell interrupt) 1522 1523 In response to door bell interrupt, the firmware will perform 1524 the DMA of the command packet (first header to obtain the total 1525 length and then rest of the command). 1526 */ 1527 1528 if (card->cmdrsp_buf) { 1529 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf); 1530 /* Write the lower 32bits of the cmdrsp buffer physical 1531 address */ 1532 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 1533 (u32)cmdrsp_buf_pa)) { 1534 mwifiex_dbg(adapter, ERROR, 1535 "Failed to write download cmd to boot code.\n"); 1536 ret = -1; 1537 goto done; 1538 } 1539 /* Write the upper 32bits of the cmdrsp buffer physical 1540 address */ 1541 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 1542 (u32)((u64)cmdrsp_buf_pa >> 32))) { 1543 mwifiex_dbg(adapter, ERROR, 1544 "Failed to write download cmd to boot code.\n"); 1545 ret = -1; 1546 goto done; 1547 } 1548 } 1549 1550 cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf); 1551 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */ 1552 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, 1553 (u32)cmd_buf_pa)) { 1554 mwifiex_dbg(adapter, ERROR, 1555 "Failed to write download cmd to boot code.\n"); 1556 ret = -1; 1557 goto done; 1558 } 1559 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */ 1560 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1561 (u32)((u64)cmd_buf_pa >> 32))) { 1562 mwifiex_dbg(adapter, ERROR, 1563 "Failed to write download cmd to boot code.\n"); 1564 ret = -1; 1565 goto done; 1566 } 1567 1568 /* Write the command length to reg->cmd_size */ 1569 if (mwifiex_write_reg(adapter, reg->cmd_size, 1570 card->cmd_buf->len)) { 1571 mwifiex_dbg(adapter, ERROR, 1572 "Failed to write cmd len to reg->cmd_size\n"); 1573 ret = -1; 1574 goto done; 1575 } 1576 1577 /* Ring the door bell */ 1578 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1579 CPU_INTR_DOOR_BELL)) { 1580 mwifiex_dbg(adapter, ERROR, 1581 "Failed to assert door-bell intr\n"); 1582 ret = -1; 1583 goto done; 1584 } 1585 1586 done: 1587 if (ret) 1588 adapter->cmd_sent = false; 1589 1590 return 0; 1591 } 1592 1593 /* 1594 * This function handles command complete interrupt 1595 */ 1596 static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter) 1597 { 1598 struct pcie_service_card *card = adapter->card; 1599 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1600 struct sk_buff *skb = card->cmdrsp_buf; 1601 int count = 0; 1602 u16 rx_len; 1603 __le16 pkt_len; 1604 1605 mwifiex_dbg(adapter, CMD, 1606 "info: Rx CMD Response\n"); 1607 1608 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_FROMDEVICE); 1609 1610 /* Unmap the command as a response has been received. */ 1611 if (card->cmd_buf) { 1612 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1613 PCI_DMA_TODEVICE); 1614 card->cmd_buf = NULL; 1615 } 1616 1617 pkt_len = *((__le16 *)skb->data); 1618 rx_len = le16_to_cpu(pkt_len); 1619 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 1620 skb_trim(skb, rx_len); 1621 skb_pull(skb, INTF_HEADER_LEN); 1622 1623 if (!adapter->curr_cmd) { 1624 if (adapter->ps_state == PS_STATE_SLEEP_CFM) { 1625 mwifiex_process_sleep_confirm_resp(adapter, skb->data, 1626 skb->len); 1627 mwifiex_pcie_enable_host_int(adapter); 1628 if (mwifiex_write_reg(adapter, 1629 PCIE_CPU_INT_EVENT, 1630 CPU_INTR_SLEEP_CFM_DONE)) { 1631 mwifiex_dbg(adapter, ERROR, 1632 "Write register failed\n"); 1633 return -1; 1634 } 1635 mwifiex_delay_for_sleep_cookie(adapter, 1636 MWIFIEX_MAX_DELAY_COUNT); 1637 while (reg->sleep_cookie && (count++ < 10) && 1638 mwifiex_pcie_ok_to_access_hw(adapter)) 1639 usleep_range(50, 60); 1640 } else { 1641 mwifiex_dbg(adapter, ERROR, 1642 "There is no command but got cmdrsp\n"); 1643 } 1644 memcpy(adapter->upld_buf, skb->data, 1645 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len)); 1646 skb_push(skb, INTF_HEADER_LEN); 1647 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1648 PCI_DMA_FROMDEVICE)) 1649 return -1; 1650 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) { 1651 adapter->curr_cmd->resp_skb = skb; 1652 adapter->cmd_resp_received = true; 1653 /* Take the pointer and set it to CMD node and will 1654 return in the response complete callback */ 1655 card->cmdrsp_buf = NULL; 1656 1657 /* Clear the cmd-rsp buffer address in scratch registers. This 1658 will prevent firmware from writing to the same response 1659 buffer again. */ 1660 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) { 1661 mwifiex_dbg(adapter, ERROR, 1662 "cmd_done: failed to clear cmd_rsp_addr_lo\n"); 1663 return -1; 1664 } 1665 /* Write the upper 32bits of the cmdrsp buffer physical 1666 address */ 1667 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) { 1668 mwifiex_dbg(adapter, ERROR, 1669 "cmd_done: failed to clear cmd_rsp_addr_hi\n"); 1670 return -1; 1671 } 1672 } 1673 1674 return 0; 1675 } 1676 1677 /* 1678 * Command Response processing complete handler 1679 */ 1680 static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter, 1681 struct sk_buff *skb) 1682 { 1683 struct pcie_service_card *card = adapter->card; 1684 1685 if (skb) { 1686 card->cmdrsp_buf = skb; 1687 skb_push(card->cmdrsp_buf, INTF_HEADER_LEN); 1688 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1689 PCI_DMA_FROMDEVICE)) 1690 return -1; 1691 } 1692 1693 return 0; 1694 } 1695 1696 /* 1697 * This function handles firmware event ready interrupt 1698 */ 1699 static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter) 1700 { 1701 struct pcie_service_card *card = adapter->card; 1702 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1703 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 1704 u32 wrptr, event; 1705 struct mwifiex_evt_buf_desc *desc; 1706 1707 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1708 mwifiex_pm_wakeup_card(adapter); 1709 1710 if (adapter->event_received) { 1711 mwifiex_dbg(adapter, EVENT, 1712 "info: Event being processed,\t" 1713 "do not process this interrupt just yet\n"); 1714 return 0; 1715 } 1716 1717 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 1718 mwifiex_dbg(adapter, ERROR, 1719 "info: Invalid read pointer...\n"); 1720 return -1; 1721 } 1722 1723 /* Read the event ring write pointer set by firmware */ 1724 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 1725 mwifiex_dbg(adapter, ERROR, 1726 "EventReady: failed to read reg->evt_wrptr\n"); 1727 return -1; 1728 } 1729 1730 mwifiex_dbg(adapter, EVENT, 1731 "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>", 1732 card->evtbd_rdptr, wrptr); 1733 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr 1734 & MWIFIEX_EVTBD_MASK)) || 1735 ((wrptr & reg->evt_rollover_ind) == 1736 (card->evtbd_rdptr & reg->evt_rollover_ind))) { 1737 struct sk_buff *skb_cmd; 1738 __le16 data_len = 0; 1739 u16 evt_len; 1740 1741 mwifiex_dbg(adapter, INFO, 1742 "info: Read Index: %d\n", rdptr); 1743 skb_cmd = card->evt_buf_list[rdptr]; 1744 mwifiex_unmap_pci_memory(adapter, skb_cmd, PCI_DMA_FROMDEVICE); 1745 1746 /* Take the pointer and set it to event pointer in adapter 1747 and will return back after event handling callback */ 1748 card->evt_buf_list[rdptr] = NULL; 1749 desc = card->evtbd_ring[rdptr]; 1750 memset(desc, 0, sizeof(*desc)); 1751 1752 event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN]; 1753 adapter->event_cause = event; 1754 /* The first 4bytes will be the event transfer header 1755 len is 2 bytes followed by type which is 2 bytes */ 1756 memcpy(&data_len, skb_cmd->data, sizeof(__le16)); 1757 evt_len = le16_to_cpu(data_len); 1758 skb_trim(skb_cmd, evt_len); 1759 skb_pull(skb_cmd, INTF_HEADER_LEN); 1760 mwifiex_dbg(adapter, EVENT, 1761 "info: Event length: %d\n", evt_len); 1762 1763 if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE)) 1764 memcpy(adapter->event_body, skb_cmd->data + 1765 MWIFIEX_EVENT_HEADER_LEN, evt_len - 1766 MWIFIEX_EVENT_HEADER_LEN); 1767 1768 adapter->event_received = true; 1769 adapter->event_skb = skb_cmd; 1770 1771 /* Do not update the event read pointer here, wait till the 1772 buffer is released. This is just to make things simpler, 1773 we need to find a better method of managing these buffers. 1774 */ 1775 } else { 1776 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1777 CPU_INTR_EVENT_DONE)) { 1778 mwifiex_dbg(adapter, ERROR, 1779 "Write register failed\n"); 1780 return -1; 1781 } 1782 } 1783 1784 return 0; 1785 } 1786 1787 /* 1788 * Event processing complete handler 1789 */ 1790 static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter, 1791 struct sk_buff *skb) 1792 { 1793 struct pcie_service_card *card = adapter->card; 1794 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1795 int ret = 0; 1796 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 1797 u32 wrptr; 1798 struct mwifiex_evt_buf_desc *desc; 1799 1800 if (!skb) 1801 return 0; 1802 1803 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 1804 mwifiex_dbg(adapter, ERROR, 1805 "event_complete: Invalid rdptr 0x%x\n", 1806 rdptr); 1807 return -EINVAL; 1808 } 1809 1810 /* Read the event ring write pointer set by firmware */ 1811 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 1812 mwifiex_dbg(adapter, ERROR, 1813 "event_complete: failed to read reg->evt_wrptr\n"); 1814 return -1; 1815 } 1816 1817 if (!card->evt_buf_list[rdptr]) { 1818 skb_push(skb, INTF_HEADER_LEN); 1819 skb_put(skb, MAX_EVENT_SIZE - skb->len); 1820 if (mwifiex_map_pci_memory(adapter, skb, 1821 MAX_EVENT_SIZE, 1822 PCI_DMA_FROMDEVICE)) 1823 return -1; 1824 card->evt_buf_list[rdptr] = skb; 1825 desc = card->evtbd_ring[rdptr]; 1826 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb); 1827 desc->len = (u16)skb->len; 1828 desc->flags = 0; 1829 skb = NULL; 1830 } else { 1831 mwifiex_dbg(adapter, ERROR, 1832 "info: ERROR: buf still valid at index %d, <%p, %p>\n", 1833 rdptr, card->evt_buf_list[rdptr], skb); 1834 } 1835 1836 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) { 1837 card->evtbd_rdptr = ((card->evtbd_rdptr & 1838 reg->evt_rollover_ind) ^ 1839 reg->evt_rollover_ind); 1840 } 1841 1842 mwifiex_dbg(adapter, EVENT, 1843 "info: Updated <Rd: 0x%x, Wr: 0x%x>", 1844 card->evtbd_rdptr, wrptr); 1845 1846 /* Write the event ring read pointer in to reg->evt_rdptr */ 1847 if (mwifiex_write_reg(adapter, reg->evt_rdptr, 1848 card->evtbd_rdptr)) { 1849 mwifiex_dbg(adapter, ERROR, 1850 "event_complete: failed to read reg->evt_rdptr\n"); 1851 return -1; 1852 } 1853 1854 mwifiex_dbg(adapter, EVENT, 1855 "info: Check Events Again\n"); 1856 ret = mwifiex_pcie_process_event_ready(adapter); 1857 1858 return ret; 1859 } 1860 1861 /* 1862 * This function downloads the firmware to the card. 1863 * 1864 * Firmware is downloaded to the card in blocks. Every block download 1865 * is tested for CRC errors, and retried a number of times before 1866 * returning failure. 1867 */ 1868 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter, 1869 struct mwifiex_fw_image *fw) 1870 { 1871 int ret; 1872 u8 *firmware = fw->fw_buf; 1873 u32 firmware_len = fw->fw_len; 1874 u32 offset = 0; 1875 struct sk_buff *skb; 1876 u32 txlen, tx_blocks = 0, tries, len; 1877 u32 block_retry_cnt = 0; 1878 struct pcie_service_card *card = adapter->card; 1879 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1880 1881 if (!firmware || !firmware_len) { 1882 mwifiex_dbg(adapter, ERROR, 1883 "No firmware image found! Terminating download\n"); 1884 return -1; 1885 } 1886 1887 mwifiex_dbg(adapter, INFO, 1888 "info: Downloading FW image (%d bytes)\n", 1889 firmware_len); 1890 1891 if (mwifiex_pcie_disable_host_int(adapter)) { 1892 mwifiex_dbg(adapter, ERROR, 1893 "%s: Disabling interrupts failed.\n", __func__); 1894 return -1; 1895 } 1896 1897 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 1898 if (!skb) { 1899 ret = -ENOMEM; 1900 goto done; 1901 } 1902 1903 /* Perform firmware data transfer */ 1904 do { 1905 u32 ireg_intr = 0; 1906 1907 /* More data? */ 1908 if (offset >= firmware_len) 1909 break; 1910 1911 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 1912 ret = mwifiex_read_reg(adapter, reg->cmd_size, 1913 &len); 1914 if (ret) { 1915 mwifiex_dbg(adapter, FATAL, 1916 "Failed reading len from boot code\n"); 1917 goto done; 1918 } 1919 if (len) 1920 break; 1921 usleep_range(10, 20); 1922 } 1923 1924 if (!len) { 1925 break; 1926 } else if (len > MWIFIEX_UPLD_SIZE) { 1927 mwifiex_dbg(adapter, ERROR, 1928 "FW download failure @ %d, invalid length %d\n", 1929 offset, len); 1930 ret = -1; 1931 goto done; 1932 } 1933 1934 txlen = len; 1935 1936 if (len & BIT(0)) { 1937 block_retry_cnt++; 1938 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) { 1939 mwifiex_dbg(adapter, ERROR, 1940 "FW download failure @ %d, over max\t" 1941 "retry count\n", offset); 1942 ret = -1; 1943 goto done; 1944 } 1945 mwifiex_dbg(adapter, ERROR, 1946 "FW CRC error indicated by the\t" 1947 "helper: len = 0x%04X, txlen = %d\n", 1948 len, txlen); 1949 len &= ~BIT(0); 1950 /* Setting this to 0 to resend from same offset */ 1951 txlen = 0; 1952 } else { 1953 block_retry_cnt = 0; 1954 /* Set blocksize to transfer - checking for 1955 last block */ 1956 if (firmware_len - offset < txlen) 1957 txlen = firmware_len - offset; 1958 1959 mwifiex_dbg(adapter, INFO, "."); 1960 1961 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) / 1962 card->pcie.blksz_fw_dl; 1963 1964 /* Copy payload to buffer */ 1965 memmove(skb->data, &firmware[offset], txlen); 1966 } 1967 1968 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 1969 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl); 1970 1971 /* Send the boot command to device */ 1972 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) { 1973 mwifiex_dbg(adapter, ERROR, 1974 "Failed to send firmware download command\n"); 1975 ret = -1; 1976 goto done; 1977 } 1978 1979 /* Wait for the command done interrupt */ 1980 do { 1981 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS, 1982 &ireg_intr)) { 1983 mwifiex_dbg(adapter, ERROR, 1984 "%s: Failed to read\t" 1985 "interrupt status during fw dnld.\n", 1986 __func__); 1987 mwifiex_unmap_pci_memory(adapter, skb, 1988 PCI_DMA_TODEVICE); 1989 ret = -1; 1990 goto done; 1991 } 1992 } while ((ireg_intr & CPU_INTR_DOOR_BELL) == 1993 CPU_INTR_DOOR_BELL); 1994 1995 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1996 1997 offset += txlen; 1998 } while (true); 1999 2000 mwifiex_dbg(adapter, MSG, 2001 "info: FW download over, size %d bytes\n", offset); 2002 2003 ret = 0; 2004 2005 done: 2006 dev_kfree_skb_any(skb); 2007 return ret; 2008 } 2009 2010 /* 2011 * This function checks the firmware status in card. 2012 */ 2013 static int 2014 mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num) 2015 { 2016 int ret = 0; 2017 u32 firmware_stat; 2018 struct pcie_service_card *card = adapter->card; 2019 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2020 u32 tries; 2021 2022 /* Mask spurios interrupts */ 2023 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK, 2024 HOST_INTR_MASK)) { 2025 mwifiex_dbg(adapter, ERROR, 2026 "Write register failed\n"); 2027 return -1; 2028 } 2029 2030 mwifiex_dbg(adapter, INFO, 2031 "Setting driver ready signature\n"); 2032 if (mwifiex_write_reg(adapter, reg->drv_rdy, 2033 FIRMWARE_READY_PCIE)) { 2034 mwifiex_dbg(adapter, ERROR, 2035 "Failed to write driver ready signature\n"); 2036 return -1; 2037 } 2038 2039 /* Wait for firmware initialization event */ 2040 for (tries = 0; tries < poll_num; tries++) { 2041 if (mwifiex_read_reg(adapter, reg->fw_status, 2042 &firmware_stat)) 2043 ret = -1; 2044 else 2045 ret = 0; 2046 if (ret) 2047 continue; 2048 if (firmware_stat == FIRMWARE_READY_PCIE) { 2049 ret = 0; 2050 break; 2051 } else { 2052 msleep(100); 2053 ret = -1; 2054 } 2055 } 2056 2057 return ret; 2058 } 2059 2060 /* This function checks if WLAN is the winner. 2061 */ 2062 static int 2063 mwifiex_check_winner_status(struct mwifiex_adapter *adapter) 2064 { 2065 u32 winner = 0; 2066 int ret = 0; 2067 struct pcie_service_card *card = adapter->card; 2068 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2069 2070 if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) { 2071 ret = -1; 2072 } else if (!winner) { 2073 mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n"); 2074 adapter->winner = 1; 2075 } else { 2076 mwifiex_dbg(adapter, ERROR, 2077 "PCI-E is not the winner <%#x,%d>, exit dnld\n", 2078 ret, adapter->winner); 2079 } 2080 2081 return ret; 2082 } 2083 2084 /* 2085 * This function reads the interrupt status from card. 2086 */ 2087 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter, 2088 int msg_id) 2089 { 2090 u32 pcie_ireg; 2091 unsigned long flags; 2092 struct pcie_service_card *card = adapter->card; 2093 2094 if (card->msi_enable) { 2095 spin_lock_irqsave(&adapter->int_lock, flags); 2096 adapter->int_status = 1; 2097 spin_unlock_irqrestore(&adapter->int_lock, flags); 2098 return; 2099 } 2100 2101 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 2102 return; 2103 2104 if (card->msix_enable && msg_id >= 0) { 2105 pcie_ireg = BIT(msg_id); 2106 } else { 2107 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2108 &pcie_ireg)) { 2109 mwifiex_dbg(adapter, ERROR, "Read register failed\n"); 2110 return; 2111 } 2112 2113 if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg) 2114 return; 2115 2116 2117 mwifiex_pcie_disable_host_int(adapter); 2118 2119 /* Clear the pending interrupts */ 2120 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS, 2121 ~pcie_ireg)) { 2122 mwifiex_dbg(adapter, ERROR, 2123 "Write register failed\n"); 2124 return; 2125 } 2126 } 2127 2128 if (!adapter->pps_uapsd_mode && 2129 adapter->ps_state == PS_STATE_SLEEP && 2130 mwifiex_pcie_ok_to_access_hw(adapter)) { 2131 /* Potentially for PCIe we could get other 2132 * interrupts like shared. Don't change power 2133 * state until cookie is set 2134 */ 2135 adapter->ps_state = PS_STATE_AWAKE; 2136 adapter->pm_wakeup_fw_try = false; 2137 del_timer(&adapter->wakeup_timer); 2138 } 2139 2140 spin_lock_irqsave(&adapter->int_lock, flags); 2141 adapter->int_status |= pcie_ireg; 2142 spin_unlock_irqrestore(&adapter->int_lock, flags); 2143 mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg); 2144 } 2145 2146 /* 2147 * Interrupt handler for PCIe root port 2148 * 2149 * This function reads the interrupt status from firmware and assigns 2150 * the main process in workqueue which will handle the interrupt. 2151 */ 2152 static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context) 2153 { 2154 struct mwifiex_msix_context *ctx = context; 2155 struct pci_dev *pdev = ctx->dev; 2156 struct pcie_service_card *card; 2157 struct mwifiex_adapter *adapter; 2158 2159 if (!pdev) { 2160 pr_err("info: %s: pdev is NULL\n", __func__); 2161 goto exit; 2162 } 2163 2164 card = pci_get_drvdata(pdev); 2165 if (!card || !card->adapter) { 2166 pr_err("info: %s: card=%p adapter=%p\n", __func__, card, 2167 card ? card->adapter : NULL); 2168 goto exit; 2169 } 2170 adapter = card->adapter; 2171 2172 if (adapter->surprise_removed) 2173 goto exit; 2174 2175 if (card->msix_enable) 2176 mwifiex_interrupt_status(adapter, ctx->msg_id); 2177 else 2178 mwifiex_interrupt_status(adapter, -1); 2179 2180 mwifiex_queue_main_work(adapter); 2181 2182 exit: 2183 return IRQ_HANDLED; 2184 } 2185 2186 /* 2187 * This function checks the current interrupt status. 2188 * 2189 * The following interrupts are checked and handled by this function - 2190 * - Data sent 2191 * - Command sent 2192 * - Command received 2193 * - Packets received 2194 * - Events received 2195 * 2196 * In case of Rx packets received, the packets are uploaded from card to 2197 * host and processed accordingly. 2198 */ 2199 static int mwifiex_process_pcie_int(struct mwifiex_adapter *adapter) 2200 { 2201 int ret; 2202 u32 pcie_ireg = 0; 2203 unsigned long flags; 2204 struct pcie_service_card *card = adapter->card; 2205 2206 spin_lock_irqsave(&adapter->int_lock, flags); 2207 if (!card->msi_enable) { 2208 /* Clear out unused interrupts */ 2209 pcie_ireg = adapter->int_status; 2210 } 2211 adapter->int_status = 0; 2212 spin_unlock_irqrestore(&adapter->int_lock, flags); 2213 2214 if (card->msi_enable) { 2215 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 2216 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2217 &pcie_ireg)) { 2218 mwifiex_dbg(adapter, ERROR, 2219 "Read register failed\n"); 2220 return -1; 2221 } 2222 2223 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) { 2224 if (mwifiex_write_reg(adapter, 2225 PCIE_HOST_INT_STATUS, 2226 ~pcie_ireg)) { 2227 mwifiex_dbg(adapter, ERROR, 2228 "Write register failed\n"); 2229 return -1; 2230 } 2231 if (!adapter->pps_uapsd_mode && 2232 adapter->ps_state == PS_STATE_SLEEP) { 2233 adapter->ps_state = PS_STATE_AWAKE; 2234 adapter->pm_wakeup_fw_try = false; 2235 del_timer(&adapter->wakeup_timer); 2236 } 2237 } 2238 } 2239 } 2240 while (pcie_ireg & HOST_INTR_MASK) { 2241 if (pcie_ireg & HOST_INTR_DNLD_DONE) { 2242 pcie_ireg &= ~HOST_INTR_DNLD_DONE; 2243 mwifiex_dbg(adapter, INTR, 2244 "info: TX DNLD Done\n"); 2245 ret = mwifiex_pcie_send_data_complete(adapter); 2246 if (ret) 2247 return ret; 2248 } 2249 if (pcie_ireg & HOST_INTR_UPLD_RDY) { 2250 pcie_ireg &= ~HOST_INTR_UPLD_RDY; 2251 mwifiex_dbg(adapter, INTR, 2252 "info: Rx DATA\n"); 2253 ret = mwifiex_pcie_process_recv_data(adapter); 2254 if (ret) 2255 return ret; 2256 } 2257 if (pcie_ireg & HOST_INTR_EVENT_RDY) { 2258 pcie_ireg &= ~HOST_INTR_EVENT_RDY; 2259 mwifiex_dbg(adapter, INTR, 2260 "info: Rx EVENT\n"); 2261 ret = mwifiex_pcie_process_event_ready(adapter); 2262 if (ret) 2263 return ret; 2264 } 2265 2266 if (pcie_ireg & HOST_INTR_CMD_DONE) { 2267 pcie_ireg &= ~HOST_INTR_CMD_DONE; 2268 if (adapter->cmd_sent) { 2269 mwifiex_dbg(adapter, INTR, 2270 "info: CMD sent Interrupt\n"); 2271 adapter->cmd_sent = false; 2272 } 2273 /* Handle command response */ 2274 ret = mwifiex_pcie_process_cmd_complete(adapter); 2275 if (ret) 2276 return ret; 2277 } 2278 2279 if (card->msi_enable) { 2280 spin_lock_irqsave(&adapter->int_lock, flags); 2281 adapter->int_status = 0; 2282 spin_unlock_irqrestore(&adapter->int_lock, flags); 2283 } 2284 2285 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 2286 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2287 &pcie_ireg)) { 2288 mwifiex_dbg(adapter, ERROR, 2289 "Read register failed\n"); 2290 return -1; 2291 } 2292 2293 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) { 2294 if (mwifiex_write_reg(adapter, 2295 PCIE_HOST_INT_STATUS, 2296 ~pcie_ireg)) { 2297 mwifiex_dbg(adapter, ERROR, 2298 "Write register failed\n"); 2299 return -1; 2300 } 2301 } 2302 2303 } 2304 if (!card->msi_enable) { 2305 spin_lock_irqsave(&adapter->int_lock, flags); 2306 pcie_ireg |= adapter->int_status; 2307 adapter->int_status = 0; 2308 spin_unlock_irqrestore(&adapter->int_lock, flags); 2309 } 2310 } 2311 mwifiex_dbg(adapter, INTR, 2312 "info: cmd_sent=%d data_sent=%d\n", 2313 adapter->cmd_sent, adapter->data_sent); 2314 if (!card->msi_enable && adapter->ps_state != PS_STATE_SLEEP) 2315 mwifiex_pcie_enable_host_int(adapter); 2316 2317 return 0; 2318 } 2319 2320 static int mwifiex_process_msix_int(struct mwifiex_adapter *adapter) 2321 { 2322 int ret; 2323 u32 pcie_ireg; 2324 unsigned long flags; 2325 2326 spin_lock_irqsave(&adapter->int_lock, flags); 2327 /* Clear out unused interrupts */ 2328 pcie_ireg = adapter->int_status; 2329 adapter->int_status = 0; 2330 spin_unlock_irqrestore(&adapter->int_lock, flags); 2331 2332 if (pcie_ireg & HOST_INTR_DNLD_DONE) { 2333 mwifiex_dbg(adapter, INTR, 2334 "info: TX DNLD Done\n"); 2335 ret = mwifiex_pcie_send_data_complete(adapter); 2336 if (ret) 2337 return ret; 2338 } 2339 if (pcie_ireg & HOST_INTR_UPLD_RDY) { 2340 mwifiex_dbg(adapter, INTR, 2341 "info: Rx DATA\n"); 2342 ret = mwifiex_pcie_process_recv_data(adapter); 2343 if (ret) 2344 return ret; 2345 } 2346 if (pcie_ireg & HOST_INTR_EVENT_RDY) { 2347 mwifiex_dbg(adapter, INTR, 2348 "info: Rx EVENT\n"); 2349 ret = mwifiex_pcie_process_event_ready(adapter); 2350 if (ret) 2351 return ret; 2352 } 2353 2354 if (pcie_ireg & HOST_INTR_CMD_DONE) { 2355 if (adapter->cmd_sent) { 2356 mwifiex_dbg(adapter, INTR, 2357 "info: CMD sent Interrupt\n"); 2358 adapter->cmd_sent = false; 2359 } 2360 /* Handle command response */ 2361 ret = mwifiex_pcie_process_cmd_complete(adapter); 2362 if (ret) 2363 return ret; 2364 } 2365 2366 mwifiex_dbg(adapter, INTR, 2367 "info: cmd_sent=%d data_sent=%d\n", 2368 adapter->cmd_sent, adapter->data_sent); 2369 2370 return 0; 2371 } 2372 2373 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter) 2374 { 2375 struct pcie_service_card *card = adapter->card; 2376 2377 if (card->msix_enable) 2378 return mwifiex_process_msix_int(adapter); 2379 else 2380 return mwifiex_process_pcie_int(adapter); 2381 } 2382 2383 /* 2384 * This function downloads data from driver to card. 2385 * 2386 * Both commands and data packets are transferred to the card by this 2387 * function. 2388 * 2389 * This function adds the PCIE specific header to the front of the buffer 2390 * before transferring. The header contains the length of the packet and 2391 * the type. The firmware handles the packets based upon this set type. 2392 */ 2393 static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type, 2394 struct sk_buff *skb, 2395 struct mwifiex_tx_param *tx_param) 2396 { 2397 if (!skb) { 2398 mwifiex_dbg(adapter, ERROR, 2399 "Passed NULL skb to %s\n", __func__); 2400 return -1; 2401 } 2402 2403 if (type == MWIFIEX_TYPE_DATA) 2404 return mwifiex_pcie_send_data(adapter, skb, tx_param); 2405 else if (type == MWIFIEX_TYPE_CMD) 2406 return mwifiex_pcie_send_cmd(adapter, skb); 2407 2408 return 0; 2409 } 2410 2411 /* Function to dump PCIE scratch registers in case of FW crash 2412 */ 2413 static int 2414 mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf) 2415 { 2416 char *p = drv_buf; 2417 char buf[256], *ptr; 2418 int i; 2419 u32 value; 2420 struct pcie_service_card *card = adapter->card; 2421 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2422 int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG, 2423 PCIE_SCRATCH_13_REG, 2424 PCIE_SCRATCH_14_REG}; 2425 2426 if (!p) 2427 return 0; 2428 2429 mwifiex_dbg(adapter, MSG, "PCIE register dump start\n"); 2430 2431 if (mwifiex_read_reg(adapter, reg->fw_status, &value)) { 2432 mwifiex_dbg(adapter, ERROR, "failed to read firmware status"); 2433 return 0; 2434 } 2435 2436 ptr = buf; 2437 mwifiex_dbg(adapter, MSG, "pcie scratch register:"); 2438 for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) { 2439 mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value); 2440 ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n", 2441 pcie_scratch_reg[i], value); 2442 } 2443 2444 mwifiex_dbg(adapter, MSG, "%s\n", buf); 2445 p += sprintf(p, "%s\n", buf); 2446 2447 mwifiex_dbg(adapter, MSG, "PCIE register dump end\n"); 2448 2449 return p - drv_buf; 2450 } 2451 2452 /* This function read/write firmware */ 2453 static enum rdwr_status 2454 mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag) 2455 { 2456 int ret, tries; 2457 u8 ctrl_data; 2458 u32 fw_status; 2459 struct pcie_service_card *card = adapter->card; 2460 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2461 2462 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) 2463 return RDWR_STATUS_FAILURE; 2464 2465 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2466 reg->fw_dump_host_ready); 2467 if (ret) { 2468 mwifiex_dbg(adapter, ERROR, 2469 "PCIE write err\n"); 2470 return RDWR_STATUS_FAILURE; 2471 } 2472 2473 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2474 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data); 2475 if (ctrl_data == FW_DUMP_DONE) 2476 return RDWR_STATUS_SUCCESS; 2477 if (doneflag && ctrl_data == doneflag) 2478 return RDWR_STATUS_DONE; 2479 if (ctrl_data != reg->fw_dump_host_ready) { 2480 mwifiex_dbg(adapter, WARN, 2481 "The ctrl reg was changed, re-try again!\n"); 2482 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2483 reg->fw_dump_host_ready); 2484 if (ret) { 2485 mwifiex_dbg(adapter, ERROR, 2486 "PCIE write err\n"); 2487 return RDWR_STATUS_FAILURE; 2488 } 2489 } 2490 usleep_range(100, 200); 2491 } 2492 2493 mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n"); 2494 return RDWR_STATUS_FAILURE; 2495 } 2496 2497 /* This function dump firmware memory to file */ 2498 static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter) 2499 { 2500 struct pcie_service_card *card = adapter->card; 2501 const struct mwifiex_pcie_card_reg *creg = card->pcie.reg; 2502 unsigned int reg, reg_start, reg_end; 2503 u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num; 2504 u8 idx, i, read_reg, doneflag = 0; 2505 enum rdwr_status stat; 2506 u32 memory_size; 2507 int ret; 2508 2509 if (!card->pcie.can_dump_fw) 2510 return; 2511 2512 for (idx = 0; idx < adapter->num_mem_types; idx++) { 2513 struct memory_type_mapping *entry = 2514 &adapter->mem_type_mapping_tbl[idx]; 2515 2516 if (entry->mem_ptr) { 2517 vfree(entry->mem_ptr); 2518 entry->mem_ptr = NULL; 2519 } 2520 entry->mem_size = 0; 2521 } 2522 2523 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n"); 2524 2525 /* Read the number of the memories which will dump */ 2526 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2527 if (stat == RDWR_STATUS_FAILURE) 2528 return; 2529 2530 reg = creg->fw_dump_start; 2531 mwifiex_read_reg_byte(adapter, reg, &fw_dump_num); 2532 2533 /* W8997 chipset firmware dump will be restore in single region*/ 2534 if (fw_dump_num == 0) 2535 dump_num = 1; 2536 else 2537 dump_num = fw_dump_num; 2538 2539 /* Read the length of every memory which will dump */ 2540 for (idx = 0; idx < dump_num; idx++) { 2541 struct memory_type_mapping *entry = 2542 &adapter->mem_type_mapping_tbl[idx]; 2543 memory_size = 0; 2544 if (fw_dump_num != 0) { 2545 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2546 if (stat == RDWR_STATUS_FAILURE) 2547 return; 2548 2549 reg = creg->fw_dump_start; 2550 for (i = 0; i < 4; i++) { 2551 mwifiex_read_reg_byte(adapter, reg, &read_reg); 2552 memory_size |= (read_reg << (i * 8)); 2553 reg++; 2554 } 2555 } else { 2556 memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE; 2557 } 2558 2559 if (memory_size == 0) { 2560 mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n"); 2561 ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl, 2562 creg->fw_dump_read_done); 2563 if (ret) { 2564 mwifiex_dbg(adapter, ERROR, "PCIE write err\n"); 2565 return; 2566 } 2567 break; 2568 } 2569 2570 mwifiex_dbg(adapter, DUMP, 2571 "%s_SIZE=0x%x\n", entry->mem_name, memory_size); 2572 entry->mem_ptr = vmalloc(memory_size + 1); 2573 entry->mem_size = memory_size; 2574 if (!entry->mem_ptr) { 2575 mwifiex_dbg(adapter, ERROR, 2576 "Vmalloc %s failed\n", entry->mem_name); 2577 return; 2578 } 2579 dbg_ptr = entry->mem_ptr; 2580 end_ptr = dbg_ptr + memory_size; 2581 2582 doneflag = entry->done_flag; 2583 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n", 2584 entry->mem_name); 2585 2586 do { 2587 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2588 if (RDWR_STATUS_FAILURE == stat) 2589 return; 2590 2591 reg_start = creg->fw_dump_start; 2592 reg_end = creg->fw_dump_end; 2593 for (reg = reg_start; reg <= reg_end; reg++) { 2594 mwifiex_read_reg_byte(adapter, reg, dbg_ptr); 2595 if (dbg_ptr < end_ptr) { 2596 dbg_ptr++; 2597 continue; 2598 } 2599 mwifiex_dbg(adapter, ERROR, 2600 "pre-allocated buf not enough\n"); 2601 tmp_ptr = 2602 vzalloc(memory_size + MWIFIEX_SIZE_4K); 2603 if (!tmp_ptr) 2604 return; 2605 memcpy(tmp_ptr, entry->mem_ptr, memory_size); 2606 vfree(entry->mem_ptr); 2607 entry->mem_ptr = tmp_ptr; 2608 tmp_ptr = NULL; 2609 dbg_ptr = entry->mem_ptr + memory_size; 2610 memory_size += MWIFIEX_SIZE_4K; 2611 end_ptr = entry->mem_ptr + memory_size; 2612 } 2613 2614 if (stat != RDWR_STATUS_DONE) 2615 continue; 2616 2617 mwifiex_dbg(adapter, DUMP, 2618 "%s done: size=0x%tx\n", 2619 entry->mem_name, dbg_ptr - entry->mem_ptr); 2620 break; 2621 } while (true); 2622 } 2623 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n"); 2624 } 2625 2626 static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter) 2627 { 2628 mwifiex_drv_info_dump(adapter); 2629 mwifiex_pcie_fw_dump(adapter); 2630 mwifiex_upload_device_dump(adapter); 2631 } 2632 2633 static unsigned long iface_work_flags; 2634 static struct mwifiex_adapter *save_adapter; 2635 static void mwifiex_pcie_work(struct work_struct *work) 2636 { 2637 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 2638 &iface_work_flags)) 2639 mwifiex_pcie_device_dump_work(save_adapter); 2640 } 2641 2642 static DECLARE_WORK(pcie_work, mwifiex_pcie_work); 2643 /* This function dumps FW information */ 2644 static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter) 2645 { 2646 save_adapter = adapter; 2647 if (test_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &iface_work_flags)) 2648 return; 2649 2650 set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &iface_work_flags); 2651 2652 schedule_work(&pcie_work); 2653 } 2654 2655 /* 2656 * This function initializes the PCI-E host memory space, WCB rings, etc. 2657 * 2658 * The following initializations steps are followed - 2659 * - Allocate TXBD ring buffers 2660 * - Allocate RXBD ring buffers 2661 * - Allocate event BD ring buffers 2662 * - Allocate command response ring buffer 2663 * - Allocate sleep cookie buffer 2664 */ 2665 static int mwifiex_pcie_init(struct mwifiex_adapter *adapter) 2666 { 2667 struct pcie_service_card *card = adapter->card; 2668 int ret; 2669 struct pci_dev *pdev = card->dev; 2670 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2671 2672 pci_set_drvdata(pdev, card); 2673 2674 ret = pci_enable_device(pdev); 2675 if (ret) 2676 goto err_enable_dev; 2677 2678 pci_set_master(pdev); 2679 2680 pr_notice("try set_consistent_dma_mask(32)\n"); 2681 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2682 if (ret) { 2683 pr_err("set_dma_mask(32) failed\n"); 2684 goto err_set_dma_mask; 2685 } 2686 2687 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 2688 if (ret) { 2689 pr_err("set_consistent_dma_mask(64) failed\n"); 2690 goto err_set_dma_mask; 2691 } 2692 2693 ret = pci_request_region(pdev, 0, DRV_NAME); 2694 if (ret) { 2695 pr_err("req_reg(0) error\n"); 2696 goto err_req_region0; 2697 } 2698 card->pci_mmap = pci_iomap(pdev, 0, 0); 2699 if (!card->pci_mmap) { 2700 pr_err("iomap(0) error\n"); 2701 ret = -EIO; 2702 goto err_iomap0; 2703 } 2704 ret = pci_request_region(pdev, 2, DRV_NAME); 2705 if (ret) { 2706 pr_err("req_reg(2) error\n"); 2707 goto err_req_region2; 2708 } 2709 card->pci_mmap1 = pci_iomap(pdev, 2, 0); 2710 if (!card->pci_mmap1) { 2711 pr_err("iomap(2) error\n"); 2712 ret = -EIO; 2713 goto err_iomap2; 2714 } 2715 2716 pr_notice("PCI memory map Virt0: %p PCI memory map Virt2: %p\n", 2717 card->pci_mmap, card->pci_mmap1); 2718 2719 card->cmdrsp_buf = NULL; 2720 ret = mwifiex_pcie_create_txbd_ring(adapter); 2721 if (ret) 2722 goto err_cre_txbd; 2723 ret = mwifiex_pcie_create_rxbd_ring(adapter); 2724 if (ret) 2725 goto err_cre_rxbd; 2726 ret = mwifiex_pcie_create_evtbd_ring(adapter); 2727 if (ret) 2728 goto err_cre_evtbd; 2729 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter); 2730 if (ret) 2731 goto err_alloc_cmdbuf; 2732 if (reg->sleep_cookie) { 2733 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter); 2734 if (ret) 2735 goto err_alloc_cookie; 2736 } else { 2737 card->sleep_cookie_vbase = NULL; 2738 } 2739 return ret; 2740 2741 err_alloc_cookie: 2742 mwifiex_pcie_delete_cmdrsp_buf(adapter); 2743 err_alloc_cmdbuf: 2744 mwifiex_pcie_delete_evtbd_ring(adapter); 2745 err_cre_evtbd: 2746 mwifiex_pcie_delete_rxbd_ring(adapter); 2747 err_cre_rxbd: 2748 mwifiex_pcie_delete_txbd_ring(adapter); 2749 err_cre_txbd: 2750 pci_iounmap(pdev, card->pci_mmap1); 2751 err_iomap2: 2752 pci_release_region(pdev, 2); 2753 err_req_region2: 2754 pci_iounmap(pdev, card->pci_mmap); 2755 err_iomap0: 2756 pci_release_region(pdev, 0); 2757 err_req_region0: 2758 err_set_dma_mask: 2759 pci_disable_device(pdev); 2760 err_enable_dev: 2761 pci_set_drvdata(pdev, NULL); 2762 return ret; 2763 } 2764 2765 /* 2766 * This function cleans up the allocated card buffers. 2767 * 2768 * The following are freed by this function - 2769 * - TXBD ring buffers 2770 * - RXBD ring buffers 2771 * - Event BD ring buffers 2772 * - Command response ring buffer 2773 * - Sleep cookie buffer 2774 */ 2775 static void mwifiex_pcie_cleanup(struct mwifiex_adapter *adapter) 2776 { 2777 struct pcie_service_card *card = adapter->card; 2778 struct pci_dev *pdev = card->dev; 2779 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2780 2781 if (user_rmmod) { 2782 mwifiex_dbg(adapter, INFO, 2783 "Clearing driver ready signature\n"); 2784 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 2785 mwifiex_dbg(adapter, ERROR, 2786 "Failed to write driver not-ready signature\n"); 2787 } 2788 2789 if (pdev) { 2790 pci_iounmap(pdev, card->pci_mmap); 2791 pci_iounmap(pdev, card->pci_mmap1); 2792 pci_disable_device(pdev); 2793 pci_release_region(pdev, 2); 2794 pci_release_region(pdev, 0); 2795 pci_set_drvdata(pdev, NULL); 2796 } 2797 kfree(card); 2798 } 2799 2800 static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter) 2801 { 2802 int ret, i, j; 2803 struct pcie_service_card *card = adapter->card; 2804 struct pci_dev *pdev = card->dev; 2805 2806 if (card->pcie.reg->msix_support) { 2807 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 2808 card->msix_entries[i].entry = i; 2809 ret = pci_enable_msix_exact(pdev, card->msix_entries, 2810 MWIFIEX_NUM_MSIX_VECTORS); 2811 if (!ret) { 2812 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) { 2813 card->msix_ctx[i].dev = pdev; 2814 card->msix_ctx[i].msg_id = i; 2815 2816 ret = request_irq(card->msix_entries[i].vector, 2817 mwifiex_pcie_interrupt, 0, 2818 "MWIFIEX_PCIE_MSIX", 2819 &card->msix_ctx[i]); 2820 if (ret) 2821 break; 2822 } 2823 2824 if (ret) { 2825 mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n", 2826 ret); 2827 for (j = 0; j < i; j++) 2828 free_irq(card->msix_entries[j].vector, 2829 &card->msix_ctx[i]); 2830 pci_disable_msix(pdev); 2831 } else { 2832 mwifiex_dbg(adapter, MSG, "MSIx enabled!"); 2833 card->msix_enable = 1; 2834 return 0; 2835 } 2836 } 2837 } 2838 2839 if (pci_enable_msi(pdev) != 0) 2840 pci_disable_msi(pdev); 2841 else 2842 card->msi_enable = 1; 2843 2844 mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable); 2845 2846 card->share_irq_ctx.dev = pdev; 2847 card->share_irq_ctx.msg_id = -1; 2848 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED, 2849 "MRVL_PCIE", &card->share_irq_ctx); 2850 if (ret) { 2851 pr_err("request_irq failed: ret=%d\n", ret); 2852 return -1; 2853 } 2854 2855 return 0; 2856 } 2857 2858 /* 2859 * This function gets the firmware name for downloading by revision id 2860 * 2861 * Read revision id register to get revision id 2862 */ 2863 static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter) 2864 { 2865 int revision_id = 0; 2866 int version; 2867 struct pcie_service_card *card = adapter->card; 2868 2869 switch (card->dev->device) { 2870 case PCIE_DEVICE_ID_MARVELL_88W8766P: 2871 strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME); 2872 break; 2873 case PCIE_DEVICE_ID_MARVELL_88W8897: 2874 mwifiex_write_reg(adapter, 0x0c58, 0x80c00000); 2875 mwifiex_read_reg(adapter, 0x0c58, &revision_id); 2876 revision_id &= 0xff00; 2877 switch (revision_id) { 2878 case PCIE8897_A0: 2879 strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME); 2880 break; 2881 case PCIE8897_B0: 2882 strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME); 2883 break; 2884 default: 2885 strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME); 2886 2887 break; 2888 } 2889 break; 2890 case PCIE_DEVICE_ID_MARVELL_88W8997: 2891 mwifiex_read_reg(adapter, 0x0c48, &revision_id); 2892 mwifiex_read_reg(adapter, 0x0cd0, &version); 2893 version &= 0x7; 2894 switch (revision_id) { 2895 case PCIE8997_V2: 2896 if (version == CHIP_VER_PCIEUART) 2897 strcpy(adapter->fw_name, 2898 PCIEUART8997_FW_NAME_V2); 2899 else 2900 strcpy(adapter->fw_name, 2901 PCIEUSB8997_FW_NAME_V2); 2902 break; 2903 case PCIE8997_Z: 2904 if (version == CHIP_VER_PCIEUART) 2905 strcpy(adapter->fw_name, 2906 PCIEUART8997_FW_NAME_Z); 2907 else 2908 strcpy(adapter->fw_name, 2909 PCIEUSB8997_FW_NAME_Z); 2910 break; 2911 default: 2912 strcpy(adapter->fw_name, PCIE8997_DEFAULT_FW_NAME); 2913 break; 2914 } 2915 default: 2916 break; 2917 } 2918 } 2919 2920 /* 2921 * This function registers the PCIE device. 2922 * 2923 * PCIE IRQ is claimed, block size is set and driver data is initialized. 2924 */ 2925 static int mwifiex_register_dev(struct mwifiex_adapter *adapter) 2926 { 2927 struct pcie_service_card *card = adapter->card; 2928 struct pci_dev *pdev = card->dev; 2929 2930 /* save adapter pointer in card */ 2931 card->adapter = adapter; 2932 adapter->dev = &pdev->dev; 2933 2934 if (mwifiex_pcie_request_irq(adapter)) 2935 return -1; 2936 2937 adapter->tx_buf_size = card->pcie.tx_buf_size; 2938 adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl; 2939 adapter->num_mem_types = card->pcie.num_mem_types; 2940 adapter->ext_scan = card->pcie.can_ext_scan; 2941 mwifiex_pcie_get_fw_name(adapter); 2942 2943 return 0; 2944 } 2945 2946 /* 2947 * This function unregisters the PCIE device. 2948 * 2949 * The PCIE IRQ is released, the function is disabled and driver 2950 * data is set to null. 2951 */ 2952 static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter) 2953 { 2954 struct pcie_service_card *card = adapter->card; 2955 const struct mwifiex_pcie_card_reg *reg; 2956 struct pci_dev *pdev; 2957 int i; 2958 2959 if (card) { 2960 pdev = card->dev; 2961 if (card->msix_enable) { 2962 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 2963 synchronize_irq(card->msix_entries[i].vector); 2964 2965 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 2966 free_irq(card->msix_entries[i].vector, 2967 &card->msix_ctx[i]); 2968 2969 card->msix_enable = 0; 2970 pci_disable_msix(pdev); 2971 } else { 2972 mwifiex_dbg(adapter, INFO, 2973 "%s(): calling free_irq()\n", __func__); 2974 free_irq(card->dev->irq, &card->share_irq_ctx); 2975 2976 if (card->msi_enable) 2977 pci_disable_msi(pdev); 2978 } 2979 2980 reg = card->pcie.reg; 2981 if (reg->sleep_cookie) 2982 mwifiex_pcie_delete_sleep_cookie_buf(adapter); 2983 2984 mwifiex_pcie_delete_cmdrsp_buf(adapter); 2985 mwifiex_pcie_delete_evtbd_ring(adapter); 2986 mwifiex_pcie_delete_rxbd_ring(adapter); 2987 mwifiex_pcie_delete_txbd_ring(adapter); 2988 card->cmdrsp_buf = NULL; 2989 } 2990 } 2991 2992 static struct mwifiex_if_ops pcie_ops = { 2993 .init_if = mwifiex_pcie_init, 2994 .cleanup_if = mwifiex_pcie_cleanup, 2995 .check_fw_status = mwifiex_check_fw_status, 2996 .check_winner_status = mwifiex_check_winner_status, 2997 .prog_fw = mwifiex_prog_fw_w_helper, 2998 .register_dev = mwifiex_register_dev, 2999 .unregister_dev = mwifiex_unregister_dev, 3000 .enable_int = mwifiex_pcie_enable_host_int, 3001 .disable_int = mwifiex_pcie_disable_host_int_noerr, 3002 .process_int_status = mwifiex_process_int_status, 3003 .host_to_card = mwifiex_pcie_host_to_card, 3004 .wakeup = mwifiex_pm_wakeup_card, 3005 .wakeup_complete = mwifiex_pm_wakeup_card_complete, 3006 3007 /* PCIE specific */ 3008 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete, 3009 .event_complete = mwifiex_pcie_event_complete, 3010 .update_mp_end_port = NULL, 3011 .cleanup_mpa_buf = NULL, 3012 .init_fw_port = mwifiex_pcie_init_fw_port, 3013 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf, 3014 .reg_dump = mwifiex_pcie_reg_dump, 3015 .device_dump = mwifiex_pcie_device_dump, 3016 }; 3017 3018 /* 3019 * This function initializes the PCIE driver module. 3020 * 3021 * This initiates the semaphore and registers the device with 3022 * PCIE bus. 3023 */ 3024 static int mwifiex_pcie_init_module(void) 3025 { 3026 int ret; 3027 3028 pr_debug("Marvell PCIe Driver\n"); 3029 3030 sema_init(&add_remove_card_sem, 1); 3031 3032 /* Clear the flag in case user removes the card. */ 3033 user_rmmod = 0; 3034 3035 ret = pci_register_driver(&mwifiex_pcie); 3036 if (ret) 3037 pr_err("Driver register failed!\n"); 3038 else 3039 pr_debug("info: Driver registered successfully!\n"); 3040 3041 return ret; 3042 } 3043 3044 /* 3045 * This function cleans up the PCIE driver. 3046 * 3047 * The following major steps are followed for cleanup - 3048 * - Resume the device if its suspended 3049 * - Disconnect the device if connected 3050 * - Shutdown the firmware 3051 * - Unregister the device from PCIE bus. 3052 */ 3053 static void mwifiex_pcie_cleanup_module(void) 3054 { 3055 if (!down_interruptible(&add_remove_card_sem)) 3056 up(&add_remove_card_sem); 3057 3058 /* Set the flag as user is removing this module. */ 3059 user_rmmod = 1; 3060 3061 cancel_work_sync(&pcie_work); 3062 pci_unregister_driver(&mwifiex_pcie); 3063 } 3064 3065 module_init(mwifiex_pcie_init_module); 3066 module_exit(mwifiex_pcie_cleanup_module); 3067 3068 MODULE_AUTHOR("Marvell International Ltd."); 3069 MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION); 3070 MODULE_VERSION(PCIE_VERSION); 3071 MODULE_LICENSE("GPL v2"); 3072