1 /* 2 * Marvell Wireless LAN device driver: PCIE specific handling 3 * 4 * Copyright (C) 2011-2014, Marvell International Ltd. 5 * 6 * This software file (the "File") is distributed by Marvell International 7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991 8 * (the "License"). You may use, redistribute and/or modify this File in 9 * accordance with the terms and conditions of the License, a copy of which 10 * is available by writing to the Free Software Foundation, Inc., 11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the 12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. 13 * 14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about 17 * this warranty disclaimer. 18 */ 19 20 #include <linux/firmware.h> 21 22 #include "decl.h" 23 #include "ioctl.h" 24 #include "util.h" 25 #include "fw.h" 26 #include "main.h" 27 #include "wmm.h" 28 #include "11n.h" 29 #include "pcie.h" 30 31 #define PCIE_VERSION "1.0" 32 #define DRV_NAME "Marvell mwifiex PCIe" 33 34 static u8 user_rmmod; 35 36 static struct mwifiex_if_ops pcie_ops; 37 38 static const struct of_device_id mwifiex_pcie_of_match_table[] = { 39 { .compatible = "pci11ab,2b42" }, 40 { .compatible = "pci1b4b,2b42" }, 41 { } 42 }; 43 44 static int mwifiex_pcie_probe_of(struct device *dev) 45 { 46 if (!of_match_node(mwifiex_pcie_of_match_table, dev->of_node)) { 47 dev_err(dev, "required compatible string missing\n"); 48 return -EINVAL; 49 } 50 51 return 0; 52 } 53 54 static int 55 mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb, 56 size_t size, int flags) 57 { 58 struct pcie_service_card *card = adapter->card; 59 struct mwifiex_dma_mapping mapping; 60 61 mapping.addr = pci_map_single(card->dev, skb->data, size, flags); 62 if (pci_dma_mapping_error(card->dev, mapping.addr)) { 63 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n"); 64 return -1; 65 } 66 mapping.len = size; 67 mwifiex_store_mapping(skb, &mapping); 68 return 0; 69 } 70 71 static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter, 72 struct sk_buff *skb, int flags) 73 { 74 struct pcie_service_card *card = adapter->card; 75 struct mwifiex_dma_mapping mapping; 76 77 mwifiex_get_mapping(skb, &mapping); 78 pci_unmap_single(card->dev, mapping.addr, mapping.len, flags); 79 } 80 81 /* 82 * This function reads sleep cookie and checks if FW is ready 83 */ 84 static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter) 85 { 86 u32 *cookie_addr; 87 struct pcie_service_card *card = adapter->card; 88 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 89 90 if (!reg->sleep_cookie) 91 return true; 92 93 if (card->sleep_cookie_vbase) { 94 cookie_addr = (u32 *)card->sleep_cookie_vbase; 95 mwifiex_dbg(adapter, INFO, 96 "info: ACCESS_HW: sleep cookie=0x%x\n", 97 *cookie_addr); 98 if (*cookie_addr == FW_AWAKE_COOKIE) 99 return true; 100 } 101 102 return false; 103 } 104 105 #ifdef CONFIG_PM_SLEEP 106 /* 107 * Kernel needs to suspend all functions separately. Therefore all 108 * registered functions must have drivers with suspend and resume 109 * methods. Failing that the kernel simply removes the whole card. 110 * 111 * If already not suspended, this function allocates and sends a host 112 * sleep activate request to the firmware and turns off the traffic. 113 */ 114 static int mwifiex_pcie_suspend(struct device *dev) 115 { 116 struct mwifiex_adapter *adapter; 117 struct pcie_service_card *card; 118 struct pci_dev *pdev = to_pci_dev(dev); 119 120 card = pci_get_drvdata(pdev); 121 122 /* Might still be loading firmware */ 123 wait_for_completion(&card->fw_done); 124 125 adapter = card->adapter; 126 if (!adapter) { 127 dev_err(dev, "adapter is not valid\n"); 128 return 0; 129 } 130 131 mwifiex_enable_wake(adapter); 132 133 /* Enable the Host Sleep */ 134 if (!mwifiex_enable_hs(adapter)) { 135 mwifiex_dbg(adapter, ERROR, 136 "cmd: failed to suspend\n"); 137 adapter->hs_enabling = false; 138 mwifiex_disable_wake(adapter); 139 return -EFAULT; 140 } 141 142 flush_workqueue(adapter->workqueue); 143 144 /* Indicate device suspended */ 145 adapter->is_suspended = true; 146 adapter->hs_enabling = false; 147 148 return 0; 149 } 150 151 /* 152 * Kernel needs to suspend all functions separately. Therefore all 153 * registered functions must have drivers with suspend and resume 154 * methods. Failing that the kernel simply removes the whole card. 155 * 156 * If already not resumed, this function turns on the traffic and 157 * sends a host sleep cancel request to the firmware. 158 */ 159 static int mwifiex_pcie_resume(struct device *dev) 160 { 161 struct mwifiex_adapter *adapter; 162 struct pcie_service_card *card; 163 struct pci_dev *pdev = to_pci_dev(dev); 164 165 card = pci_get_drvdata(pdev); 166 167 if (!card->adapter) { 168 dev_err(dev, "adapter structure is not valid\n"); 169 return 0; 170 } 171 172 adapter = card->adapter; 173 174 if (!adapter->is_suspended) { 175 mwifiex_dbg(adapter, WARN, 176 "Device already resumed\n"); 177 return 0; 178 } 179 180 adapter->is_suspended = false; 181 182 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA), 183 MWIFIEX_ASYNC_CMD); 184 mwifiex_disable_wake(adapter); 185 186 return 0; 187 } 188 #endif 189 190 /* 191 * This function probes an mwifiex device and registers it. It allocates 192 * the card structure, enables PCIE function number and initiates the 193 * device registration and initialization procedure by adding a logical 194 * interface. 195 */ 196 static int mwifiex_pcie_probe(struct pci_dev *pdev, 197 const struct pci_device_id *ent) 198 { 199 struct pcie_service_card *card; 200 int ret; 201 202 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n", 203 pdev->vendor, pdev->device, pdev->revision); 204 205 card = devm_kzalloc(&pdev->dev, sizeof(*card), GFP_KERNEL); 206 if (!card) 207 return -ENOMEM; 208 209 init_completion(&card->fw_done); 210 211 card->dev = pdev; 212 213 if (ent->driver_data) { 214 struct mwifiex_pcie_device *data = (void *)ent->driver_data; 215 card->pcie.reg = data->reg; 216 card->pcie.blksz_fw_dl = data->blksz_fw_dl; 217 card->pcie.tx_buf_size = data->tx_buf_size; 218 card->pcie.can_dump_fw = data->can_dump_fw; 219 card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl; 220 card->pcie.num_mem_types = data->num_mem_types; 221 card->pcie.can_ext_scan = data->can_ext_scan; 222 } 223 224 /* device tree node parsing and platform specific configuration*/ 225 if (pdev->dev.of_node) { 226 ret = mwifiex_pcie_probe_of(&pdev->dev); 227 if (ret) 228 return ret; 229 } 230 231 if (mwifiex_add_card(card, &card->fw_done, &pcie_ops, 232 MWIFIEX_PCIE, &pdev->dev)) { 233 pr_err("%s failed\n", __func__); 234 return -1; 235 } 236 237 return 0; 238 } 239 240 /* 241 * This function removes the interface and frees up the card structure. 242 */ 243 static void mwifiex_pcie_remove(struct pci_dev *pdev) 244 { 245 struct pcie_service_card *card; 246 struct mwifiex_adapter *adapter; 247 struct mwifiex_private *priv; 248 249 card = pci_get_drvdata(pdev); 250 251 wait_for_completion(&card->fw_done); 252 253 adapter = card->adapter; 254 if (!adapter || !adapter->priv_num) 255 return; 256 257 if (user_rmmod && !adapter->mfg_mode) { 258 mwifiex_deauthenticate_all(adapter); 259 260 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 261 262 mwifiex_disable_auto_ds(priv); 263 264 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN); 265 } 266 267 mwifiex_remove_card(adapter); 268 } 269 270 static void mwifiex_pcie_shutdown(struct pci_dev *pdev) 271 { 272 user_rmmod = 1; 273 mwifiex_pcie_remove(pdev); 274 275 return; 276 } 277 278 static const struct pci_device_id mwifiex_ids[] = { 279 { 280 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P, 281 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 282 .driver_data = (unsigned long)&mwifiex_pcie8766, 283 }, 284 { 285 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897, 286 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 287 .driver_data = (unsigned long)&mwifiex_pcie8897, 288 }, 289 { 290 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 291 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 292 .driver_data = (unsigned long)&mwifiex_pcie8997, 293 }, 294 { 295 PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 296 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 297 .driver_data = (unsigned long)&mwifiex_pcie8997, 298 }, 299 {}, 300 }; 301 302 MODULE_DEVICE_TABLE(pci, mwifiex_ids); 303 304 static void mwifiex_pcie_reset_notify(struct pci_dev *pdev, bool prepare) 305 { 306 struct mwifiex_adapter *adapter; 307 struct pcie_service_card *card; 308 309 if (!pdev) { 310 pr_err("%s: PCIe device is not specified\n", __func__); 311 return; 312 } 313 314 card = (struct pcie_service_card *)pci_get_drvdata(pdev); 315 if (!card || !card->adapter) { 316 pr_err("%s: Card or adapter structure is not valid (%ld)\n", 317 __func__, (long)card); 318 return; 319 } 320 321 adapter = card->adapter; 322 mwifiex_dbg(adapter, INFO, 323 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d %s\n", 324 __func__, pdev->vendor, pdev->device, 325 pdev->revision, 326 prepare ? "Pre-FLR" : "Post-FLR"); 327 328 if (prepare) { 329 /* Kernel would be performing FLR after this notification. 330 * Cleanup all software without cleaning anything related to 331 * PCIe and HW. 332 */ 333 mwifiex_do_flr(adapter, prepare); 334 adapter->surprise_removed = true; 335 } else { 336 /* Kernel stores and restores PCIe function context before and 337 * after performing FLR respectively. Reconfigure the software 338 * and firmware including firmware redownload 339 */ 340 adapter->surprise_removed = false; 341 mwifiex_do_flr(adapter, prepare); 342 } 343 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__); 344 } 345 346 static const struct pci_error_handlers mwifiex_pcie_err_handler[] = { 347 { .reset_notify = mwifiex_pcie_reset_notify, }, 348 }; 349 350 #ifdef CONFIG_PM_SLEEP 351 /* Power Management Hooks */ 352 static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend, 353 mwifiex_pcie_resume); 354 #endif 355 356 /* PCI Device Driver */ 357 static struct pci_driver __refdata mwifiex_pcie = { 358 .name = "mwifiex_pcie", 359 .id_table = mwifiex_ids, 360 .probe = mwifiex_pcie_probe, 361 .remove = mwifiex_pcie_remove, 362 #ifdef CONFIG_PM_SLEEP 363 .driver = { 364 .pm = &mwifiex_pcie_pm_ops, 365 }, 366 #endif 367 .shutdown = mwifiex_pcie_shutdown, 368 .err_handler = mwifiex_pcie_err_handler, 369 }; 370 371 /* 372 * This function writes data into PCIE card register. 373 */ 374 static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data) 375 { 376 struct pcie_service_card *card = adapter->card; 377 378 iowrite32(data, card->pci_mmap1 + reg); 379 380 return 0; 381 } 382 383 /* 384 * This function reads data from PCIE card register. 385 */ 386 static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data) 387 { 388 struct pcie_service_card *card = adapter->card; 389 390 *data = ioread32(card->pci_mmap1 + reg); 391 if (*data == 0xffffffff) 392 return 0xffffffff; 393 394 return 0; 395 } 396 397 /* This function reads u8 data from PCIE card register. */ 398 static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter, 399 int reg, u8 *data) 400 { 401 struct pcie_service_card *card = adapter->card; 402 403 *data = ioread8(card->pci_mmap1 + reg); 404 405 return 0; 406 } 407 408 /* 409 * This function adds delay loop to ensure FW is awake before proceeding. 410 */ 411 static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter) 412 { 413 int i = 0; 414 415 while (mwifiex_pcie_ok_to_access_hw(adapter)) { 416 i++; 417 usleep_range(10, 20); 418 /* 50ms max wait */ 419 if (i == 5000) 420 break; 421 } 422 423 return; 424 } 425 426 static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter, 427 u32 max_delay_loop_cnt) 428 { 429 struct pcie_service_card *card = adapter->card; 430 u8 *buffer; 431 u32 sleep_cookie, count; 432 433 for (count = 0; count < max_delay_loop_cnt; count++) { 434 buffer = card->cmdrsp_buf->data - INTF_HEADER_LEN; 435 sleep_cookie = *(u32 *)buffer; 436 437 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) { 438 mwifiex_dbg(adapter, INFO, 439 "sleep cookie found at count %d\n", count); 440 break; 441 } 442 usleep_range(20, 30); 443 } 444 445 if (count >= max_delay_loop_cnt) 446 mwifiex_dbg(adapter, INFO, 447 "max count reached while accessing sleep cookie\n"); 448 } 449 450 /* This function wakes up the card by reading fw_status register. */ 451 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) 452 { 453 u32 fw_status; 454 struct pcie_service_card *card = adapter->card; 455 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 456 457 mwifiex_dbg(adapter, EVENT, 458 "event: Wakeup device...\n"); 459 460 if (reg->sleep_cookie) 461 mwifiex_pcie_dev_wakeup_delay(adapter); 462 463 /* Reading fw_status register will wakeup device */ 464 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) { 465 mwifiex_dbg(adapter, ERROR, 466 "Reading fw_status register failed\n"); 467 return -1; 468 } 469 470 if (reg->sleep_cookie) { 471 mwifiex_pcie_dev_wakeup_delay(adapter); 472 mwifiex_dbg(adapter, INFO, 473 "PCIE wakeup: Setting PS_STATE_AWAKE\n"); 474 adapter->ps_state = PS_STATE_AWAKE; 475 } 476 477 return 0; 478 } 479 480 /* 481 * This function is called after the card has woken up. 482 * 483 * The card configuration register is reset. 484 */ 485 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter) 486 { 487 mwifiex_dbg(adapter, CMD, 488 "cmd: Wakeup device completed\n"); 489 490 return 0; 491 } 492 493 /* 494 * This function disables the host interrupt. 495 * 496 * The host interrupt mask is read, the disable bit is reset and 497 * written back to the card host interrupt mask register. 498 */ 499 static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter) 500 { 501 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 502 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 503 0x00000000)) { 504 mwifiex_dbg(adapter, ERROR, 505 "Disable host interrupt failed\n"); 506 return -1; 507 } 508 } 509 510 atomic_set(&adapter->tx_hw_pending, 0); 511 return 0; 512 } 513 514 static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter) 515 { 516 WARN_ON(mwifiex_pcie_disable_host_int(adapter)); 517 } 518 519 /* 520 * This function enables the host interrupt. 521 * 522 * The host interrupt enable mask is written to the card 523 * host interrupt mask register. 524 */ 525 static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter) 526 { 527 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 528 /* Simply write the mask to the register */ 529 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 530 HOST_INTR_MASK)) { 531 mwifiex_dbg(adapter, ERROR, 532 "Enable host interrupt failed\n"); 533 return -1; 534 } 535 } 536 537 return 0; 538 } 539 540 /* 541 * This function initializes TX buffer ring descriptors 542 */ 543 static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter) 544 { 545 struct pcie_service_card *card = adapter->card; 546 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 547 struct mwifiex_pcie_buf_desc *desc; 548 struct mwifiex_pfu_buf_desc *desc2; 549 int i; 550 551 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 552 card->tx_buf_list[i] = NULL; 553 if (reg->pfu_enabled) { 554 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 555 (sizeof(*desc2) * i); 556 desc2 = card->txbd_ring[i]; 557 memset(desc2, 0, sizeof(*desc2)); 558 } else { 559 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 560 (sizeof(*desc) * i); 561 desc = card->txbd_ring[i]; 562 memset(desc, 0, sizeof(*desc)); 563 } 564 } 565 566 return 0; 567 } 568 569 /* This function initializes RX buffer ring descriptors. Each SKB is allocated 570 * here and after mapping PCI memory, its physical address is assigned to 571 * PCIE Rx buffer descriptor's physical address. 572 */ 573 static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter) 574 { 575 struct pcie_service_card *card = adapter->card; 576 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 577 struct sk_buff *skb; 578 struct mwifiex_pcie_buf_desc *desc; 579 struct mwifiex_pfu_buf_desc *desc2; 580 dma_addr_t buf_pa; 581 int i; 582 583 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 584 /* Allocate skb here so that firmware can DMA data from it */ 585 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 586 GFP_KERNEL); 587 if (!skb) { 588 mwifiex_dbg(adapter, ERROR, 589 "Unable to allocate skb for RX ring.\n"); 590 kfree(card->rxbd_ring_vbase); 591 return -ENOMEM; 592 } 593 594 if (mwifiex_map_pci_memory(adapter, skb, 595 MWIFIEX_RX_DATA_BUF_SIZE, 596 PCI_DMA_FROMDEVICE)) 597 return -1; 598 599 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 600 601 mwifiex_dbg(adapter, INFO, 602 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 603 skb, skb->len, skb->data, (u32)buf_pa, 604 (u32)((u64)buf_pa >> 32)); 605 606 card->rx_buf_list[i] = skb; 607 if (reg->pfu_enabled) { 608 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase + 609 (sizeof(*desc2) * i); 610 desc2 = card->rxbd_ring[i]; 611 desc2->paddr = buf_pa; 612 desc2->len = (u16)skb->len; 613 desc2->frag_len = (u16)skb->len; 614 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop; 615 desc2->offset = 0; 616 } else { 617 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase + 618 (sizeof(*desc) * i)); 619 desc = card->rxbd_ring[i]; 620 desc->paddr = buf_pa; 621 desc->len = (u16)skb->len; 622 desc->flags = 0; 623 } 624 } 625 626 return 0; 627 } 628 629 /* This function initializes event buffer ring descriptors. Each SKB is 630 * allocated here and after mapping PCI memory, its physical address is assigned 631 * to PCIE Rx buffer descriptor's physical address 632 */ 633 static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter) 634 { 635 struct pcie_service_card *card = adapter->card; 636 struct mwifiex_evt_buf_desc *desc; 637 struct sk_buff *skb; 638 dma_addr_t buf_pa; 639 int i; 640 641 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 642 /* Allocate skb here so that firmware can DMA data from it */ 643 skb = dev_alloc_skb(MAX_EVENT_SIZE); 644 if (!skb) { 645 mwifiex_dbg(adapter, ERROR, 646 "Unable to allocate skb for EVENT buf.\n"); 647 kfree(card->evtbd_ring_vbase); 648 return -ENOMEM; 649 } 650 skb_put(skb, MAX_EVENT_SIZE); 651 652 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE, 653 PCI_DMA_FROMDEVICE)) 654 return -1; 655 656 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 657 658 mwifiex_dbg(adapter, EVENT, 659 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 660 skb, skb->len, skb->data, (u32)buf_pa, 661 (u32)((u64)buf_pa >> 32)); 662 663 card->evt_buf_list[i] = skb; 664 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase + 665 (sizeof(*desc) * i)); 666 desc = card->evtbd_ring[i]; 667 desc->paddr = buf_pa; 668 desc->len = (u16)skb->len; 669 desc->flags = 0; 670 } 671 672 return 0; 673 } 674 675 /* This function cleans up TX buffer rings. If any of the buffer list has valid 676 * SKB address, associated SKB is freed. 677 */ 678 static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter) 679 { 680 struct pcie_service_card *card = adapter->card; 681 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 682 struct sk_buff *skb; 683 struct mwifiex_pcie_buf_desc *desc; 684 struct mwifiex_pfu_buf_desc *desc2; 685 int i; 686 687 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 688 if (reg->pfu_enabled) { 689 desc2 = card->txbd_ring[i]; 690 if (card->tx_buf_list[i]) { 691 skb = card->tx_buf_list[i]; 692 mwifiex_unmap_pci_memory(adapter, skb, 693 PCI_DMA_TODEVICE); 694 dev_kfree_skb_any(skb); 695 } 696 memset(desc2, 0, sizeof(*desc2)); 697 } else { 698 desc = card->txbd_ring[i]; 699 if (card->tx_buf_list[i]) { 700 skb = card->tx_buf_list[i]; 701 mwifiex_unmap_pci_memory(adapter, skb, 702 PCI_DMA_TODEVICE); 703 dev_kfree_skb_any(skb); 704 } 705 memset(desc, 0, sizeof(*desc)); 706 } 707 card->tx_buf_list[i] = NULL; 708 } 709 710 atomic_set(&adapter->tx_hw_pending, 0); 711 return; 712 } 713 714 /* This function cleans up RX buffer rings. If any of the buffer list has valid 715 * SKB address, associated SKB is freed. 716 */ 717 static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter) 718 { 719 struct pcie_service_card *card = adapter->card; 720 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 721 struct mwifiex_pcie_buf_desc *desc; 722 struct mwifiex_pfu_buf_desc *desc2; 723 struct sk_buff *skb; 724 int i; 725 726 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 727 if (reg->pfu_enabled) { 728 desc2 = card->rxbd_ring[i]; 729 if (card->rx_buf_list[i]) { 730 skb = card->rx_buf_list[i]; 731 mwifiex_unmap_pci_memory(adapter, skb, 732 PCI_DMA_FROMDEVICE); 733 dev_kfree_skb_any(skb); 734 } 735 memset(desc2, 0, sizeof(*desc2)); 736 } else { 737 desc = card->rxbd_ring[i]; 738 if (card->rx_buf_list[i]) { 739 skb = card->rx_buf_list[i]; 740 mwifiex_unmap_pci_memory(adapter, skb, 741 PCI_DMA_FROMDEVICE); 742 dev_kfree_skb_any(skb); 743 } 744 memset(desc, 0, sizeof(*desc)); 745 } 746 card->rx_buf_list[i] = NULL; 747 } 748 749 return; 750 } 751 752 /* This function cleans up event buffer rings. If any of the buffer list has 753 * valid SKB address, associated SKB is freed. 754 */ 755 static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter) 756 { 757 struct pcie_service_card *card = adapter->card; 758 struct mwifiex_evt_buf_desc *desc; 759 struct sk_buff *skb; 760 int i; 761 762 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 763 desc = card->evtbd_ring[i]; 764 if (card->evt_buf_list[i]) { 765 skb = card->evt_buf_list[i]; 766 mwifiex_unmap_pci_memory(adapter, skb, 767 PCI_DMA_FROMDEVICE); 768 dev_kfree_skb_any(skb); 769 } 770 card->evt_buf_list[i] = NULL; 771 memset(desc, 0, sizeof(*desc)); 772 } 773 774 return; 775 } 776 777 /* This function creates buffer descriptor ring for TX 778 */ 779 static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter) 780 { 781 struct pcie_service_card *card = adapter->card; 782 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 783 784 /* 785 * driver maintaines the write pointer and firmware maintaines the read 786 * pointer. The write pointer starts at 0 (zero) while the read pointer 787 * starts at zero with rollover bit set 788 */ 789 card->txbd_wrptr = 0; 790 791 if (reg->pfu_enabled) 792 card->txbd_rdptr = 0; 793 else 794 card->txbd_rdptr |= reg->tx_rollover_ind; 795 796 /* allocate shared memory for the BD ring and divide the same in to 797 several descriptors */ 798 if (reg->pfu_enabled) 799 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 800 MWIFIEX_MAX_TXRX_BD; 801 else 802 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 803 MWIFIEX_MAX_TXRX_BD; 804 805 mwifiex_dbg(adapter, INFO, 806 "info: txbd_ring: Allocating %d bytes\n", 807 card->txbd_ring_size); 808 card->txbd_ring_vbase = pci_alloc_consistent(card->dev, 809 card->txbd_ring_size, 810 &card->txbd_ring_pbase); 811 if (!card->txbd_ring_vbase) { 812 mwifiex_dbg(adapter, ERROR, 813 "allocate consistent memory (%d bytes) failed!\n", 814 card->txbd_ring_size); 815 return -ENOMEM; 816 } 817 mwifiex_dbg(adapter, DATA, 818 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n", 819 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase, 820 (u32)((u64)card->txbd_ring_pbase >> 32), 821 card->txbd_ring_size); 822 823 return mwifiex_init_txq_ring(adapter); 824 } 825 826 static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter) 827 { 828 struct pcie_service_card *card = adapter->card; 829 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 830 831 mwifiex_cleanup_txq_ring(adapter); 832 833 if (card->txbd_ring_vbase) 834 pci_free_consistent(card->dev, card->txbd_ring_size, 835 card->txbd_ring_vbase, 836 card->txbd_ring_pbase); 837 card->txbd_ring_size = 0; 838 card->txbd_wrptr = 0; 839 card->txbd_rdptr = 0 | reg->tx_rollover_ind; 840 card->txbd_ring_vbase = NULL; 841 card->txbd_ring_pbase = 0; 842 843 return 0; 844 } 845 846 /* 847 * This function creates buffer descriptor ring for RX 848 */ 849 static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter) 850 { 851 struct pcie_service_card *card = adapter->card; 852 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 853 854 /* 855 * driver maintaines the read pointer and firmware maintaines the write 856 * pointer. The write pointer starts at 0 (zero) while the read pointer 857 * starts at zero with rollover bit set 858 */ 859 card->rxbd_wrptr = 0; 860 card->rxbd_rdptr = reg->rx_rollover_ind; 861 862 if (reg->pfu_enabled) 863 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 864 MWIFIEX_MAX_TXRX_BD; 865 else 866 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 867 MWIFIEX_MAX_TXRX_BD; 868 869 mwifiex_dbg(adapter, INFO, 870 "info: rxbd_ring: Allocating %d bytes\n", 871 card->rxbd_ring_size); 872 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev, 873 card->rxbd_ring_size, 874 &card->rxbd_ring_pbase); 875 if (!card->rxbd_ring_vbase) { 876 mwifiex_dbg(adapter, ERROR, 877 "allocate consistent memory (%d bytes) failed!\n", 878 card->rxbd_ring_size); 879 return -ENOMEM; 880 } 881 882 mwifiex_dbg(adapter, DATA, 883 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n", 884 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase, 885 (u32)((u64)card->rxbd_ring_pbase >> 32), 886 card->rxbd_ring_size); 887 888 return mwifiex_init_rxq_ring(adapter); 889 } 890 891 /* 892 * This function deletes Buffer descriptor ring for RX 893 */ 894 static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter) 895 { 896 struct pcie_service_card *card = adapter->card; 897 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 898 899 mwifiex_cleanup_rxq_ring(adapter); 900 901 if (card->rxbd_ring_vbase) 902 pci_free_consistent(card->dev, card->rxbd_ring_size, 903 card->rxbd_ring_vbase, 904 card->rxbd_ring_pbase); 905 card->rxbd_ring_size = 0; 906 card->rxbd_wrptr = 0; 907 card->rxbd_rdptr = 0 | reg->rx_rollover_ind; 908 card->rxbd_ring_vbase = NULL; 909 card->rxbd_ring_pbase = 0; 910 911 return 0; 912 } 913 914 /* 915 * This function creates buffer descriptor ring for Events 916 */ 917 static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter) 918 { 919 struct pcie_service_card *card = adapter->card; 920 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 921 922 /* 923 * driver maintaines the read pointer and firmware maintaines the write 924 * pointer. The write pointer starts at 0 (zero) while the read pointer 925 * starts at zero with rollover bit set 926 */ 927 card->evtbd_wrptr = 0; 928 card->evtbd_rdptr = reg->evt_rollover_ind; 929 930 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) * 931 MWIFIEX_MAX_EVT_BD; 932 933 mwifiex_dbg(adapter, INFO, 934 "info: evtbd_ring: Allocating %d bytes\n", 935 card->evtbd_ring_size); 936 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev, 937 card->evtbd_ring_size, 938 &card->evtbd_ring_pbase); 939 if (!card->evtbd_ring_vbase) { 940 mwifiex_dbg(adapter, ERROR, 941 "allocate consistent memory (%d bytes) failed!\n", 942 card->evtbd_ring_size); 943 return -ENOMEM; 944 } 945 946 mwifiex_dbg(adapter, EVENT, 947 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n", 948 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase, 949 (u32)((u64)card->evtbd_ring_pbase >> 32), 950 card->evtbd_ring_size); 951 952 return mwifiex_pcie_init_evt_ring(adapter); 953 } 954 955 /* 956 * This function deletes Buffer descriptor ring for Events 957 */ 958 static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter) 959 { 960 struct pcie_service_card *card = adapter->card; 961 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 962 963 mwifiex_cleanup_evt_ring(adapter); 964 965 if (card->evtbd_ring_vbase) 966 pci_free_consistent(card->dev, card->evtbd_ring_size, 967 card->evtbd_ring_vbase, 968 card->evtbd_ring_pbase); 969 card->evtbd_wrptr = 0; 970 card->evtbd_rdptr = 0 | reg->evt_rollover_ind; 971 card->evtbd_ring_size = 0; 972 card->evtbd_ring_vbase = NULL; 973 card->evtbd_ring_pbase = 0; 974 975 return 0; 976 } 977 978 /* 979 * This function allocates a buffer for CMDRSP 980 */ 981 static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter) 982 { 983 struct pcie_service_card *card = adapter->card; 984 struct sk_buff *skb; 985 986 /* Allocate memory for receiving command response data */ 987 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 988 if (!skb) { 989 mwifiex_dbg(adapter, ERROR, 990 "Unable to allocate skb for command response data.\n"); 991 return -ENOMEM; 992 } 993 skb_put(skb, MWIFIEX_UPLD_SIZE); 994 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 995 PCI_DMA_FROMDEVICE)) 996 return -1; 997 998 card->cmdrsp_buf = skb; 999 1000 return 0; 1001 } 1002 1003 /* 1004 * This function deletes a buffer for CMDRSP 1005 */ 1006 static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter) 1007 { 1008 struct pcie_service_card *card; 1009 1010 if (!adapter) 1011 return 0; 1012 1013 card = adapter->card; 1014 1015 if (card && card->cmdrsp_buf) { 1016 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf, 1017 PCI_DMA_FROMDEVICE); 1018 dev_kfree_skb_any(card->cmdrsp_buf); 1019 } 1020 1021 if (card && card->cmd_buf) { 1022 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1023 PCI_DMA_TODEVICE); 1024 } 1025 return 0; 1026 } 1027 1028 /* 1029 * This function allocates a buffer for sleep cookie 1030 */ 1031 static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter) 1032 { 1033 struct pcie_service_card *card = adapter->card; 1034 1035 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32), 1036 &card->sleep_cookie_pbase); 1037 if (!card->sleep_cookie_vbase) { 1038 mwifiex_dbg(adapter, ERROR, 1039 "pci_alloc_consistent failed!\n"); 1040 return -ENOMEM; 1041 } 1042 /* Init val of Sleep Cookie */ 1043 *(u32 *)card->sleep_cookie_vbase = FW_AWAKE_COOKIE; 1044 1045 mwifiex_dbg(adapter, INFO, 1046 "alloc_scook: sleep cookie=0x%x\n", 1047 *((u32 *)card->sleep_cookie_vbase)); 1048 1049 return 0; 1050 } 1051 1052 /* 1053 * This function deletes buffer for sleep cookie 1054 */ 1055 static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter) 1056 { 1057 struct pcie_service_card *card; 1058 1059 if (!adapter) 1060 return 0; 1061 1062 card = adapter->card; 1063 1064 if (card && card->sleep_cookie_vbase) { 1065 pci_free_consistent(card->dev, sizeof(u32), 1066 card->sleep_cookie_vbase, 1067 card->sleep_cookie_pbase); 1068 card->sleep_cookie_vbase = NULL; 1069 } 1070 1071 return 0; 1072 } 1073 1074 /* This function flushes the TX buffer descriptor ring 1075 * This function defined as handler is also called while cleaning TXRX 1076 * during disconnect/ bss stop. 1077 */ 1078 static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter) 1079 { 1080 struct pcie_service_card *card = adapter->card; 1081 1082 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) { 1083 card->txbd_flush = 1; 1084 /* write pointer already set at last send 1085 * send dnld-rdy intr again, wait for completion. 1086 */ 1087 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1088 CPU_INTR_DNLD_RDY)) { 1089 mwifiex_dbg(adapter, ERROR, 1090 "failed to assert dnld-rdy interrupt.\n"); 1091 return -1; 1092 } 1093 } 1094 return 0; 1095 } 1096 1097 /* 1098 * This function unmaps and frees downloaded data buffer 1099 */ 1100 static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter) 1101 { 1102 struct sk_buff *skb; 1103 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0; 1104 struct mwifiex_pcie_buf_desc *desc; 1105 struct mwifiex_pfu_buf_desc *desc2; 1106 struct pcie_service_card *card = adapter->card; 1107 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1108 1109 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1110 mwifiex_pm_wakeup_card(adapter); 1111 1112 /* Read the TX ring read pointer set by firmware */ 1113 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) { 1114 mwifiex_dbg(adapter, ERROR, 1115 "SEND COMP: failed to read reg->tx_rdptr\n"); 1116 return -1; 1117 } 1118 1119 mwifiex_dbg(adapter, DATA, 1120 "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n", 1121 card->txbd_rdptr, rdptr); 1122 1123 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1124 /* free from previous txbd_rdptr to current txbd_rdptr */ 1125 while (((card->txbd_rdptr & reg->tx_mask) != 1126 (rdptr & reg->tx_mask)) || 1127 ((card->txbd_rdptr & reg->tx_rollover_ind) != 1128 (rdptr & reg->tx_rollover_ind))) { 1129 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >> 1130 reg->tx_start_ptr; 1131 1132 skb = card->tx_buf_list[wrdoneidx]; 1133 1134 if (skb) { 1135 mwifiex_dbg(adapter, DATA, 1136 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n", 1137 skb, wrdoneidx); 1138 mwifiex_unmap_pci_memory(adapter, skb, 1139 PCI_DMA_TODEVICE); 1140 1141 unmap_count++; 1142 1143 if (card->txbd_flush) 1144 mwifiex_write_data_complete(adapter, skb, 0, 1145 -1); 1146 else 1147 mwifiex_write_data_complete(adapter, skb, 0, 0); 1148 atomic_dec(&adapter->tx_hw_pending); 1149 } 1150 1151 card->tx_buf_list[wrdoneidx] = NULL; 1152 1153 if (reg->pfu_enabled) { 1154 desc2 = card->txbd_ring[wrdoneidx]; 1155 memset(desc2, 0, sizeof(*desc2)); 1156 } else { 1157 desc = card->txbd_ring[wrdoneidx]; 1158 memset(desc, 0, sizeof(*desc)); 1159 } 1160 switch (card->dev->device) { 1161 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1162 card->txbd_rdptr++; 1163 break; 1164 case PCIE_DEVICE_ID_MARVELL_88W8897: 1165 case PCIE_DEVICE_ID_MARVELL_88W8997: 1166 card->txbd_rdptr += reg->ring_tx_start_ptr; 1167 break; 1168 } 1169 1170 1171 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs) 1172 card->txbd_rdptr = ((card->txbd_rdptr & 1173 reg->tx_rollover_ind) ^ 1174 reg->tx_rollover_ind); 1175 } 1176 1177 if (unmap_count) 1178 adapter->data_sent = false; 1179 1180 if (card->txbd_flush) { 1181 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) 1182 card->txbd_flush = 0; 1183 else 1184 mwifiex_clean_pcie_ring_buf(adapter); 1185 } 1186 1187 return 0; 1188 } 1189 1190 /* This function sends data buffer to device. First 4 bytes of payload 1191 * are filled with payload length and payload type. Then this payload 1192 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly. 1193 * Download ready interrupt to FW is deffered if Tx ring is not full and 1194 * additional payload can be accomodated. 1195 * Caller must ensure tx_param parameter to this function is not NULL. 1196 */ 1197 static int 1198 mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb, 1199 struct mwifiex_tx_param *tx_param) 1200 { 1201 struct pcie_service_card *card = adapter->card; 1202 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1203 u32 wrindx, num_tx_buffs, rx_val; 1204 int ret; 1205 dma_addr_t buf_pa; 1206 struct mwifiex_pcie_buf_desc *desc = NULL; 1207 struct mwifiex_pfu_buf_desc *desc2 = NULL; 1208 __le16 *tmp; 1209 1210 if (!(skb->data && skb->len)) { 1211 mwifiex_dbg(adapter, ERROR, 1212 "%s(): invalid parameter <%p, %#x>\n", 1213 __func__, skb->data, skb->len); 1214 return -1; 1215 } 1216 1217 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1218 mwifiex_pm_wakeup_card(adapter); 1219 1220 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1221 mwifiex_dbg(adapter, DATA, 1222 "info: SEND DATA: <Rd: %#x, Wr: %#x>\n", 1223 card->txbd_rdptr, card->txbd_wrptr); 1224 if (mwifiex_pcie_txbd_not_full(card)) { 1225 u8 *payload; 1226 1227 adapter->data_sent = true; 1228 payload = skb->data; 1229 tmp = (__le16 *)&payload[0]; 1230 *tmp = cpu_to_le16((u16)skb->len); 1231 tmp = (__le16 *)&payload[2]; 1232 *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA); 1233 1234 if (mwifiex_map_pci_memory(adapter, skb, skb->len, 1235 PCI_DMA_TODEVICE)) 1236 return -1; 1237 1238 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr; 1239 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1240 card->tx_buf_list[wrindx] = skb; 1241 atomic_inc(&adapter->tx_hw_pending); 1242 1243 if (reg->pfu_enabled) { 1244 desc2 = card->txbd_ring[wrindx]; 1245 desc2->paddr = buf_pa; 1246 desc2->len = (u16)skb->len; 1247 desc2->frag_len = (u16)skb->len; 1248 desc2->offset = 0; 1249 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1250 MWIFIEX_BD_FLAG_LAST_DESC; 1251 } else { 1252 desc = card->txbd_ring[wrindx]; 1253 desc->paddr = buf_pa; 1254 desc->len = (u16)skb->len; 1255 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1256 MWIFIEX_BD_FLAG_LAST_DESC; 1257 } 1258 1259 switch (card->dev->device) { 1260 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1261 card->txbd_wrptr++; 1262 break; 1263 case PCIE_DEVICE_ID_MARVELL_88W8897: 1264 case PCIE_DEVICE_ID_MARVELL_88W8997: 1265 card->txbd_wrptr += reg->ring_tx_start_ptr; 1266 break; 1267 } 1268 1269 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs) 1270 card->txbd_wrptr = ((card->txbd_wrptr & 1271 reg->tx_rollover_ind) ^ 1272 reg->tx_rollover_ind); 1273 1274 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask; 1275 /* Write the TX ring write pointer in to reg->tx_wrptr */ 1276 if (mwifiex_write_reg(adapter, reg->tx_wrptr, 1277 card->txbd_wrptr | rx_val)) { 1278 mwifiex_dbg(adapter, ERROR, 1279 "SEND DATA: failed to write reg->tx_wrptr\n"); 1280 ret = -1; 1281 goto done_unmap; 1282 } 1283 if ((mwifiex_pcie_txbd_not_full(card)) && 1284 tx_param->next_pkt_len) { 1285 /* have more packets and TxBD still can hold more */ 1286 mwifiex_dbg(adapter, DATA, 1287 "SEND DATA: delay dnld-rdy interrupt.\n"); 1288 adapter->data_sent = false; 1289 } else { 1290 /* Send the TX ready interrupt */ 1291 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1292 CPU_INTR_DNLD_RDY)) { 1293 mwifiex_dbg(adapter, ERROR, 1294 "SEND DATA: failed to assert dnld-rdy interrupt.\n"); 1295 ret = -1; 1296 goto done_unmap; 1297 } 1298 } 1299 mwifiex_dbg(adapter, DATA, 1300 "info: SEND DATA: Updated <Rd: %#x, Wr:\t" 1301 "%#x> and sent packet to firmware successfully\n", 1302 card->txbd_rdptr, card->txbd_wrptr); 1303 } else { 1304 mwifiex_dbg(adapter, DATA, 1305 "info: TX Ring full, can't send packets to fw\n"); 1306 adapter->data_sent = true; 1307 /* Send the TX ready interrupt */ 1308 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1309 CPU_INTR_DNLD_RDY)) 1310 mwifiex_dbg(adapter, ERROR, 1311 "SEND DATA: failed to assert door-bell intr\n"); 1312 return -EBUSY; 1313 } 1314 1315 return -EINPROGRESS; 1316 done_unmap: 1317 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1318 card->tx_buf_list[wrindx] = NULL; 1319 atomic_dec(&adapter->tx_hw_pending); 1320 if (reg->pfu_enabled) 1321 memset(desc2, 0, sizeof(*desc2)); 1322 else 1323 memset(desc, 0, sizeof(*desc)); 1324 1325 return ret; 1326 } 1327 1328 /* 1329 * This function handles received buffer ring and 1330 * dispatches packets to upper 1331 */ 1332 static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter) 1333 { 1334 struct pcie_service_card *card = adapter->card; 1335 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1336 u32 wrptr, rd_index, tx_val; 1337 dma_addr_t buf_pa; 1338 int ret = 0; 1339 struct sk_buff *skb_tmp = NULL; 1340 struct mwifiex_pcie_buf_desc *desc; 1341 struct mwifiex_pfu_buf_desc *desc2; 1342 1343 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1344 mwifiex_pm_wakeup_card(adapter); 1345 1346 /* Read the RX ring Write pointer set by firmware */ 1347 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1348 mwifiex_dbg(adapter, ERROR, 1349 "RECV DATA: failed to read reg->rx_wrptr\n"); 1350 ret = -1; 1351 goto done; 1352 } 1353 card->rxbd_wrptr = wrptr; 1354 1355 while (((wrptr & reg->rx_mask) != 1356 (card->rxbd_rdptr & reg->rx_mask)) || 1357 ((wrptr & reg->rx_rollover_ind) == 1358 (card->rxbd_rdptr & reg->rx_rollover_ind))) { 1359 struct sk_buff *skb_data; 1360 u16 rx_len; 1361 __le16 pkt_len; 1362 1363 rd_index = card->rxbd_rdptr & reg->rx_mask; 1364 skb_data = card->rx_buf_list[rd_index]; 1365 1366 /* If skb allocation was failed earlier for Rx packet, 1367 * rx_buf_list[rd_index] would have been left with a NULL. 1368 */ 1369 if (!skb_data) 1370 return -ENOMEM; 1371 1372 mwifiex_unmap_pci_memory(adapter, skb_data, PCI_DMA_FROMDEVICE); 1373 card->rx_buf_list[rd_index] = NULL; 1374 1375 /* Get data length from interface header - 1376 * first 2 bytes for len, next 2 bytes is for type 1377 */ 1378 pkt_len = *((__le16 *)skb_data->data); 1379 rx_len = le16_to_cpu(pkt_len); 1380 if (WARN_ON(rx_len <= INTF_HEADER_LEN || 1381 rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) { 1382 mwifiex_dbg(adapter, ERROR, 1383 "Invalid RX len %d, Rd=%#x, Wr=%#x\n", 1384 rx_len, card->rxbd_rdptr, wrptr); 1385 dev_kfree_skb_any(skb_data); 1386 } else { 1387 skb_put(skb_data, rx_len); 1388 mwifiex_dbg(adapter, DATA, 1389 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n", 1390 card->rxbd_rdptr, wrptr, rx_len); 1391 skb_pull(skb_data, INTF_HEADER_LEN); 1392 if (adapter->rx_work_enabled) { 1393 skb_queue_tail(&adapter->rx_data_q, skb_data); 1394 adapter->data_received = true; 1395 atomic_inc(&adapter->rx_pending); 1396 } else { 1397 mwifiex_handle_rx_packet(adapter, skb_data); 1398 } 1399 } 1400 1401 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 1402 GFP_KERNEL); 1403 if (!skb_tmp) { 1404 mwifiex_dbg(adapter, ERROR, 1405 "Unable to allocate skb.\n"); 1406 return -ENOMEM; 1407 } 1408 1409 if (mwifiex_map_pci_memory(adapter, skb_tmp, 1410 MWIFIEX_RX_DATA_BUF_SIZE, 1411 PCI_DMA_FROMDEVICE)) 1412 return -1; 1413 1414 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp); 1415 1416 mwifiex_dbg(adapter, INFO, 1417 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n", 1418 skb_tmp, rd_index); 1419 card->rx_buf_list[rd_index] = skb_tmp; 1420 1421 if (reg->pfu_enabled) { 1422 desc2 = card->rxbd_ring[rd_index]; 1423 desc2->paddr = buf_pa; 1424 desc2->len = skb_tmp->len; 1425 desc2->frag_len = skb_tmp->len; 1426 desc2->offset = 0; 1427 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop; 1428 } else { 1429 desc = card->rxbd_ring[rd_index]; 1430 desc->paddr = buf_pa; 1431 desc->len = skb_tmp->len; 1432 desc->flags = 0; 1433 } 1434 1435 if ((++card->rxbd_rdptr & reg->rx_mask) == 1436 MWIFIEX_MAX_TXRX_BD) { 1437 card->rxbd_rdptr = ((card->rxbd_rdptr & 1438 reg->rx_rollover_ind) ^ 1439 reg->rx_rollover_ind); 1440 } 1441 mwifiex_dbg(adapter, DATA, 1442 "info: RECV DATA: <Rd: %#x, Wr: %#x>\n", 1443 card->rxbd_rdptr, wrptr); 1444 1445 tx_val = card->txbd_wrptr & reg->tx_wrap_mask; 1446 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1447 if (mwifiex_write_reg(adapter, reg->rx_rdptr, 1448 card->rxbd_rdptr | tx_val)) { 1449 mwifiex_dbg(adapter, DATA, 1450 "RECV DATA: failed to write reg->rx_rdptr\n"); 1451 ret = -1; 1452 goto done; 1453 } 1454 1455 /* Read the RX ring Write pointer set by firmware */ 1456 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1457 mwifiex_dbg(adapter, ERROR, 1458 "RECV DATA: failed to read reg->rx_wrptr\n"); 1459 ret = -1; 1460 goto done; 1461 } 1462 mwifiex_dbg(adapter, DATA, 1463 "info: RECV DATA: Rcvd packet from fw successfully\n"); 1464 card->rxbd_wrptr = wrptr; 1465 } 1466 1467 done: 1468 return ret; 1469 } 1470 1471 /* 1472 * This function downloads the boot command to device 1473 */ 1474 static int 1475 mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1476 { 1477 dma_addr_t buf_pa; 1478 struct pcie_service_card *card = adapter->card; 1479 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1480 1481 if (!(skb->data && skb->len)) { 1482 mwifiex_dbg(adapter, ERROR, 1483 "Invalid parameter in %s <%p. len %d>\n", 1484 __func__, skb->data, skb->len); 1485 return -1; 1486 } 1487 1488 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE)) 1489 return -1; 1490 1491 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1492 1493 /* Write the lower 32bits of the physical address to low command 1494 * address scratch register 1495 */ 1496 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) { 1497 mwifiex_dbg(adapter, ERROR, 1498 "%s: failed to write download command to boot code.\n", 1499 __func__); 1500 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1501 return -1; 1502 } 1503 1504 /* Write the upper 32bits of the physical address to high command 1505 * address scratch register 1506 */ 1507 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1508 (u32)((u64)buf_pa >> 32))) { 1509 mwifiex_dbg(adapter, ERROR, 1510 "%s: failed to write download command to boot code.\n", 1511 __func__); 1512 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1513 return -1; 1514 } 1515 1516 /* Write the command length to cmd_size scratch register */ 1517 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) { 1518 mwifiex_dbg(adapter, ERROR, 1519 "%s: failed to write command len to cmd_size scratch reg\n", 1520 __func__); 1521 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1522 return -1; 1523 } 1524 1525 /* Ring the door bell */ 1526 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1527 CPU_INTR_DOOR_BELL)) { 1528 mwifiex_dbg(adapter, ERROR, 1529 "%s: failed to assert door-bell intr\n", __func__); 1530 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1531 return -1; 1532 } 1533 1534 return 0; 1535 } 1536 1537 /* This function init rx port in firmware which in turn enables to receive data 1538 * from device before transmitting any packet. 1539 */ 1540 static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter) 1541 { 1542 struct pcie_service_card *card = adapter->card; 1543 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1544 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask; 1545 1546 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1547 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr | 1548 tx_wrap)) { 1549 mwifiex_dbg(adapter, ERROR, 1550 "RECV DATA: failed to write reg->rx_rdptr\n"); 1551 return -1; 1552 } 1553 return 0; 1554 } 1555 1556 /* This function downloads commands to the device 1557 */ 1558 static int 1559 mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1560 { 1561 struct pcie_service_card *card = adapter->card; 1562 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1563 int ret = 0; 1564 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa; 1565 u8 *payload = (u8 *)skb->data; 1566 1567 if (!(skb->data && skb->len)) { 1568 mwifiex_dbg(adapter, ERROR, 1569 "Invalid parameter in %s <%p, %#x>\n", 1570 __func__, skb->data, skb->len); 1571 return -1; 1572 } 1573 1574 /* Make sure a command response buffer is available */ 1575 if (!card->cmdrsp_buf) { 1576 mwifiex_dbg(adapter, ERROR, 1577 "No response buffer available, send command failed\n"); 1578 return -EBUSY; 1579 } 1580 1581 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1582 mwifiex_pm_wakeup_card(adapter); 1583 1584 adapter->cmd_sent = true; 1585 1586 *(__le16 *)&payload[0] = cpu_to_le16((u16)skb->len); 1587 *(__le16 *)&payload[2] = cpu_to_le16(MWIFIEX_TYPE_CMD); 1588 1589 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE)) 1590 return -1; 1591 1592 card->cmd_buf = skb; 1593 1594 /* To send a command, the driver will: 1595 1. Write the 64bit physical address of the data buffer to 1596 cmd response address low + cmd response address high 1597 2. Ring the door bell (i.e. set the door bell interrupt) 1598 1599 In response to door bell interrupt, the firmware will perform 1600 the DMA of the command packet (first header to obtain the total 1601 length and then rest of the command). 1602 */ 1603 1604 if (card->cmdrsp_buf) { 1605 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf); 1606 /* Write the lower 32bits of the cmdrsp buffer physical 1607 address */ 1608 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 1609 (u32)cmdrsp_buf_pa)) { 1610 mwifiex_dbg(adapter, ERROR, 1611 "Failed to write download cmd to boot code.\n"); 1612 ret = -1; 1613 goto done; 1614 } 1615 /* Write the upper 32bits of the cmdrsp buffer physical 1616 address */ 1617 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 1618 (u32)((u64)cmdrsp_buf_pa >> 32))) { 1619 mwifiex_dbg(adapter, ERROR, 1620 "Failed to write download cmd to boot code.\n"); 1621 ret = -1; 1622 goto done; 1623 } 1624 } 1625 1626 cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf); 1627 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */ 1628 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, 1629 (u32)cmd_buf_pa)) { 1630 mwifiex_dbg(adapter, ERROR, 1631 "Failed to write download cmd to boot code.\n"); 1632 ret = -1; 1633 goto done; 1634 } 1635 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */ 1636 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1637 (u32)((u64)cmd_buf_pa >> 32))) { 1638 mwifiex_dbg(adapter, ERROR, 1639 "Failed to write download cmd to boot code.\n"); 1640 ret = -1; 1641 goto done; 1642 } 1643 1644 /* Write the command length to reg->cmd_size */ 1645 if (mwifiex_write_reg(adapter, reg->cmd_size, 1646 card->cmd_buf->len)) { 1647 mwifiex_dbg(adapter, ERROR, 1648 "Failed to write cmd len to reg->cmd_size\n"); 1649 ret = -1; 1650 goto done; 1651 } 1652 1653 /* Ring the door bell */ 1654 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1655 CPU_INTR_DOOR_BELL)) { 1656 mwifiex_dbg(adapter, ERROR, 1657 "Failed to assert door-bell intr\n"); 1658 ret = -1; 1659 goto done; 1660 } 1661 1662 done: 1663 if (ret) 1664 adapter->cmd_sent = false; 1665 1666 return 0; 1667 } 1668 1669 /* 1670 * This function handles command complete interrupt 1671 */ 1672 static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter) 1673 { 1674 struct pcie_service_card *card = adapter->card; 1675 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1676 struct sk_buff *skb = card->cmdrsp_buf; 1677 int count = 0; 1678 u16 rx_len; 1679 __le16 pkt_len; 1680 1681 mwifiex_dbg(adapter, CMD, 1682 "info: Rx CMD Response\n"); 1683 1684 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_FROMDEVICE); 1685 1686 /* Unmap the command as a response has been received. */ 1687 if (card->cmd_buf) { 1688 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1689 PCI_DMA_TODEVICE); 1690 card->cmd_buf = NULL; 1691 } 1692 1693 pkt_len = *((__le16 *)skb->data); 1694 rx_len = le16_to_cpu(pkt_len); 1695 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 1696 skb_trim(skb, rx_len); 1697 skb_pull(skb, INTF_HEADER_LEN); 1698 1699 if (!adapter->curr_cmd) { 1700 if (adapter->ps_state == PS_STATE_SLEEP_CFM) { 1701 if (mwifiex_write_reg(adapter, 1702 PCIE_CPU_INT_EVENT, 1703 CPU_INTR_SLEEP_CFM_DONE)) { 1704 mwifiex_dbg(adapter, ERROR, 1705 "Write register failed\n"); 1706 return -1; 1707 } 1708 mwifiex_delay_for_sleep_cookie(adapter, 1709 MWIFIEX_MAX_DELAY_COUNT); 1710 while (reg->sleep_cookie && (count++ < 10) && 1711 mwifiex_pcie_ok_to_access_hw(adapter)) 1712 usleep_range(50, 60); 1713 mwifiex_pcie_enable_host_int(adapter); 1714 mwifiex_process_sleep_confirm_resp(adapter, skb->data, 1715 skb->len); 1716 } else { 1717 mwifiex_dbg(adapter, ERROR, 1718 "There is no command but got cmdrsp\n"); 1719 } 1720 memcpy(adapter->upld_buf, skb->data, 1721 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len)); 1722 skb_push(skb, INTF_HEADER_LEN); 1723 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1724 PCI_DMA_FROMDEVICE)) 1725 return -1; 1726 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) { 1727 adapter->curr_cmd->resp_skb = skb; 1728 adapter->cmd_resp_received = true; 1729 /* Take the pointer and set it to CMD node and will 1730 return in the response complete callback */ 1731 card->cmdrsp_buf = NULL; 1732 1733 /* Clear the cmd-rsp buffer address in scratch registers. This 1734 will prevent firmware from writing to the same response 1735 buffer again. */ 1736 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) { 1737 mwifiex_dbg(adapter, ERROR, 1738 "cmd_done: failed to clear cmd_rsp_addr_lo\n"); 1739 return -1; 1740 } 1741 /* Write the upper 32bits of the cmdrsp buffer physical 1742 address */ 1743 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) { 1744 mwifiex_dbg(adapter, ERROR, 1745 "cmd_done: failed to clear cmd_rsp_addr_hi\n"); 1746 return -1; 1747 } 1748 } 1749 1750 return 0; 1751 } 1752 1753 /* 1754 * Command Response processing complete handler 1755 */ 1756 static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter, 1757 struct sk_buff *skb) 1758 { 1759 struct pcie_service_card *card = adapter->card; 1760 1761 if (skb) { 1762 card->cmdrsp_buf = skb; 1763 skb_push(card->cmdrsp_buf, INTF_HEADER_LEN); 1764 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1765 PCI_DMA_FROMDEVICE)) 1766 return -1; 1767 } 1768 1769 return 0; 1770 } 1771 1772 /* 1773 * This function handles firmware event ready interrupt 1774 */ 1775 static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter) 1776 { 1777 struct pcie_service_card *card = adapter->card; 1778 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1779 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 1780 u32 wrptr, event; 1781 struct mwifiex_evt_buf_desc *desc; 1782 1783 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1784 mwifiex_pm_wakeup_card(adapter); 1785 1786 if (adapter->event_received) { 1787 mwifiex_dbg(adapter, EVENT, 1788 "info: Event being processed,\t" 1789 "do not process this interrupt just yet\n"); 1790 return 0; 1791 } 1792 1793 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 1794 mwifiex_dbg(adapter, ERROR, 1795 "info: Invalid read pointer...\n"); 1796 return -1; 1797 } 1798 1799 /* Read the event ring write pointer set by firmware */ 1800 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 1801 mwifiex_dbg(adapter, ERROR, 1802 "EventReady: failed to read reg->evt_wrptr\n"); 1803 return -1; 1804 } 1805 1806 mwifiex_dbg(adapter, EVENT, 1807 "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>", 1808 card->evtbd_rdptr, wrptr); 1809 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr 1810 & MWIFIEX_EVTBD_MASK)) || 1811 ((wrptr & reg->evt_rollover_ind) == 1812 (card->evtbd_rdptr & reg->evt_rollover_ind))) { 1813 struct sk_buff *skb_cmd; 1814 __le16 data_len = 0; 1815 u16 evt_len; 1816 1817 mwifiex_dbg(adapter, INFO, 1818 "info: Read Index: %d\n", rdptr); 1819 skb_cmd = card->evt_buf_list[rdptr]; 1820 mwifiex_unmap_pci_memory(adapter, skb_cmd, PCI_DMA_FROMDEVICE); 1821 1822 /* Take the pointer and set it to event pointer in adapter 1823 and will return back after event handling callback */ 1824 card->evt_buf_list[rdptr] = NULL; 1825 desc = card->evtbd_ring[rdptr]; 1826 memset(desc, 0, sizeof(*desc)); 1827 1828 event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN]; 1829 adapter->event_cause = event; 1830 /* The first 4bytes will be the event transfer header 1831 len is 2 bytes followed by type which is 2 bytes */ 1832 memcpy(&data_len, skb_cmd->data, sizeof(__le16)); 1833 evt_len = le16_to_cpu(data_len); 1834 skb_trim(skb_cmd, evt_len); 1835 skb_pull(skb_cmd, INTF_HEADER_LEN); 1836 mwifiex_dbg(adapter, EVENT, 1837 "info: Event length: %d\n", evt_len); 1838 1839 if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE)) 1840 memcpy(adapter->event_body, skb_cmd->data + 1841 MWIFIEX_EVENT_HEADER_LEN, evt_len - 1842 MWIFIEX_EVENT_HEADER_LEN); 1843 1844 adapter->event_received = true; 1845 adapter->event_skb = skb_cmd; 1846 1847 /* Do not update the event read pointer here, wait till the 1848 buffer is released. This is just to make things simpler, 1849 we need to find a better method of managing these buffers. 1850 */ 1851 } else { 1852 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1853 CPU_INTR_EVENT_DONE)) { 1854 mwifiex_dbg(adapter, ERROR, 1855 "Write register failed\n"); 1856 return -1; 1857 } 1858 } 1859 1860 return 0; 1861 } 1862 1863 /* 1864 * Event processing complete handler 1865 */ 1866 static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter, 1867 struct sk_buff *skb) 1868 { 1869 struct pcie_service_card *card = adapter->card; 1870 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1871 int ret = 0; 1872 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 1873 u32 wrptr; 1874 struct mwifiex_evt_buf_desc *desc; 1875 1876 if (!skb) 1877 return 0; 1878 1879 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 1880 mwifiex_dbg(adapter, ERROR, 1881 "event_complete: Invalid rdptr 0x%x\n", 1882 rdptr); 1883 return -EINVAL; 1884 } 1885 1886 /* Read the event ring write pointer set by firmware */ 1887 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 1888 mwifiex_dbg(adapter, ERROR, 1889 "event_complete: failed to read reg->evt_wrptr\n"); 1890 return -1; 1891 } 1892 1893 if (!card->evt_buf_list[rdptr]) { 1894 skb_push(skb, INTF_HEADER_LEN); 1895 skb_put(skb, MAX_EVENT_SIZE - skb->len); 1896 if (mwifiex_map_pci_memory(adapter, skb, 1897 MAX_EVENT_SIZE, 1898 PCI_DMA_FROMDEVICE)) 1899 return -1; 1900 card->evt_buf_list[rdptr] = skb; 1901 desc = card->evtbd_ring[rdptr]; 1902 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb); 1903 desc->len = (u16)skb->len; 1904 desc->flags = 0; 1905 skb = NULL; 1906 } else { 1907 mwifiex_dbg(adapter, ERROR, 1908 "info: ERROR: buf still valid at index %d, <%p, %p>\n", 1909 rdptr, card->evt_buf_list[rdptr], skb); 1910 } 1911 1912 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) { 1913 card->evtbd_rdptr = ((card->evtbd_rdptr & 1914 reg->evt_rollover_ind) ^ 1915 reg->evt_rollover_ind); 1916 } 1917 1918 mwifiex_dbg(adapter, EVENT, 1919 "info: Updated <Rd: 0x%x, Wr: 0x%x>", 1920 card->evtbd_rdptr, wrptr); 1921 1922 /* Write the event ring read pointer in to reg->evt_rdptr */ 1923 if (mwifiex_write_reg(adapter, reg->evt_rdptr, 1924 card->evtbd_rdptr)) { 1925 mwifiex_dbg(adapter, ERROR, 1926 "event_complete: failed to read reg->evt_rdptr\n"); 1927 return -1; 1928 } 1929 1930 mwifiex_dbg(adapter, EVENT, 1931 "info: Check Events Again\n"); 1932 ret = mwifiex_pcie_process_event_ready(adapter); 1933 1934 return ret; 1935 } 1936 1937 /* 1938 * This function downloads the firmware to the card. 1939 * 1940 * Firmware is downloaded to the card in blocks. Every block download 1941 * is tested for CRC errors, and retried a number of times before 1942 * returning failure. 1943 */ 1944 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter, 1945 struct mwifiex_fw_image *fw) 1946 { 1947 int ret; 1948 u8 *firmware = fw->fw_buf; 1949 u32 firmware_len = fw->fw_len; 1950 u32 offset = 0; 1951 struct sk_buff *skb; 1952 u32 txlen, tx_blocks = 0, tries, len; 1953 u32 block_retry_cnt = 0; 1954 struct pcie_service_card *card = adapter->card; 1955 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1956 1957 if (!firmware || !firmware_len) { 1958 mwifiex_dbg(adapter, ERROR, 1959 "No firmware image found! Terminating download\n"); 1960 return -1; 1961 } 1962 1963 mwifiex_dbg(adapter, INFO, 1964 "info: Downloading FW image (%d bytes)\n", 1965 firmware_len); 1966 1967 if (mwifiex_pcie_disable_host_int(adapter)) { 1968 mwifiex_dbg(adapter, ERROR, 1969 "%s: Disabling interrupts failed.\n", __func__); 1970 return -1; 1971 } 1972 1973 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 1974 if (!skb) { 1975 ret = -ENOMEM; 1976 goto done; 1977 } 1978 1979 /* Perform firmware data transfer */ 1980 do { 1981 u32 ireg_intr = 0; 1982 1983 /* More data? */ 1984 if (offset >= firmware_len) 1985 break; 1986 1987 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 1988 ret = mwifiex_read_reg(adapter, reg->cmd_size, 1989 &len); 1990 if (ret) { 1991 mwifiex_dbg(adapter, FATAL, 1992 "Failed reading len from boot code\n"); 1993 goto done; 1994 } 1995 if (len) 1996 break; 1997 usleep_range(10, 20); 1998 } 1999 2000 if (!len) { 2001 break; 2002 } else if (len > MWIFIEX_UPLD_SIZE) { 2003 mwifiex_dbg(adapter, ERROR, 2004 "FW download failure @ %d, invalid length %d\n", 2005 offset, len); 2006 ret = -1; 2007 goto done; 2008 } 2009 2010 txlen = len; 2011 2012 if (len & BIT(0)) { 2013 block_retry_cnt++; 2014 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) { 2015 mwifiex_dbg(adapter, ERROR, 2016 "FW download failure @ %d, over max\t" 2017 "retry count\n", offset); 2018 ret = -1; 2019 goto done; 2020 } 2021 mwifiex_dbg(adapter, ERROR, 2022 "FW CRC error indicated by the\t" 2023 "helper: len = 0x%04X, txlen = %d\n", 2024 len, txlen); 2025 len &= ~BIT(0); 2026 /* Setting this to 0 to resend from same offset */ 2027 txlen = 0; 2028 } else { 2029 block_retry_cnt = 0; 2030 /* Set blocksize to transfer - checking for 2031 last block */ 2032 if (firmware_len - offset < txlen) 2033 txlen = firmware_len - offset; 2034 2035 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) / 2036 card->pcie.blksz_fw_dl; 2037 2038 /* Copy payload to buffer */ 2039 memmove(skb->data, &firmware[offset], txlen); 2040 } 2041 2042 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 2043 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl); 2044 2045 /* Send the boot command to device */ 2046 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) { 2047 mwifiex_dbg(adapter, ERROR, 2048 "Failed to send firmware download command\n"); 2049 ret = -1; 2050 goto done; 2051 } 2052 2053 /* Wait for the command done interrupt */ 2054 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2055 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS, 2056 &ireg_intr)) { 2057 mwifiex_dbg(adapter, ERROR, 2058 "%s: Failed to read\t" 2059 "interrupt status during fw dnld.\n", 2060 __func__); 2061 mwifiex_unmap_pci_memory(adapter, skb, 2062 PCI_DMA_TODEVICE); 2063 ret = -1; 2064 goto done; 2065 } 2066 if (!(ireg_intr & CPU_INTR_DOOR_BELL)) 2067 break; 2068 usleep_range(10, 20); 2069 } 2070 if (ireg_intr & CPU_INTR_DOOR_BELL) { 2071 mwifiex_dbg(adapter, ERROR, "%s: Card failed to ACK download\n", 2072 __func__); 2073 mwifiex_unmap_pci_memory(adapter, skb, 2074 PCI_DMA_TODEVICE); 2075 ret = -1; 2076 goto done; 2077 } 2078 2079 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 2080 2081 offset += txlen; 2082 } while (true); 2083 2084 mwifiex_dbg(adapter, MSG, 2085 "info: FW download over, size %d bytes\n", offset); 2086 2087 ret = 0; 2088 2089 done: 2090 dev_kfree_skb_any(skb); 2091 return ret; 2092 } 2093 2094 /* 2095 * This function checks the firmware status in card. 2096 */ 2097 static int 2098 mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num) 2099 { 2100 int ret = 0; 2101 u32 firmware_stat; 2102 struct pcie_service_card *card = adapter->card; 2103 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2104 u32 tries; 2105 2106 /* Mask spurios interrupts */ 2107 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK, 2108 HOST_INTR_MASK)) { 2109 mwifiex_dbg(adapter, ERROR, 2110 "Write register failed\n"); 2111 return -1; 2112 } 2113 2114 mwifiex_dbg(adapter, INFO, 2115 "Setting driver ready signature\n"); 2116 if (mwifiex_write_reg(adapter, reg->drv_rdy, 2117 FIRMWARE_READY_PCIE)) { 2118 mwifiex_dbg(adapter, ERROR, 2119 "Failed to write driver ready signature\n"); 2120 return -1; 2121 } 2122 2123 /* Wait for firmware initialization event */ 2124 for (tries = 0; tries < poll_num; tries++) { 2125 if (mwifiex_read_reg(adapter, reg->fw_status, 2126 &firmware_stat)) 2127 ret = -1; 2128 else 2129 ret = 0; 2130 2131 mwifiex_dbg(adapter, INFO, "Try %d if FW is ready <%d,%#x>", 2132 tries, ret, firmware_stat); 2133 2134 if (ret) 2135 continue; 2136 if (firmware_stat == FIRMWARE_READY_PCIE) { 2137 ret = 0; 2138 break; 2139 } else { 2140 msleep(100); 2141 ret = -1; 2142 } 2143 } 2144 2145 return ret; 2146 } 2147 2148 /* This function checks if WLAN is the winner. 2149 */ 2150 static int 2151 mwifiex_check_winner_status(struct mwifiex_adapter *adapter) 2152 { 2153 u32 winner = 0; 2154 int ret = 0; 2155 struct pcie_service_card *card = adapter->card; 2156 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2157 2158 if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) { 2159 ret = -1; 2160 } else if (!winner) { 2161 mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n"); 2162 adapter->winner = 1; 2163 } else { 2164 mwifiex_dbg(adapter, ERROR, 2165 "PCI-E is not the winner <%#x>", winner); 2166 } 2167 2168 return ret; 2169 } 2170 2171 /* 2172 * This function reads the interrupt status from card. 2173 */ 2174 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter, 2175 int msg_id) 2176 { 2177 u32 pcie_ireg; 2178 unsigned long flags; 2179 struct pcie_service_card *card = adapter->card; 2180 2181 if (card->msi_enable) { 2182 spin_lock_irqsave(&adapter->int_lock, flags); 2183 adapter->int_status = 1; 2184 spin_unlock_irqrestore(&adapter->int_lock, flags); 2185 return; 2186 } 2187 2188 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 2189 return; 2190 2191 if (card->msix_enable && msg_id >= 0) { 2192 pcie_ireg = BIT(msg_id); 2193 } else { 2194 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2195 &pcie_ireg)) { 2196 mwifiex_dbg(adapter, ERROR, "Read register failed\n"); 2197 return; 2198 } 2199 2200 if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg) 2201 return; 2202 2203 2204 mwifiex_pcie_disable_host_int(adapter); 2205 2206 /* Clear the pending interrupts */ 2207 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS, 2208 ~pcie_ireg)) { 2209 mwifiex_dbg(adapter, ERROR, 2210 "Write register failed\n"); 2211 return; 2212 } 2213 } 2214 2215 if (!adapter->pps_uapsd_mode && 2216 adapter->ps_state == PS_STATE_SLEEP && 2217 mwifiex_pcie_ok_to_access_hw(adapter)) { 2218 /* Potentially for PCIe we could get other 2219 * interrupts like shared. Don't change power 2220 * state until cookie is set 2221 */ 2222 adapter->ps_state = PS_STATE_AWAKE; 2223 adapter->pm_wakeup_fw_try = false; 2224 del_timer(&adapter->wakeup_timer); 2225 } 2226 2227 spin_lock_irqsave(&adapter->int_lock, flags); 2228 adapter->int_status |= pcie_ireg; 2229 spin_unlock_irqrestore(&adapter->int_lock, flags); 2230 mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg); 2231 } 2232 2233 /* 2234 * Interrupt handler for PCIe root port 2235 * 2236 * This function reads the interrupt status from firmware and assigns 2237 * the main process in workqueue which will handle the interrupt. 2238 */ 2239 static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context) 2240 { 2241 struct mwifiex_msix_context *ctx = context; 2242 struct pci_dev *pdev = ctx->dev; 2243 struct pcie_service_card *card; 2244 struct mwifiex_adapter *adapter; 2245 2246 if (!pdev) { 2247 pr_err("info: %s: pdev is NULL\n", __func__); 2248 goto exit; 2249 } 2250 2251 card = pci_get_drvdata(pdev); 2252 2253 if (!card->adapter) { 2254 pr_err("info: %s: card=%p adapter=%p\n", __func__, card, 2255 card ? card->adapter : NULL); 2256 goto exit; 2257 } 2258 adapter = card->adapter; 2259 2260 if (adapter->surprise_removed) 2261 goto exit; 2262 2263 if (card->msix_enable) 2264 mwifiex_interrupt_status(adapter, ctx->msg_id); 2265 else 2266 mwifiex_interrupt_status(adapter, -1); 2267 2268 mwifiex_queue_main_work(adapter); 2269 2270 exit: 2271 return IRQ_HANDLED; 2272 } 2273 2274 /* 2275 * This function checks the current interrupt status. 2276 * 2277 * The following interrupts are checked and handled by this function - 2278 * - Data sent 2279 * - Command sent 2280 * - Command received 2281 * - Packets received 2282 * - Events received 2283 * 2284 * In case of Rx packets received, the packets are uploaded from card to 2285 * host and processed accordingly. 2286 */ 2287 static int mwifiex_process_pcie_int(struct mwifiex_adapter *adapter) 2288 { 2289 int ret; 2290 u32 pcie_ireg = 0; 2291 unsigned long flags; 2292 struct pcie_service_card *card = adapter->card; 2293 2294 spin_lock_irqsave(&adapter->int_lock, flags); 2295 if (!card->msi_enable) { 2296 /* Clear out unused interrupts */ 2297 pcie_ireg = adapter->int_status; 2298 } 2299 adapter->int_status = 0; 2300 spin_unlock_irqrestore(&adapter->int_lock, flags); 2301 2302 if (card->msi_enable) { 2303 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 2304 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2305 &pcie_ireg)) { 2306 mwifiex_dbg(adapter, ERROR, 2307 "Read register failed\n"); 2308 return -1; 2309 } 2310 2311 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) { 2312 if (mwifiex_write_reg(adapter, 2313 PCIE_HOST_INT_STATUS, 2314 ~pcie_ireg)) { 2315 mwifiex_dbg(adapter, ERROR, 2316 "Write register failed\n"); 2317 return -1; 2318 } 2319 if (!adapter->pps_uapsd_mode && 2320 adapter->ps_state == PS_STATE_SLEEP) { 2321 adapter->ps_state = PS_STATE_AWAKE; 2322 adapter->pm_wakeup_fw_try = false; 2323 del_timer(&adapter->wakeup_timer); 2324 } 2325 } 2326 } 2327 } 2328 while (pcie_ireg & HOST_INTR_MASK) { 2329 if (pcie_ireg & HOST_INTR_DNLD_DONE) { 2330 pcie_ireg &= ~HOST_INTR_DNLD_DONE; 2331 mwifiex_dbg(adapter, INTR, 2332 "info: TX DNLD Done\n"); 2333 ret = mwifiex_pcie_send_data_complete(adapter); 2334 if (ret) 2335 return ret; 2336 } 2337 if (pcie_ireg & HOST_INTR_UPLD_RDY) { 2338 pcie_ireg &= ~HOST_INTR_UPLD_RDY; 2339 mwifiex_dbg(adapter, INTR, 2340 "info: Rx DATA\n"); 2341 ret = mwifiex_pcie_process_recv_data(adapter); 2342 if (ret) 2343 return ret; 2344 } 2345 if (pcie_ireg & HOST_INTR_EVENT_RDY) { 2346 pcie_ireg &= ~HOST_INTR_EVENT_RDY; 2347 mwifiex_dbg(adapter, INTR, 2348 "info: Rx EVENT\n"); 2349 ret = mwifiex_pcie_process_event_ready(adapter); 2350 if (ret) 2351 return ret; 2352 } 2353 2354 if (pcie_ireg & HOST_INTR_CMD_DONE) { 2355 pcie_ireg &= ~HOST_INTR_CMD_DONE; 2356 if (adapter->cmd_sent) { 2357 mwifiex_dbg(adapter, INTR, 2358 "info: CMD sent Interrupt\n"); 2359 adapter->cmd_sent = false; 2360 } 2361 /* Handle command response */ 2362 ret = mwifiex_pcie_process_cmd_complete(adapter); 2363 if (ret) 2364 return ret; 2365 if (adapter->hs_activated) 2366 return ret; 2367 } 2368 2369 if (card->msi_enable) { 2370 spin_lock_irqsave(&adapter->int_lock, flags); 2371 adapter->int_status = 0; 2372 spin_unlock_irqrestore(&adapter->int_lock, flags); 2373 } 2374 2375 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 2376 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2377 &pcie_ireg)) { 2378 mwifiex_dbg(adapter, ERROR, 2379 "Read register failed\n"); 2380 return -1; 2381 } 2382 2383 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) { 2384 if (mwifiex_write_reg(adapter, 2385 PCIE_HOST_INT_STATUS, 2386 ~pcie_ireg)) { 2387 mwifiex_dbg(adapter, ERROR, 2388 "Write register failed\n"); 2389 return -1; 2390 } 2391 } 2392 2393 } 2394 if (!card->msi_enable) { 2395 spin_lock_irqsave(&adapter->int_lock, flags); 2396 pcie_ireg |= adapter->int_status; 2397 adapter->int_status = 0; 2398 spin_unlock_irqrestore(&adapter->int_lock, flags); 2399 } 2400 } 2401 mwifiex_dbg(adapter, INTR, 2402 "info: cmd_sent=%d data_sent=%d\n", 2403 adapter->cmd_sent, adapter->data_sent); 2404 if (!card->msi_enable && adapter->ps_state != PS_STATE_SLEEP) 2405 mwifiex_pcie_enable_host_int(adapter); 2406 2407 return 0; 2408 } 2409 2410 static int mwifiex_process_msix_int(struct mwifiex_adapter *adapter) 2411 { 2412 int ret; 2413 u32 pcie_ireg; 2414 unsigned long flags; 2415 2416 spin_lock_irqsave(&adapter->int_lock, flags); 2417 /* Clear out unused interrupts */ 2418 pcie_ireg = adapter->int_status; 2419 adapter->int_status = 0; 2420 spin_unlock_irqrestore(&adapter->int_lock, flags); 2421 2422 if (pcie_ireg & HOST_INTR_DNLD_DONE) { 2423 mwifiex_dbg(adapter, INTR, 2424 "info: TX DNLD Done\n"); 2425 ret = mwifiex_pcie_send_data_complete(adapter); 2426 if (ret) 2427 return ret; 2428 } 2429 if (pcie_ireg & HOST_INTR_UPLD_RDY) { 2430 mwifiex_dbg(adapter, INTR, 2431 "info: Rx DATA\n"); 2432 ret = mwifiex_pcie_process_recv_data(adapter); 2433 if (ret) 2434 return ret; 2435 } 2436 if (pcie_ireg & HOST_INTR_EVENT_RDY) { 2437 mwifiex_dbg(adapter, INTR, 2438 "info: Rx EVENT\n"); 2439 ret = mwifiex_pcie_process_event_ready(adapter); 2440 if (ret) 2441 return ret; 2442 } 2443 2444 if (pcie_ireg & HOST_INTR_CMD_DONE) { 2445 if (adapter->cmd_sent) { 2446 mwifiex_dbg(adapter, INTR, 2447 "info: CMD sent Interrupt\n"); 2448 adapter->cmd_sent = false; 2449 } 2450 /* Handle command response */ 2451 ret = mwifiex_pcie_process_cmd_complete(adapter); 2452 if (ret) 2453 return ret; 2454 } 2455 2456 mwifiex_dbg(adapter, INTR, 2457 "info: cmd_sent=%d data_sent=%d\n", 2458 adapter->cmd_sent, adapter->data_sent); 2459 2460 return 0; 2461 } 2462 2463 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter) 2464 { 2465 struct pcie_service_card *card = adapter->card; 2466 2467 if (card->msix_enable) 2468 return mwifiex_process_msix_int(adapter); 2469 else 2470 return mwifiex_process_pcie_int(adapter); 2471 } 2472 2473 /* 2474 * This function downloads data from driver to card. 2475 * 2476 * Both commands and data packets are transferred to the card by this 2477 * function. 2478 * 2479 * This function adds the PCIE specific header to the front of the buffer 2480 * before transferring. The header contains the length of the packet and 2481 * the type. The firmware handles the packets based upon this set type. 2482 */ 2483 static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type, 2484 struct sk_buff *skb, 2485 struct mwifiex_tx_param *tx_param) 2486 { 2487 if (!skb) { 2488 mwifiex_dbg(adapter, ERROR, 2489 "Passed NULL skb to %s\n", __func__); 2490 return -1; 2491 } 2492 2493 if (type == MWIFIEX_TYPE_DATA) 2494 return mwifiex_pcie_send_data(adapter, skb, tx_param); 2495 else if (type == MWIFIEX_TYPE_CMD) 2496 return mwifiex_pcie_send_cmd(adapter, skb); 2497 2498 return 0; 2499 } 2500 2501 /* Function to dump PCIE scratch registers in case of FW crash 2502 */ 2503 static int 2504 mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf) 2505 { 2506 char *p = drv_buf; 2507 char buf[256], *ptr; 2508 int i; 2509 u32 value; 2510 struct pcie_service_card *card = adapter->card; 2511 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2512 int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG, 2513 PCIE_SCRATCH_13_REG, 2514 PCIE_SCRATCH_14_REG}; 2515 2516 if (!p) 2517 return 0; 2518 2519 mwifiex_dbg(adapter, MSG, "PCIE register dump start\n"); 2520 2521 if (mwifiex_read_reg(adapter, reg->fw_status, &value)) { 2522 mwifiex_dbg(adapter, ERROR, "failed to read firmware status"); 2523 return 0; 2524 } 2525 2526 ptr = buf; 2527 mwifiex_dbg(adapter, MSG, "pcie scratch register:"); 2528 for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) { 2529 mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value); 2530 ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n", 2531 pcie_scratch_reg[i], value); 2532 } 2533 2534 mwifiex_dbg(adapter, MSG, "%s\n", buf); 2535 p += sprintf(p, "%s\n", buf); 2536 2537 mwifiex_dbg(adapter, MSG, "PCIE register dump end\n"); 2538 2539 return p - drv_buf; 2540 } 2541 2542 /* This function read/write firmware */ 2543 static enum rdwr_status 2544 mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag) 2545 { 2546 int ret, tries; 2547 u8 ctrl_data; 2548 u32 fw_status; 2549 struct pcie_service_card *card = adapter->card; 2550 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2551 2552 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) 2553 return RDWR_STATUS_FAILURE; 2554 2555 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2556 reg->fw_dump_host_ready); 2557 if (ret) { 2558 mwifiex_dbg(adapter, ERROR, 2559 "PCIE write err\n"); 2560 return RDWR_STATUS_FAILURE; 2561 } 2562 2563 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2564 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data); 2565 if (ctrl_data == FW_DUMP_DONE) 2566 return RDWR_STATUS_SUCCESS; 2567 if (doneflag && ctrl_data == doneflag) 2568 return RDWR_STATUS_DONE; 2569 if (ctrl_data != reg->fw_dump_host_ready) { 2570 mwifiex_dbg(adapter, WARN, 2571 "The ctrl reg was changed, re-try again!\n"); 2572 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2573 reg->fw_dump_host_ready); 2574 if (ret) { 2575 mwifiex_dbg(adapter, ERROR, 2576 "PCIE write err\n"); 2577 return RDWR_STATUS_FAILURE; 2578 } 2579 } 2580 usleep_range(100, 200); 2581 } 2582 2583 mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n"); 2584 return RDWR_STATUS_FAILURE; 2585 } 2586 2587 /* This function dump firmware memory to file */ 2588 static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter) 2589 { 2590 struct pcie_service_card *card = adapter->card; 2591 const struct mwifiex_pcie_card_reg *creg = card->pcie.reg; 2592 unsigned int reg, reg_start, reg_end; 2593 u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num; 2594 u8 idx, i, read_reg, doneflag = 0; 2595 enum rdwr_status stat; 2596 u32 memory_size; 2597 int ret; 2598 2599 if (!card->pcie.can_dump_fw) 2600 return; 2601 2602 for (idx = 0; idx < adapter->num_mem_types; idx++) { 2603 struct memory_type_mapping *entry = 2604 &adapter->mem_type_mapping_tbl[idx]; 2605 2606 if (entry->mem_ptr) { 2607 vfree(entry->mem_ptr); 2608 entry->mem_ptr = NULL; 2609 } 2610 entry->mem_size = 0; 2611 } 2612 2613 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n"); 2614 2615 /* Read the number of the memories which will dump */ 2616 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2617 if (stat == RDWR_STATUS_FAILURE) 2618 return; 2619 2620 reg = creg->fw_dump_start; 2621 mwifiex_read_reg_byte(adapter, reg, &fw_dump_num); 2622 2623 /* W8997 chipset firmware dump will be restore in single region*/ 2624 if (fw_dump_num == 0) 2625 dump_num = 1; 2626 else 2627 dump_num = fw_dump_num; 2628 2629 /* Read the length of every memory which will dump */ 2630 for (idx = 0; idx < dump_num; idx++) { 2631 struct memory_type_mapping *entry = 2632 &adapter->mem_type_mapping_tbl[idx]; 2633 memory_size = 0; 2634 if (fw_dump_num != 0) { 2635 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2636 if (stat == RDWR_STATUS_FAILURE) 2637 return; 2638 2639 reg = creg->fw_dump_start; 2640 for (i = 0; i < 4; i++) { 2641 mwifiex_read_reg_byte(adapter, reg, &read_reg); 2642 memory_size |= (read_reg << (i * 8)); 2643 reg++; 2644 } 2645 } else { 2646 memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE; 2647 } 2648 2649 if (memory_size == 0) { 2650 mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n"); 2651 ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl, 2652 creg->fw_dump_read_done); 2653 if (ret) { 2654 mwifiex_dbg(adapter, ERROR, "PCIE write err\n"); 2655 return; 2656 } 2657 break; 2658 } 2659 2660 mwifiex_dbg(adapter, DUMP, 2661 "%s_SIZE=0x%x\n", entry->mem_name, memory_size); 2662 entry->mem_ptr = vmalloc(memory_size + 1); 2663 entry->mem_size = memory_size; 2664 if (!entry->mem_ptr) { 2665 mwifiex_dbg(adapter, ERROR, 2666 "Vmalloc %s failed\n", entry->mem_name); 2667 return; 2668 } 2669 dbg_ptr = entry->mem_ptr; 2670 end_ptr = dbg_ptr + memory_size; 2671 2672 doneflag = entry->done_flag; 2673 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n", 2674 entry->mem_name); 2675 2676 do { 2677 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2678 if (RDWR_STATUS_FAILURE == stat) 2679 return; 2680 2681 reg_start = creg->fw_dump_start; 2682 reg_end = creg->fw_dump_end; 2683 for (reg = reg_start; reg <= reg_end; reg++) { 2684 mwifiex_read_reg_byte(adapter, reg, dbg_ptr); 2685 if (dbg_ptr < end_ptr) { 2686 dbg_ptr++; 2687 continue; 2688 } 2689 mwifiex_dbg(adapter, ERROR, 2690 "pre-allocated buf not enough\n"); 2691 tmp_ptr = 2692 vzalloc(memory_size + MWIFIEX_SIZE_4K); 2693 if (!tmp_ptr) 2694 return; 2695 memcpy(tmp_ptr, entry->mem_ptr, memory_size); 2696 vfree(entry->mem_ptr); 2697 entry->mem_ptr = tmp_ptr; 2698 tmp_ptr = NULL; 2699 dbg_ptr = entry->mem_ptr + memory_size; 2700 memory_size += MWIFIEX_SIZE_4K; 2701 end_ptr = entry->mem_ptr + memory_size; 2702 } 2703 2704 if (stat != RDWR_STATUS_DONE) 2705 continue; 2706 2707 mwifiex_dbg(adapter, DUMP, 2708 "%s done: size=0x%tx\n", 2709 entry->mem_name, dbg_ptr - entry->mem_ptr); 2710 break; 2711 } while (true); 2712 } 2713 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n"); 2714 } 2715 2716 static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter) 2717 { 2718 mwifiex_drv_info_dump(adapter); 2719 mwifiex_pcie_fw_dump(adapter); 2720 mwifiex_upload_device_dump(adapter); 2721 } 2722 2723 static unsigned long iface_work_flags; 2724 static struct mwifiex_adapter *save_adapter; 2725 static void mwifiex_pcie_work(struct work_struct *work) 2726 { 2727 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 2728 &iface_work_flags)) 2729 mwifiex_pcie_device_dump_work(save_adapter); 2730 } 2731 2732 static DECLARE_WORK(pcie_work, mwifiex_pcie_work); 2733 /* This function dumps FW information */ 2734 static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter) 2735 { 2736 save_adapter = adapter; 2737 if (test_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &iface_work_flags)) 2738 return; 2739 2740 set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &iface_work_flags); 2741 2742 schedule_work(&pcie_work); 2743 } 2744 2745 /* 2746 * This function initializes the PCI-E host memory space, WCB rings, etc. 2747 * 2748 * The following initializations steps are followed - 2749 * - Allocate TXBD ring buffers 2750 * - Allocate RXBD ring buffers 2751 * - Allocate event BD ring buffers 2752 * - Allocate command response ring buffer 2753 * - Allocate sleep cookie buffer 2754 */ 2755 static int mwifiex_pcie_init(struct mwifiex_adapter *adapter) 2756 { 2757 struct pcie_service_card *card = adapter->card; 2758 int ret; 2759 struct pci_dev *pdev = card->dev; 2760 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2761 2762 pci_set_drvdata(pdev, card); 2763 2764 ret = pci_enable_device(pdev); 2765 if (ret) 2766 goto err_enable_dev; 2767 2768 pci_set_master(pdev); 2769 2770 pr_notice("try set_consistent_dma_mask(32)\n"); 2771 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2772 if (ret) { 2773 pr_err("set_dma_mask(32) failed\n"); 2774 goto err_set_dma_mask; 2775 } 2776 2777 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 2778 if (ret) { 2779 pr_err("set_consistent_dma_mask(64) failed\n"); 2780 goto err_set_dma_mask; 2781 } 2782 2783 ret = pci_request_region(pdev, 0, DRV_NAME); 2784 if (ret) { 2785 pr_err("req_reg(0) error\n"); 2786 goto err_req_region0; 2787 } 2788 card->pci_mmap = pci_iomap(pdev, 0, 0); 2789 if (!card->pci_mmap) { 2790 pr_err("iomap(0) error\n"); 2791 ret = -EIO; 2792 goto err_iomap0; 2793 } 2794 ret = pci_request_region(pdev, 2, DRV_NAME); 2795 if (ret) { 2796 pr_err("req_reg(2) error\n"); 2797 goto err_req_region2; 2798 } 2799 card->pci_mmap1 = pci_iomap(pdev, 2, 0); 2800 if (!card->pci_mmap1) { 2801 pr_err("iomap(2) error\n"); 2802 ret = -EIO; 2803 goto err_iomap2; 2804 } 2805 2806 pr_notice("PCI memory map Virt0: %p PCI memory map Virt2: %p\n", 2807 card->pci_mmap, card->pci_mmap1); 2808 2809 card->cmdrsp_buf = NULL; 2810 ret = mwifiex_pcie_create_txbd_ring(adapter); 2811 if (ret) 2812 goto err_cre_txbd; 2813 ret = mwifiex_pcie_create_rxbd_ring(adapter); 2814 if (ret) 2815 goto err_cre_rxbd; 2816 ret = mwifiex_pcie_create_evtbd_ring(adapter); 2817 if (ret) 2818 goto err_cre_evtbd; 2819 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter); 2820 if (ret) 2821 goto err_alloc_cmdbuf; 2822 if (reg->sleep_cookie) { 2823 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter); 2824 if (ret) 2825 goto err_alloc_cookie; 2826 } else { 2827 card->sleep_cookie_vbase = NULL; 2828 } 2829 return ret; 2830 2831 err_alloc_cookie: 2832 mwifiex_pcie_delete_cmdrsp_buf(adapter); 2833 err_alloc_cmdbuf: 2834 mwifiex_pcie_delete_evtbd_ring(adapter); 2835 err_cre_evtbd: 2836 mwifiex_pcie_delete_rxbd_ring(adapter); 2837 err_cre_rxbd: 2838 mwifiex_pcie_delete_txbd_ring(adapter); 2839 err_cre_txbd: 2840 pci_iounmap(pdev, card->pci_mmap1); 2841 err_iomap2: 2842 pci_release_region(pdev, 2); 2843 err_req_region2: 2844 pci_iounmap(pdev, card->pci_mmap); 2845 err_iomap0: 2846 pci_release_region(pdev, 0); 2847 err_req_region0: 2848 err_set_dma_mask: 2849 pci_disable_device(pdev); 2850 err_enable_dev: 2851 return ret; 2852 } 2853 2854 /* 2855 * This function cleans up the allocated card buffers. 2856 * 2857 * The following are freed by this function - 2858 * - TXBD ring buffers 2859 * - RXBD ring buffers 2860 * - Event BD ring buffers 2861 * - Command response ring buffer 2862 * - Sleep cookie buffer 2863 */ 2864 static void mwifiex_pcie_cleanup(struct mwifiex_adapter *adapter) 2865 { 2866 struct pcie_service_card *card = adapter->card; 2867 struct pci_dev *pdev = card->dev; 2868 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2869 2870 if (user_rmmod) { 2871 mwifiex_dbg(adapter, INFO, 2872 "Clearing driver ready signature\n"); 2873 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 2874 mwifiex_dbg(adapter, ERROR, 2875 "Failed to write driver not-ready signature\n"); 2876 } 2877 2878 if (pdev) { 2879 pci_iounmap(pdev, card->pci_mmap); 2880 pci_iounmap(pdev, card->pci_mmap1); 2881 pci_disable_device(pdev); 2882 pci_release_region(pdev, 2); 2883 pci_release_region(pdev, 0); 2884 } 2885 } 2886 2887 static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter) 2888 { 2889 int ret, i, j; 2890 struct pcie_service_card *card = adapter->card; 2891 struct pci_dev *pdev = card->dev; 2892 2893 if (card->pcie.reg->msix_support) { 2894 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 2895 card->msix_entries[i].entry = i; 2896 ret = pci_enable_msix_exact(pdev, card->msix_entries, 2897 MWIFIEX_NUM_MSIX_VECTORS); 2898 if (!ret) { 2899 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) { 2900 card->msix_ctx[i].dev = pdev; 2901 card->msix_ctx[i].msg_id = i; 2902 2903 ret = request_irq(card->msix_entries[i].vector, 2904 mwifiex_pcie_interrupt, 0, 2905 "MWIFIEX_PCIE_MSIX", 2906 &card->msix_ctx[i]); 2907 if (ret) 2908 break; 2909 } 2910 2911 if (ret) { 2912 mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n", 2913 ret); 2914 for (j = 0; j < i; j++) 2915 free_irq(card->msix_entries[j].vector, 2916 &card->msix_ctx[i]); 2917 pci_disable_msix(pdev); 2918 } else { 2919 mwifiex_dbg(adapter, MSG, "MSIx enabled!"); 2920 card->msix_enable = 1; 2921 return 0; 2922 } 2923 } 2924 } 2925 2926 if (pci_enable_msi(pdev) != 0) 2927 pci_disable_msi(pdev); 2928 else 2929 card->msi_enable = 1; 2930 2931 mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable); 2932 2933 card->share_irq_ctx.dev = pdev; 2934 card->share_irq_ctx.msg_id = -1; 2935 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED, 2936 "MRVL_PCIE", &card->share_irq_ctx); 2937 if (ret) { 2938 pr_err("request_irq failed: ret=%d\n", ret); 2939 return -1; 2940 } 2941 2942 return 0; 2943 } 2944 2945 /* 2946 * This function gets the firmware name for downloading by revision id 2947 * 2948 * Read revision id register to get revision id 2949 */ 2950 static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter) 2951 { 2952 int revision_id = 0; 2953 int version, magic; 2954 struct pcie_service_card *card = adapter->card; 2955 2956 switch (card->dev->device) { 2957 case PCIE_DEVICE_ID_MARVELL_88W8766P: 2958 strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME); 2959 break; 2960 case PCIE_DEVICE_ID_MARVELL_88W8897: 2961 mwifiex_write_reg(adapter, 0x0c58, 0x80c00000); 2962 mwifiex_read_reg(adapter, 0x0c58, &revision_id); 2963 revision_id &= 0xff00; 2964 switch (revision_id) { 2965 case PCIE8897_A0: 2966 strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME); 2967 break; 2968 case PCIE8897_B0: 2969 strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME); 2970 break; 2971 default: 2972 strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME); 2973 2974 break; 2975 } 2976 break; 2977 case PCIE_DEVICE_ID_MARVELL_88W8997: 2978 mwifiex_read_reg(adapter, 0x8, &revision_id); 2979 mwifiex_read_reg(adapter, 0x0cd0, &version); 2980 mwifiex_read_reg(adapter, 0x0cd4, &magic); 2981 revision_id &= 0xff; 2982 version &= 0x7; 2983 magic &= 0xff; 2984 if (revision_id == PCIE8997_A1 && 2985 magic == CHIP_MAGIC_VALUE && 2986 version == CHIP_VER_PCIEUART) 2987 strcpy(adapter->fw_name, PCIEUART8997_FW_NAME_V4); 2988 else 2989 strcpy(adapter->fw_name, PCIEUSB8997_FW_NAME_V4); 2990 break; 2991 default: 2992 break; 2993 } 2994 } 2995 2996 /* 2997 * This function registers the PCIE device. 2998 * 2999 * PCIE IRQ is claimed, block size is set and driver data is initialized. 3000 */ 3001 static int mwifiex_register_dev(struct mwifiex_adapter *adapter) 3002 { 3003 struct pcie_service_card *card = adapter->card; 3004 3005 /* save adapter pointer in card */ 3006 card->adapter = adapter; 3007 3008 if (mwifiex_pcie_request_irq(adapter)) 3009 return -1; 3010 3011 adapter->tx_buf_size = card->pcie.tx_buf_size; 3012 adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl; 3013 adapter->num_mem_types = card->pcie.num_mem_types; 3014 adapter->ext_scan = card->pcie.can_ext_scan; 3015 mwifiex_pcie_get_fw_name(adapter); 3016 3017 return 0; 3018 } 3019 3020 /* 3021 * This function unregisters the PCIE device. 3022 * 3023 * The PCIE IRQ is released, the function is disabled and driver 3024 * data is set to null. 3025 */ 3026 static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter) 3027 { 3028 struct pcie_service_card *card = adapter->card; 3029 struct pci_dev *pdev = card->dev; 3030 int i; 3031 3032 if (card->msix_enable) { 3033 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3034 synchronize_irq(card->msix_entries[i].vector); 3035 3036 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3037 free_irq(card->msix_entries[i].vector, 3038 &card->msix_ctx[i]); 3039 3040 card->msix_enable = 0; 3041 pci_disable_msix(pdev); 3042 } else { 3043 mwifiex_dbg(adapter, INFO, 3044 "%s(): calling free_irq()\n", __func__); 3045 free_irq(card->dev->irq, &card->share_irq_ctx); 3046 3047 if (card->msi_enable) 3048 pci_disable_msi(pdev); 3049 } 3050 card->adapter = NULL; 3051 } 3052 3053 /* This function initializes the PCI-E host memory space, WCB rings, etc. 3054 * 3055 * The following initializations steps are followed - 3056 * - Allocate TXBD ring buffers 3057 * - Allocate RXBD ring buffers 3058 * - Allocate event BD ring buffers 3059 * - Allocate command response ring buffer 3060 * - Allocate sleep cookie buffer 3061 * Part of mwifiex_pcie_init(), not reset the PCIE registers 3062 */ 3063 static void mwifiex_pcie_up_dev(struct mwifiex_adapter *adapter) 3064 { 3065 struct pcie_service_card *card = adapter->card; 3066 int ret; 3067 struct pci_dev *pdev = card->dev; 3068 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 3069 3070 card->cmdrsp_buf = NULL; 3071 ret = mwifiex_pcie_create_txbd_ring(adapter); 3072 if (ret) { 3073 mwifiex_dbg(adapter, ERROR, "Failed to create txbd ring\n"); 3074 goto err_cre_txbd; 3075 } 3076 3077 ret = mwifiex_pcie_create_rxbd_ring(adapter); 3078 if (ret) { 3079 mwifiex_dbg(adapter, ERROR, "Failed to create rxbd ring\n"); 3080 goto err_cre_rxbd; 3081 } 3082 3083 ret = mwifiex_pcie_create_evtbd_ring(adapter); 3084 if (ret) { 3085 mwifiex_dbg(adapter, ERROR, "Failed to create evtbd ring\n"); 3086 goto err_cre_evtbd; 3087 } 3088 3089 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter); 3090 if (ret) { 3091 mwifiex_dbg(adapter, ERROR, "Failed to allocate cmdbuf buffer\n"); 3092 goto err_alloc_cmdbuf; 3093 } 3094 3095 if (reg->sleep_cookie) { 3096 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter); 3097 if (ret) { 3098 mwifiex_dbg(adapter, ERROR, "Failed to allocate sleep_cookie buffer\n"); 3099 goto err_alloc_cookie; 3100 } 3101 } else { 3102 card->sleep_cookie_vbase = NULL; 3103 } 3104 return; 3105 3106 err_alloc_cookie: 3107 mwifiex_pcie_delete_cmdrsp_buf(adapter); 3108 err_alloc_cmdbuf: 3109 mwifiex_pcie_delete_evtbd_ring(adapter); 3110 err_cre_evtbd: 3111 mwifiex_pcie_delete_rxbd_ring(adapter); 3112 err_cre_rxbd: 3113 mwifiex_pcie_delete_txbd_ring(adapter); 3114 err_cre_txbd: 3115 pci_iounmap(pdev, card->pci_mmap1); 3116 } 3117 3118 /* This function cleans up the PCI-E host memory space. 3119 * Some code is extracted from mwifiex_unregister_dev() 3120 * 3121 */ 3122 static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter) 3123 { 3124 struct pcie_service_card *card = adapter->card; 3125 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 3126 3127 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 3128 mwifiex_dbg(adapter, ERROR, "Failed to write driver not-ready signature\n"); 3129 3130 adapter->seq_num = 0; 3131 adapter->tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K; 3132 3133 if (reg->sleep_cookie) 3134 mwifiex_pcie_delete_sleep_cookie_buf(adapter); 3135 3136 mwifiex_pcie_delete_cmdrsp_buf(adapter); 3137 mwifiex_pcie_delete_evtbd_ring(adapter); 3138 mwifiex_pcie_delete_rxbd_ring(adapter); 3139 mwifiex_pcie_delete_txbd_ring(adapter); 3140 card->cmdrsp_buf = NULL; 3141 } 3142 3143 static struct mwifiex_if_ops pcie_ops = { 3144 .init_if = mwifiex_pcie_init, 3145 .cleanup_if = mwifiex_pcie_cleanup, 3146 .check_fw_status = mwifiex_check_fw_status, 3147 .check_winner_status = mwifiex_check_winner_status, 3148 .prog_fw = mwifiex_prog_fw_w_helper, 3149 .register_dev = mwifiex_register_dev, 3150 .unregister_dev = mwifiex_unregister_dev, 3151 .enable_int = mwifiex_pcie_enable_host_int, 3152 .disable_int = mwifiex_pcie_disable_host_int_noerr, 3153 .process_int_status = mwifiex_process_int_status, 3154 .host_to_card = mwifiex_pcie_host_to_card, 3155 .wakeup = mwifiex_pm_wakeup_card, 3156 .wakeup_complete = mwifiex_pm_wakeup_card_complete, 3157 3158 /* PCIE specific */ 3159 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete, 3160 .event_complete = mwifiex_pcie_event_complete, 3161 .update_mp_end_port = NULL, 3162 .cleanup_mpa_buf = NULL, 3163 .init_fw_port = mwifiex_pcie_init_fw_port, 3164 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf, 3165 .reg_dump = mwifiex_pcie_reg_dump, 3166 .device_dump = mwifiex_pcie_device_dump, 3167 .down_dev = mwifiex_pcie_down_dev, 3168 .up_dev = mwifiex_pcie_up_dev, 3169 }; 3170 3171 /* 3172 * This function initializes the PCIE driver module. 3173 * 3174 * This registers the device with PCIE bus. 3175 */ 3176 static int mwifiex_pcie_init_module(void) 3177 { 3178 int ret; 3179 3180 pr_debug("Marvell PCIe Driver\n"); 3181 3182 /* Clear the flag in case user removes the card. */ 3183 user_rmmod = 0; 3184 3185 ret = pci_register_driver(&mwifiex_pcie); 3186 if (ret) 3187 pr_err("Driver register failed!\n"); 3188 else 3189 pr_debug("info: Driver registered successfully!\n"); 3190 3191 return ret; 3192 } 3193 3194 /* 3195 * This function cleans up the PCIE driver. 3196 * 3197 * The following major steps are followed for cleanup - 3198 * - Resume the device if its suspended 3199 * - Disconnect the device if connected 3200 * - Shutdown the firmware 3201 * - Unregister the device from PCIE bus. 3202 */ 3203 static void mwifiex_pcie_cleanup_module(void) 3204 { 3205 /* Set the flag as user is removing this module. */ 3206 user_rmmod = 1; 3207 3208 cancel_work_sync(&pcie_work); 3209 pci_unregister_driver(&mwifiex_pcie); 3210 } 3211 3212 module_init(mwifiex_pcie_init_module); 3213 module_exit(mwifiex_pcie_cleanup_module); 3214 3215 MODULE_AUTHOR("Marvell International Ltd."); 3216 MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION); 3217 MODULE_VERSION(PCIE_VERSION); 3218 MODULE_LICENSE("GPL v2"); 3219