1 /* 2 * NXP Wireless LAN device driver: PCIE specific handling 3 * 4 * Copyright 2011-2020 NXP 5 * 6 * This software file (the "File") is distributed by NXP 7 * under the terms of the GNU General Public License Version 2, June 1991 8 * (the "License"). You may use, redistribute and/or modify this File in 9 * accordance with the terms and conditions of the License, a copy of which 10 * is available by writing to the Free Software Foundation, Inc., 11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the 12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. 13 * 14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about 17 * this warranty disclaimer. 18 */ 19 20 #include <linux/firmware.h> 21 22 #include "decl.h" 23 #include "ioctl.h" 24 #include "util.h" 25 #include "fw.h" 26 #include "main.h" 27 #include "wmm.h" 28 #include "11n.h" 29 #include "pcie.h" 30 31 #define PCIE_VERSION "1.0" 32 #define DRV_NAME "Marvell mwifiex PCIe" 33 34 static struct mwifiex_if_ops pcie_ops; 35 36 static const struct of_device_id mwifiex_pcie_of_match_table[] = { 37 { .compatible = "pci11ab,2b42" }, 38 { .compatible = "pci1b4b,2b42" }, 39 { } 40 }; 41 42 static int mwifiex_pcie_probe_of(struct device *dev) 43 { 44 if (!of_match_node(mwifiex_pcie_of_match_table, dev->of_node)) { 45 dev_err(dev, "required compatible string missing\n"); 46 return -EINVAL; 47 } 48 49 return 0; 50 } 51 52 static void mwifiex_pcie_work(struct work_struct *work); 53 54 static int 55 mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb, 56 size_t size, int flags) 57 { 58 struct pcie_service_card *card = adapter->card; 59 struct mwifiex_dma_mapping mapping; 60 61 mapping.addr = pci_map_single(card->dev, skb->data, size, flags); 62 if (pci_dma_mapping_error(card->dev, mapping.addr)) { 63 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n"); 64 return -1; 65 } 66 mapping.len = size; 67 mwifiex_store_mapping(skb, &mapping); 68 return 0; 69 } 70 71 static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter, 72 struct sk_buff *skb, int flags) 73 { 74 struct pcie_service_card *card = adapter->card; 75 struct mwifiex_dma_mapping mapping; 76 77 mwifiex_get_mapping(skb, &mapping); 78 pci_unmap_single(card->dev, mapping.addr, mapping.len, flags); 79 } 80 81 /* 82 * This function writes data into PCIE card register. 83 */ 84 static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data) 85 { 86 struct pcie_service_card *card = adapter->card; 87 88 iowrite32(data, card->pci_mmap1 + reg); 89 90 return 0; 91 } 92 93 /* This function reads data from PCIE card register. 94 */ 95 static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data) 96 { 97 struct pcie_service_card *card = adapter->card; 98 99 *data = ioread32(card->pci_mmap1 + reg); 100 if (*data == 0xffffffff) 101 return 0xffffffff; 102 103 return 0; 104 } 105 106 /* This function reads u8 data from PCIE card register. */ 107 static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter, 108 int reg, u8 *data) 109 { 110 struct pcie_service_card *card = adapter->card; 111 112 *data = ioread8(card->pci_mmap1 + reg); 113 114 return 0; 115 } 116 117 /* 118 * This function reads sleep cookie and checks if FW is ready 119 */ 120 static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter) 121 { 122 u32 cookie_value; 123 struct pcie_service_card *card = adapter->card; 124 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 125 126 if (!reg->sleep_cookie) 127 return true; 128 129 if (card->sleep_cookie_vbase) { 130 cookie_value = get_unaligned_le32(card->sleep_cookie_vbase); 131 mwifiex_dbg(adapter, INFO, 132 "info: ACCESS_HW: sleep cookie=0x%x\n", 133 cookie_value); 134 if (cookie_value == FW_AWAKE_COOKIE) 135 return true; 136 } 137 138 return false; 139 } 140 141 #ifdef CONFIG_PM_SLEEP 142 /* 143 * Kernel needs to suspend all functions separately. Therefore all 144 * registered functions must have drivers with suspend and resume 145 * methods. Failing that the kernel simply removes the whole card. 146 * 147 * If already not suspended, this function allocates and sends a host 148 * sleep activate request to the firmware and turns off the traffic. 149 */ 150 static int mwifiex_pcie_suspend(struct device *dev) 151 { 152 struct mwifiex_adapter *adapter; 153 struct pcie_service_card *card = dev_get_drvdata(dev); 154 155 156 /* Might still be loading firmware */ 157 wait_for_completion(&card->fw_done); 158 159 adapter = card->adapter; 160 if (!adapter) { 161 dev_err(dev, "adapter is not valid\n"); 162 return 0; 163 } 164 165 mwifiex_enable_wake(adapter); 166 167 /* Enable the Host Sleep */ 168 if (!mwifiex_enable_hs(adapter)) { 169 mwifiex_dbg(adapter, ERROR, 170 "cmd: failed to suspend\n"); 171 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags); 172 mwifiex_disable_wake(adapter); 173 return -EFAULT; 174 } 175 176 flush_workqueue(adapter->workqueue); 177 178 /* Indicate device suspended */ 179 set_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags); 180 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags); 181 182 return 0; 183 } 184 185 /* 186 * Kernel needs to suspend all functions separately. Therefore all 187 * registered functions must have drivers with suspend and resume 188 * methods. Failing that the kernel simply removes the whole card. 189 * 190 * If already not resumed, this function turns on the traffic and 191 * sends a host sleep cancel request to the firmware. 192 */ 193 static int mwifiex_pcie_resume(struct device *dev) 194 { 195 struct mwifiex_adapter *adapter; 196 struct pcie_service_card *card = dev_get_drvdata(dev); 197 198 199 if (!card->adapter) { 200 dev_err(dev, "adapter structure is not valid\n"); 201 return 0; 202 } 203 204 adapter = card->adapter; 205 206 if (!test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) { 207 mwifiex_dbg(adapter, WARN, 208 "Device already resumed\n"); 209 return 0; 210 } 211 212 clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags); 213 214 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA), 215 MWIFIEX_ASYNC_CMD); 216 mwifiex_disable_wake(adapter); 217 218 return 0; 219 } 220 #endif 221 222 /* 223 * This function probes an mwifiex device and registers it. It allocates 224 * the card structure, enables PCIE function number and initiates the 225 * device registration and initialization procedure by adding a logical 226 * interface. 227 */ 228 static int mwifiex_pcie_probe(struct pci_dev *pdev, 229 const struct pci_device_id *ent) 230 { 231 struct pcie_service_card *card; 232 int ret; 233 234 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n", 235 pdev->vendor, pdev->device, pdev->revision); 236 237 card = devm_kzalloc(&pdev->dev, sizeof(*card), GFP_KERNEL); 238 if (!card) 239 return -ENOMEM; 240 241 init_completion(&card->fw_done); 242 243 card->dev = pdev; 244 245 if (ent->driver_data) { 246 struct mwifiex_pcie_device *data = (void *)ent->driver_data; 247 card->pcie.reg = data->reg; 248 card->pcie.blksz_fw_dl = data->blksz_fw_dl; 249 card->pcie.tx_buf_size = data->tx_buf_size; 250 card->pcie.can_dump_fw = data->can_dump_fw; 251 card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl; 252 card->pcie.num_mem_types = data->num_mem_types; 253 card->pcie.can_ext_scan = data->can_ext_scan; 254 INIT_WORK(&card->work, mwifiex_pcie_work); 255 } 256 257 /* device tree node parsing and platform specific configuration*/ 258 if (pdev->dev.of_node) { 259 ret = mwifiex_pcie_probe_of(&pdev->dev); 260 if (ret) 261 return ret; 262 } 263 264 if (mwifiex_add_card(card, &card->fw_done, &pcie_ops, 265 MWIFIEX_PCIE, &pdev->dev)) { 266 pr_err("%s failed\n", __func__); 267 return -1; 268 } 269 270 return 0; 271 } 272 273 /* 274 * This function removes the interface and frees up the card structure. 275 */ 276 static void mwifiex_pcie_remove(struct pci_dev *pdev) 277 { 278 struct pcie_service_card *card; 279 struct mwifiex_adapter *adapter; 280 struct mwifiex_private *priv; 281 const struct mwifiex_pcie_card_reg *reg; 282 u32 fw_status; 283 int ret; 284 285 card = pci_get_drvdata(pdev); 286 287 wait_for_completion(&card->fw_done); 288 289 adapter = card->adapter; 290 if (!adapter || !adapter->priv_num) 291 return; 292 293 reg = card->pcie.reg; 294 if (reg) 295 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status); 296 else 297 fw_status = -1; 298 299 if (fw_status == FIRMWARE_READY_PCIE && !adapter->mfg_mode) { 300 mwifiex_deauthenticate_all(adapter); 301 302 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 303 304 mwifiex_disable_auto_ds(priv); 305 306 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN); 307 } 308 309 mwifiex_remove_card(adapter); 310 } 311 312 static void mwifiex_pcie_shutdown(struct pci_dev *pdev) 313 { 314 mwifiex_pcie_remove(pdev); 315 316 return; 317 } 318 319 static void mwifiex_pcie_coredump(struct device *dev) 320 { 321 struct pci_dev *pdev; 322 struct pcie_service_card *card; 323 324 pdev = container_of(dev, struct pci_dev, dev); 325 card = pci_get_drvdata(pdev); 326 327 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 328 &card->work_flags)) 329 schedule_work(&card->work); 330 } 331 332 static const struct pci_device_id mwifiex_ids[] = { 333 { 334 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P, 335 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 336 .driver_data = (unsigned long)&mwifiex_pcie8766, 337 }, 338 { 339 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897, 340 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 341 .driver_data = (unsigned long)&mwifiex_pcie8897, 342 }, 343 { 344 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 345 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 346 .driver_data = (unsigned long)&mwifiex_pcie8997, 347 }, 348 { 349 PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 350 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 351 .driver_data = (unsigned long)&mwifiex_pcie8997, 352 }, 353 {}, 354 }; 355 356 MODULE_DEVICE_TABLE(pci, mwifiex_ids); 357 358 /* 359 * Cleanup all software without cleaning anything related to PCIe and HW. 360 */ 361 static void mwifiex_pcie_reset_prepare(struct pci_dev *pdev) 362 { 363 struct pcie_service_card *card = pci_get_drvdata(pdev); 364 struct mwifiex_adapter *adapter = card->adapter; 365 366 if (!adapter) { 367 dev_err(&pdev->dev, "%s: adapter structure is not valid\n", 368 __func__); 369 return; 370 } 371 372 mwifiex_dbg(adapter, INFO, 373 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Pre-FLR\n", 374 __func__, pdev->vendor, pdev->device, pdev->revision); 375 376 mwifiex_shutdown_sw(adapter); 377 clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags); 378 clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags); 379 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__); 380 } 381 382 /* 383 * Kernel stores and restores PCIe function context before and after performing 384 * FLR respectively. Reconfigure the software and firmware including firmware 385 * redownload. 386 */ 387 static void mwifiex_pcie_reset_done(struct pci_dev *pdev) 388 { 389 struct pcie_service_card *card = pci_get_drvdata(pdev); 390 struct mwifiex_adapter *adapter = card->adapter; 391 int ret; 392 393 if (!adapter) { 394 dev_err(&pdev->dev, "%s: adapter structure is not valid\n", 395 __func__); 396 return; 397 } 398 399 mwifiex_dbg(adapter, INFO, 400 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Post-FLR\n", 401 __func__, pdev->vendor, pdev->device, pdev->revision); 402 403 ret = mwifiex_reinit_sw(adapter); 404 if (ret) 405 dev_err(&pdev->dev, "reinit failed: %d\n", ret); 406 else 407 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__); 408 } 409 410 static const struct pci_error_handlers mwifiex_pcie_err_handler = { 411 .reset_prepare = mwifiex_pcie_reset_prepare, 412 .reset_done = mwifiex_pcie_reset_done, 413 }; 414 415 #ifdef CONFIG_PM_SLEEP 416 /* Power Management Hooks */ 417 static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend, 418 mwifiex_pcie_resume); 419 #endif 420 421 /* PCI Device Driver */ 422 static struct pci_driver __refdata mwifiex_pcie = { 423 .name = "mwifiex_pcie", 424 .id_table = mwifiex_ids, 425 .probe = mwifiex_pcie_probe, 426 .remove = mwifiex_pcie_remove, 427 .driver = { 428 .coredump = mwifiex_pcie_coredump, 429 #ifdef CONFIG_PM_SLEEP 430 .pm = &mwifiex_pcie_pm_ops, 431 #endif 432 }, 433 .shutdown = mwifiex_pcie_shutdown, 434 .err_handler = &mwifiex_pcie_err_handler, 435 }; 436 437 /* 438 * This function adds delay loop to ensure FW is awake before proceeding. 439 */ 440 static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter) 441 { 442 int i = 0; 443 444 while (mwifiex_pcie_ok_to_access_hw(adapter)) { 445 i++; 446 usleep_range(10, 20); 447 /* 50ms max wait */ 448 if (i == 5000) 449 break; 450 } 451 452 return; 453 } 454 455 static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter, 456 u32 max_delay_loop_cnt) 457 { 458 struct pcie_service_card *card = adapter->card; 459 u8 *buffer; 460 u32 sleep_cookie, count; 461 struct sk_buff *cmdrsp = card->cmdrsp_buf; 462 463 for (count = 0; count < max_delay_loop_cnt; count++) { 464 pci_dma_sync_single_for_cpu(card->dev, 465 MWIFIEX_SKB_DMA_ADDR(cmdrsp), 466 sizeof(sleep_cookie), 467 PCI_DMA_FROMDEVICE); 468 buffer = cmdrsp->data; 469 sleep_cookie = get_unaligned_le32(buffer); 470 471 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) { 472 mwifiex_dbg(adapter, INFO, 473 "sleep cookie found at count %d\n", count); 474 break; 475 } 476 pci_dma_sync_single_for_device(card->dev, 477 MWIFIEX_SKB_DMA_ADDR(cmdrsp), 478 sizeof(sleep_cookie), 479 PCI_DMA_FROMDEVICE); 480 usleep_range(20, 30); 481 } 482 483 if (count >= max_delay_loop_cnt) 484 mwifiex_dbg(adapter, INFO, 485 "max count reached while accessing sleep cookie\n"); 486 } 487 488 /* This function wakes up the card by reading fw_status register. */ 489 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) 490 { 491 struct pcie_service_card *card = adapter->card; 492 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 493 494 mwifiex_dbg(adapter, EVENT, 495 "event: Wakeup device...\n"); 496 497 if (reg->sleep_cookie) 498 mwifiex_pcie_dev_wakeup_delay(adapter); 499 500 /* Accessing fw_status register will wakeup device */ 501 if (mwifiex_write_reg(adapter, reg->fw_status, FIRMWARE_READY_PCIE)) { 502 mwifiex_dbg(adapter, ERROR, 503 "Writing fw_status register failed\n"); 504 return -1; 505 } 506 507 if (reg->sleep_cookie) { 508 mwifiex_pcie_dev_wakeup_delay(adapter); 509 mwifiex_dbg(adapter, INFO, 510 "PCIE wakeup: Setting PS_STATE_AWAKE\n"); 511 adapter->ps_state = PS_STATE_AWAKE; 512 } 513 514 return 0; 515 } 516 517 /* 518 * This function is called after the card has woken up. 519 * 520 * The card configuration register is reset. 521 */ 522 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter) 523 { 524 mwifiex_dbg(adapter, CMD, 525 "cmd: Wakeup device completed\n"); 526 527 return 0; 528 } 529 530 /* 531 * This function disables the host interrupt. 532 * 533 * The host interrupt mask is read, the disable bit is reset and 534 * written back to the card host interrupt mask register. 535 */ 536 static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter) 537 { 538 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 539 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 540 0x00000000)) { 541 mwifiex_dbg(adapter, ERROR, 542 "Disable host interrupt failed\n"); 543 return -1; 544 } 545 } 546 547 atomic_set(&adapter->tx_hw_pending, 0); 548 return 0; 549 } 550 551 static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter) 552 { 553 WARN_ON(mwifiex_pcie_disable_host_int(adapter)); 554 } 555 556 /* 557 * This function enables the host interrupt. 558 * 559 * The host interrupt enable mask is written to the card 560 * host interrupt mask register. 561 */ 562 static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter) 563 { 564 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 565 /* Simply write the mask to the register */ 566 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 567 HOST_INTR_MASK)) { 568 mwifiex_dbg(adapter, ERROR, 569 "Enable host interrupt failed\n"); 570 return -1; 571 } 572 } 573 574 return 0; 575 } 576 577 /* 578 * This function initializes TX buffer ring descriptors 579 */ 580 static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter) 581 { 582 struct pcie_service_card *card = adapter->card; 583 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 584 struct mwifiex_pcie_buf_desc *desc; 585 struct mwifiex_pfu_buf_desc *desc2; 586 int i; 587 588 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 589 card->tx_buf_list[i] = NULL; 590 if (reg->pfu_enabled) { 591 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 592 (sizeof(*desc2) * i); 593 desc2 = card->txbd_ring[i]; 594 memset(desc2, 0, sizeof(*desc2)); 595 } else { 596 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 597 (sizeof(*desc) * i); 598 desc = card->txbd_ring[i]; 599 memset(desc, 0, sizeof(*desc)); 600 } 601 } 602 603 return 0; 604 } 605 606 /* This function initializes RX buffer ring descriptors. Each SKB is allocated 607 * here and after mapping PCI memory, its physical address is assigned to 608 * PCIE Rx buffer descriptor's physical address. 609 */ 610 static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter) 611 { 612 struct pcie_service_card *card = adapter->card; 613 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 614 struct sk_buff *skb; 615 struct mwifiex_pcie_buf_desc *desc; 616 struct mwifiex_pfu_buf_desc *desc2; 617 dma_addr_t buf_pa; 618 int i; 619 620 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 621 /* Allocate skb here so that firmware can DMA data from it */ 622 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 623 GFP_KERNEL); 624 if (!skb) { 625 mwifiex_dbg(adapter, ERROR, 626 "Unable to allocate skb for RX ring.\n"); 627 kfree(card->rxbd_ring_vbase); 628 return -ENOMEM; 629 } 630 631 if (mwifiex_map_pci_memory(adapter, skb, 632 MWIFIEX_RX_DATA_BUF_SIZE, 633 PCI_DMA_FROMDEVICE)) 634 return -1; 635 636 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 637 638 mwifiex_dbg(adapter, INFO, 639 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 640 skb, skb->len, skb->data, (u32)buf_pa, 641 (u32)((u64)buf_pa >> 32)); 642 643 card->rx_buf_list[i] = skb; 644 if (reg->pfu_enabled) { 645 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase + 646 (sizeof(*desc2) * i); 647 desc2 = card->rxbd_ring[i]; 648 desc2->paddr = buf_pa; 649 desc2->len = (u16)skb->len; 650 desc2->frag_len = (u16)skb->len; 651 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop; 652 desc2->offset = 0; 653 } else { 654 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase + 655 (sizeof(*desc) * i)); 656 desc = card->rxbd_ring[i]; 657 desc->paddr = buf_pa; 658 desc->len = (u16)skb->len; 659 desc->flags = 0; 660 } 661 } 662 663 return 0; 664 } 665 666 /* This function initializes event buffer ring descriptors. Each SKB is 667 * allocated here and after mapping PCI memory, its physical address is assigned 668 * to PCIE Rx buffer descriptor's physical address 669 */ 670 static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter) 671 { 672 struct pcie_service_card *card = adapter->card; 673 struct mwifiex_evt_buf_desc *desc; 674 struct sk_buff *skb; 675 dma_addr_t buf_pa; 676 int i; 677 678 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 679 /* Allocate skb here so that firmware can DMA data from it */ 680 skb = dev_alloc_skb(MAX_EVENT_SIZE); 681 if (!skb) { 682 mwifiex_dbg(adapter, ERROR, 683 "Unable to allocate skb for EVENT buf.\n"); 684 kfree(card->evtbd_ring_vbase); 685 return -ENOMEM; 686 } 687 skb_put(skb, MAX_EVENT_SIZE); 688 689 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE, 690 PCI_DMA_FROMDEVICE)) { 691 kfree_skb(skb); 692 kfree(card->evtbd_ring_vbase); 693 return -1; 694 } 695 696 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 697 698 mwifiex_dbg(adapter, EVENT, 699 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 700 skb, skb->len, skb->data, (u32)buf_pa, 701 (u32)((u64)buf_pa >> 32)); 702 703 card->evt_buf_list[i] = skb; 704 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase + 705 (sizeof(*desc) * i)); 706 desc = card->evtbd_ring[i]; 707 desc->paddr = buf_pa; 708 desc->len = (u16)skb->len; 709 desc->flags = 0; 710 } 711 712 return 0; 713 } 714 715 /* This function cleans up TX buffer rings. If any of the buffer list has valid 716 * SKB address, associated SKB is freed. 717 */ 718 static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter) 719 { 720 struct pcie_service_card *card = adapter->card; 721 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 722 struct sk_buff *skb; 723 struct mwifiex_pcie_buf_desc *desc; 724 struct mwifiex_pfu_buf_desc *desc2; 725 int i; 726 727 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 728 if (reg->pfu_enabled) { 729 desc2 = card->txbd_ring[i]; 730 if (card->tx_buf_list[i]) { 731 skb = card->tx_buf_list[i]; 732 mwifiex_unmap_pci_memory(adapter, skb, 733 PCI_DMA_TODEVICE); 734 dev_kfree_skb_any(skb); 735 } 736 memset(desc2, 0, sizeof(*desc2)); 737 } else { 738 desc = card->txbd_ring[i]; 739 if (card->tx_buf_list[i]) { 740 skb = card->tx_buf_list[i]; 741 mwifiex_unmap_pci_memory(adapter, skb, 742 PCI_DMA_TODEVICE); 743 dev_kfree_skb_any(skb); 744 } 745 memset(desc, 0, sizeof(*desc)); 746 } 747 card->tx_buf_list[i] = NULL; 748 } 749 750 atomic_set(&adapter->tx_hw_pending, 0); 751 return; 752 } 753 754 /* This function cleans up RX buffer rings. If any of the buffer list has valid 755 * SKB address, associated SKB is freed. 756 */ 757 static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter) 758 { 759 struct pcie_service_card *card = adapter->card; 760 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 761 struct mwifiex_pcie_buf_desc *desc; 762 struct mwifiex_pfu_buf_desc *desc2; 763 struct sk_buff *skb; 764 int i; 765 766 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 767 if (reg->pfu_enabled) { 768 desc2 = card->rxbd_ring[i]; 769 if (card->rx_buf_list[i]) { 770 skb = card->rx_buf_list[i]; 771 mwifiex_unmap_pci_memory(adapter, skb, 772 PCI_DMA_FROMDEVICE); 773 dev_kfree_skb_any(skb); 774 } 775 memset(desc2, 0, sizeof(*desc2)); 776 } else { 777 desc = card->rxbd_ring[i]; 778 if (card->rx_buf_list[i]) { 779 skb = card->rx_buf_list[i]; 780 mwifiex_unmap_pci_memory(adapter, skb, 781 PCI_DMA_FROMDEVICE); 782 dev_kfree_skb_any(skb); 783 } 784 memset(desc, 0, sizeof(*desc)); 785 } 786 card->rx_buf_list[i] = NULL; 787 } 788 789 return; 790 } 791 792 /* This function cleans up event buffer rings. If any of the buffer list has 793 * valid SKB address, associated SKB is freed. 794 */ 795 static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter) 796 { 797 struct pcie_service_card *card = adapter->card; 798 struct mwifiex_evt_buf_desc *desc; 799 struct sk_buff *skb; 800 int i; 801 802 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 803 desc = card->evtbd_ring[i]; 804 if (card->evt_buf_list[i]) { 805 skb = card->evt_buf_list[i]; 806 mwifiex_unmap_pci_memory(adapter, skb, 807 PCI_DMA_FROMDEVICE); 808 dev_kfree_skb_any(skb); 809 } 810 card->evt_buf_list[i] = NULL; 811 memset(desc, 0, sizeof(*desc)); 812 } 813 814 return; 815 } 816 817 /* This function creates buffer descriptor ring for TX 818 */ 819 static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter) 820 { 821 struct pcie_service_card *card = adapter->card; 822 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 823 824 /* 825 * driver maintaines the write pointer and firmware maintaines the read 826 * pointer. The write pointer starts at 0 (zero) while the read pointer 827 * starts at zero with rollover bit set 828 */ 829 card->txbd_wrptr = 0; 830 831 if (reg->pfu_enabled) 832 card->txbd_rdptr = 0; 833 else 834 card->txbd_rdptr |= reg->tx_rollover_ind; 835 836 /* allocate shared memory for the BD ring and divide the same in to 837 several descriptors */ 838 if (reg->pfu_enabled) 839 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 840 MWIFIEX_MAX_TXRX_BD; 841 else 842 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 843 MWIFIEX_MAX_TXRX_BD; 844 845 mwifiex_dbg(adapter, INFO, 846 "info: txbd_ring: Allocating %d bytes\n", 847 card->txbd_ring_size); 848 card->txbd_ring_vbase = pci_alloc_consistent(card->dev, 849 card->txbd_ring_size, 850 &card->txbd_ring_pbase); 851 if (!card->txbd_ring_vbase) { 852 mwifiex_dbg(adapter, ERROR, 853 "allocate consistent memory (%d bytes) failed!\n", 854 card->txbd_ring_size); 855 return -ENOMEM; 856 } 857 mwifiex_dbg(adapter, DATA, 858 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n", 859 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase, 860 (u32)((u64)card->txbd_ring_pbase >> 32), 861 card->txbd_ring_size); 862 863 return mwifiex_init_txq_ring(adapter); 864 } 865 866 static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter) 867 { 868 struct pcie_service_card *card = adapter->card; 869 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 870 871 mwifiex_cleanup_txq_ring(adapter); 872 873 if (card->txbd_ring_vbase) 874 pci_free_consistent(card->dev, card->txbd_ring_size, 875 card->txbd_ring_vbase, 876 card->txbd_ring_pbase); 877 card->txbd_ring_size = 0; 878 card->txbd_wrptr = 0; 879 card->txbd_rdptr = 0 | reg->tx_rollover_ind; 880 card->txbd_ring_vbase = NULL; 881 card->txbd_ring_pbase = 0; 882 883 return 0; 884 } 885 886 /* 887 * This function creates buffer descriptor ring for RX 888 */ 889 static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter) 890 { 891 struct pcie_service_card *card = adapter->card; 892 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 893 894 /* 895 * driver maintaines the read pointer and firmware maintaines the write 896 * pointer. The write pointer starts at 0 (zero) while the read pointer 897 * starts at zero with rollover bit set 898 */ 899 card->rxbd_wrptr = 0; 900 card->rxbd_rdptr = reg->rx_rollover_ind; 901 902 if (reg->pfu_enabled) 903 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 904 MWIFIEX_MAX_TXRX_BD; 905 else 906 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 907 MWIFIEX_MAX_TXRX_BD; 908 909 mwifiex_dbg(adapter, INFO, 910 "info: rxbd_ring: Allocating %d bytes\n", 911 card->rxbd_ring_size); 912 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev, 913 card->rxbd_ring_size, 914 &card->rxbd_ring_pbase); 915 if (!card->rxbd_ring_vbase) { 916 mwifiex_dbg(adapter, ERROR, 917 "allocate consistent memory (%d bytes) failed!\n", 918 card->rxbd_ring_size); 919 return -ENOMEM; 920 } 921 922 mwifiex_dbg(adapter, DATA, 923 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n", 924 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase, 925 (u32)((u64)card->rxbd_ring_pbase >> 32), 926 card->rxbd_ring_size); 927 928 return mwifiex_init_rxq_ring(adapter); 929 } 930 931 /* 932 * This function deletes Buffer descriptor ring for RX 933 */ 934 static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter) 935 { 936 struct pcie_service_card *card = adapter->card; 937 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 938 939 mwifiex_cleanup_rxq_ring(adapter); 940 941 if (card->rxbd_ring_vbase) 942 pci_free_consistent(card->dev, card->rxbd_ring_size, 943 card->rxbd_ring_vbase, 944 card->rxbd_ring_pbase); 945 card->rxbd_ring_size = 0; 946 card->rxbd_wrptr = 0; 947 card->rxbd_rdptr = 0 | reg->rx_rollover_ind; 948 card->rxbd_ring_vbase = NULL; 949 card->rxbd_ring_pbase = 0; 950 951 return 0; 952 } 953 954 /* 955 * This function creates buffer descriptor ring for Events 956 */ 957 static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter) 958 { 959 struct pcie_service_card *card = adapter->card; 960 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 961 962 /* 963 * driver maintaines the read pointer and firmware maintaines the write 964 * pointer. The write pointer starts at 0 (zero) while the read pointer 965 * starts at zero with rollover bit set 966 */ 967 card->evtbd_wrptr = 0; 968 card->evtbd_rdptr = reg->evt_rollover_ind; 969 970 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) * 971 MWIFIEX_MAX_EVT_BD; 972 973 mwifiex_dbg(adapter, INFO, 974 "info: evtbd_ring: Allocating %d bytes\n", 975 card->evtbd_ring_size); 976 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev, 977 card->evtbd_ring_size, 978 &card->evtbd_ring_pbase); 979 if (!card->evtbd_ring_vbase) { 980 mwifiex_dbg(adapter, ERROR, 981 "allocate consistent memory (%d bytes) failed!\n", 982 card->evtbd_ring_size); 983 return -ENOMEM; 984 } 985 986 mwifiex_dbg(adapter, EVENT, 987 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n", 988 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase, 989 (u32)((u64)card->evtbd_ring_pbase >> 32), 990 card->evtbd_ring_size); 991 992 return mwifiex_pcie_init_evt_ring(adapter); 993 } 994 995 /* 996 * This function deletes Buffer descriptor ring for Events 997 */ 998 static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter) 999 { 1000 struct pcie_service_card *card = adapter->card; 1001 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1002 1003 mwifiex_cleanup_evt_ring(adapter); 1004 1005 if (card->evtbd_ring_vbase) 1006 pci_free_consistent(card->dev, card->evtbd_ring_size, 1007 card->evtbd_ring_vbase, 1008 card->evtbd_ring_pbase); 1009 card->evtbd_wrptr = 0; 1010 card->evtbd_rdptr = 0 | reg->evt_rollover_ind; 1011 card->evtbd_ring_size = 0; 1012 card->evtbd_ring_vbase = NULL; 1013 card->evtbd_ring_pbase = 0; 1014 1015 return 0; 1016 } 1017 1018 /* 1019 * This function allocates a buffer for CMDRSP 1020 */ 1021 static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter) 1022 { 1023 struct pcie_service_card *card = adapter->card; 1024 struct sk_buff *skb; 1025 1026 /* Allocate memory for receiving command response data */ 1027 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 1028 if (!skb) { 1029 mwifiex_dbg(adapter, ERROR, 1030 "Unable to allocate skb for command response data.\n"); 1031 return -ENOMEM; 1032 } 1033 skb_put(skb, MWIFIEX_UPLD_SIZE); 1034 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1035 PCI_DMA_FROMDEVICE)) { 1036 kfree_skb(skb); 1037 return -1; 1038 } 1039 1040 card->cmdrsp_buf = skb; 1041 1042 return 0; 1043 } 1044 1045 /* 1046 * This function deletes a buffer for CMDRSP 1047 */ 1048 static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter) 1049 { 1050 struct pcie_service_card *card; 1051 1052 if (!adapter) 1053 return 0; 1054 1055 card = adapter->card; 1056 1057 if (card && card->cmdrsp_buf) { 1058 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf, 1059 PCI_DMA_FROMDEVICE); 1060 dev_kfree_skb_any(card->cmdrsp_buf); 1061 card->cmdrsp_buf = NULL; 1062 } 1063 1064 if (card && card->cmd_buf) { 1065 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1066 PCI_DMA_TODEVICE); 1067 dev_kfree_skb_any(card->cmd_buf); 1068 card->cmd_buf = NULL; 1069 } 1070 return 0; 1071 } 1072 1073 /* 1074 * This function allocates a buffer for sleep cookie 1075 */ 1076 static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter) 1077 { 1078 struct pcie_service_card *card = adapter->card; 1079 u32 tmp; 1080 1081 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32), 1082 &card->sleep_cookie_pbase); 1083 if (!card->sleep_cookie_vbase) { 1084 mwifiex_dbg(adapter, ERROR, 1085 "pci_alloc_consistent failed!\n"); 1086 return -ENOMEM; 1087 } 1088 /* Init val of Sleep Cookie */ 1089 tmp = FW_AWAKE_COOKIE; 1090 put_unaligned(tmp, card->sleep_cookie_vbase); 1091 1092 mwifiex_dbg(adapter, INFO, 1093 "alloc_scook: sleep cookie=0x%x\n", 1094 get_unaligned(card->sleep_cookie_vbase)); 1095 1096 return 0; 1097 } 1098 1099 /* 1100 * This function deletes buffer for sleep cookie 1101 */ 1102 static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter) 1103 { 1104 struct pcie_service_card *card; 1105 1106 if (!adapter) 1107 return 0; 1108 1109 card = adapter->card; 1110 1111 if (card && card->sleep_cookie_vbase) { 1112 pci_free_consistent(card->dev, sizeof(u32), 1113 card->sleep_cookie_vbase, 1114 card->sleep_cookie_pbase); 1115 card->sleep_cookie_vbase = NULL; 1116 } 1117 1118 return 0; 1119 } 1120 1121 /* This function flushes the TX buffer descriptor ring 1122 * This function defined as handler is also called while cleaning TXRX 1123 * during disconnect/ bss stop. 1124 */ 1125 static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter) 1126 { 1127 struct pcie_service_card *card = adapter->card; 1128 1129 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) { 1130 card->txbd_flush = 1; 1131 /* write pointer already set at last send 1132 * send dnld-rdy intr again, wait for completion. 1133 */ 1134 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1135 CPU_INTR_DNLD_RDY)) { 1136 mwifiex_dbg(adapter, ERROR, 1137 "failed to assert dnld-rdy interrupt.\n"); 1138 return -1; 1139 } 1140 } 1141 return 0; 1142 } 1143 1144 /* 1145 * This function unmaps and frees downloaded data buffer 1146 */ 1147 static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter) 1148 { 1149 struct sk_buff *skb; 1150 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0; 1151 struct mwifiex_pcie_buf_desc *desc; 1152 struct mwifiex_pfu_buf_desc *desc2; 1153 struct pcie_service_card *card = adapter->card; 1154 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1155 1156 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1157 mwifiex_pm_wakeup_card(adapter); 1158 1159 /* Read the TX ring read pointer set by firmware */ 1160 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) { 1161 mwifiex_dbg(adapter, ERROR, 1162 "SEND COMP: failed to read reg->tx_rdptr\n"); 1163 return -1; 1164 } 1165 1166 mwifiex_dbg(adapter, DATA, 1167 "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n", 1168 card->txbd_rdptr, rdptr); 1169 1170 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1171 /* free from previous txbd_rdptr to current txbd_rdptr */ 1172 while (((card->txbd_rdptr & reg->tx_mask) != 1173 (rdptr & reg->tx_mask)) || 1174 ((card->txbd_rdptr & reg->tx_rollover_ind) != 1175 (rdptr & reg->tx_rollover_ind))) { 1176 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >> 1177 reg->tx_start_ptr; 1178 1179 skb = card->tx_buf_list[wrdoneidx]; 1180 1181 if (skb) { 1182 mwifiex_dbg(adapter, DATA, 1183 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n", 1184 skb, wrdoneidx); 1185 mwifiex_unmap_pci_memory(adapter, skb, 1186 PCI_DMA_TODEVICE); 1187 1188 unmap_count++; 1189 1190 if (card->txbd_flush) 1191 mwifiex_write_data_complete(adapter, skb, 0, 1192 -1); 1193 else 1194 mwifiex_write_data_complete(adapter, skb, 0, 0); 1195 atomic_dec(&adapter->tx_hw_pending); 1196 } 1197 1198 card->tx_buf_list[wrdoneidx] = NULL; 1199 1200 if (reg->pfu_enabled) { 1201 desc2 = card->txbd_ring[wrdoneidx]; 1202 memset(desc2, 0, sizeof(*desc2)); 1203 } else { 1204 desc = card->txbd_ring[wrdoneidx]; 1205 memset(desc, 0, sizeof(*desc)); 1206 } 1207 switch (card->dev->device) { 1208 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1209 card->txbd_rdptr++; 1210 break; 1211 case PCIE_DEVICE_ID_MARVELL_88W8897: 1212 case PCIE_DEVICE_ID_MARVELL_88W8997: 1213 card->txbd_rdptr += reg->ring_tx_start_ptr; 1214 break; 1215 } 1216 1217 1218 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs) 1219 card->txbd_rdptr = ((card->txbd_rdptr & 1220 reg->tx_rollover_ind) ^ 1221 reg->tx_rollover_ind); 1222 } 1223 1224 if (unmap_count) 1225 adapter->data_sent = false; 1226 1227 if (card->txbd_flush) { 1228 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) 1229 card->txbd_flush = 0; 1230 else 1231 mwifiex_clean_pcie_ring_buf(adapter); 1232 } 1233 1234 return 0; 1235 } 1236 1237 /* This function sends data buffer to device. First 4 bytes of payload 1238 * are filled with payload length and payload type. Then this payload 1239 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly. 1240 * Download ready interrupt to FW is deffered if Tx ring is not full and 1241 * additional payload can be accomodated. 1242 * Caller must ensure tx_param parameter to this function is not NULL. 1243 */ 1244 static int 1245 mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb, 1246 struct mwifiex_tx_param *tx_param) 1247 { 1248 struct pcie_service_card *card = adapter->card; 1249 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1250 u32 wrindx, num_tx_buffs, rx_val; 1251 int ret; 1252 dma_addr_t buf_pa; 1253 struct mwifiex_pcie_buf_desc *desc = NULL; 1254 struct mwifiex_pfu_buf_desc *desc2 = NULL; 1255 1256 if (!(skb->data && skb->len)) { 1257 mwifiex_dbg(adapter, ERROR, 1258 "%s(): invalid parameter <%p, %#x>\n", 1259 __func__, skb->data, skb->len); 1260 return -1; 1261 } 1262 1263 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1264 mwifiex_pm_wakeup_card(adapter); 1265 1266 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1267 mwifiex_dbg(adapter, DATA, 1268 "info: SEND DATA: <Rd: %#x, Wr: %#x>\n", 1269 card->txbd_rdptr, card->txbd_wrptr); 1270 if (mwifiex_pcie_txbd_not_full(card)) { 1271 u8 *payload; 1272 1273 adapter->data_sent = true; 1274 payload = skb->data; 1275 put_unaligned_le16((u16)skb->len, payload + 0); 1276 put_unaligned_le16(MWIFIEX_TYPE_DATA, payload + 2); 1277 1278 if (mwifiex_map_pci_memory(adapter, skb, skb->len, 1279 PCI_DMA_TODEVICE)) 1280 return -1; 1281 1282 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr; 1283 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1284 card->tx_buf_list[wrindx] = skb; 1285 atomic_inc(&adapter->tx_hw_pending); 1286 1287 if (reg->pfu_enabled) { 1288 desc2 = card->txbd_ring[wrindx]; 1289 desc2->paddr = buf_pa; 1290 desc2->len = (u16)skb->len; 1291 desc2->frag_len = (u16)skb->len; 1292 desc2->offset = 0; 1293 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1294 MWIFIEX_BD_FLAG_LAST_DESC; 1295 } else { 1296 desc = card->txbd_ring[wrindx]; 1297 desc->paddr = buf_pa; 1298 desc->len = (u16)skb->len; 1299 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1300 MWIFIEX_BD_FLAG_LAST_DESC; 1301 } 1302 1303 switch (card->dev->device) { 1304 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1305 card->txbd_wrptr++; 1306 break; 1307 case PCIE_DEVICE_ID_MARVELL_88W8897: 1308 case PCIE_DEVICE_ID_MARVELL_88W8997: 1309 card->txbd_wrptr += reg->ring_tx_start_ptr; 1310 break; 1311 } 1312 1313 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs) 1314 card->txbd_wrptr = ((card->txbd_wrptr & 1315 reg->tx_rollover_ind) ^ 1316 reg->tx_rollover_ind); 1317 1318 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask; 1319 /* Write the TX ring write pointer in to reg->tx_wrptr */ 1320 if (mwifiex_write_reg(adapter, reg->tx_wrptr, 1321 card->txbd_wrptr | rx_val)) { 1322 mwifiex_dbg(adapter, ERROR, 1323 "SEND DATA: failed to write reg->tx_wrptr\n"); 1324 ret = -1; 1325 goto done_unmap; 1326 } 1327 if ((mwifiex_pcie_txbd_not_full(card)) && 1328 tx_param->next_pkt_len) { 1329 /* have more packets and TxBD still can hold more */ 1330 mwifiex_dbg(adapter, DATA, 1331 "SEND DATA: delay dnld-rdy interrupt.\n"); 1332 adapter->data_sent = false; 1333 } else { 1334 /* Send the TX ready interrupt */ 1335 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1336 CPU_INTR_DNLD_RDY)) { 1337 mwifiex_dbg(adapter, ERROR, 1338 "SEND DATA: failed to assert dnld-rdy interrupt.\n"); 1339 ret = -1; 1340 goto done_unmap; 1341 } 1342 } 1343 mwifiex_dbg(adapter, DATA, 1344 "info: SEND DATA: Updated <Rd: %#x, Wr:\t" 1345 "%#x> and sent packet to firmware successfully\n", 1346 card->txbd_rdptr, card->txbd_wrptr); 1347 } else { 1348 mwifiex_dbg(adapter, DATA, 1349 "info: TX Ring full, can't send packets to fw\n"); 1350 adapter->data_sent = true; 1351 /* Send the TX ready interrupt */ 1352 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1353 CPU_INTR_DNLD_RDY)) 1354 mwifiex_dbg(adapter, ERROR, 1355 "SEND DATA: failed to assert door-bell intr\n"); 1356 return -EBUSY; 1357 } 1358 1359 return -EINPROGRESS; 1360 done_unmap: 1361 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1362 card->tx_buf_list[wrindx] = NULL; 1363 atomic_dec(&adapter->tx_hw_pending); 1364 if (reg->pfu_enabled) 1365 memset(desc2, 0, sizeof(*desc2)); 1366 else 1367 memset(desc, 0, sizeof(*desc)); 1368 1369 return ret; 1370 } 1371 1372 /* 1373 * This function handles received buffer ring and 1374 * dispatches packets to upper 1375 */ 1376 static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter) 1377 { 1378 struct pcie_service_card *card = adapter->card; 1379 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1380 u32 wrptr, rd_index, tx_val; 1381 dma_addr_t buf_pa; 1382 int ret = 0; 1383 struct sk_buff *skb_tmp = NULL; 1384 struct mwifiex_pcie_buf_desc *desc; 1385 struct mwifiex_pfu_buf_desc *desc2; 1386 1387 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1388 mwifiex_pm_wakeup_card(adapter); 1389 1390 /* Read the RX ring Write pointer set by firmware */ 1391 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1392 mwifiex_dbg(adapter, ERROR, 1393 "RECV DATA: failed to read reg->rx_wrptr\n"); 1394 ret = -1; 1395 goto done; 1396 } 1397 card->rxbd_wrptr = wrptr; 1398 1399 while (((wrptr & reg->rx_mask) != 1400 (card->rxbd_rdptr & reg->rx_mask)) || 1401 ((wrptr & reg->rx_rollover_ind) == 1402 (card->rxbd_rdptr & reg->rx_rollover_ind))) { 1403 struct sk_buff *skb_data; 1404 u16 rx_len; 1405 1406 rd_index = card->rxbd_rdptr & reg->rx_mask; 1407 skb_data = card->rx_buf_list[rd_index]; 1408 1409 /* If skb allocation was failed earlier for Rx packet, 1410 * rx_buf_list[rd_index] would have been left with a NULL. 1411 */ 1412 if (!skb_data) 1413 return -ENOMEM; 1414 1415 mwifiex_unmap_pci_memory(adapter, skb_data, PCI_DMA_FROMDEVICE); 1416 card->rx_buf_list[rd_index] = NULL; 1417 1418 /* Get data length from interface header - 1419 * first 2 bytes for len, next 2 bytes is for type 1420 */ 1421 rx_len = get_unaligned_le16(skb_data->data); 1422 if (WARN_ON(rx_len <= adapter->intf_hdr_len || 1423 rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) { 1424 mwifiex_dbg(adapter, ERROR, 1425 "Invalid RX len %d, Rd=%#x, Wr=%#x\n", 1426 rx_len, card->rxbd_rdptr, wrptr); 1427 dev_kfree_skb_any(skb_data); 1428 } else { 1429 skb_put(skb_data, rx_len); 1430 mwifiex_dbg(adapter, DATA, 1431 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n", 1432 card->rxbd_rdptr, wrptr, rx_len); 1433 skb_pull(skb_data, adapter->intf_hdr_len); 1434 if (adapter->rx_work_enabled) { 1435 skb_queue_tail(&adapter->rx_data_q, skb_data); 1436 adapter->data_received = true; 1437 atomic_inc(&adapter->rx_pending); 1438 } else { 1439 mwifiex_handle_rx_packet(adapter, skb_data); 1440 } 1441 } 1442 1443 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 1444 GFP_KERNEL); 1445 if (!skb_tmp) { 1446 mwifiex_dbg(adapter, ERROR, 1447 "Unable to allocate skb.\n"); 1448 return -ENOMEM; 1449 } 1450 1451 if (mwifiex_map_pci_memory(adapter, skb_tmp, 1452 MWIFIEX_RX_DATA_BUF_SIZE, 1453 PCI_DMA_FROMDEVICE)) 1454 return -1; 1455 1456 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp); 1457 1458 mwifiex_dbg(adapter, INFO, 1459 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n", 1460 skb_tmp, rd_index); 1461 card->rx_buf_list[rd_index] = skb_tmp; 1462 1463 if (reg->pfu_enabled) { 1464 desc2 = card->rxbd_ring[rd_index]; 1465 desc2->paddr = buf_pa; 1466 desc2->len = skb_tmp->len; 1467 desc2->frag_len = skb_tmp->len; 1468 desc2->offset = 0; 1469 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop; 1470 } else { 1471 desc = card->rxbd_ring[rd_index]; 1472 desc->paddr = buf_pa; 1473 desc->len = skb_tmp->len; 1474 desc->flags = 0; 1475 } 1476 1477 if ((++card->rxbd_rdptr & reg->rx_mask) == 1478 MWIFIEX_MAX_TXRX_BD) { 1479 card->rxbd_rdptr = ((card->rxbd_rdptr & 1480 reg->rx_rollover_ind) ^ 1481 reg->rx_rollover_ind); 1482 } 1483 mwifiex_dbg(adapter, DATA, 1484 "info: RECV DATA: <Rd: %#x, Wr: %#x>\n", 1485 card->rxbd_rdptr, wrptr); 1486 1487 tx_val = card->txbd_wrptr & reg->tx_wrap_mask; 1488 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1489 if (mwifiex_write_reg(adapter, reg->rx_rdptr, 1490 card->rxbd_rdptr | tx_val)) { 1491 mwifiex_dbg(adapter, DATA, 1492 "RECV DATA: failed to write reg->rx_rdptr\n"); 1493 ret = -1; 1494 goto done; 1495 } 1496 1497 /* Read the RX ring Write pointer set by firmware */ 1498 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1499 mwifiex_dbg(adapter, ERROR, 1500 "RECV DATA: failed to read reg->rx_wrptr\n"); 1501 ret = -1; 1502 goto done; 1503 } 1504 mwifiex_dbg(adapter, DATA, 1505 "info: RECV DATA: Rcvd packet from fw successfully\n"); 1506 card->rxbd_wrptr = wrptr; 1507 } 1508 1509 done: 1510 return ret; 1511 } 1512 1513 /* 1514 * This function downloads the boot command to device 1515 */ 1516 static int 1517 mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1518 { 1519 dma_addr_t buf_pa; 1520 struct pcie_service_card *card = adapter->card; 1521 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1522 1523 if (!(skb->data && skb->len)) { 1524 mwifiex_dbg(adapter, ERROR, 1525 "Invalid parameter in %s <%p. len %d>\n", 1526 __func__, skb->data, skb->len); 1527 return -1; 1528 } 1529 1530 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE)) 1531 return -1; 1532 1533 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1534 1535 /* Write the lower 32bits of the physical address to low command 1536 * address scratch register 1537 */ 1538 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) { 1539 mwifiex_dbg(adapter, ERROR, 1540 "%s: failed to write download command to boot code.\n", 1541 __func__); 1542 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1543 return -1; 1544 } 1545 1546 /* Write the upper 32bits of the physical address to high command 1547 * address scratch register 1548 */ 1549 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1550 (u32)((u64)buf_pa >> 32))) { 1551 mwifiex_dbg(adapter, ERROR, 1552 "%s: failed to write download command to boot code.\n", 1553 __func__); 1554 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1555 return -1; 1556 } 1557 1558 /* Write the command length to cmd_size scratch register */ 1559 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) { 1560 mwifiex_dbg(adapter, ERROR, 1561 "%s: failed to write command len to cmd_size scratch reg\n", 1562 __func__); 1563 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1564 return -1; 1565 } 1566 1567 /* Ring the door bell */ 1568 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1569 CPU_INTR_DOOR_BELL)) { 1570 mwifiex_dbg(adapter, ERROR, 1571 "%s: failed to assert door-bell intr\n", __func__); 1572 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1573 return -1; 1574 } 1575 1576 return 0; 1577 } 1578 1579 /* This function init rx port in firmware which in turn enables to receive data 1580 * from device before transmitting any packet. 1581 */ 1582 static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter) 1583 { 1584 struct pcie_service_card *card = adapter->card; 1585 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1586 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask; 1587 1588 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1589 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr | 1590 tx_wrap)) { 1591 mwifiex_dbg(adapter, ERROR, 1592 "RECV DATA: failed to write reg->rx_rdptr\n"); 1593 return -1; 1594 } 1595 return 0; 1596 } 1597 1598 /* This function downloads commands to the device 1599 */ 1600 static int 1601 mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1602 { 1603 struct pcie_service_card *card = adapter->card; 1604 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1605 int ret = 0; 1606 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa; 1607 u8 *payload = (u8 *)skb->data; 1608 1609 if (!(skb->data && skb->len)) { 1610 mwifiex_dbg(adapter, ERROR, 1611 "Invalid parameter in %s <%p, %#x>\n", 1612 __func__, skb->data, skb->len); 1613 return -1; 1614 } 1615 1616 /* Make sure a command response buffer is available */ 1617 if (!card->cmdrsp_buf) { 1618 mwifiex_dbg(adapter, ERROR, 1619 "No response buffer available, send command failed\n"); 1620 return -EBUSY; 1621 } 1622 1623 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1624 mwifiex_pm_wakeup_card(adapter); 1625 1626 adapter->cmd_sent = true; 1627 1628 put_unaligned_le16((u16)skb->len, &payload[0]); 1629 put_unaligned_le16(MWIFIEX_TYPE_CMD, &payload[2]); 1630 1631 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE)) 1632 return -1; 1633 1634 card->cmd_buf = skb; 1635 /* 1636 * Need to keep a reference, since core driver might free up this 1637 * buffer before we've unmapped it. 1638 */ 1639 skb_get(skb); 1640 1641 /* To send a command, the driver will: 1642 1. Write the 64bit physical address of the data buffer to 1643 cmd response address low + cmd response address high 1644 2. Ring the door bell (i.e. set the door bell interrupt) 1645 1646 In response to door bell interrupt, the firmware will perform 1647 the DMA of the command packet (first header to obtain the total 1648 length and then rest of the command). 1649 */ 1650 1651 if (card->cmdrsp_buf) { 1652 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf); 1653 /* Write the lower 32bits of the cmdrsp buffer physical 1654 address */ 1655 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 1656 (u32)cmdrsp_buf_pa)) { 1657 mwifiex_dbg(adapter, ERROR, 1658 "Failed to write download cmd to boot code.\n"); 1659 ret = -1; 1660 goto done; 1661 } 1662 /* Write the upper 32bits of the cmdrsp buffer physical 1663 address */ 1664 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 1665 (u32)((u64)cmdrsp_buf_pa >> 32))) { 1666 mwifiex_dbg(adapter, ERROR, 1667 "Failed to write download cmd to boot code.\n"); 1668 ret = -1; 1669 goto done; 1670 } 1671 } 1672 1673 cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf); 1674 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */ 1675 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, 1676 (u32)cmd_buf_pa)) { 1677 mwifiex_dbg(adapter, ERROR, 1678 "Failed to write download cmd to boot code.\n"); 1679 ret = -1; 1680 goto done; 1681 } 1682 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */ 1683 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1684 (u32)((u64)cmd_buf_pa >> 32))) { 1685 mwifiex_dbg(adapter, ERROR, 1686 "Failed to write download cmd to boot code.\n"); 1687 ret = -1; 1688 goto done; 1689 } 1690 1691 /* Write the command length to reg->cmd_size */ 1692 if (mwifiex_write_reg(adapter, reg->cmd_size, 1693 card->cmd_buf->len)) { 1694 mwifiex_dbg(adapter, ERROR, 1695 "Failed to write cmd len to reg->cmd_size\n"); 1696 ret = -1; 1697 goto done; 1698 } 1699 1700 /* Ring the door bell */ 1701 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1702 CPU_INTR_DOOR_BELL)) { 1703 mwifiex_dbg(adapter, ERROR, 1704 "Failed to assert door-bell intr\n"); 1705 ret = -1; 1706 goto done; 1707 } 1708 1709 done: 1710 if (ret) 1711 adapter->cmd_sent = false; 1712 1713 return 0; 1714 } 1715 1716 /* 1717 * This function handles command complete interrupt 1718 */ 1719 static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter) 1720 { 1721 struct pcie_service_card *card = adapter->card; 1722 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1723 struct sk_buff *skb = card->cmdrsp_buf; 1724 int count = 0; 1725 u16 rx_len; 1726 1727 mwifiex_dbg(adapter, CMD, 1728 "info: Rx CMD Response\n"); 1729 1730 if (adapter->curr_cmd) 1731 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_FROMDEVICE); 1732 else 1733 pci_dma_sync_single_for_cpu(card->dev, 1734 MWIFIEX_SKB_DMA_ADDR(skb), 1735 MWIFIEX_UPLD_SIZE, 1736 PCI_DMA_FROMDEVICE); 1737 1738 /* Unmap the command as a response has been received. */ 1739 if (card->cmd_buf) { 1740 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1741 PCI_DMA_TODEVICE); 1742 dev_kfree_skb_any(card->cmd_buf); 1743 card->cmd_buf = NULL; 1744 } 1745 1746 rx_len = get_unaligned_le16(skb->data); 1747 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 1748 skb_trim(skb, rx_len); 1749 1750 if (!adapter->curr_cmd) { 1751 if (adapter->ps_state == PS_STATE_SLEEP_CFM) { 1752 pci_dma_sync_single_for_device(card->dev, 1753 MWIFIEX_SKB_DMA_ADDR(skb), 1754 MWIFIEX_SLEEP_COOKIE_SIZE, 1755 PCI_DMA_FROMDEVICE); 1756 if (mwifiex_write_reg(adapter, 1757 PCIE_CPU_INT_EVENT, 1758 CPU_INTR_SLEEP_CFM_DONE)) { 1759 mwifiex_dbg(adapter, ERROR, 1760 "Write register failed\n"); 1761 return -1; 1762 } 1763 mwifiex_delay_for_sleep_cookie(adapter, 1764 MWIFIEX_MAX_DELAY_COUNT); 1765 mwifiex_unmap_pci_memory(adapter, skb, 1766 PCI_DMA_FROMDEVICE); 1767 skb_pull(skb, adapter->intf_hdr_len); 1768 while (reg->sleep_cookie && (count++ < 10) && 1769 mwifiex_pcie_ok_to_access_hw(adapter)) 1770 usleep_range(50, 60); 1771 mwifiex_pcie_enable_host_int(adapter); 1772 mwifiex_process_sleep_confirm_resp(adapter, skb->data, 1773 skb->len); 1774 } else { 1775 mwifiex_dbg(adapter, ERROR, 1776 "There is no command but got cmdrsp\n"); 1777 } 1778 memcpy(adapter->upld_buf, skb->data, 1779 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len)); 1780 skb_push(skb, adapter->intf_hdr_len); 1781 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1782 PCI_DMA_FROMDEVICE)) 1783 return -1; 1784 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) { 1785 skb_pull(skb, adapter->intf_hdr_len); 1786 adapter->curr_cmd->resp_skb = skb; 1787 adapter->cmd_resp_received = true; 1788 /* Take the pointer and set it to CMD node and will 1789 return in the response complete callback */ 1790 card->cmdrsp_buf = NULL; 1791 1792 /* Clear the cmd-rsp buffer address in scratch registers. This 1793 will prevent firmware from writing to the same response 1794 buffer again. */ 1795 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) { 1796 mwifiex_dbg(adapter, ERROR, 1797 "cmd_done: failed to clear cmd_rsp_addr_lo\n"); 1798 return -1; 1799 } 1800 /* Write the upper 32bits of the cmdrsp buffer physical 1801 address */ 1802 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) { 1803 mwifiex_dbg(adapter, ERROR, 1804 "cmd_done: failed to clear cmd_rsp_addr_hi\n"); 1805 return -1; 1806 } 1807 } 1808 1809 return 0; 1810 } 1811 1812 /* 1813 * Command Response processing complete handler 1814 */ 1815 static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter, 1816 struct sk_buff *skb) 1817 { 1818 struct pcie_service_card *card = adapter->card; 1819 1820 if (skb) { 1821 card->cmdrsp_buf = skb; 1822 skb_push(card->cmdrsp_buf, adapter->intf_hdr_len); 1823 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1824 PCI_DMA_FROMDEVICE)) 1825 return -1; 1826 } 1827 1828 return 0; 1829 } 1830 1831 /* 1832 * This function handles firmware event ready interrupt 1833 */ 1834 static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter) 1835 { 1836 struct pcie_service_card *card = adapter->card; 1837 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1838 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 1839 u32 wrptr, event; 1840 struct mwifiex_evt_buf_desc *desc; 1841 1842 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1843 mwifiex_pm_wakeup_card(adapter); 1844 1845 if (adapter->event_received) { 1846 mwifiex_dbg(adapter, EVENT, 1847 "info: Event being processed,\t" 1848 "do not process this interrupt just yet\n"); 1849 return 0; 1850 } 1851 1852 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 1853 mwifiex_dbg(adapter, ERROR, 1854 "info: Invalid read pointer...\n"); 1855 return -1; 1856 } 1857 1858 /* Read the event ring write pointer set by firmware */ 1859 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 1860 mwifiex_dbg(adapter, ERROR, 1861 "EventReady: failed to read reg->evt_wrptr\n"); 1862 return -1; 1863 } 1864 1865 mwifiex_dbg(adapter, EVENT, 1866 "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>", 1867 card->evtbd_rdptr, wrptr); 1868 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr 1869 & MWIFIEX_EVTBD_MASK)) || 1870 ((wrptr & reg->evt_rollover_ind) == 1871 (card->evtbd_rdptr & reg->evt_rollover_ind))) { 1872 struct sk_buff *skb_cmd; 1873 __le16 data_len = 0; 1874 u16 evt_len; 1875 1876 mwifiex_dbg(adapter, INFO, 1877 "info: Read Index: %d\n", rdptr); 1878 skb_cmd = card->evt_buf_list[rdptr]; 1879 mwifiex_unmap_pci_memory(adapter, skb_cmd, PCI_DMA_FROMDEVICE); 1880 1881 /* Take the pointer and set it to event pointer in adapter 1882 and will return back after event handling callback */ 1883 card->evt_buf_list[rdptr] = NULL; 1884 desc = card->evtbd_ring[rdptr]; 1885 memset(desc, 0, sizeof(*desc)); 1886 1887 event = get_unaligned_le32( 1888 &skb_cmd->data[adapter->intf_hdr_len]); 1889 adapter->event_cause = event; 1890 /* The first 4bytes will be the event transfer header 1891 len is 2 bytes followed by type which is 2 bytes */ 1892 memcpy(&data_len, skb_cmd->data, sizeof(__le16)); 1893 evt_len = le16_to_cpu(data_len); 1894 skb_trim(skb_cmd, evt_len); 1895 skb_pull(skb_cmd, adapter->intf_hdr_len); 1896 mwifiex_dbg(adapter, EVENT, 1897 "info: Event length: %d\n", evt_len); 1898 1899 if (evt_len > MWIFIEX_EVENT_HEADER_LEN && 1900 evt_len < MAX_EVENT_SIZE) 1901 memcpy(adapter->event_body, skb_cmd->data + 1902 MWIFIEX_EVENT_HEADER_LEN, evt_len - 1903 MWIFIEX_EVENT_HEADER_LEN); 1904 1905 adapter->event_received = true; 1906 adapter->event_skb = skb_cmd; 1907 1908 /* Do not update the event read pointer here, wait till the 1909 buffer is released. This is just to make things simpler, 1910 we need to find a better method of managing these buffers. 1911 */ 1912 } else { 1913 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1914 CPU_INTR_EVENT_DONE)) { 1915 mwifiex_dbg(adapter, ERROR, 1916 "Write register failed\n"); 1917 return -1; 1918 } 1919 } 1920 1921 return 0; 1922 } 1923 1924 /* 1925 * Event processing complete handler 1926 */ 1927 static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter, 1928 struct sk_buff *skb) 1929 { 1930 struct pcie_service_card *card = adapter->card; 1931 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1932 int ret = 0; 1933 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 1934 u32 wrptr; 1935 struct mwifiex_evt_buf_desc *desc; 1936 1937 if (!skb) 1938 return 0; 1939 1940 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 1941 mwifiex_dbg(adapter, ERROR, 1942 "event_complete: Invalid rdptr 0x%x\n", 1943 rdptr); 1944 return -EINVAL; 1945 } 1946 1947 /* Read the event ring write pointer set by firmware */ 1948 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 1949 mwifiex_dbg(adapter, ERROR, 1950 "event_complete: failed to read reg->evt_wrptr\n"); 1951 return -1; 1952 } 1953 1954 if (!card->evt_buf_list[rdptr]) { 1955 skb_push(skb, adapter->intf_hdr_len); 1956 skb_put(skb, MAX_EVENT_SIZE - skb->len); 1957 if (mwifiex_map_pci_memory(adapter, skb, 1958 MAX_EVENT_SIZE, 1959 PCI_DMA_FROMDEVICE)) 1960 return -1; 1961 card->evt_buf_list[rdptr] = skb; 1962 desc = card->evtbd_ring[rdptr]; 1963 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb); 1964 desc->len = (u16)skb->len; 1965 desc->flags = 0; 1966 skb = NULL; 1967 } else { 1968 mwifiex_dbg(adapter, ERROR, 1969 "info: ERROR: buf still valid at index %d, <%p, %p>\n", 1970 rdptr, card->evt_buf_list[rdptr], skb); 1971 } 1972 1973 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) { 1974 card->evtbd_rdptr = ((card->evtbd_rdptr & 1975 reg->evt_rollover_ind) ^ 1976 reg->evt_rollover_ind); 1977 } 1978 1979 mwifiex_dbg(adapter, EVENT, 1980 "info: Updated <Rd: 0x%x, Wr: 0x%x>", 1981 card->evtbd_rdptr, wrptr); 1982 1983 /* Write the event ring read pointer in to reg->evt_rdptr */ 1984 if (mwifiex_write_reg(adapter, reg->evt_rdptr, 1985 card->evtbd_rdptr)) { 1986 mwifiex_dbg(adapter, ERROR, 1987 "event_complete: failed to read reg->evt_rdptr\n"); 1988 return -1; 1989 } 1990 1991 mwifiex_dbg(adapter, EVENT, 1992 "info: Check Events Again\n"); 1993 ret = mwifiex_pcie_process_event_ready(adapter); 1994 1995 return ret; 1996 } 1997 1998 /* Combo firmware image is a combination of 1999 * (1) combo crc heaer, start with CMD5 2000 * (2) bluetooth image, start with CMD7, end with CMD6, data wrapped in CMD1. 2001 * (3) wifi image. 2002 * 2003 * This function bypass the header and bluetooth part, return 2004 * the offset of tail wifi-only part. If the image is already wifi-only, 2005 * that is start with CMD1, return 0. 2006 */ 2007 2008 static int mwifiex_extract_wifi_fw(struct mwifiex_adapter *adapter, 2009 const void *firmware, u32 firmware_len) { 2010 const struct mwifiex_fw_data *fwdata; 2011 u32 offset = 0, data_len, dnld_cmd; 2012 int ret = 0; 2013 bool cmd7_before = false, first_cmd = false; 2014 2015 while (1) { 2016 /* Check for integer and buffer overflow */ 2017 if (offset + sizeof(fwdata->header) < sizeof(fwdata->header) || 2018 offset + sizeof(fwdata->header) >= firmware_len) { 2019 mwifiex_dbg(adapter, ERROR, 2020 "extract wifi-only fw failure!\n"); 2021 ret = -1; 2022 goto done; 2023 } 2024 2025 fwdata = firmware + offset; 2026 dnld_cmd = le32_to_cpu(fwdata->header.dnld_cmd); 2027 data_len = le32_to_cpu(fwdata->header.data_length); 2028 2029 /* Skip past header */ 2030 offset += sizeof(fwdata->header); 2031 2032 switch (dnld_cmd) { 2033 case MWIFIEX_FW_DNLD_CMD_1: 2034 if (offset + data_len < data_len) { 2035 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2036 ret = -1; 2037 goto done; 2038 } 2039 2040 /* Image start with cmd1, already wifi-only firmware */ 2041 if (!first_cmd) { 2042 mwifiex_dbg(adapter, MSG, 2043 "input wifi-only firmware\n"); 2044 return 0; 2045 } 2046 2047 if (!cmd7_before) { 2048 mwifiex_dbg(adapter, ERROR, 2049 "no cmd7 before cmd1!\n"); 2050 ret = -1; 2051 goto done; 2052 } 2053 offset += data_len; 2054 break; 2055 case MWIFIEX_FW_DNLD_CMD_5: 2056 first_cmd = true; 2057 /* Check for integer overflow */ 2058 if (offset + data_len < data_len) { 2059 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2060 ret = -1; 2061 goto done; 2062 } 2063 offset += data_len; 2064 break; 2065 case MWIFIEX_FW_DNLD_CMD_6: 2066 first_cmd = true; 2067 /* Check for integer overflow */ 2068 if (offset + data_len < data_len) { 2069 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2070 ret = -1; 2071 goto done; 2072 } 2073 offset += data_len; 2074 if (offset >= firmware_len) { 2075 mwifiex_dbg(adapter, ERROR, 2076 "extract wifi-only fw failure!\n"); 2077 ret = -1; 2078 } else { 2079 ret = offset; 2080 } 2081 goto done; 2082 case MWIFIEX_FW_DNLD_CMD_7: 2083 first_cmd = true; 2084 cmd7_before = true; 2085 break; 2086 default: 2087 mwifiex_dbg(adapter, ERROR, "unknown dnld_cmd %d\n", 2088 dnld_cmd); 2089 ret = -1; 2090 goto done; 2091 } 2092 } 2093 2094 done: 2095 return ret; 2096 } 2097 2098 /* 2099 * This function downloads the firmware to the card. 2100 * 2101 * Firmware is downloaded to the card in blocks. Every block download 2102 * is tested for CRC errors, and retried a number of times before 2103 * returning failure. 2104 */ 2105 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter, 2106 struct mwifiex_fw_image *fw) 2107 { 2108 int ret; 2109 u8 *firmware = fw->fw_buf; 2110 u32 firmware_len = fw->fw_len; 2111 u32 offset = 0; 2112 struct sk_buff *skb; 2113 u32 txlen, tx_blocks = 0, tries, len, val; 2114 u32 block_retry_cnt = 0; 2115 struct pcie_service_card *card = adapter->card; 2116 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2117 2118 if (!firmware || !firmware_len) { 2119 mwifiex_dbg(adapter, ERROR, 2120 "No firmware image found! Terminating download\n"); 2121 return -1; 2122 } 2123 2124 mwifiex_dbg(adapter, INFO, 2125 "info: Downloading FW image (%d bytes)\n", 2126 firmware_len); 2127 2128 if (mwifiex_pcie_disable_host_int(adapter)) { 2129 mwifiex_dbg(adapter, ERROR, 2130 "%s: Disabling interrupts failed.\n", __func__); 2131 return -1; 2132 } 2133 2134 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 2135 if (!skb) { 2136 ret = -ENOMEM; 2137 goto done; 2138 } 2139 2140 ret = mwifiex_read_reg(adapter, PCIE_SCRATCH_13_REG, &val); 2141 if (ret) { 2142 mwifiex_dbg(adapter, FATAL, "Failed to read scratch register 13\n"); 2143 goto done; 2144 } 2145 2146 /* PCIE FLR case: extract wifi part from combo firmware*/ 2147 if (val == MWIFIEX_PCIE_FLR_HAPPENS) { 2148 ret = mwifiex_extract_wifi_fw(adapter, firmware, firmware_len); 2149 if (ret < 0) { 2150 mwifiex_dbg(adapter, ERROR, "Failed to extract wifi fw\n"); 2151 goto done; 2152 } 2153 offset = ret; 2154 mwifiex_dbg(adapter, MSG, 2155 "info: dnld wifi firmware from %d bytes\n", offset); 2156 } 2157 2158 /* Perform firmware data transfer */ 2159 do { 2160 u32 ireg_intr = 0; 2161 2162 /* More data? */ 2163 if (offset >= firmware_len) 2164 break; 2165 2166 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2167 ret = mwifiex_read_reg(adapter, reg->cmd_size, 2168 &len); 2169 if (ret) { 2170 mwifiex_dbg(adapter, FATAL, 2171 "Failed reading len from boot code\n"); 2172 goto done; 2173 } 2174 if (len) 2175 break; 2176 usleep_range(10, 20); 2177 } 2178 2179 if (!len) { 2180 break; 2181 } else if (len > MWIFIEX_UPLD_SIZE) { 2182 mwifiex_dbg(adapter, ERROR, 2183 "FW download failure @ %d, invalid length %d\n", 2184 offset, len); 2185 ret = -1; 2186 goto done; 2187 } 2188 2189 txlen = len; 2190 2191 if (len & BIT(0)) { 2192 block_retry_cnt++; 2193 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) { 2194 mwifiex_dbg(adapter, ERROR, 2195 "FW download failure @ %d, over max\t" 2196 "retry count\n", offset); 2197 ret = -1; 2198 goto done; 2199 } 2200 mwifiex_dbg(adapter, ERROR, 2201 "FW CRC error indicated by the\t" 2202 "helper: len = 0x%04X, txlen = %d\n", 2203 len, txlen); 2204 len &= ~BIT(0); 2205 /* Setting this to 0 to resend from same offset */ 2206 txlen = 0; 2207 } else { 2208 block_retry_cnt = 0; 2209 /* Set blocksize to transfer - checking for 2210 last block */ 2211 if (firmware_len - offset < txlen) 2212 txlen = firmware_len - offset; 2213 2214 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) / 2215 card->pcie.blksz_fw_dl; 2216 2217 /* Copy payload to buffer */ 2218 memmove(skb->data, &firmware[offset], txlen); 2219 } 2220 2221 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 2222 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl); 2223 2224 /* Send the boot command to device */ 2225 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) { 2226 mwifiex_dbg(adapter, ERROR, 2227 "Failed to send firmware download command\n"); 2228 ret = -1; 2229 goto done; 2230 } 2231 2232 /* Wait for the command done interrupt */ 2233 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2234 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS, 2235 &ireg_intr)) { 2236 mwifiex_dbg(adapter, ERROR, 2237 "%s: Failed to read\t" 2238 "interrupt status during fw dnld.\n", 2239 __func__); 2240 mwifiex_unmap_pci_memory(adapter, skb, 2241 PCI_DMA_TODEVICE); 2242 ret = -1; 2243 goto done; 2244 } 2245 if (!(ireg_intr & CPU_INTR_DOOR_BELL)) 2246 break; 2247 usleep_range(10, 20); 2248 } 2249 if (ireg_intr & CPU_INTR_DOOR_BELL) { 2250 mwifiex_dbg(adapter, ERROR, "%s: Card failed to ACK download\n", 2251 __func__); 2252 mwifiex_unmap_pci_memory(adapter, skb, 2253 PCI_DMA_TODEVICE); 2254 ret = -1; 2255 goto done; 2256 } 2257 2258 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 2259 2260 offset += txlen; 2261 } while (true); 2262 2263 mwifiex_dbg(adapter, MSG, 2264 "info: FW download over, size %d bytes\n", offset); 2265 2266 ret = 0; 2267 2268 done: 2269 dev_kfree_skb_any(skb); 2270 return ret; 2271 } 2272 2273 /* 2274 * This function checks the firmware status in card. 2275 */ 2276 static int 2277 mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num) 2278 { 2279 int ret = 0; 2280 u32 firmware_stat; 2281 struct pcie_service_card *card = adapter->card; 2282 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2283 u32 tries; 2284 2285 /* Mask spurios interrupts */ 2286 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK, 2287 HOST_INTR_MASK)) { 2288 mwifiex_dbg(adapter, ERROR, 2289 "Write register failed\n"); 2290 return -1; 2291 } 2292 2293 mwifiex_dbg(adapter, INFO, 2294 "Setting driver ready signature\n"); 2295 if (mwifiex_write_reg(adapter, reg->drv_rdy, 2296 FIRMWARE_READY_PCIE)) { 2297 mwifiex_dbg(adapter, ERROR, 2298 "Failed to write driver ready signature\n"); 2299 return -1; 2300 } 2301 2302 /* Wait for firmware initialization event */ 2303 for (tries = 0; tries < poll_num; tries++) { 2304 if (mwifiex_read_reg(adapter, reg->fw_status, 2305 &firmware_stat)) 2306 ret = -1; 2307 else 2308 ret = 0; 2309 2310 mwifiex_dbg(adapter, INFO, "Try %d if FW is ready <%d,%#x>", 2311 tries, ret, firmware_stat); 2312 2313 if (ret) 2314 continue; 2315 if (firmware_stat == FIRMWARE_READY_PCIE) { 2316 ret = 0; 2317 break; 2318 } else { 2319 msleep(100); 2320 ret = -1; 2321 } 2322 } 2323 2324 return ret; 2325 } 2326 2327 /* This function checks if WLAN is the winner. 2328 */ 2329 static int 2330 mwifiex_check_winner_status(struct mwifiex_adapter *adapter) 2331 { 2332 u32 winner = 0; 2333 int ret = 0; 2334 struct pcie_service_card *card = adapter->card; 2335 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2336 2337 if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) { 2338 ret = -1; 2339 } else if (!winner) { 2340 mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n"); 2341 adapter->winner = 1; 2342 } else { 2343 mwifiex_dbg(adapter, ERROR, 2344 "PCI-E is not the winner <%#x>", winner); 2345 } 2346 2347 return ret; 2348 } 2349 2350 /* 2351 * This function reads the interrupt status from card. 2352 */ 2353 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter, 2354 int msg_id) 2355 { 2356 u32 pcie_ireg; 2357 unsigned long flags; 2358 struct pcie_service_card *card = adapter->card; 2359 2360 if (card->msi_enable) { 2361 spin_lock_irqsave(&adapter->int_lock, flags); 2362 adapter->int_status = 1; 2363 spin_unlock_irqrestore(&adapter->int_lock, flags); 2364 return; 2365 } 2366 2367 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 2368 return; 2369 2370 if (card->msix_enable && msg_id >= 0) { 2371 pcie_ireg = BIT(msg_id); 2372 } else { 2373 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2374 &pcie_ireg)) { 2375 mwifiex_dbg(adapter, ERROR, "Read register failed\n"); 2376 return; 2377 } 2378 2379 if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg) 2380 return; 2381 2382 2383 mwifiex_pcie_disable_host_int(adapter); 2384 2385 /* Clear the pending interrupts */ 2386 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS, 2387 ~pcie_ireg)) { 2388 mwifiex_dbg(adapter, ERROR, 2389 "Write register failed\n"); 2390 return; 2391 } 2392 } 2393 2394 if (!adapter->pps_uapsd_mode && 2395 adapter->ps_state == PS_STATE_SLEEP && 2396 mwifiex_pcie_ok_to_access_hw(adapter)) { 2397 /* Potentially for PCIe we could get other 2398 * interrupts like shared. Don't change power 2399 * state until cookie is set 2400 */ 2401 adapter->ps_state = PS_STATE_AWAKE; 2402 adapter->pm_wakeup_fw_try = false; 2403 del_timer(&adapter->wakeup_timer); 2404 } 2405 2406 spin_lock_irqsave(&adapter->int_lock, flags); 2407 adapter->int_status |= pcie_ireg; 2408 spin_unlock_irqrestore(&adapter->int_lock, flags); 2409 mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg); 2410 } 2411 2412 /* 2413 * Interrupt handler for PCIe root port 2414 * 2415 * This function reads the interrupt status from firmware and assigns 2416 * the main process in workqueue which will handle the interrupt. 2417 */ 2418 static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context) 2419 { 2420 struct mwifiex_msix_context *ctx = context; 2421 struct pci_dev *pdev = ctx->dev; 2422 struct pcie_service_card *card; 2423 struct mwifiex_adapter *adapter; 2424 2425 card = pci_get_drvdata(pdev); 2426 2427 if (!card->adapter) { 2428 pr_err("info: %s: card=%p adapter=%p\n", __func__, card, 2429 card ? card->adapter : NULL); 2430 goto exit; 2431 } 2432 adapter = card->adapter; 2433 2434 if (test_bit(MWIFIEX_SURPRISE_REMOVED, &adapter->work_flags)) 2435 goto exit; 2436 2437 if (card->msix_enable) 2438 mwifiex_interrupt_status(adapter, ctx->msg_id); 2439 else 2440 mwifiex_interrupt_status(adapter, -1); 2441 2442 mwifiex_queue_main_work(adapter); 2443 2444 exit: 2445 return IRQ_HANDLED; 2446 } 2447 2448 /* 2449 * This function checks the current interrupt status. 2450 * 2451 * The following interrupts are checked and handled by this function - 2452 * - Data sent 2453 * - Command sent 2454 * - Command received 2455 * - Packets received 2456 * - Events received 2457 * 2458 * In case of Rx packets received, the packets are uploaded from card to 2459 * host and processed accordingly. 2460 */ 2461 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter) 2462 { 2463 int ret; 2464 u32 pcie_ireg = 0; 2465 unsigned long flags; 2466 struct pcie_service_card *card = adapter->card; 2467 2468 spin_lock_irqsave(&adapter->int_lock, flags); 2469 if (!card->msi_enable) { 2470 /* Clear out unused interrupts */ 2471 pcie_ireg = adapter->int_status; 2472 } 2473 adapter->int_status = 0; 2474 spin_unlock_irqrestore(&adapter->int_lock, flags); 2475 2476 if (card->msi_enable) { 2477 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 2478 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2479 &pcie_ireg)) { 2480 mwifiex_dbg(adapter, ERROR, 2481 "Read register failed\n"); 2482 return -1; 2483 } 2484 2485 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) { 2486 if (mwifiex_write_reg(adapter, 2487 PCIE_HOST_INT_STATUS, 2488 ~pcie_ireg)) { 2489 mwifiex_dbg(adapter, ERROR, 2490 "Write register failed\n"); 2491 return -1; 2492 } 2493 if (!adapter->pps_uapsd_mode && 2494 adapter->ps_state == PS_STATE_SLEEP) { 2495 adapter->ps_state = PS_STATE_AWAKE; 2496 adapter->pm_wakeup_fw_try = false; 2497 del_timer(&adapter->wakeup_timer); 2498 } 2499 } 2500 } 2501 } 2502 2503 if (pcie_ireg & HOST_INTR_DNLD_DONE) { 2504 mwifiex_dbg(adapter, INTR, "info: TX DNLD Done\n"); 2505 ret = mwifiex_pcie_send_data_complete(adapter); 2506 if (ret) 2507 return ret; 2508 } 2509 if (pcie_ireg & HOST_INTR_UPLD_RDY) { 2510 mwifiex_dbg(adapter, INTR, "info: Rx DATA\n"); 2511 ret = mwifiex_pcie_process_recv_data(adapter); 2512 if (ret) 2513 return ret; 2514 } 2515 if (pcie_ireg & HOST_INTR_EVENT_RDY) { 2516 mwifiex_dbg(adapter, INTR, "info: Rx EVENT\n"); 2517 ret = mwifiex_pcie_process_event_ready(adapter); 2518 if (ret) 2519 return ret; 2520 } 2521 if (pcie_ireg & HOST_INTR_CMD_DONE) { 2522 if (adapter->cmd_sent) { 2523 mwifiex_dbg(adapter, INTR, 2524 "info: CMD sent Interrupt\n"); 2525 adapter->cmd_sent = false; 2526 } 2527 /* Handle command response */ 2528 ret = mwifiex_pcie_process_cmd_complete(adapter); 2529 if (ret) 2530 return ret; 2531 } 2532 2533 mwifiex_dbg(adapter, INTR, 2534 "info: cmd_sent=%d data_sent=%d\n", 2535 adapter->cmd_sent, adapter->data_sent); 2536 if (!card->msi_enable && !card->msix_enable && 2537 adapter->ps_state != PS_STATE_SLEEP) 2538 mwifiex_pcie_enable_host_int(adapter); 2539 2540 return 0; 2541 } 2542 2543 /* 2544 * This function downloads data from driver to card. 2545 * 2546 * Both commands and data packets are transferred to the card by this 2547 * function. 2548 * 2549 * This function adds the PCIE specific header to the front of the buffer 2550 * before transferring. The header contains the length of the packet and 2551 * the type. The firmware handles the packets based upon this set type. 2552 */ 2553 static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type, 2554 struct sk_buff *skb, 2555 struct mwifiex_tx_param *tx_param) 2556 { 2557 if (!skb) { 2558 mwifiex_dbg(adapter, ERROR, 2559 "Passed NULL skb to %s\n", __func__); 2560 return -1; 2561 } 2562 2563 if (type == MWIFIEX_TYPE_DATA) 2564 return mwifiex_pcie_send_data(adapter, skb, tx_param); 2565 else if (type == MWIFIEX_TYPE_CMD) 2566 return mwifiex_pcie_send_cmd(adapter, skb); 2567 2568 return 0; 2569 } 2570 2571 /* Function to dump PCIE scratch registers in case of FW crash 2572 */ 2573 static int 2574 mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf) 2575 { 2576 char *p = drv_buf; 2577 char buf[256], *ptr; 2578 int i; 2579 u32 value; 2580 struct pcie_service_card *card = adapter->card; 2581 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2582 int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG, 2583 PCIE_SCRATCH_14_REG, 2584 PCIE_SCRATCH_15_REG}; 2585 2586 if (!p) 2587 return 0; 2588 2589 mwifiex_dbg(adapter, MSG, "PCIE register dump start\n"); 2590 2591 if (mwifiex_read_reg(adapter, reg->fw_status, &value)) { 2592 mwifiex_dbg(adapter, ERROR, "failed to read firmware status"); 2593 return 0; 2594 } 2595 2596 ptr = buf; 2597 mwifiex_dbg(adapter, MSG, "pcie scratch register:"); 2598 for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) { 2599 mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value); 2600 ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n", 2601 pcie_scratch_reg[i], value); 2602 } 2603 2604 mwifiex_dbg(adapter, MSG, "%s\n", buf); 2605 p += sprintf(p, "%s\n", buf); 2606 2607 mwifiex_dbg(adapter, MSG, "PCIE register dump end\n"); 2608 2609 return p - drv_buf; 2610 } 2611 2612 /* This function read/write firmware */ 2613 static enum rdwr_status 2614 mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag) 2615 { 2616 int ret, tries; 2617 u8 ctrl_data; 2618 u32 fw_status; 2619 struct pcie_service_card *card = adapter->card; 2620 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2621 2622 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) 2623 return RDWR_STATUS_FAILURE; 2624 2625 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2626 reg->fw_dump_host_ready); 2627 if (ret) { 2628 mwifiex_dbg(adapter, ERROR, 2629 "PCIE write err\n"); 2630 return RDWR_STATUS_FAILURE; 2631 } 2632 2633 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2634 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data); 2635 if (ctrl_data == FW_DUMP_DONE) 2636 return RDWR_STATUS_SUCCESS; 2637 if (doneflag && ctrl_data == doneflag) 2638 return RDWR_STATUS_DONE; 2639 if (ctrl_data != reg->fw_dump_host_ready) { 2640 mwifiex_dbg(adapter, WARN, 2641 "The ctrl reg was changed, re-try again!\n"); 2642 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2643 reg->fw_dump_host_ready); 2644 if (ret) { 2645 mwifiex_dbg(adapter, ERROR, 2646 "PCIE write err\n"); 2647 return RDWR_STATUS_FAILURE; 2648 } 2649 } 2650 usleep_range(100, 200); 2651 } 2652 2653 mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n"); 2654 return RDWR_STATUS_FAILURE; 2655 } 2656 2657 /* This function dump firmware memory to file */ 2658 static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter) 2659 { 2660 struct pcie_service_card *card = adapter->card; 2661 const struct mwifiex_pcie_card_reg *creg = card->pcie.reg; 2662 unsigned int reg, reg_start, reg_end; 2663 u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num; 2664 u8 idx, i, read_reg, doneflag = 0; 2665 enum rdwr_status stat; 2666 u32 memory_size; 2667 int ret; 2668 2669 if (!card->pcie.can_dump_fw) 2670 return; 2671 2672 for (idx = 0; idx < adapter->num_mem_types; idx++) { 2673 struct memory_type_mapping *entry = 2674 &adapter->mem_type_mapping_tbl[idx]; 2675 2676 if (entry->mem_ptr) { 2677 vfree(entry->mem_ptr); 2678 entry->mem_ptr = NULL; 2679 } 2680 entry->mem_size = 0; 2681 } 2682 2683 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n"); 2684 2685 /* Read the number of the memories which will dump */ 2686 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2687 if (stat == RDWR_STATUS_FAILURE) 2688 return; 2689 2690 reg = creg->fw_dump_start; 2691 mwifiex_read_reg_byte(adapter, reg, &fw_dump_num); 2692 2693 /* W8997 chipset firmware dump will be restore in single region*/ 2694 if (fw_dump_num == 0) 2695 dump_num = 1; 2696 else 2697 dump_num = fw_dump_num; 2698 2699 /* Read the length of every memory which will dump */ 2700 for (idx = 0; idx < dump_num; idx++) { 2701 struct memory_type_mapping *entry = 2702 &adapter->mem_type_mapping_tbl[idx]; 2703 memory_size = 0; 2704 if (fw_dump_num != 0) { 2705 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2706 if (stat == RDWR_STATUS_FAILURE) 2707 return; 2708 2709 reg = creg->fw_dump_start; 2710 for (i = 0; i < 4; i++) { 2711 mwifiex_read_reg_byte(adapter, reg, &read_reg); 2712 memory_size |= (read_reg << (i * 8)); 2713 reg++; 2714 } 2715 } else { 2716 memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE; 2717 } 2718 2719 if (memory_size == 0) { 2720 mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n"); 2721 ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl, 2722 creg->fw_dump_read_done); 2723 if (ret) { 2724 mwifiex_dbg(adapter, ERROR, "PCIE write err\n"); 2725 return; 2726 } 2727 break; 2728 } 2729 2730 mwifiex_dbg(adapter, DUMP, 2731 "%s_SIZE=0x%x\n", entry->mem_name, memory_size); 2732 entry->mem_ptr = vmalloc(memory_size + 1); 2733 entry->mem_size = memory_size; 2734 if (!entry->mem_ptr) { 2735 mwifiex_dbg(adapter, ERROR, 2736 "Vmalloc %s failed\n", entry->mem_name); 2737 return; 2738 } 2739 dbg_ptr = entry->mem_ptr; 2740 end_ptr = dbg_ptr + memory_size; 2741 2742 doneflag = entry->done_flag; 2743 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n", 2744 entry->mem_name); 2745 2746 do { 2747 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2748 if (RDWR_STATUS_FAILURE == stat) 2749 return; 2750 2751 reg_start = creg->fw_dump_start; 2752 reg_end = creg->fw_dump_end; 2753 for (reg = reg_start; reg <= reg_end; reg++) { 2754 mwifiex_read_reg_byte(adapter, reg, dbg_ptr); 2755 if (dbg_ptr < end_ptr) { 2756 dbg_ptr++; 2757 continue; 2758 } 2759 mwifiex_dbg(adapter, ERROR, 2760 "pre-allocated buf not enough\n"); 2761 tmp_ptr = 2762 vzalloc(memory_size + MWIFIEX_SIZE_4K); 2763 if (!tmp_ptr) 2764 return; 2765 memcpy(tmp_ptr, entry->mem_ptr, memory_size); 2766 vfree(entry->mem_ptr); 2767 entry->mem_ptr = tmp_ptr; 2768 tmp_ptr = NULL; 2769 dbg_ptr = entry->mem_ptr + memory_size; 2770 memory_size += MWIFIEX_SIZE_4K; 2771 end_ptr = entry->mem_ptr + memory_size; 2772 } 2773 2774 if (stat != RDWR_STATUS_DONE) 2775 continue; 2776 2777 mwifiex_dbg(adapter, DUMP, 2778 "%s done: size=0x%tx\n", 2779 entry->mem_name, dbg_ptr - entry->mem_ptr); 2780 break; 2781 } while (true); 2782 } 2783 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n"); 2784 } 2785 2786 static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter) 2787 { 2788 adapter->devdump_data = vzalloc(MWIFIEX_FW_DUMP_SIZE); 2789 if (!adapter->devdump_data) { 2790 mwifiex_dbg(adapter, ERROR, 2791 "vzalloc devdump data failure!\n"); 2792 return; 2793 } 2794 2795 mwifiex_drv_info_dump(adapter); 2796 mwifiex_pcie_fw_dump(adapter); 2797 mwifiex_prepare_fw_dump_info(adapter); 2798 mwifiex_upload_device_dump(adapter); 2799 } 2800 2801 static void mwifiex_pcie_card_reset_work(struct mwifiex_adapter *adapter) 2802 { 2803 struct pcie_service_card *card = adapter->card; 2804 2805 /* We can't afford to wait here; remove() might be waiting on us. If we 2806 * can't grab the device lock, maybe we'll get another chance later. 2807 */ 2808 pci_try_reset_function(card->dev); 2809 } 2810 2811 static void mwifiex_pcie_work(struct work_struct *work) 2812 { 2813 struct pcie_service_card *card = 2814 container_of(work, struct pcie_service_card, work); 2815 2816 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 2817 &card->work_flags)) 2818 mwifiex_pcie_device_dump_work(card->adapter); 2819 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, 2820 &card->work_flags)) 2821 mwifiex_pcie_card_reset_work(card->adapter); 2822 } 2823 2824 /* This function dumps FW information */ 2825 static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter) 2826 { 2827 struct pcie_service_card *card = adapter->card; 2828 2829 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 2830 &card->work_flags)) 2831 schedule_work(&card->work); 2832 } 2833 2834 static void mwifiex_pcie_card_reset(struct mwifiex_adapter *adapter) 2835 { 2836 struct pcie_service_card *card = adapter->card; 2837 2838 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags)) 2839 schedule_work(&card->work); 2840 } 2841 2842 static int mwifiex_pcie_alloc_buffers(struct mwifiex_adapter *adapter) 2843 { 2844 struct pcie_service_card *card = adapter->card; 2845 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2846 int ret; 2847 2848 card->cmdrsp_buf = NULL; 2849 ret = mwifiex_pcie_create_txbd_ring(adapter); 2850 if (ret) { 2851 mwifiex_dbg(adapter, ERROR, "Failed to create txbd ring\n"); 2852 goto err_cre_txbd; 2853 } 2854 2855 ret = mwifiex_pcie_create_rxbd_ring(adapter); 2856 if (ret) { 2857 mwifiex_dbg(adapter, ERROR, "Failed to create rxbd ring\n"); 2858 goto err_cre_rxbd; 2859 } 2860 2861 ret = mwifiex_pcie_create_evtbd_ring(adapter); 2862 if (ret) { 2863 mwifiex_dbg(adapter, ERROR, "Failed to create evtbd ring\n"); 2864 goto err_cre_evtbd; 2865 } 2866 2867 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter); 2868 if (ret) { 2869 mwifiex_dbg(adapter, ERROR, "Failed to allocate cmdbuf buffer\n"); 2870 goto err_alloc_cmdbuf; 2871 } 2872 2873 if (reg->sleep_cookie) { 2874 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter); 2875 if (ret) { 2876 mwifiex_dbg(adapter, ERROR, "Failed to allocate sleep_cookie buffer\n"); 2877 goto err_alloc_cookie; 2878 } 2879 } else { 2880 card->sleep_cookie_vbase = NULL; 2881 } 2882 2883 return 0; 2884 2885 err_alloc_cookie: 2886 mwifiex_pcie_delete_cmdrsp_buf(adapter); 2887 err_alloc_cmdbuf: 2888 mwifiex_pcie_delete_evtbd_ring(adapter); 2889 err_cre_evtbd: 2890 mwifiex_pcie_delete_rxbd_ring(adapter); 2891 err_cre_rxbd: 2892 mwifiex_pcie_delete_txbd_ring(adapter); 2893 err_cre_txbd: 2894 return ret; 2895 } 2896 2897 static void mwifiex_pcie_free_buffers(struct mwifiex_adapter *adapter) 2898 { 2899 struct pcie_service_card *card = adapter->card; 2900 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2901 2902 if (reg->sleep_cookie) 2903 mwifiex_pcie_delete_sleep_cookie_buf(adapter); 2904 2905 mwifiex_pcie_delete_cmdrsp_buf(adapter); 2906 mwifiex_pcie_delete_evtbd_ring(adapter); 2907 mwifiex_pcie_delete_rxbd_ring(adapter); 2908 mwifiex_pcie_delete_txbd_ring(adapter); 2909 } 2910 2911 /* 2912 * This function initializes the PCI-E host memory space, WCB rings, etc. 2913 */ 2914 static int mwifiex_init_pcie(struct mwifiex_adapter *adapter) 2915 { 2916 struct pcie_service_card *card = adapter->card; 2917 int ret; 2918 struct pci_dev *pdev = card->dev; 2919 2920 pci_set_drvdata(pdev, card); 2921 2922 ret = pci_enable_device(pdev); 2923 if (ret) 2924 goto err_enable_dev; 2925 2926 pci_set_master(pdev); 2927 2928 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2929 if (ret) { 2930 pr_err("set_dma_mask(32) failed: %d\n", ret); 2931 goto err_set_dma_mask; 2932 } 2933 2934 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 2935 if (ret) { 2936 pr_err("set_consistent_dma_mask(64) failed\n"); 2937 goto err_set_dma_mask; 2938 } 2939 2940 ret = pci_request_region(pdev, 0, DRV_NAME); 2941 if (ret) { 2942 pr_err("req_reg(0) error\n"); 2943 goto err_req_region0; 2944 } 2945 card->pci_mmap = pci_iomap(pdev, 0, 0); 2946 if (!card->pci_mmap) { 2947 pr_err("iomap(0) error\n"); 2948 ret = -EIO; 2949 goto err_iomap0; 2950 } 2951 ret = pci_request_region(pdev, 2, DRV_NAME); 2952 if (ret) { 2953 pr_err("req_reg(2) error\n"); 2954 goto err_req_region2; 2955 } 2956 card->pci_mmap1 = pci_iomap(pdev, 2, 0); 2957 if (!card->pci_mmap1) { 2958 pr_err("iomap(2) error\n"); 2959 ret = -EIO; 2960 goto err_iomap2; 2961 } 2962 2963 pr_notice("PCI memory map Virt0: %pK PCI memory map Virt2: %pK\n", 2964 card->pci_mmap, card->pci_mmap1); 2965 2966 ret = mwifiex_pcie_alloc_buffers(adapter); 2967 if (ret) 2968 goto err_alloc_buffers; 2969 2970 return 0; 2971 2972 err_alloc_buffers: 2973 pci_iounmap(pdev, card->pci_mmap1); 2974 err_iomap2: 2975 pci_release_region(pdev, 2); 2976 err_req_region2: 2977 pci_iounmap(pdev, card->pci_mmap); 2978 err_iomap0: 2979 pci_release_region(pdev, 0); 2980 err_req_region0: 2981 err_set_dma_mask: 2982 pci_disable_device(pdev); 2983 err_enable_dev: 2984 return ret; 2985 } 2986 2987 /* 2988 * This function cleans up the allocated card buffers. 2989 */ 2990 static void mwifiex_cleanup_pcie(struct mwifiex_adapter *adapter) 2991 { 2992 struct pcie_service_card *card = adapter->card; 2993 struct pci_dev *pdev = card->dev; 2994 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2995 int ret; 2996 u32 fw_status; 2997 2998 cancel_work_sync(&card->work); 2999 3000 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status); 3001 if (fw_status == FIRMWARE_READY_PCIE) { 3002 mwifiex_dbg(adapter, INFO, 3003 "Clearing driver ready signature\n"); 3004 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 3005 mwifiex_dbg(adapter, ERROR, 3006 "Failed to write driver not-ready signature\n"); 3007 } 3008 3009 pci_disable_device(pdev); 3010 3011 pci_iounmap(pdev, card->pci_mmap); 3012 pci_iounmap(pdev, card->pci_mmap1); 3013 pci_release_region(pdev, 2); 3014 pci_release_region(pdev, 0); 3015 3016 mwifiex_pcie_free_buffers(adapter); 3017 } 3018 3019 static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter) 3020 { 3021 int ret, i, j; 3022 struct pcie_service_card *card = adapter->card; 3023 struct pci_dev *pdev = card->dev; 3024 3025 if (card->pcie.reg->msix_support) { 3026 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3027 card->msix_entries[i].entry = i; 3028 ret = pci_enable_msix_exact(pdev, card->msix_entries, 3029 MWIFIEX_NUM_MSIX_VECTORS); 3030 if (!ret) { 3031 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) { 3032 card->msix_ctx[i].dev = pdev; 3033 card->msix_ctx[i].msg_id = i; 3034 3035 ret = request_irq(card->msix_entries[i].vector, 3036 mwifiex_pcie_interrupt, 0, 3037 "MWIFIEX_PCIE_MSIX", 3038 &card->msix_ctx[i]); 3039 if (ret) 3040 break; 3041 } 3042 3043 if (ret) { 3044 mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n", 3045 ret); 3046 for (j = 0; j < i; j++) 3047 free_irq(card->msix_entries[j].vector, 3048 &card->msix_ctx[i]); 3049 pci_disable_msix(pdev); 3050 } else { 3051 mwifiex_dbg(adapter, MSG, "MSIx enabled!"); 3052 card->msix_enable = 1; 3053 return 0; 3054 } 3055 } 3056 } 3057 3058 if (pci_enable_msi(pdev) != 0) 3059 pci_disable_msi(pdev); 3060 else 3061 card->msi_enable = 1; 3062 3063 mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable); 3064 3065 card->share_irq_ctx.dev = pdev; 3066 card->share_irq_ctx.msg_id = -1; 3067 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED, 3068 "MRVL_PCIE", &card->share_irq_ctx); 3069 if (ret) { 3070 pr_err("request_irq failed: ret=%d\n", ret); 3071 return -1; 3072 } 3073 3074 return 0; 3075 } 3076 3077 /* 3078 * This function gets the firmware name for downloading by revision id 3079 * 3080 * Read revision id register to get revision id 3081 */ 3082 static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter) 3083 { 3084 int revision_id = 0; 3085 int version, magic; 3086 struct pcie_service_card *card = adapter->card; 3087 3088 switch (card->dev->device) { 3089 case PCIE_DEVICE_ID_MARVELL_88W8766P: 3090 strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME); 3091 break; 3092 case PCIE_DEVICE_ID_MARVELL_88W8897: 3093 mwifiex_write_reg(adapter, 0x0c58, 0x80c00000); 3094 mwifiex_read_reg(adapter, 0x0c58, &revision_id); 3095 revision_id &= 0xff00; 3096 switch (revision_id) { 3097 case PCIE8897_A0: 3098 strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME); 3099 break; 3100 case PCIE8897_B0: 3101 strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME); 3102 break; 3103 default: 3104 strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME); 3105 3106 break; 3107 } 3108 break; 3109 case PCIE_DEVICE_ID_MARVELL_88W8997: 3110 mwifiex_read_reg(adapter, 0x8, &revision_id); 3111 mwifiex_read_reg(adapter, 0x0cd0, &version); 3112 mwifiex_read_reg(adapter, 0x0cd4, &magic); 3113 revision_id &= 0xff; 3114 version &= 0x7; 3115 magic &= 0xff; 3116 if (revision_id == PCIE8997_A1 && 3117 magic == CHIP_MAGIC_VALUE && 3118 version == CHIP_VER_PCIEUART) 3119 strcpy(adapter->fw_name, PCIEUART8997_FW_NAME_V4); 3120 else 3121 strcpy(adapter->fw_name, PCIEUSB8997_FW_NAME_V4); 3122 break; 3123 default: 3124 break; 3125 } 3126 } 3127 3128 /* 3129 * This function registers the PCIE device. 3130 * 3131 * PCIE IRQ is claimed, block size is set and driver data is initialized. 3132 */ 3133 static int mwifiex_register_dev(struct mwifiex_adapter *adapter) 3134 { 3135 struct pcie_service_card *card = adapter->card; 3136 3137 /* save adapter pointer in card */ 3138 card->adapter = adapter; 3139 3140 if (mwifiex_pcie_request_irq(adapter)) 3141 return -1; 3142 3143 adapter->tx_buf_size = card->pcie.tx_buf_size; 3144 adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl; 3145 adapter->num_mem_types = card->pcie.num_mem_types; 3146 adapter->ext_scan = card->pcie.can_ext_scan; 3147 mwifiex_pcie_get_fw_name(adapter); 3148 3149 return 0; 3150 } 3151 3152 /* 3153 * This function unregisters the PCIE device. 3154 * 3155 * The PCIE IRQ is released, the function is disabled and driver 3156 * data is set to null. 3157 */ 3158 static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter) 3159 { 3160 struct pcie_service_card *card = adapter->card; 3161 struct pci_dev *pdev = card->dev; 3162 int i; 3163 3164 if (card->msix_enable) { 3165 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3166 synchronize_irq(card->msix_entries[i].vector); 3167 3168 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3169 free_irq(card->msix_entries[i].vector, 3170 &card->msix_ctx[i]); 3171 3172 card->msix_enable = 0; 3173 pci_disable_msix(pdev); 3174 } else { 3175 mwifiex_dbg(adapter, INFO, 3176 "%s(): calling free_irq()\n", __func__); 3177 free_irq(card->dev->irq, &card->share_irq_ctx); 3178 3179 if (card->msi_enable) 3180 pci_disable_msi(pdev); 3181 } 3182 card->adapter = NULL; 3183 } 3184 3185 /* 3186 * This function initializes the PCI-E host memory space, WCB rings, etc., 3187 * similar to mwifiex_init_pcie(), but without resetting PCI-E state. 3188 */ 3189 static void mwifiex_pcie_up_dev(struct mwifiex_adapter *adapter) 3190 { 3191 struct pcie_service_card *card = adapter->card; 3192 struct pci_dev *pdev = card->dev; 3193 3194 /* tx_buf_size might be changed to 3584 by firmware during 3195 * data transfer, we should reset it to default size. 3196 */ 3197 adapter->tx_buf_size = card->pcie.tx_buf_size; 3198 3199 mwifiex_pcie_alloc_buffers(adapter); 3200 3201 pci_set_master(pdev); 3202 } 3203 3204 /* This function cleans up the PCI-E host memory space. */ 3205 static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter) 3206 { 3207 struct pcie_service_card *card = adapter->card; 3208 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 3209 struct pci_dev *pdev = card->dev; 3210 3211 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 3212 mwifiex_dbg(adapter, ERROR, "Failed to write driver not-ready signature\n"); 3213 3214 pci_clear_master(pdev); 3215 3216 adapter->seq_num = 0; 3217 3218 mwifiex_pcie_free_buffers(adapter); 3219 } 3220 3221 static struct mwifiex_if_ops pcie_ops = { 3222 .init_if = mwifiex_init_pcie, 3223 .cleanup_if = mwifiex_cleanup_pcie, 3224 .check_fw_status = mwifiex_check_fw_status, 3225 .check_winner_status = mwifiex_check_winner_status, 3226 .prog_fw = mwifiex_prog_fw_w_helper, 3227 .register_dev = mwifiex_register_dev, 3228 .unregister_dev = mwifiex_unregister_dev, 3229 .enable_int = mwifiex_pcie_enable_host_int, 3230 .disable_int = mwifiex_pcie_disable_host_int_noerr, 3231 .process_int_status = mwifiex_process_int_status, 3232 .host_to_card = mwifiex_pcie_host_to_card, 3233 .wakeup = mwifiex_pm_wakeup_card, 3234 .wakeup_complete = mwifiex_pm_wakeup_card_complete, 3235 3236 /* PCIE specific */ 3237 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete, 3238 .event_complete = mwifiex_pcie_event_complete, 3239 .update_mp_end_port = NULL, 3240 .cleanup_mpa_buf = NULL, 3241 .init_fw_port = mwifiex_pcie_init_fw_port, 3242 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf, 3243 .card_reset = mwifiex_pcie_card_reset, 3244 .reg_dump = mwifiex_pcie_reg_dump, 3245 .device_dump = mwifiex_pcie_device_dump, 3246 .down_dev = mwifiex_pcie_down_dev, 3247 .up_dev = mwifiex_pcie_up_dev, 3248 }; 3249 3250 module_pci_driver(mwifiex_pcie); 3251 3252 MODULE_AUTHOR("Marvell International Ltd."); 3253 MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION); 3254 MODULE_VERSION(PCIE_VERSION); 3255 MODULE_LICENSE("GPL v2"); 3256