1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * NXP Wireless LAN device driver: PCIE specific handling
4  *
5  * Copyright 2011-2020 NXP
6  */
7 
8 #include <linux/iopoll.h>
9 #include <linux/firmware.h>
10 
11 #include "decl.h"
12 #include "ioctl.h"
13 #include "util.h"
14 #include "fw.h"
15 #include "main.h"
16 #include "wmm.h"
17 #include "11n.h"
18 #include "pcie.h"
19 #include "pcie_quirks.h"
20 
21 #define PCIE_VERSION	"1.0"
22 #define DRV_NAME        "Marvell mwifiex PCIe"
23 
24 static struct mwifiex_if_ops pcie_ops;
25 
26 static const struct mwifiex_pcie_card_reg mwifiex_reg_8766 = {
27 	.cmd_addr_lo = PCIE_SCRATCH_0_REG,
28 	.cmd_addr_hi = PCIE_SCRATCH_1_REG,
29 	.cmd_size = PCIE_SCRATCH_2_REG,
30 	.fw_status = PCIE_SCRATCH_3_REG,
31 	.cmdrsp_addr_lo = PCIE_SCRATCH_4_REG,
32 	.cmdrsp_addr_hi = PCIE_SCRATCH_5_REG,
33 	.tx_rdptr = PCIE_SCRATCH_6_REG,
34 	.tx_wrptr = PCIE_SCRATCH_7_REG,
35 	.rx_rdptr = PCIE_SCRATCH_8_REG,
36 	.rx_wrptr = PCIE_SCRATCH_9_REG,
37 	.evt_rdptr = PCIE_SCRATCH_10_REG,
38 	.evt_wrptr = PCIE_SCRATCH_11_REG,
39 	.drv_rdy = PCIE_SCRATCH_12_REG,
40 	.tx_start_ptr = 0,
41 	.tx_mask = MWIFIEX_TXBD_MASK,
42 	.tx_wrap_mask = 0,
43 	.rx_mask = MWIFIEX_RXBD_MASK,
44 	.rx_wrap_mask = 0,
45 	.tx_rollover_ind = MWIFIEX_BD_FLAG_ROLLOVER_IND,
46 	.rx_rollover_ind = MWIFIEX_BD_FLAG_ROLLOVER_IND,
47 	.evt_rollover_ind = MWIFIEX_BD_FLAG_ROLLOVER_IND,
48 	.ring_flag_sop = 0,
49 	.ring_flag_eop = 0,
50 	.ring_flag_xs_sop = 0,
51 	.ring_flag_xs_eop = 0,
52 	.ring_tx_start_ptr = 0,
53 	.pfu_enabled = 0,
54 	.sleep_cookie = 1,
55 	.msix_support = 0,
56 };
57 
58 static const struct mwifiex_pcie_card_reg mwifiex_reg_8897 = {
59 	.cmd_addr_lo = PCIE_SCRATCH_0_REG,
60 	.cmd_addr_hi = PCIE_SCRATCH_1_REG,
61 	.cmd_size = PCIE_SCRATCH_2_REG,
62 	.fw_status = PCIE_SCRATCH_3_REG,
63 	.cmdrsp_addr_lo = PCIE_SCRATCH_4_REG,
64 	.cmdrsp_addr_hi = PCIE_SCRATCH_5_REG,
65 	.tx_rdptr = PCIE_RD_DATA_PTR_Q0_Q1,
66 	.tx_wrptr = PCIE_WR_DATA_PTR_Q0_Q1,
67 	.rx_rdptr = PCIE_WR_DATA_PTR_Q0_Q1,
68 	.rx_wrptr = PCIE_RD_DATA_PTR_Q0_Q1,
69 	.evt_rdptr = PCIE_SCRATCH_10_REG,
70 	.evt_wrptr = PCIE_SCRATCH_11_REG,
71 	.drv_rdy = PCIE_SCRATCH_12_REG,
72 	.tx_start_ptr = 16,
73 	.tx_mask = 0x03FF0000,
74 	.tx_wrap_mask = 0x07FF0000,
75 	.rx_mask = 0x000003FF,
76 	.rx_wrap_mask = 0x000007FF,
77 	.tx_rollover_ind = MWIFIEX_BD_FLAG_TX_ROLLOVER_IND,
78 	.rx_rollover_ind = MWIFIEX_BD_FLAG_RX_ROLLOVER_IND,
79 	.evt_rollover_ind = MWIFIEX_BD_FLAG_EVT_ROLLOVER_IND,
80 	.ring_flag_sop = MWIFIEX_BD_FLAG_SOP,
81 	.ring_flag_eop = MWIFIEX_BD_FLAG_EOP,
82 	.ring_flag_xs_sop = MWIFIEX_BD_FLAG_XS_SOP,
83 	.ring_flag_xs_eop = MWIFIEX_BD_FLAG_XS_EOP,
84 	.ring_tx_start_ptr = MWIFIEX_BD_FLAG_TX_START_PTR,
85 	.pfu_enabled = 1,
86 	.sleep_cookie = 0,
87 	.fw_dump_ctrl = PCIE_SCRATCH_13_REG,
88 	.fw_dump_start = PCIE_SCRATCH_14_REG,
89 	.fw_dump_end = 0xcff,
90 	.fw_dump_host_ready = 0xee,
91 	.fw_dump_read_done = 0xfe,
92 	.msix_support = 0,
93 };
94 
95 static const struct mwifiex_pcie_card_reg mwifiex_reg_8997 = {
96 	.cmd_addr_lo = PCIE_SCRATCH_0_REG,
97 	.cmd_addr_hi = PCIE_SCRATCH_1_REG,
98 	.cmd_size = PCIE_SCRATCH_2_REG,
99 	.fw_status = PCIE_SCRATCH_3_REG,
100 	.cmdrsp_addr_lo = PCIE_SCRATCH_4_REG,
101 	.cmdrsp_addr_hi = PCIE_SCRATCH_5_REG,
102 	.tx_rdptr = 0xC1A4,
103 	.tx_wrptr = 0xC174,
104 	.rx_rdptr = 0xC174,
105 	.rx_wrptr = 0xC1A4,
106 	.evt_rdptr = PCIE_SCRATCH_10_REG,
107 	.evt_wrptr = PCIE_SCRATCH_11_REG,
108 	.drv_rdy = PCIE_SCRATCH_12_REG,
109 	.tx_start_ptr = 16,
110 	.tx_mask = 0x0FFF0000,
111 	.tx_wrap_mask = 0x1FFF0000,
112 	.rx_mask = 0x00000FFF,
113 	.rx_wrap_mask = 0x00001FFF,
114 	.tx_rollover_ind = BIT(28),
115 	.rx_rollover_ind = BIT(12),
116 	.evt_rollover_ind = MWIFIEX_BD_FLAG_EVT_ROLLOVER_IND,
117 	.ring_flag_sop = MWIFIEX_BD_FLAG_SOP,
118 	.ring_flag_eop = MWIFIEX_BD_FLAG_EOP,
119 	.ring_flag_xs_sop = MWIFIEX_BD_FLAG_XS_SOP,
120 	.ring_flag_xs_eop = MWIFIEX_BD_FLAG_XS_EOP,
121 	.ring_tx_start_ptr = MWIFIEX_BD_FLAG_TX_START_PTR,
122 	.pfu_enabled = 1,
123 	.sleep_cookie = 0,
124 	.fw_dump_ctrl = PCIE_SCRATCH_13_REG,
125 	.fw_dump_start = PCIE_SCRATCH_14_REG,
126 	.fw_dump_end = 0xcff,
127 	.fw_dump_host_ready = 0xcc,
128 	.fw_dump_read_done = 0xdd,
129 	.msix_support = 0,
130 };
131 
132 static struct memory_type_mapping mem_type_mapping_tbl_w8897[] = {
133 	{"ITCM", NULL, 0, 0xF0},
134 	{"DTCM", NULL, 0, 0xF1},
135 	{"SQRAM", NULL, 0, 0xF2},
136 	{"IRAM", NULL, 0, 0xF3},
137 	{"APU", NULL, 0, 0xF4},
138 	{"CIU", NULL, 0, 0xF5},
139 	{"ICU", NULL, 0, 0xF6},
140 	{"MAC", NULL, 0, 0xF7},
141 };
142 
143 static struct memory_type_mapping mem_type_mapping_tbl_w8997[] = {
144 	{"DUMP", NULL, 0, 0xDD},
145 };
146 
147 static const struct mwifiex_pcie_device mwifiex_pcie8766 = {
148 	.reg            = &mwifiex_reg_8766,
149 	.blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD,
150 	.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
151 	.can_dump_fw = false,
152 	.can_ext_scan = true,
153 };
154 
155 static const struct mwifiex_pcie_device mwifiex_pcie8897 = {
156 	.reg            = &mwifiex_reg_8897,
157 	.blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD,
158 	.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
159 	.can_dump_fw = true,
160 	.mem_type_mapping_tbl = mem_type_mapping_tbl_w8897,
161 	.num_mem_types = ARRAY_SIZE(mem_type_mapping_tbl_w8897),
162 	.can_ext_scan = true,
163 };
164 
165 static const struct mwifiex_pcie_device mwifiex_pcie8997 = {
166 	.reg            = &mwifiex_reg_8997,
167 	.blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD,
168 	.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
169 	.can_dump_fw = true,
170 	.mem_type_mapping_tbl = mem_type_mapping_tbl_w8997,
171 	.num_mem_types = ARRAY_SIZE(mem_type_mapping_tbl_w8997),
172 	.can_ext_scan = true,
173 };
174 
175 static const struct of_device_id mwifiex_pcie_of_match_table[] __maybe_unused = {
176 	{ .compatible = "pci11ab,2b42" },
177 	{ .compatible = "pci1b4b,2b42" },
178 	{ }
179 };
180 
181 static int mwifiex_pcie_probe_of(struct device *dev)
182 {
183 	if (!of_match_node(mwifiex_pcie_of_match_table, dev->of_node)) {
184 		dev_err(dev, "required compatible string missing\n");
185 		return -EINVAL;
186 	}
187 
188 	return 0;
189 }
190 
191 static void mwifiex_pcie_work(struct work_struct *work);
192 static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter);
193 static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter);
194 
195 static int
196 mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
197 		       size_t size, int flags)
198 {
199 	struct pcie_service_card *card = adapter->card;
200 	struct mwifiex_dma_mapping mapping;
201 
202 	mapping.addr = dma_map_single(&card->dev->dev, skb->data, size, flags);
203 	if (dma_mapping_error(&card->dev->dev, mapping.addr)) {
204 		mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n");
205 		return -1;
206 	}
207 	mapping.len = size;
208 	mwifiex_store_mapping(skb, &mapping);
209 	return 0;
210 }
211 
212 static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter,
213 				     struct sk_buff *skb, int flags)
214 {
215 	struct pcie_service_card *card = adapter->card;
216 	struct mwifiex_dma_mapping mapping;
217 
218 	mwifiex_get_mapping(skb, &mapping);
219 	dma_unmap_single(&card->dev->dev, mapping.addr, mapping.len, flags);
220 }
221 
222 /*
223  * This function writes data into PCIE card register.
224  */
225 static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
226 {
227 	struct pcie_service_card *card = adapter->card;
228 
229 	iowrite32(data, card->pci_mmap1 + reg);
230 
231 	return 0;
232 }
233 
234 /* This function reads data from PCIE card register.
235  */
236 static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
237 {
238 	struct pcie_service_card *card = adapter->card;
239 
240 	*data = ioread32(card->pci_mmap1 + reg);
241 	if (*data == 0xffffffff)
242 		return 0xffffffff;
243 
244 	return 0;
245 }
246 
247 /* This function reads u8 data from PCIE card register. */
248 static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter,
249 				 int reg, u8 *data)
250 {
251 	struct pcie_service_card *card = adapter->card;
252 
253 	*data = ioread8(card->pci_mmap1 + reg);
254 
255 	return 0;
256 }
257 
258 /*
259  * This function reads sleep cookie and checks if FW is ready
260  */
261 static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
262 {
263 	u32 cookie_value;
264 	struct pcie_service_card *card = adapter->card;
265 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
266 
267 	if (!reg->sleep_cookie)
268 		return true;
269 
270 	if (card->sleep_cookie_vbase) {
271 		cookie_value = get_unaligned_le32(card->sleep_cookie_vbase);
272 		mwifiex_dbg(adapter, INFO,
273 			    "info: ACCESS_HW: sleep cookie=0x%x\n",
274 			    cookie_value);
275 		if (cookie_value == FW_AWAKE_COOKIE)
276 			return true;
277 	}
278 
279 	return false;
280 }
281 
282 #ifdef CONFIG_PM_SLEEP
283 /*
284  * Kernel needs to suspend all functions separately. Therefore all
285  * registered functions must have drivers with suspend and resume
286  * methods. Failing that the kernel simply removes the whole card.
287  *
288  * If already not suspended, this function allocates and sends a host
289  * sleep activate request to the firmware and turns off the traffic.
290  */
291 static int mwifiex_pcie_suspend(struct device *dev)
292 {
293 	struct mwifiex_adapter *adapter;
294 	struct pcie_service_card *card = dev_get_drvdata(dev);
295 
296 
297 	/* Might still be loading firmware */
298 	wait_for_completion(&card->fw_done);
299 
300 	adapter = card->adapter;
301 	if (!adapter) {
302 		dev_err(dev, "adapter is not valid\n");
303 		return 0;
304 	}
305 
306 	mwifiex_enable_wake(adapter);
307 
308 	/* Enable the Host Sleep */
309 	if (!mwifiex_enable_hs(adapter)) {
310 		mwifiex_dbg(adapter, ERROR,
311 			    "cmd: failed to suspend\n");
312 		clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags);
313 		mwifiex_disable_wake(adapter);
314 		return -EFAULT;
315 	}
316 
317 	flush_workqueue(adapter->workqueue);
318 
319 	/* Indicate device suspended */
320 	set_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags);
321 	clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags);
322 
323 	return 0;
324 }
325 
326 /*
327  * Kernel needs to suspend all functions separately. Therefore all
328  * registered functions must have drivers with suspend and resume
329  * methods. Failing that the kernel simply removes the whole card.
330  *
331  * If already not resumed, this function turns on the traffic and
332  * sends a host sleep cancel request to the firmware.
333  */
334 static int mwifiex_pcie_resume(struct device *dev)
335 {
336 	struct mwifiex_adapter *adapter;
337 	struct pcie_service_card *card = dev_get_drvdata(dev);
338 
339 
340 	if (!card->adapter) {
341 		dev_err(dev, "adapter structure is not valid\n");
342 		return 0;
343 	}
344 
345 	adapter = card->adapter;
346 
347 	if (!test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) {
348 		mwifiex_dbg(adapter, WARN,
349 			    "Device already resumed\n");
350 		return 0;
351 	}
352 
353 	clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags);
354 
355 	mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
356 			  MWIFIEX_ASYNC_CMD);
357 	mwifiex_disable_wake(adapter);
358 
359 	return 0;
360 }
361 #endif
362 
363 /*
364  * This function probes an mwifiex device and registers it. It allocates
365  * the card structure, enables PCIE function number and initiates the
366  * device registration and initialization procedure by adding a logical
367  * interface.
368  */
369 static int mwifiex_pcie_probe(struct pci_dev *pdev,
370 					const struct pci_device_id *ent)
371 {
372 	struct pcie_service_card *card;
373 	int ret;
374 
375 	pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
376 		 pdev->vendor, pdev->device, pdev->revision);
377 
378 	card = devm_kzalloc(&pdev->dev, sizeof(*card), GFP_KERNEL);
379 	if (!card)
380 		return -ENOMEM;
381 
382 	init_completion(&card->fw_done);
383 
384 	card->dev = pdev;
385 
386 	if (ent->driver_data) {
387 		struct mwifiex_pcie_device *data = (void *)ent->driver_data;
388 		card->pcie.reg = data->reg;
389 		card->pcie.blksz_fw_dl = data->blksz_fw_dl;
390 		card->pcie.tx_buf_size = data->tx_buf_size;
391 		card->pcie.can_dump_fw = data->can_dump_fw;
392 		card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl;
393 		card->pcie.num_mem_types = data->num_mem_types;
394 		card->pcie.can_ext_scan = data->can_ext_scan;
395 		INIT_WORK(&card->work, mwifiex_pcie_work);
396 	}
397 
398 	/* device tree node parsing and platform specific configuration*/
399 	if (pdev->dev.of_node) {
400 		ret = mwifiex_pcie_probe_of(&pdev->dev);
401 		if (ret)
402 			return ret;
403 	}
404 
405 	/* check quirks */
406 	mwifiex_initialize_quirks(card);
407 
408 	if (mwifiex_add_card(card, &card->fw_done, &pcie_ops,
409 			     MWIFIEX_PCIE, &pdev->dev)) {
410 		pr_err("%s failed\n", __func__);
411 		return -1;
412 	}
413 
414 	return 0;
415 }
416 
417 /*
418  * This function removes the interface and frees up the card structure.
419  */
420 static void mwifiex_pcie_remove(struct pci_dev *pdev)
421 {
422 	struct pcie_service_card *card;
423 	struct mwifiex_adapter *adapter;
424 	struct mwifiex_private *priv;
425 	const struct mwifiex_pcie_card_reg *reg;
426 	u32 fw_status;
427 
428 	card = pci_get_drvdata(pdev);
429 
430 	wait_for_completion(&card->fw_done);
431 
432 	adapter = card->adapter;
433 	if (!adapter || !adapter->priv_num)
434 		return;
435 
436 	reg = card->pcie.reg;
437 	if (reg)
438 		mwifiex_read_reg(adapter, reg->fw_status, &fw_status);
439 	else
440 		fw_status = -1;
441 
442 	if (fw_status == FIRMWARE_READY_PCIE && !adapter->mfg_mode) {
443 		mwifiex_deauthenticate_all(adapter);
444 
445 		priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
446 
447 		mwifiex_disable_auto_ds(priv);
448 
449 		mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
450 	}
451 
452 	mwifiex_remove_card(adapter);
453 }
454 
455 static void mwifiex_pcie_shutdown(struct pci_dev *pdev)
456 {
457 	mwifiex_pcie_remove(pdev);
458 
459 	return;
460 }
461 
462 static void mwifiex_pcie_coredump(struct device *dev)
463 {
464 	struct pci_dev *pdev;
465 	struct pcie_service_card *card;
466 
467 	pdev = container_of(dev, struct pci_dev, dev);
468 	card = pci_get_drvdata(pdev);
469 
470 	if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
471 			      &card->work_flags))
472 		schedule_work(&card->work);
473 }
474 
475 static const struct pci_device_id mwifiex_ids[] = {
476 	{
477 		PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
478 		PCI_ANY_ID, PCI_ANY_ID, 0, 0,
479 		.driver_data = (unsigned long)&mwifiex_pcie8766,
480 	},
481 	{
482 		PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897,
483 		PCI_ANY_ID, PCI_ANY_ID, 0, 0,
484 		.driver_data = (unsigned long)&mwifiex_pcie8897,
485 	},
486 	{
487 		PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
488 		PCI_ANY_ID, PCI_ANY_ID, 0, 0,
489 		.driver_data = (unsigned long)&mwifiex_pcie8997,
490 	},
491 	{
492 		PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
493 		PCI_ANY_ID, PCI_ANY_ID, 0, 0,
494 		.driver_data = (unsigned long)&mwifiex_pcie8997,
495 	},
496 	{},
497 };
498 
499 MODULE_DEVICE_TABLE(pci, mwifiex_ids);
500 
501 /*
502  * Cleanup all software without cleaning anything related to PCIe and HW.
503  */
504 static void mwifiex_pcie_reset_prepare(struct pci_dev *pdev)
505 {
506 	struct pcie_service_card *card = pci_get_drvdata(pdev);
507 	struct mwifiex_adapter *adapter = card->adapter;
508 
509 	if (!adapter) {
510 		dev_err(&pdev->dev, "%s: adapter structure is not valid\n",
511 			__func__);
512 		return;
513 	}
514 
515 	mwifiex_dbg(adapter, INFO,
516 		    "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Pre-FLR\n",
517 		    __func__, pdev->vendor, pdev->device, pdev->revision);
518 
519 	mwifiex_shutdown_sw(adapter);
520 	clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags);
521 	clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags);
522 
523 	/* On MS Surface gen4+ devices FLR isn't effective to recover from
524 	 * hangups, so we power-cycle the card instead.
525 	 */
526 	if (card->quirks & QUIRK_FW_RST_D3COLD)
527 		mwifiex_pcie_reset_d3cold_quirk(pdev);
528 
529 	mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__);
530 
531 	card->pci_reset_ongoing = true;
532 }
533 
534 /*
535  * Kernel stores and restores PCIe function context before and after performing
536  * FLR respectively. Reconfigure the software and firmware including firmware
537  * redownload.
538  */
539 static void mwifiex_pcie_reset_done(struct pci_dev *pdev)
540 {
541 	struct pcie_service_card *card = pci_get_drvdata(pdev);
542 	struct mwifiex_adapter *adapter = card->adapter;
543 	int ret;
544 
545 	if (!adapter) {
546 		dev_err(&pdev->dev, "%s: adapter structure is not valid\n",
547 			__func__);
548 		return;
549 	}
550 
551 	mwifiex_dbg(adapter, INFO,
552 		    "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Post-FLR\n",
553 		    __func__, pdev->vendor, pdev->device, pdev->revision);
554 
555 	ret = mwifiex_reinit_sw(adapter);
556 	if (ret)
557 		dev_err(&pdev->dev, "reinit failed: %d\n", ret);
558 	else
559 		mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__);
560 
561 	card->pci_reset_ongoing = false;
562 }
563 
564 static const struct pci_error_handlers mwifiex_pcie_err_handler = {
565 	.reset_prepare		= mwifiex_pcie_reset_prepare,
566 	.reset_done		= mwifiex_pcie_reset_done,
567 };
568 
569 #ifdef CONFIG_PM_SLEEP
570 /* Power Management Hooks */
571 static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend,
572 				mwifiex_pcie_resume);
573 #endif
574 
575 /* PCI Device Driver */
576 static struct pci_driver mwifiex_pcie = {
577 	.name     = "mwifiex_pcie",
578 	.id_table = mwifiex_ids,
579 	.probe    = mwifiex_pcie_probe,
580 	.remove   = mwifiex_pcie_remove,
581 	.driver   = {
582 		.coredump = mwifiex_pcie_coredump,
583 #ifdef CONFIG_PM_SLEEP
584 		.pm = &mwifiex_pcie_pm_ops,
585 #endif
586 	},
587 	.shutdown = mwifiex_pcie_shutdown,
588 	.err_handler = &mwifiex_pcie_err_handler,
589 };
590 
591 /*
592  * This function adds delay loop to ensure FW is awake before proceeding.
593  */
594 static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter)
595 {
596 	int i = 0;
597 
598 	while (mwifiex_pcie_ok_to_access_hw(adapter)) {
599 		i++;
600 		usleep_range(10, 20);
601 		/* 50ms max wait */
602 		if (i == 5000)
603 			break;
604 	}
605 
606 	return;
607 }
608 
609 static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter,
610 					   u32 max_delay_loop_cnt)
611 {
612 	struct pcie_service_card *card = adapter->card;
613 	u8 *buffer;
614 	u32 sleep_cookie, count;
615 	struct sk_buff *cmdrsp = card->cmdrsp_buf;
616 
617 	for (count = 0; count < max_delay_loop_cnt; count++) {
618 		dma_sync_single_for_cpu(&card->dev->dev,
619 					MWIFIEX_SKB_DMA_ADDR(cmdrsp),
620 					sizeof(sleep_cookie), DMA_FROM_DEVICE);
621 		buffer = cmdrsp->data;
622 		sleep_cookie = get_unaligned_le32(buffer);
623 
624 		if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) {
625 			mwifiex_dbg(adapter, INFO,
626 				    "sleep cookie found at count %d\n", count);
627 			break;
628 		}
629 		dma_sync_single_for_device(&card->dev->dev,
630 					   MWIFIEX_SKB_DMA_ADDR(cmdrsp),
631 					   sizeof(sleep_cookie),
632 					   DMA_FROM_DEVICE);
633 		usleep_range(20, 30);
634 	}
635 
636 	if (count >= max_delay_loop_cnt)
637 		mwifiex_dbg(adapter, INFO,
638 			    "max count reached while accessing sleep cookie\n");
639 }
640 
641 #define N_WAKEUP_TRIES_SHORT_INTERVAL 15
642 #define N_WAKEUP_TRIES_LONG_INTERVAL 35
643 
644 /* This function wakes up the card by reading fw_status register. */
645 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
646 {
647 	struct pcie_service_card *card = adapter->card;
648 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
649 	int retval __maybe_unused;
650 
651 	mwifiex_dbg(adapter, EVENT,
652 		    "event: Wakeup device...\n");
653 
654 	if (reg->sleep_cookie)
655 		mwifiex_pcie_dev_wakeup_delay(adapter);
656 
657 	/* The 88W8897 PCIe+USB firmware (latest version 15.68.19.p21) sometimes
658 	 * appears to ignore or miss our wakeup request, so we continue trying
659 	 * until we receive an interrupt from the card.
660 	 */
661 	if (read_poll_timeout(mwifiex_write_reg, retval,
662 			      READ_ONCE(adapter->int_status) != 0,
663 			      500, 500 * N_WAKEUP_TRIES_SHORT_INTERVAL,
664 			      false,
665 			      adapter, reg->fw_status, FIRMWARE_READY_PCIE)) {
666 		if (read_poll_timeout(mwifiex_write_reg, retval,
667 				      READ_ONCE(adapter->int_status) != 0,
668 				      10000, 10000 * N_WAKEUP_TRIES_LONG_INTERVAL,
669 				      false,
670 				      adapter, reg->fw_status, FIRMWARE_READY_PCIE)) {
671 			mwifiex_dbg(adapter, ERROR,
672 				    "Firmware didn't wake up\n");
673 			return -EIO;
674 		}
675 	}
676 
677 	if (reg->sleep_cookie) {
678 		mwifiex_pcie_dev_wakeup_delay(adapter);
679 		mwifiex_dbg(adapter, INFO,
680 			    "PCIE wakeup: Setting PS_STATE_AWAKE\n");
681 		adapter->ps_state = PS_STATE_AWAKE;
682 	}
683 
684 	return 0;
685 }
686 
687 /*
688  * This function is called after the card has woken up.
689  *
690  * The card configuration register is reset.
691  */
692 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
693 {
694 	mwifiex_dbg(adapter, CMD,
695 		    "cmd: Wakeup device completed\n");
696 
697 	return 0;
698 }
699 
700 /*
701  * This function disables the host interrupt.
702  *
703  * The host interrupt mask is read, the disable bit is reset and
704  * written back to the card host interrupt mask register.
705  */
706 static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
707 {
708 	if (mwifiex_pcie_ok_to_access_hw(adapter)) {
709 		if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
710 				      0x00000000)) {
711 			mwifiex_dbg(adapter, ERROR,
712 				    "Disable host interrupt failed\n");
713 			return -1;
714 		}
715 	}
716 
717 	atomic_set(&adapter->tx_hw_pending, 0);
718 	return 0;
719 }
720 
721 static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter)
722 {
723 	WARN_ON(mwifiex_pcie_disable_host_int(adapter));
724 }
725 
726 /*
727  * This function enables the host interrupt.
728  *
729  * The host interrupt enable mask is written to the card
730  * host interrupt mask register.
731  */
732 static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
733 {
734 	if (mwifiex_pcie_ok_to_access_hw(adapter)) {
735 		/* Simply write the mask to the register */
736 		if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
737 				      HOST_INTR_MASK)) {
738 			mwifiex_dbg(adapter, ERROR,
739 				    "Enable host interrupt failed\n");
740 			return -1;
741 		}
742 	}
743 
744 	return 0;
745 }
746 
747 /*
748  * This function initializes TX buffer ring descriptors
749  */
750 static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter)
751 {
752 	struct pcie_service_card *card = adapter->card;
753 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
754 	struct mwifiex_pcie_buf_desc *desc;
755 	struct mwifiex_pfu_buf_desc *desc2;
756 	int i;
757 
758 	for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
759 		card->tx_buf_list[i] = NULL;
760 		if (reg->pfu_enabled) {
761 			card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
762 					     (sizeof(*desc2) * i);
763 			desc2 = card->txbd_ring[i];
764 			memset(desc2, 0, sizeof(*desc2));
765 		} else {
766 			card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
767 					     (sizeof(*desc) * i);
768 			desc = card->txbd_ring[i];
769 			memset(desc, 0, sizeof(*desc));
770 		}
771 	}
772 
773 	return 0;
774 }
775 
776 /* This function initializes RX buffer ring descriptors. Each SKB is allocated
777  * here and after mapping PCI memory, its physical address is assigned to
778  * PCIE Rx buffer descriptor's physical address.
779  */
780 static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter)
781 {
782 	struct pcie_service_card *card = adapter->card;
783 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
784 	struct sk_buff *skb;
785 	struct mwifiex_pcie_buf_desc *desc;
786 	struct mwifiex_pfu_buf_desc *desc2;
787 	dma_addr_t buf_pa;
788 	int i;
789 
790 	for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
791 		/* Allocate skb here so that firmware can DMA data from it */
792 		skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
793 						  GFP_KERNEL);
794 		if (!skb) {
795 			mwifiex_dbg(adapter, ERROR,
796 				    "Unable to allocate skb for RX ring.\n");
797 			return -ENOMEM;
798 		}
799 
800 		if (mwifiex_map_pci_memory(adapter, skb,
801 					   MWIFIEX_RX_DATA_BUF_SIZE,
802 					   DMA_FROM_DEVICE)) {
803 			kfree_skb(skb);
804 			return -ENOMEM;
805 		}
806 
807 		buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
808 
809 		mwifiex_dbg(adapter, INFO,
810 			    "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
811 			    skb, skb->len, skb->data, (u32)buf_pa,
812 			    (u32)((u64)buf_pa >> 32));
813 
814 		card->rx_buf_list[i] = skb;
815 		if (reg->pfu_enabled) {
816 			card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase +
817 					     (sizeof(*desc2) * i);
818 			desc2 = card->rxbd_ring[i];
819 			desc2->paddr = buf_pa;
820 			desc2->len = (u16)skb->len;
821 			desc2->frag_len = (u16)skb->len;
822 			desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop;
823 			desc2->offset = 0;
824 		} else {
825 			card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase +
826 					     (sizeof(*desc) * i));
827 			desc = card->rxbd_ring[i];
828 			desc->paddr = buf_pa;
829 			desc->len = (u16)skb->len;
830 			desc->flags = 0;
831 		}
832 	}
833 
834 	return 0;
835 }
836 
837 /* This function initializes event buffer ring descriptors. Each SKB is
838  * allocated here and after mapping PCI memory, its physical address is assigned
839  * to PCIE Rx buffer descriptor's physical address
840  */
841 static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter)
842 {
843 	struct pcie_service_card *card = adapter->card;
844 	struct mwifiex_evt_buf_desc *desc;
845 	struct sk_buff *skb;
846 	dma_addr_t buf_pa;
847 	int i;
848 
849 	for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
850 		/* Allocate skb here so that firmware can DMA data from it */
851 		skb = dev_alloc_skb(MAX_EVENT_SIZE);
852 		if (!skb) {
853 			mwifiex_dbg(adapter, ERROR,
854 				    "Unable to allocate skb for EVENT buf.\n");
855 			return -ENOMEM;
856 		}
857 		skb_put(skb, MAX_EVENT_SIZE);
858 
859 		if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
860 					   DMA_FROM_DEVICE)) {
861 			kfree_skb(skb);
862 			return -ENOMEM;
863 		}
864 
865 		buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
866 
867 		mwifiex_dbg(adapter, EVENT,
868 			    "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
869 			    skb, skb->len, skb->data, (u32)buf_pa,
870 			    (u32)((u64)buf_pa >> 32));
871 
872 		card->evt_buf_list[i] = skb;
873 		card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase +
874 				      (sizeof(*desc) * i));
875 		desc = card->evtbd_ring[i];
876 		desc->paddr = buf_pa;
877 		desc->len = (u16)skb->len;
878 		desc->flags = 0;
879 	}
880 
881 	return 0;
882 }
883 
884 /* This function cleans up TX buffer rings. If any of the buffer list has valid
885  * SKB address, associated SKB is freed.
886  */
887 static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter)
888 {
889 	struct pcie_service_card *card = adapter->card;
890 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
891 	struct sk_buff *skb;
892 	struct mwifiex_pcie_buf_desc *desc;
893 	struct mwifiex_pfu_buf_desc *desc2;
894 	int i;
895 
896 	for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
897 		if (reg->pfu_enabled) {
898 			desc2 = card->txbd_ring[i];
899 			if (card->tx_buf_list[i]) {
900 				skb = card->tx_buf_list[i];
901 				mwifiex_unmap_pci_memory(adapter, skb,
902 							 DMA_TO_DEVICE);
903 				dev_kfree_skb_any(skb);
904 			}
905 			memset(desc2, 0, sizeof(*desc2));
906 		} else {
907 			desc = card->txbd_ring[i];
908 			if (card->tx_buf_list[i]) {
909 				skb = card->tx_buf_list[i];
910 				mwifiex_unmap_pci_memory(adapter, skb,
911 							 DMA_TO_DEVICE);
912 				dev_kfree_skb_any(skb);
913 			}
914 			memset(desc, 0, sizeof(*desc));
915 		}
916 		card->tx_buf_list[i] = NULL;
917 	}
918 
919 	atomic_set(&adapter->tx_hw_pending, 0);
920 	return;
921 }
922 
923 /* This function cleans up RX buffer rings. If any of the buffer list has valid
924  * SKB address, associated SKB is freed.
925  */
926 static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter)
927 {
928 	struct pcie_service_card *card = adapter->card;
929 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
930 	struct mwifiex_pcie_buf_desc *desc;
931 	struct mwifiex_pfu_buf_desc *desc2;
932 	struct sk_buff *skb;
933 	int i;
934 
935 	for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
936 		if (reg->pfu_enabled) {
937 			desc2 = card->rxbd_ring[i];
938 			if (card->rx_buf_list[i]) {
939 				skb = card->rx_buf_list[i];
940 				mwifiex_unmap_pci_memory(adapter, skb,
941 							 DMA_FROM_DEVICE);
942 				dev_kfree_skb_any(skb);
943 			}
944 			memset(desc2, 0, sizeof(*desc2));
945 		} else {
946 			desc = card->rxbd_ring[i];
947 			if (card->rx_buf_list[i]) {
948 				skb = card->rx_buf_list[i];
949 				mwifiex_unmap_pci_memory(adapter, skb,
950 							 DMA_FROM_DEVICE);
951 				dev_kfree_skb_any(skb);
952 			}
953 			memset(desc, 0, sizeof(*desc));
954 		}
955 		card->rx_buf_list[i] = NULL;
956 	}
957 
958 	return;
959 }
960 
961 /* This function cleans up event buffer rings. If any of the buffer list has
962  * valid SKB address, associated SKB is freed.
963  */
964 static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter)
965 {
966 	struct pcie_service_card *card = adapter->card;
967 	struct mwifiex_evt_buf_desc *desc;
968 	struct sk_buff *skb;
969 	int i;
970 
971 	for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
972 		desc = card->evtbd_ring[i];
973 		if (card->evt_buf_list[i]) {
974 			skb = card->evt_buf_list[i];
975 			mwifiex_unmap_pci_memory(adapter, skb,
976 						 DMA_FROM_DEVICE);
977 			dev_kfree_skb_any(skb);
978 		}
979 		card->evt_buf_list[i] = NULL;
980 		memset(desc, 0, sizeof(*desc));
981 	}
982 
983 	return;
984 }
985 
986 /* This function creates buffer descriptor ring for TX
987  */
988 static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
989 {
990 	struct pcie_service_card *card = adapter->card;
991 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
992 
993 	/*
994 	 * driver maintaines the write pointer and firmware maintaines the read
995 	 * pointer. The write pointer starts at 0 (zero) while the read pointer
996 	 * starts at zero with rollover bit set
997 	 */
998 	card->txbd_wrptr = 0;
999 
1000 	if (reg->pfu_enabled)
1001 		card->txbd_rdptr = 0;
1002 	else
1003 		card->txbd_rdptr |= reg->tx_rollover_ind;
1004 
1005 	/* allocate shared memory for the BD ring and divide the same in to
1006 	   several descriptors */
1007 	if (reg->pfu_enabled)
1008 		card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
1009 				       MWIFIEX_MAX_TXRX_BD;
1010 	else
1011 		card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
1012 				       MWIFIEX_MAX_TXRX_BD;
1013 
1014 	mwifiex_dbg(adapter, INFO,
1015 		    "info: txbd_ring: Allocating %d bytes\n",
1016 		    card->txbd_ring_size);
1017 	card->txbd_ring_vbase = dma_alloc_coherent(&card->dev->dev,
1018 						   card->txbd_ring_size,
1019 						   &card->txbd_ring_pbase,
1020 						   GFP_KERNEL);
1021 	if (!card->txbd_ring_vbase) {
1022 		mwifiex_dbg(adapter, ERROR,
1023 			    "allocate coherent memory (%d bytes) failed!\n",
1024 			    card->txbd_ring_size);
1025 		return -ENOMEM;
1026 	}
1027 
1028 	mwifiex_dbg(adapter, DATA,
1029 		    "info: txbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
1030 		    card->txbd_ring_vbase, (u32)card->txbd_ring_pbase,
1031 		    (u32)((u64)card->txbd_ring_pbase >> 32),
1032 		    card->txbd_ring_size);
1033 
1034 	return mwifiex_init_txq_ring(adapter);
1035 }
1036 
1037 static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
1038 {
1039 	struct pcie_service_card *card = adapter->card;
1040 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1041 
1042 	mwifiex_cleanup_txq_ring(adapter);
1043 
1044 	if (card->txbd_ring_vbase)
1045 		dma_free_coherent(&card->dev->dev, card->txbd_ring_size,
1046 				  card->txbd_ring_vbase,
1047 				  card->txbd_ring_pbase);
1048 	card->txbd_ring_size = 0;
1049 	card->txbd_wrptr = 0;
1050 	card->txbd_rdptr = 0 | reg->tx_rollover_ind;
1051 	card->txbd_ring_vbase = NULL;
1052 	card->txbd_ring_pbase = 0;
1053 
1054 	return 0;
1055 }
1056 
1057 /*
1058  * This function creates buffer descriptor ring for RX
1059  */
1060 static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
1061 {
1062 	int ret;
1063 	struct pcie_service_card *card = adapter->card;
1064 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1065 
1066 	/*
1067 	 * driver maintaines the read pointer and firmware maintaines the write
1068 	 * pointer. The write pointer starts at 0 (zero) while the read pointer
1069 	 * starts at zero with rollover bit set
1070 	 */
1071 	card->rxbd_wrptr = 0;
1072 	card->rxbd_rdptr = reg->rx_rollover_ind;
1073 
1074 	if (reg->pfu_enabled)
1075 		card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
1076 				       MWIFIEX_MAX_TXRX_BD;
1077 	else
1078 		card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
1079 				       MWIFIEX_MAX_TXRX_BD;
1080 
1081 	mwifiex_dbg(adapter, INFO,
1082 		    "info: rxbd_ring: Allocating %d bytes\n",
1083 		    card->rxbd_ring_size);
1084 	card->rxbd_ring_vbase = dma_alloc_coherent(&card->dev->dev,
1085 						   card->rxbd_ring_size,
1086 						   &card->rxbd_ring_pbase,
1087 						   GFP_KERNEL);
1088 	if (!card->rxbd_ring_vbase) {
1089 		mwifiex_dbg(adapter, ERROR,
1090 			    "allocate coherent memory (%d bytes) failed!\n",
1091 			    card->rxbd_ring_size);
1092 		return -ENOMEM;
1093 	}
1094 
1095 	mwifiex_dbg(adapter, DATA,
1096 		    "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
1097 		    card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
1098 		    (u32)((u64)card->rxbd_ring_pbase >> 32),
1099 		    card->rxbd_ring_size);
1100 
1101 	ret = mwifiex_init_rxq_ring(adapter);
1102 	if (ret)
1103 		mwifiex_pcie_delete_rxbd_ring(adapter);
1104 	return ret;
1105 }
1106 
1107 /*
1108  * This function deletes Buffer descriptor ring for RX
1109  */
1110 static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
1111 {
1112 	struct pcie_service_card *card = adapter->card;
1113 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1114 
1115 	mwifiex_cleanup_rxq_ring(adapter);
1116 
1117 	if (card->rxbd_ring_vbase)
1118 		dma_free_coherent(&card->dev->dev, card->rxbd_ring_size,
1119 				  card->rxbd_ring_vbase,
1120 				  card->rxbd_ring_pbase);
1121 	card->rxbd_ring_size = 0;
1122 	card->rxbd_wrptr = 0;
1123 	card->rxbd_rdptr = 0 | reg->rx_rollover_ind;
1124 	card->rxbd_ring_vbase = NULL;
1125 	card->rxbd_ring_pbase = 0;
1126 
1127 	return 0;
1128 }
1129 
1130 /*
1131  * This function creates buffer descriptor ring for Events
1132  */
1133 static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
1134 {
1135 	int ret;
1136 	struct pcie_service_card *card = adapter->card;
1137 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1138 
1139 	/*
1140 	 * driver maintaines the read pointer and firmware maintaines the write
1141 	 * pointer. The write pointer starts at 0 (zero) while the read pointer
1142 	 * starts at zero with rollover bit set
1143 	 */
1144 	card->evtbd_wrptr = 0;
1145 	card->evtbd_rdptr = reg->evt_rollover_ind;
1146 
1147 	card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) *
1148 				MWIFIEX_MAX_EVT_BD;
1149 
1150 	mwifiex_dbg(adapter, INFO,
1151 		    "info: evtbd_ring: Allocating %d bytes\n",
1152 		    card->evtbd_ring_size);
1153 	card->evtbd_ring_vbase = dma_alloc_coherent(&card->dev->dev,
1154 						    card->evtbd_ring_size,
1155 						    &card->evtbd_ring_pbase,
1156 						    GFP_KERNEL);
1157 	if (!card->evtbd_ring_vbase) {
1158 		mwifiex_dbg(adapter, ERROR,
1159 			    "allocate coherent memory (%d bytes) failed!\n",
1160 			    card->evtbd_ring_size);
1161 		return -ENOMEM;
1162 	}
1163 
1164 	mwifiex_dbg(adapter, EVENT,
1165 		    "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
1166 		    card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
1167 		    (u32)((u64)card->evtbd_ring_pbase >> 32),
1168 		    card->evtbd_ring_size);
1169 
1170 	ret = mwifiex_pcie_init_evt_ring(adapter);
1171 	if (ret)
1172 		mwifiex_pcie_delete_evtbd_ring(adapter);
1173 	return ret;
1174 }
1175 
1176 /*
1177  * This function deletes Buffer descriptor ring for Events
1178  */
1179 static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
1180 {
1181 	struct pcie_service_card *card = adapter->card;
1182 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1183 
1184 	mwifiex_cleanup_evt_ring(adapter);
1185 
1186 	if (card->evtbd_ring_vbase)
1187 		dma_free_coherent(&card->dev->dev, card->evtbd_ring_size,
1188 				  card->evtbd_ring_vbase,
1189 				  card->evtbd_ring_pbase);
1190 	card->evtbd_wrptr = 0;
1191 	card->evtbd_rdptr = 0 | reg->evt_rollover_ind;
1192 	card->evtbd_ring_size = 0;
1193 	card->evtbd_ring_vbase = NULL;
1194 	card->evtbd_ring_pbase = 0;
1195 
1196 	return 0;
1197 }
1198 
1199 /*
1200  * This function allocates a buffer for CMDRSP
1201  */
1202 static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
1203 {
1204 	struct pcie_service_card *card = adapter->card;
1205 	struct sk_buff *skb;
1206 
1207 	/* Allocate memory for receiving command response data */
1208 	skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
1209 	if (!skb) {
1210 		mwifiex_dbg(adapter, ERROR,
1211 			    "Unable to allocate skb for command response data.\n");
1212 		return -ENOMEM;
1213 	}
1214 	skb_put(skb, MWIFIEX_UPLD_SIZE);
1215 	if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1216 				   DMA_FROM_DEVICE)) {
1217 		kfree_skb(skb);
1218 		return -1;
1219 	}
1220 
1221 	card->cmdrsp_buf = skb;
1222 
1223 	return 0;
1224 }
1225 
1226 /*
1227  * This function deletes a buffer for CMDRSP
1228  */
1229 static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
1230 {
1231 	struct pcie_service_card *card;
1232 
1233 	if (!adapter)
1234 		return 0;
1235 
1236 	card = adapter->card;
1237 
1238 	if (card && card->cmdrsp_buf) {
1239 		mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf,
1240 					 DMA_FROM_DEVICE);
1241 		dev_kfree_skb_any(card->cmdrsp_buf);
1242 		card->cmdrsp_buf = NULL;
1243 	}
1244 
1245 	if (card && card->cmd_buf) {
1246 		mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
1247 					 DMA_TO_DEVICE);
1248 		dev_kfree_skb_any(card->cmd_buf);
1249 		card->cmd_buf = NULL;
1250 	}
1251 	return 0;
1252 }
1253 
1254 /*
1255  * This function allocates a buffer for sleep cookie
1256  */
1257 static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
1258 {
1259 	struct pcie_service_card *card = adapter->card;
1260 	u32 *cookie;
1261 
1262 	card->sleep_cookie_vbase = dma_alloc_coherent(&card->dev->dev,
1263 						      sizeof(u32),
1264 						      &card->sleep_cookie_pbase,
1265 						      GFP_KERNEL);
1266 	if (!card->sleep_cookie_vbase) {
1267 		mwifiex_dbg(adapter, ERROR,
1268 			    "dma_alloc_coherent failed!\n");
1269 		return -ENOMEM;
1270 	}
1271 	cookie = (u32 *)card->sleep_cookie_vbase;
1272 	/* Init val of Sleep Cookie */
1273 	*cookie = FW_AWAKE_COOKIE;
1274 
1275 	mwifiex_dbg(adapter, INFO, "alloc_scook: sleep cookie=0x%x\n", *cookie);
1276 
1277 	return 0;
1278 }
1279 
1280 /*
1281  * This function deletes buffer for sleep cookie
1282  */
1283 static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
1284 {
1285 	struct pcie_service_card *card;
1286 
1287 	if (!adapter)
1288 		return 0;
1289 
1290 	card = adapter->card;
1291 
1292 	if (card && card->sleep_cookie_vbase) {
1293 		dma_free_coherent(&card->dev->dev, sizeof(u32),
1294 				  card->sleep_cookie_vbase,
1295 				  card->sleep_cookie_pbase);
1296 		card->sleep_cookie_vbase = NULL;
1297 	}
1298 
1299 	return 0;
1300 }
1301 
1302 /* This function flushes the TX buffer descriptor ring
1303  * This function defined as handler is also called while cleaning TXRX
1304  * during disconnect/ bss stop.
1305  */
1306 static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
1307 {
1308 	struct pcie_service_card *card = adapter->card;
1309 
1310 	if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) {
1311 		card->txbd_flush = 1;
1312 		/* write pointer already set at last send
1313 		 * send dnld-rdy intr again, wait for completion.
1314 		 */
1315 		if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1316 				      CPU_INTR_DNLD_RDY)) {
1317 			mwifiex_dbg(adapter, ERROR,
1318 				    "failed to assert dnld-rdy interrupt.\n");
1319 			return -1;
1320 		}
1321 	}
1322 	return 0;
1323 }
1324 
1325 /*
1326  * This function unmaps and frees downloaded data buffer
1327  */
1328 static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
1329 {
1330 	struct sk_buff *skb;
1331 	u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0;
1332 	struct mwifiex_pcie_buf_desc *desc;
1333 	struct mwifiex_pfu_buf_desc *desc2;
1334 	struct pcie_service_card *card = adapter->card;
1335 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1336 
1337 	if (!mwifiex_pcie_ok_to_access_hw(adapter))
1338 		mwifiex_pm_wakeup_card(adapter);
1339 
1340 	/* Read the TX ring read pointer set by firmware */
1341 	if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
1342 		mwifiex_dbg(adapter, ERROR,
1343 			    "SEND COMP: failed to read reg->tx_rdptr\n");
1344 		return -1;
1345 	}
1346 
1347 	mwifiex_dbg(adapter, DATA,
1348 		    "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
1349 		    card->txbd_rdptr, rdptr);
1350 
1351 	num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1352 	/* free from previous txbd_rdptr to current txbd_rdptr */
1353 	while (((card->txbd_rdptr & reg->tx_mask) !=
1354 		(rdptr & reg->tx_mask)) ||
1355 	       ((card->txbd_rdptr & reg->tx_rollover_ind) !=
1356 		(rdptr & reg->tx_rollover_ind))) {
1357 		wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >>
1358 			    reg->tx_start_ptr;
1359 
1360 		skb = card->tx_buf_list[wrdoneidx];
1361 
1362 		if (skb) {
1363 			mwifiex_dbg(adapter, DATA,
1364 				    "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
1365 				    skb, wrdoneidx);
1366 			mwifiex_unmap_pci_memory(adapter, skb,
1367 						 DMA_TO_DEVICE);
1368 
1369 			unmap_count++;
1370 
1371 			if (card->txbd_flush)
1372 				mwifiex_write_data_complete(adapter, skb, 0,
1373 							    -1);
1374 			else
1375 				mwifiex_write_data_complete(adapter, skb, 0, 0);
1376 			atomic_dec(&adapter->tx_hw_pending);
1377 		}
1378 
1379 		card->tx_buf_list[wrdoneidx] = NULL;
1380 
1381 		if (reg->pfu_enabled) {
1382 			desc2 = card->txbd_ring[wrdoneidx];
1383 			memset(desc2, 0, sizeof(*desc2));
1384 		} else {
1385 			desc = card->txbd_ring[wrdoneidx];
1386 			memset(desc, 0, sizeof(*desc));
1387 		}
1388 		switch (card->dev->device) {
1389 		case PCIE_DEVICE_ID_MARVELL_88W8766P:
1390 			card->txbd_rdptr++;
1391 			break;
1392 		case PCIE_DEVICE_ID_MARVELL_88W8897:
1393 		case PCIE_DEVICE_ID_MARVELL_88W8997:
1394 			card->txbd_rdptr += reg->ring_tx_start_ptr;
1395 			break;
1396 		}
1397 
1398 
1399 		if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs)
1400 			card->txbd_rdptr = ((card->txbd_rdptr &
1401 					     reg->tx_rollover_ind) ^
1402 					     reg->tx_rollover_ind);
1403 	}
1404 
1405 	if (unmap_count)
1406 		adapter->data_sent = false;
1407 
1408 	if (card->txbd_flush) {
1409 		if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr))
1410 			card->txbd_flush = 0;
1411 		else
1412 			mwifiex_clean_pcie_ring_buf(adapter);
1413 	}
1414 
1415 	return 0;
1416 }
1417 
1418 /* This function sends data buffer to device. First 4 bytes of payload
1419  * are filled with payload length and payload type. Then this payload
1420  * is mapped to PCI device memory. Tx ring pointers are advanced accordingly.
1421  * Download ready interrupt to FW is deffered if Tx ring is not full and
1422  * additional payload can be accomodated.
1423  * Caller must ensure tx_param parameter to this function is not NULL.
1424  */
1425 static int
1426 mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
1427 		       struct mwifiex_tx_param *tx_param)
1428 {
1429 	struct pcie_service_card *card = adapter->card;
1430 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1431 	u32 wrindx, num_tx_buffs, rx_val;
1432 	int ret;
1433 	dma_addr_t buf_pa;
1434 	struct mwifiex_pcie_buf_desc *desc = NULL;
1435 	struct mwifiex_pfu_buf_desc *desc2 = NULL;
1436 
1437 	if (!(skb->data && skb->len)) {
1438 		mwifiex_dbg(adapter, ERROR,
1439 			    "%s(): invalid parameter <%p, %#x>\n",
1440 			    __func__, skb->data, skb->len);
1441 		return -1;
1442 	}
1443 
1444 	if (!mwifiex_pcie_ok_to_access_hw(adapter))
1445 		mwifiex_pm_wakeup_card(adapter);
1446 
1447 	num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1448 	mwifiex_dbg(adapter, DATA,
1449 		    "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
1450 		card->txbd_rdptr, card->txbd_wrptr);
1451 	if (mwifiex_pcie_txbd_not_full(card)) {
1452 		u8 *payload;
1453 
1454 		adapter->data_sent = true;
1455 		payload = skb->data;
1456 		put_unaligned_le16((u16)skb->len, payload + 0);
1457 		put_unaligned_le16(MWIFIEX_TYPE_DATA, payload + 2);
1458 
1459 		if (mwifiex_map_pci_memory(adapter, skb, skb->len,
1460 					   DMA_TO_DEVICE))
1461 			return -1;
1462 
1463 		wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr;
1464 		buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1465 		card->tx_buf_list[wrindx] = skb;
1466 		atomic_inc(&adapter->tx_hw_pending);
1467 
1468 		if (reg->pfu_enabled) {
1469 			desc2 = card->txbd_ring[wrindx];
1470 			desc2->paddr = buf_pa;
1471 			desc2->len = (u16)skb->len;
1472 			desc2->frag_len = (u16)skb->len;
1473 			desc2->offset = 0;
1474 			desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1475 					 MWIFIEX_BD_FLAG_LAST_DESC;
1476 		} else {
1477 			desc = card->txbd_ring[wrindx];
1478 			desc->paddr = buf_pa;
1479 			desc->len = (u16)skb->len;
1480 			desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1481 				      MWIFIEX_BD_FLAG_LAST_DESC;
1482 		}
1483 
1484 		switch (card->dev->device) {
1485 		case PCIE_DEVICE_ID_MARVELL_88W8766P:
1486 			card->txbd_wrptr++;
1487 			break;
1488 		case PCIE_DEVICE_ID_MARVELL_88W8897:
1489 		case PCIE_DEVICE_ID_MARVELL_88W8997:
1490 			card->txbd_wrptr += reg->ring_tx_start_ptr;
1491 			break;
1492 		}
1493 
1494 		if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs)
1495 			card->txbd_wrptr = ((card->txbd_wrptr &
1496 						reg->tx_rollover_ind) ^
1497 						reg->tx_rollover_ind);
1498 
1499 		rx_val = card->rxbd_rdptr & reg->rx_wrap_mask;
1500 		/* Write the TX ring write pointer in to reg->tx_wrptr */
1501 		if (mwifiex_write_reg(adapter, reg->tx_wrptr,
1502 				      card->txbd_wrptr | rx_val)) {
1503 			mwifiex_dbg(adapter, ERROR,
1504 				    "SEND DATA: failed to write reg->tx_wrptr\n");
1505 			ret = -1;
1506 			goto done_unmap;
1507 		}
1508 
1509 		/* The firmware (latest version 15.68.19.p21) of the 88W8897 PCIe+USB card
1510 		 * seems to crash randomly after setting the TX ring write pointer when
1511 		 * ASPM powersaving is enabled. A workaround seems to be keeping the bus
1512 		 * busy by reading a random register afterwards.
1513 		 */
1514 		mwifiex_read_reg(adapter, PCI_VENDOR_ID, &rx_val);
1515 
1516 		if ((mwifiex_pcie_txbd_not_full(card)) &&
1517 		    tx_param->next_pkt_len) {
1518 			/* have more packets and TxBD still can hold more */
1519 			mwifiex_dbg(adapter, DATA,
1520 				    "SEND DATA: delay dnld-rdy interrupt.\n");
1521 			adapter->data_sent = false;
1522 		} else {
1523 			/* Send the TX ready interrupt */
1524 			if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1525 					      CPU_INTR_DNLD_RDY)) {
1526 				mwifiex_dbg(adapter, ERROR,
1527 					    "SEND DATA: failed to assert dnld-rdy interrupt.\n");
1528 				ret = -1;
1529 				goto done_unmap;
1530 			}
1531 		}
1532 		mwifiex_dbg(adapter, DATA,
1533 			    "info: SEND DATA: Updated <Rd: %#x, Wr:\t"
1534 			    "%#x> and sent packet to firmware successfully\n",
1535 			    card->txbd_rdptr, card->txbd_wrptr);
1536 	} else {
1537 		mwifiex_dbg(adapter, DATA,
1538 			    "info: TX Ring full, can't send packets to fw\n");
1539 		adapter->data_sent = true;
1540 		/* Send the TX ready interrupt */
1541 		if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1542 				      CPU_INTR_DNLD_RDY))
1543 			mwifiex_dbg(adapter, ERROR,
1544 				    "SEND DATA: failed to assert door-bell intr\n");
1545 		return -EBUSY;
1546 	}
1547 
1548 	return -EINPROGRESS;
1549 done_unmap:
1550 	mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE);
1551 	card->tx_buf_list[wrindx] = NULL;
1552 	atomic_dec(&adapter->tx_hw_pending);
1553 	if (reg->pfu_enabled)
1554 		memset(desc2, 0, sizeof(*desc2));
1555 	else
1556 		memset(desc, 0, sizeof(*desc));
1557 
1558 	return ret;
1559 }
1560 
1561 /*
1562  * This function handles received buffer ring and
1563  * dispatches packets to upper
1564  */
1565 static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
1566 {
1567 	struct pcie_service_card *card = adapter->card;
1568 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1569 	u32 wrptr, rd_index, tx_val;
1570 	dma_addr_t buf_pa;
1571 	int ret = 0;
1572 	struct sk_buff *skb_tmp = NULL;
1573 	struct mwifiex_pcie_buf_desc *desc;
1574 	struct mwifiex_pfu_buf_desc *desc2;
1575 
1576 	if (!mwifiex_pcie_ok_to_access_hw(adapter))
1577 		mwifiex_pm_wakeup_card(adapter);
1578 
1579 	/* Read the RX ring Write pointer set by firmware */
1580 	if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1581 		mwifiex_dbg(adapter, ERROR,
1582 			    "RECV DATA: failed to read reg->rx_wrptr\n");
1583 		ret = -1;
1584 		goto done;
1585 	}
1586 	card->rxbd_wrptr = wrptr;
1587 
1588 	while (((wrptr & reg->rx_mask) !=
1589 		(card->rxbd_rdptr & reg->rx_mask)) ||
1590 	       ((wrptr & reg->rx_rollover_ind) ==
1591 		(card->rxbd_rdptr & reg->rx_rollover_ind))) {
1592 		struct sk_buff *skb_data;
1593 		u16 rx_len;
1594 
1595 		rd_index = card->rxbd_rdptr & reg->rx_mask;
1596 		skb_data = card->rx_buf_list[rd_index];
1597 
1598 		/* If skb allocation was failed earlier for Rx packet,
1599 		 * rx_buf_list[rd_index] would have been left with a NULL.
1600 		 */
1601 		if (!skb_data)
1602 			return -ENOMEM;
1603 
1604 		mwifiex_unmap_pci_memory(adapter, skb_data, DMA_FROM_DEVICE);
1605 		card->rx_buf_list[rd_index] = NULL;
1606 
1607 		/* Get data length from interface header -
1608 		 * first 2 bytes for len, next 2 bytes is for type
1609 		 */
1610 		rx_len = get_unaligned_le16(skb_data->data);
1611 		if (WARN_ON(rx_len <= adapter->intf_hdr_len ||
1612 			    rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) {
1613 			mwifiex_dbg(adapter, ERROR,
1614 				    "Invalid RX len %d, Rd=%#x, Wr=%#x\n",
1615 				    rx_len, card->rxbd_rdptr, wrptr);
1616 			dev_kfree_skb_any(skb_data);
1617 		} else {
1618 			skb_put(skb_data, rx_len);
1619 			mwifiex_dbg(adapter, DATA,
1620 				    "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
1621 				    card->rxbd_rdptr, wrptr, rx_len);
1622 			skb_pull(skb_data, adapter->intf_hdr_len);
1623 			if (adapter->rx_work_enabled) {
1624 				skb_queue_tail(&adapter->rx_data_q, skb_data);
1625 				adapter->data_received = true;
1626 				atomic_inc(&adapter->rx_pending);
1627 			} else {
1628 				mwifiex_handle_rx_packet(adapter, skb_data);
1629 			}
1630 		}
1631 
1632 		skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
1633 						      GFP_KERNEL);
1634 		if (!skb_tmp) {
1635 			mwifiex_dbg(adapter, ERROR,
1636 				    "Unable to allocate skb.\n");
1637 			return -ENOMEM;
1638 		}
1639 
1640 		if (mwifiex_map_pci_memory(adapter, skb_tmp,
1641 					   MWIFIEX_RX_DATA_BUF_SIZE,
1642 					   DMA_FROM_DEVICE))
1643 			return -1;
1644 
1645 		buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp);
1646 
1647 		mwifiex_dbg(adapter, INFO,
1648 			    "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
1649 			    skb_tmp, rd_index);
1650 		card->rx_buf_list[rd_index] = skb_tmp;
1651 
1652 		if (reg->pfu_enabled) {
1653 			desc2 = card->rxbd_ring[rd_index];
1654 			desc2->paddr = buf_pa;
1655 			desc2->len = skb_tmp->len;
1656 			desc2->frag_len = skb_tmp->len;
1657 			desc2->offset = 0;
1658 			desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop;
1659 		} else {
1660 			desc = card->rxbd_ring[rd_index];
1661 			desc->paddr = buf_pa;
1662 			desc->len = skb_tmp->len;
1663 			desc->flags = 0;
1664 		}
1665 
1666 		if ((++card->rxbd_rdptr & reg->rx_mask) ==
1667 							MWIFIEX_MAX_TXRX_BD) {
1668 			card->rxbd_rdptr = ((card->rxbd_rdptr &
1669 					     reg->rx_rollover_ind) ^
1670 					     reg->rx_rollover_ind);
1671 		}
1672 		mwifiex_dbg(adapter, DATA,
1673 			    "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
1674 			    card->rxbd_rdptr, wrptr);
1675 
1676 		tx_val = card->txbd_wrptr & reg->tx_wrap_mask;
1677 		/* Write the RX ring read pointer in to reg->rx_rdptr */
1678 		if (mwifiex_write_reg(adapter, reg->rx_rdptr,
1679 				      card->rxbd_rdptr | tx_val)) {
1680 			mwifiex_dbg(adapter, DATA,
1681 				    "RECV DATA: failed to write reg->rx_rdptr\n");
1682 			ret = -1;
1683 			goto done;
1684 		}
1685 
1686 		/* Read the RX ring Write pointer set by firmware */
1687 		if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1688 			mwifiex_dbg(adapter, ERROR,
1689 				    "RECV DATA: failed to read reg->rx_wrptr\n");
1690 			ret = -1;
1691 			goto done;
1692 		}
1693 		mwifiex_dbg(adapter, DATA,
1694 			    "info: RECV DATA: Rcvd packet from fw successfully\n");
1695 		card->rxbd_wrptr = wrptr;
1696 	}
1697 
1698 done:
1699 	return ret;
1700 }
1701 
1702 /*
1703  * This function downloads the boot command to device
1704  */
1705 static int
1706 mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1707 {
1708 	dma_addr_t buf_pa;
1709 	struct pcie_service_card *card = adapter->card;
1710 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1711 
1712 	if (!(skb->data && skb->len)) {
1713 		mwifiex_dbg(adapter, ERROR,
1714 			    "Invalid parameter in %s <%p. len %d>\n",
1715 			    __func__, skb->data, skb->len);
1716 		return -1;
1717 	}
1718 
1719 	if (mwifiex_map_pci_memory(adapter, skb, skb->len, DMA_TO_DEVICE))
1720 		return -1;
1721 
1722 	buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1723 
1724 	/* Write the lower 32bits of the physical address to low command
1725 	 * address scratch register
1726 	 */
1727 	if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) {
1728 		mwifiex_dbg(adapter, ERROR,
1729 			    "%s: failed to write download command to boot code.\n",
1730 			    __func__);
1731 		mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE);
1732 		return -1;
1733 	}
1734 
1735 	/* Write the upper 32bits of the physical address to high command
1736 	 * address scratch register
1737 	 */
1738 	if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1739 			      (u32)((u64)buf_pa >> 32))) {
1740 		mwifiex_dbg(adapter, ERROR,
1741 			    "%s: failed to write download command to boot code.\n",
1742 			    __func__);
1743 		mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE);
1744 		return -1;
1745 	}
1746 
1747 	/* Write the command length to cmd_size scratch register */
1748 	if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) {
1749 		mwifiex_dbg(adapter, ERROR,
1750 			    "%s: failed to write command len to cmd_size scratch reg\n",
1751 			    __func__);
1752 		mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE);
1753 		return -1;
1754 	}
1755 
1756 	/* Ring the door bell */
1757 	if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1758 			      CPU_INTR_DOOR_BELL)) {
1759 		mwifiex_dbg(adapter, ERROR,
1760 			    "%s: failed to assert door-bell intr\n", __func__);
1761 		mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE);
1762 		return -1;
1763 	}
1764 
1765 	return 0;
1766 }
1767 
1768 /* This function init rx port in firmware which in turn enables to receive data
1769  * from device before transmitting any packet.
1770  */
1771 static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
1772 {
1773 	struct pcie_service_card *card = adapter->card;
1774 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1775 	int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask;
1776 
1777 	/* Write the RX ring read pointer in to reg->rx_rdptr */
1778 	if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr |
1779 			      tx_wrap)) {
1780 		mwifiex_dbg(adapter, ERROR,
1781 			    "RECV DATA: failed to write reg->rx_rdptr\n");
1782 		return -1;
1783 	}
1784 	return 0;
1785 }
1786 
1787 /* This function downloads commands to the device
1788  */
1789 static int
1790 mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1791 {
1792 	struct pcie_service_card *card = adapter->card;
1793 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1794 	int ret = 0;
1795 	dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
1796 	u8 *payload = (u8 *)skb->data;
1797 
1798 	if (!(skb->data && skb->len)) {
1799 		mwifiex_dbg(adapter, ERROR,
1800 			    "Invalid parameter in %s <%p, %#x>\n",
1801 			    __func__, skb->data, skb->len);
1802 		return -1;
1803 	}
1804 
1805 	/* Make sure a command response buffer is available */
1806 	if (!card->cmdrsp_buf) {
1807 		mwifiex_dbg(adapter, ERROR,
1808 			    "No response buffer available, send command failed\n");
1809 		return -EBUSY;
1810 	}
1811 
1812 	if (!mwifiex_pcie_ok_to_access_hw(adapter))
1813 		mwifiex_pm_wakeup_card(adapter);
1814 
1815 	adapter->cmd_sent = true;
1816 
1817 	put_unaligned_le16((u16)skb->len, &payload[0]);
1818 	put_unaligned_le16(MWIFIEX_TYPE_CMD, &payload[2]);
1819 
1820 	if (mwifiex_map_pci_memory(adapter, skb, skb->len, DMA_TO_DEVICE))
1821 		return -1;
1822 
1823 	card->cmd_buf = skb;
1824 	/*
1825 	 * Need to keep a reference, since core driver might free up this
1826 	 * buffer before we've unmapped it.
1827 	 */
1828 	skb_get(skb);
1829 
1830 	/* To send a command, the driver will:
1831 		1. Write the 64bit physical address of the data buffer to
1832 		   cmd response address low  + cmd response address high
1833 		2. Ring the door bell (i.e. set the door bell interrupt)
1834 
1835 		In response to door bell interrupt, the firmware will perform
1836 		the DMA of the command packet (first header to obtain the total
1837 		length and then rest of the command).
1838 	*/
1839 
1840 	if (card->cmdrsp_buf) {
1841 		cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf);
1842 		/* Write the lower 32bits of the cmdrsp buffer physical
1843 		   address */
1844 		if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo,
1845 				      (u32)cmdrsp_buf_pa)) {
1846 			mwifiex_dbg(adapter, ERROR,
1847 				    "Failed to write download cmd to boot code.\n");
1848 			ret = -1;
1849 			goto done;
1850 		}
1851 		/* Write the upper 32bits of the cmdrsp buffer physical
1852 		   address */
1853 		if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi,
1854 				      (u32)((u64)cmdrsp_buf_pa >> 32))) {
1855 			mwifiex_dbg(adapter, ERROR,
1856 				    "Failed to write download cmd to boot code.\n");
1857 			ret = -1;
1858 			goto done;
1859 		}
1860 	}
1861 
1862 	cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf);
1863 	/* Write the lower 32bits of the physical address to reg->cmd_addr_lo */
1864 	if (mwifiex_write_reg(adapter, reg->cmd_addr_lo,
1865 			      (u32)cmd_buf_pa)) {
1866 		mwifiex_dbg(adapter, ERROR,
1867 			    "Failed to write download cmd to boot code.\n");
1868 		ret = -1;
1869 		goto done;
1870 	}
1871 	/* Write the upper 32bits of the physical address to reg->cmd_addr_hi */
1872 	if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1873 			      (u32)((u64)cmd_buf_pa >> 32))) {
1874 		mwifiex_dbg(adapter, ERROR,
1875 			    "Failed to write download cmd to boot code.\n");
1876 		ret = -1;
1877 		goto done;
1878 	}
1879 
1880 	/* Write the command length to reg->cmd_size */
1881 	if (mwifiex_write_reg(adapter, reg->cmd_size,
1882 			      card->cmd_buf->len)) {
1883 		mwifiex_dbg(adapter, ERROR,
1884 			    "Failed to write cmd len to reg->cmd_size\n");
1885 		ret = -1;
1886 		goto done;
1887 	}
1888 
1889 	/* Ring the door bell */
1890 	if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1891 			      CPU_INTR_DOOR_BELL)) {
1892 		mwifiex_dbg(adapter, ERROR,
1893 			    "Failed to assert door-bell intr\n");
1894 		ret = -1;
1895 		goto done;
1896 	}
1897 
1898 done:
1899 	if (ret)
1900 		adapter->cmd_sent = false;
1901 
1902 	return 0;
1903 }
1904 
1905 /*
1906  * This function handles command complete interrupt
1907  */
1908 static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
1909 {
1910 	struct pcie_service_card *card = adapter->card;
1911 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1912 	struct sk_buff *skb = card->cmdrsp_buf;
1913 	int count = 0;
1914 	u16 rx_len;
1915 
1916 	mwifiex_dbg(adapter, CMD,
1917 		    "info: Rx CMD Response\n");
1918 
1919 	if (adapter->curr_cmd)
1920 		mwifiex_unmap_pci_memory(adapter, skb, DMA_FROM_DEVICE);
1921 	else
1922 		dma_sync_single_for_cpu(&card->dev->dev,
1923 					MWIFIEX_SKB_DMA_ADDR(skb),
1924 					MWIFIEX_UPLD_SIZE, DMA_FROM_DEVICE);
1925 
1926 	/* Unmap the command as a response has been received. */
1927 	if (card->cmd_buf) {
1928 		mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
1929 					 DMA_TO_DEVICE);
1930 		dev_kfree_skb_any(card->cmd_buf);
1931 		card->cmd_buf = NULL;
1932 	}
1933 
1934 	rx_len = get_unaligned_le16(skb->data);
1935 	skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
1936 	skb_trim(skb, rx_len);
1937 
1938 	if (!adapter->curr_cmd) {
1939 		if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
1940 			dma_sync_single_for_device(&card->dev->dev,
1941 						   MWIFIEX_SKB_DMA_ADDR(skb),
1942 						   MWIFIEX_SLEEP_COOKIE_SIZE,
1943 						   DMA_FROM_DEVICE);
1944 			if (mwifiex_write_reg(adapter,
1945 					      PCIE_CPU_INT_EVENT,
1946 					      CPU_INTR_SLEEP_CFM_DONE)) {
1947 				mwifiex_dbg(adapter, ERROR,
1948 					    "Write register failed\n");
1949 				return -1;
1950 			}
1951 			mwifiex_delay_for_sleep_cookie(adapter,
1952 						       MWIFIEX_MAX_DELAY_COUNT);
1953 			mwifiex_unmap_pci_memory(adapter, skb,
1954 						 DMA_FROM_DEVICE);
1955 			skb_pull(skb, adapter->intf_hdr_len);
1956 			while (reg->sleep_cookie && (count++ < 10) &&
1957 			       mwifiex_pcie_ok_to_access_hw(adapter))
1958 				usleep_range(50, 60);
1959 			mwifiex_pcie_enable_host_int(adapter);
1960 			mwifiex_process_sleep_confirm_resp(adapter, skb->data,
1961 							   skb->len);
1962 		} else {
1963 			mwifiex_dbg(adapter, ERROR,
1964 				    "There is no command but got cmdrsp\n");
1965 		}
1966 		memcpy(adapter->upld_buf, skb->data,
1967 		       min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
1968 		skb_push(skb, adapter->intf_hdr_len);
1969 		if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1970 					   DMA_FROM_DEVICE))
1971 			return -1;
1972 	} else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
1973 		skb_pull(skb, adapter->intf_hdr_len);
1974 		adapter->curr_cmd->resp_skb = skb;
1975 		adapter->cmd_resp_received = true;
1976 		/* Take the pointer and set it to CMD node and will
1977 		   return in the response complete callback */
1978 		card->cmdrsp_buf = NULL;
1979 
1980 		/* Clear the cmd-rsp buffer address in scratch registers. This
1981 		   will prevent firmware from writing to the same response
1982 		   buffer again. */
1983 		if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) {
1984 			mwifiex_dbg(adapter, ERROR,
1985 				    "cmd_done: failed to clear cmd_rsp_addr_lo\n");
1986 			return -1;
1987 		}
1988 		/* Write the upper 32bits of the cmdrsp buffer physical
1989 		   address */
1990 		if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) {
1991 			mwifiex_dbg(adapter, ERROR,
1992 				    "cmd_done: failed to clear cmd_rsp_addr_hi\n");
1993 			return -1;
1994 		}
1995 	}
1996 
1997 	return 0;
1998 }
1999 
2000 /*
2001  * Command Response processing complete handler
2002  */
2003 static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
2004 					struct sk_buff *skb)
2005 {
2006 	struct pcie_service_card *card = adapter->card;
2007 
2008 	if (skb) {
2009 		card->cmdrsp_buf = skb;
2010 		skb_push(card->cmdrsp_buf, adapter->intf_hdr_len);
2011 		if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
2012 					   DMA_FROM_DEVICE))
2013 			return -1;
2014 	}
2015 
2016 	return 0;
2017 }
2018 
2019 /*
2020  * This function handles firmware event ready interrupt
2021  */
2022 static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
2023 {
2024 	struct pcie_service_card *card = adapter->card;
2025 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2026 	u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
2027 	u32 wrptr, event;
2028 	struct mwifiex_evt_buf_desc *desc;
2029 
2030 	if (!mwifiex_pcie_ok_to_access_hw(adapter))
2031 		mwifiex_pm_wakeup_card(adapter);
2032 
2033 	if (adapter->event_received) {
2034 		mwifiex_dbg(adapter, EVENT,
2035 			    "info: Event being processed,\t"
2036 			    "do not process this interrupt just yet\n");
2037 		return 0;
2038 	}
2039 
2040 	if (rdptr >= MWIFIEX_MAX_EVT_BD) {
2041 		mwifiex_dbg(adapter, ERROR,
2042 			    "info: Invalid read pointer...\n");
2043 		return -1;
2044 	}
2045 
2046 	/* Read the event ring write pointer set by firmware */
2047 	if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
2048 		mwifiex_dbg(adapter, ERROR,
2049 			    "EventReady: failed to read reg->evt_wrptr\n");
2050 		return -1;
2051 	}
2052 
2053 	mwifiex_dbg(adapter, EVENT,
2054 		    "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
2055 		    card->evtbd_rdptr, wrptr);
2056 	if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
2057 					      & MWIFIEX_EVTBD_MASK)) ||
2058 	    ((wrptr & reg->evt_rollover_ind) ==
2059 	     (card->evtbd_rdptr & reg->evt_rollover_ind))) {
2060 		struct sk_buff *skb_cmd;
2061 		__le16 data_len = 0;
2062 		u16 evt_len;
2063 
2064 		mwifiex_dbg(adapter, INFO,
2065 			    "info: Read Index: %d\n", rdptr);
2066 		skb_cmd = card->evt_buf_list[rdptr];
2067 		mwifiex_unmap_pci_memory(adapter, skb_cmd, DMA_FROM_DEVICE);
2068 
2069 		/* Take the pointer and set it to event pointer in adapter
2070 		   and will return back after event handling callback */
2071 		card->evt_buf_list[rdptr] = NULL;
2072 		desc = card->evtbd_ring[rdptr];
2073 		memset(desc, 0, sizeof(*desc));
2074 
2075 		event = get_unaligned_le32(
2076 			&skb_cmd->data[adapter->intf_hdr_len]);
2077 		adapter->event_cause = event;
2078 		/* The first 4bytes will be the event transfer header
2079 		   len is 2 bytes followed by type which is 2 bytes */
2080 		memcpy(&data_len, skb_cmd->data, sizeof(__le16));
2081 		evt_len = le16_to_cpu(data_len);
2082 		skb_trim(skb_cmd, evt_len);
2083 		skb_pull(skb_cmd, adapter->intf_hdr_len);
2084 		mwifiex_dbg(adapter, EVENT,
2085 			    "info: Event length: %d\n", evt_len);
2086 
2087 		if (evt_len > MWIFIEX_EVENT_HEADER_LEN &&
2088 		    evt_len < MAX_EVENT_SIZE)
2089 			memcpy(adapter->event_body, skb_cmd->data +
2090 			       MWIFIEX_EVENT_HEADER_LEN, evt_len -
2091 			       MWIFIEX_EVENT_HEADER_LEN);
2092 
2093 		adapter->event_received = true;
2094 		adapter->event_skb = skb_cmd;
2095 
2096 		/* Do not update the event read pointer here, wait till the
2097 		   buffer is released. This is just to make things simpler,
2098 		   we need to find a better method of managing these buffers.
2099 		*/
2100 	} else {
2101 		if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
2102 				      CPU_INTR_EVENT_DONE)) {
2103 			mwifiex_dbg(adapter, ERROR,
2104 				    "Write register failed\n");
2105 			return -1;
2106 		}
2107 	}
2108 
2109 	return 0;
2110 }
2111 
2112 /*
2113  * Event processing complete handler
2114  */
2115 static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
2116 				       struct sk_buff *skb)
2117 {
2118 	struct pcie_service_card *card = adapter->card;
2119 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2120 	int ret = 0;
2121 	u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
2122 	u32 wrptr;
2123 	struct mwifiex_evt_buf_desc *desc;
2124 
2125 	if (!skb)
2126 		return 0;
2127 
2128 	if (rdptr >= MWIFIEX_MAX_EVT_BD) {
2129 		mwifiex_dbg(adapter, ERROR,
2130 			    "event_complete: Invalid rdptr 0x%x\n",
2131 			    rdptr);
2132 		return -EINVAL;
2133 	}
2134 
2135 	/* Read the event ring write pointer set by firmware */
2136 	if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
2137 		mwifiex_dbg(adapter, ERROR,
2138 			    "event_complete: failed to read reg->evt_wrptr\n");
2139 		return -1;
2140 	}
2141 
2142 	if (!card->evt_buf_list[rdptr]) {
2143 		skb_push(skb, adapter->intf_hdr_len);
2144 		skb_put(skb, MAX_EVENT_SIZE - skb->len);
2145 		if (mwifiex_map_pci_memory(adapter, skb,
2146 					   MAX_EVENT_SIZE,
2147 					   DMA_FROM_DEVICE))
2148 			return -1;
2149 		card->evt_buf_list[rdptr] = skb;
2150 		desc = card->evtbd_ring[rdptr];
2151 		desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb);
2152 		desc->len = (u16)skb->len;
2153 		desc->flags = 0;
2154 		skb = NULL;
2155 	} else {
2156 		mwifiex_dbg(adapter, ERROR,
2157 			    "info: ERROR: buf still valid at index %d, <%p, %p>\n",
2158 			    rdptr, card->evt_buf_list[rdptr], skb);
2159 	}
2160 
2161 	if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
2162 		card->evtbd_rdptr = ((card->evtbd_rdptr &
2163 					reg->evt_rollover_ind) ^
2164 					reg->evt_rollover_ind);
2165 	}
2166 
2167 	mwifiex_dbg(adapter, EVENT,
2168 		    "info: Updated <Rd: 0x%x, Wr: 0x%x>",
2169 		    card->evtbd_rdptr, wrptr);
2170 
2171 	/* Write the event ring read pointer in to reg->evt_rdptr */
2172 	if (mwifiex_write_reg(adapter, reg->evt_rdptr,
2173 			      card->evtbd_rdptr)) {
2174 		mwifiex_dbg(adapter, ERROR,
2175 			    "event_complete: failed to read reg->evt_rdptr\n");
2176 		return -1;
2177 	}
2178 
2179 	mwifiex_dbg(adapter, EVENT,
2180 		    "info: Check Events Again\n");
2181 	ret = mwifiex_pcie_process_event_ready(adapter);
2182 
2183 	return ret;
2184 }
2185 
2186 /* Combo firmware image is a combination of
2187  * (1) combo crc heaer, start with CMD5
2188  * (2) bluetooth image, start with CMD7, end with CMD6, data wrapped in CMD1.
2189  * (3) wifi image.
2190  *
2191  * This function bypass the header and bluetooth part, return
2192  * the offset of tail wifi-only part. If the image is already wifi-only,
2193  * that is start with CMD1, return 0.
2194  */
2195 
2196 static int mwifiex_extract_wifi_fw(struct mwifiex_adapter *adapter,
2197 				   const void *firmware, u32 firmware_len) {
2198 	const struct mwifiex_fw_data *fwdata;
2199 	u32 offset = 0, data_len, dnld_cmd;
2200 	int ret = 0;
2201 	bool cmd7_before = false, first_cmd = false;
2202 
2203 	while (1) {
2204 		/* Check for integer and buffer overflow */
2205 		if (offset + sizeof(fwdata->header) < sizeof(fwdata->header) ||
2206 		    offset + sizeof(fwdata->header) >= firmware_len) {
2207 			mwifiex_dbg(adapter, ERROR,
2208 				    "extract wifi-only fw failure!\n");
2209 			ret = -1;
2210 			goto done;
2211 		}
2212 
2213 		fwdata = firmware + offset;
2214 		dnld_cmd = le32_to_cpu(fwdata->header.dnld_cmd);
2215 		data_len = le32_to_cpu(fwdata->header.data_length);
2216 
2217 		/* Skip past header */
2218 		offset += sizeof(fwdata->header);
2219 
2220 		switch (dnld_cmd) {
2221 		case MWIFIEX_FW_DNLD_CMD_1:
2222 			if (offset + data_len < data_len) {
2223 				mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2224 				ret = -1;
2225 				goto done;
2226 			}
2227 
2228 			/* Image start with cmd1, already wifi-only firmware */
2229 			if (!first_cmd) {
2230 				mwifiex_dbg(adapter, MSG,
2231 					    "input wifi-only firmware\n");
2232 				return 0;
2233 			}
2234 
2235 			if (!cmd7_before) {
2236 				mwifiex_dbg(adapter, ERROR,
2237 					    "no cmd7 before cmd1!\n");
2238 				ret = -1;
2239 				goto done;
2240 			}
2241 			offset += data_len;
2242 			break;
2243 		case MWIFIEX_FW_DNLD_CMD_5:
2244 			first_cmd = true;
2245 			/* Check for integer overflow */
2246 			if (offset + data_len < data_len) {
2247 				mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2248 				ret = -1;
2249 				goto done;
2250 			}
2251 			offset += data_len;
2252 			break;
2253 		case MWIFIEX_FW_DNLD_CMD_6:
2254 			first_cmd = true;
2255 			/* Check for integer overflow */
2256 			if (offset + data_len < data_len) {
2257 				mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2258 				ret = -1;
2259 				goto done;
2260 			}
2261 			offset += data_len;
2262 			if (offset >= firmware_len) {
2263 				mwifiex_dbg(adapter, ERROR,
2264 					    "extract wifi-only fw failure!\n");
2265 				ret = -1;
2266 			} else {
2267 				ret = offset;
2268 			}
2269 			goto done;
2270 		case MWIFIEX_FW_DNLD_CMD_7:
2271 			first_cmd = true;
2272 			cmd7_before = true;
2273 			break;
2274 		default:
2275 			mwifiex_dbg(adapter, ERROR, "unknown dnld_cmd %d\n",
2276 				    dnld_cmd);
2277 			ret = -1;
2278 			goto done;
2279 		}
2280 	}
2281 
2282 done:
2283 	return ret;
2284 }
2285 
2286 /*
2287  * This function downloads the firmware to the card.
2288  *
2289  * Firmware is downloaded to the card in blocks. Every block download
2290  * is tested for CRC errors, and retried a number of times before
2291  * returning failure.
2292  */
2293 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
2294 				    struct mwifiex_fw_image *fw)
2295 {
2296 	int ret;
2297 	u8 *firmware = fw->fw_buf;
2298 	u32 firmware_len = fw->fw_len;
2299 	u32 offset = 0;
2300 	struct sk_buff *skb;
2301 	u32 txlen, tx_blocks = 0, tries, len, val;
2302 	u32 block_retry_cnt = 0;
2303 	struct pcie_service_card *card = adapter->card;
2304 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2305 
2306 	if (!firmware || !firmware_len) {
2307 		mwifiex_dbg(adapter, ERROR,
2308 			    "No firmware image found! Terminating download\n");
2309 		return -1;
2310 	}
2311 
2312 	mwifiex_dbg(adapter, INFO,
2313 		    "info: Downloading FW image (%d bytes)\n",
2314 		    firmware_len);
2315 
2316 	if (mwifiex_pcie_disable_host_int(adapter)) {
2317 		mwifiex_dbg(adapter, ERROR,
2318 			    "%s: Disabling interrupts failed.\n", __func__);
2319 		return -1;
2320 	}
2321 
2322 	skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
2323 	if (!skb) {
2324 		ret = -ENOMEM;
2325 		goto done;
2326 	}
2327 
2328 	ret = mwifiex_read_reg(adapter, PCIE_SCRATCH_13_REG, &val);
2329 	if (ret) {
2330 		mwifiex_dbg(adapter, FATAL, "Failed to read scratch register 13\n");
2331 		goto done;
2332 	}
2333 
2334 	/* PCIE FLR case: extract wifi part from combo firmware*/
2335 	if (val == MWIFIEX_PCIE_FLR_HAPPENS) {
2336 		ret = mwifiex_extract_wifi_fw(adapter, firmware, firmware_len);
2337 		if (ret < 0) {
2338 			mwifiex_dbg(adapter, ERROR, "Failed to extract wifi fw\n");
2339 			goto done;
2340 		}
2341 		offset = ret;
2342 		mwifiex_dbg(adapter, MSG,
2343 			    "info: dnld wifi firmware from %d bytes\n", offset);
2344 	}
2345 
2346 	/* Perform firmware data transfer */
2347 	do {
2348 		u32 ireg_intr = 0;
2349 
2350 		/* More data? */
2351 		if (offset >= firmware_len)
2352 			break;
2353 
2354 		for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2355 			ret = mwifiex_read_reg(adapter, reg->cmd_size,
2356 					       &len);
2357 			if (ret) {
2358 				mwifiex_dbg(adapter, FATAL,
2359 					    "Failed reading len from boot code\n");
2360 				goto done;
2361 			}
2362 			if (len)
2363 				break;
2364 			usleep_range(10, 20);
2365 		}
2366 
2367 		if (!len) {
2368 			break;
2369 		} else if (len > MWIFIEX_UPLD_SIZE) {
2370 			mwifiex_dbg(adapter, ERROR,
2371 				    "FW download failure @ %d, invalid length %d\n",
2372 				    offset, len);
2373 			ret = -1;
2374 			goto done;
2375 		}
2376 
2377 		txlen = len;
2378 
2379 		if (len & BIT(0)) {
2380 			block_retry_cnt++;
2381 			if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
2382 				mwifiex_dbg(adapter, ERROR,
2383 					    "FW download failure @ %d, over max\t"
2384 					    "retry count\n", offset);
2385 				ret = -1;
2386 				goto done;
2387 			}
2388 			mwifiex_dbg(adapter, ERROR,
2389 				    "FW CRC error indicated by the\t"
2390 				    "helper: len = 0x%04X, txlen = %d\n",
2391 				    len, txlen);
2392 			len &= ~BIT(0);
2393 			/* Setting this to 0 to resend from same offset */
2394 			txlen = 0;
2395 		} else {
2396 			block_retry_cnt = 0;
2397 			/* Set blocksize to transfer - checking for
2398 			   last block */
2399 			if (firmware_len - offset < txlen)
2400 				txlen = firmware_len - offset;
2401 
2402 			tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) /
2403 				    card->pcie.blksz_fw_dl;
2404 
2405 			/* Copy payload to buffer */
2406 			memmove(skb->data, &firmware[offset], txlen);
2407 		}
2408 
2409 		skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
2410 		skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl);
2411 
2412 		/* Send the boot command to device */
2413 		if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
2414 			mwifiex_dbg(adapter, ERROR,
2415 				    "Failed to send firmware download command\n");
2416 			ret = -1;
2417 			goto done;
2418 		}
2419 
2420 		/* Wait for the command done interrupt */
2421 		for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2422 			if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
2423 					     &ireg_intr)) {
2424 				mwifiex_dbg(adapter, ERROR,
2425 					    "%s: Failed to read\t"
2426 					    "interrupt status during fw dnld.\n",
2427 					    __func__);
2428 				mwifiex_unmap_pci_memory(adapter, skb,
2429 							 DMA_TO_DEVICE);
2430 				ret = -1;
2431 				goto done;
2432 			}
2433 			if (!(ireg_intr & CPU_INTR_DOOR_BELL))
2434 				break;
2435 			usleep_range(10, 20);
2436 		}
2437 		if (ireg_intr & CPU_INTR_DOOR_BELL) {
2438 			mwifiex_dbg(adapter, ERROR, "%s: Card failed to ACK download\n",
2439 				    __func__);
2440 			mwifiex_unmap_pci_memory(adapter, skb,
2441 						 DMA_TO_DEVICE);
2442 			ret = -1;
2443 			goto done;
2444 		}
2445 
2446 		mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE);
2447 
2448 		offset += txlen;
2449 	} while (true);
2450 
2451 	mwifiex_dbg(adapter, MSG,
2452 		    "info: FW download over, size %d bytes\n", offset);
2453 
2454 	ret = 0;
2455 
2456 done:
2457 	dev_kfree_skb_any(skb);
2458 	return ret;
2459 }
2460 
2461 /*
2462  * This function checks the firmware status in card.
2463  */
2464 static int
2465 mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
2466 {
2467 	int ret = 0;
2468 	u32 firmware_stat;
2469 	struct pcie_service_card *card = adapter->card;
2470 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2471 	u32 tries;
2472 
2473 	/* Mask spurios interrupts */
2474 	if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
2475 			      HOST_INTR_MASK)) {
2476 		mwifiex_dbg(adapter, ERROR,
2477 			    "Write register failed\n");
2478 		return -1;
2479 	}
2480 
2481 	mwifiex_dbg(adapter, INFO,
2482 		    "Setting driver ready signature\n");
2483 	if (mwifiex_write_reg(adapter, reg->drv_rdy,
2484 			      FIRMWARE_READY_PCIE)) {
2485 		mwifiex_dbg(adapter, ERROR,
2486 			    "Failed to write driver ready signature\n");
2487 		return -1;
2488 	}
2489 
2490 	/* Wait for firmware initialization event */
2491 	for (tries = 0; tries < poll_num; tries++) {
2492 		if (mwifiex_read_reg(adapter, reg->fw_status,
2493 				     &firmware_stat))
2494 			ret = -1;
2495 		else
2496 			ret = 0;
2497 
2498 		mwifiex_dbg(adapter, INFO, "Try %d if FW is ready <%d,%#x>",
2499 			    tries, ret, firmware_stat);
2500 
2501 		if (ret)
2502 			continue;
2503 		if (firmware_stat == FIRMWARE_READY_PCIE) {
2504 			ret = 0;
2505 			break;
2506 		} else {
2507 			msleep(100);
2508 			ret = -1;
2509 		}
2510 	}
2511 
2512 	return ret;
2513 }
2514 
2515 /* This function checks if WLAN is the winner.
2516  */
2517 static int
2518 mwifiex_check_winner_status(struct mwifiex_adapter *adapter)
2519 {
2520 	u32 winner = 0;
2521 	int ret = 0;
2522 	struct pcie_service_card *card = adapter->card;
2523 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2524 
2525 	if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) {
2526 		ret = -1;
2527 	} else if (!winner) {
2528 		mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n");
2529 		adapter->winner = 1;
2530 	} else {
2531 		mwifiex_dbg(adapter, ERROR,
2532 			    "PCI-E is not the winner <%#x>", winner);
2533 	}
2534 
2535 	return ret;
2536 }
2537 
2538 /*
2539  * This function reads the interrupt status from card.
2540  */
2541 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter,
2542 				     int msg_id)
2543 {
2544 	u32 pcie_ireg;
2545 	unsigned long flags;
2546 	struct pcie_service_card *card = adapter->card;
2547 
2548 	if (card->msi_enable) {
2549 		spin_lock_irqsave(&adapter->int_lock, flags);
2550 		adapter->int_status = 1;
2551 		spin_unlock_irqrestore(&adapter->int_lock, flags);
2552 		return;
2553 	}
2554 
2555 	if (!mwifiex_pcie_ok_to_access_hw(adapter))
2556 		return;
2557 
2558 	if (card->msix_enable && msg_id >= 0) {
2559 		pcie_ireg = BIT(msg_id);
2560 	} else {
2561 		if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2562 				     &pcie_ireg)) {
2563 			mwifiex_dbg(adapter, ERROR, "Read register failed\n");
2564 			return;
2565 		}
2566 
2567 		if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg)
2568 			return;
2569 
2570 
2571 		mwifiex_pcie_disable_host_int(adapter);
2572 
2573 		/* Clear the pending interrupts */
2574 		if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
2575 				      ~pcie_ireg)) {
2576 			mwifiex_dbg(adapter, ERROR,
2577 				    "Write register failed\n");
2578 			return;
2579 		}
2580 	}
2581 
2582 	if (!adapter->pps_uapsd_mode &&
2583 	    adapter->ps_state == PS_STATE_SLEEP &&
2584 	    mwifiex_pcie_ok_to_access_hw(adapter)) {
2585 		/* Potentially for PCIe we could get other
2586 		 * interrupts like shared. Don't change power
2587 		 * state until cookie is set
2588 		 */
2589 		adapter->ps_state = PS_STATE_AWAKE;
2590 		adapter->pm_wakeup_fw_try = false;
2591 		del_timer(&adapter->wakeup_timer);
2592 	}
2593 
2594 	spin_lock_irqsave(&adapter->int_lock, flags);
2595 	adapter->int_status |= pcie_ireg;
2596 	spin_unlock_irqrestore(&adapter->int_lock, flags);
2597 	mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg);
2598 }
2599 
2600 /*
2601  * Interrupt handler for PCIe root port
2602  *
2603  * This function reads the interrupt status from firmware and assigns
2604  * the main process in workqueue which will handle the interrupt.
2605  */
2606 static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
2607 {
2608 	struct mwifiex_msix_context *ctx = context;
2609 	struct pci_dev *pdev = ctx->dev;
2610 	struct pcie_service_card *card;
2611 	struct mwifiex_adapter *adapter;
2612 
2613 	card = pci_get_drvdata(pdev);
2614 
2615 	if (!card->adapter) {
2616 		pr_err("info: %s: card=%p adapter=%p\n", __func__, card,
2617 		       card ? card->adapter : NULL);
2618 		goto exit;
2619 	}
2620 	adapter = card->adapter;
2621 
2622 	if (test_bit(MWIFIEX_SURPRISE_REMOVED, &adapter->work_flags))
2623 		goto exit;
2624 
2625 	if (card->msix_enable)
2626 		mwifiex_interrupt_status(adapter, ctx->msg_id);
2627 	else
2628 		mwifiex_interrupt_status(adapter, -1);
2629 
2630 	mwifiex_queue_main_work(adapter);
2631 
2632 exit:
2633 	return IRQ_HANDLED;
2634 }
2635 
2636 /*
2637  * This function checks the current interrupt status.
2638  *
2639  * The following interrupts are checked and handled by this function -
2640  *      - Data sent
2641  *      - Command sent
2642  *      - Command received
2643  *      - Packets received
2644  *      - Events received
2645  *
2646  * In case of Rx packets received, the packets are uploaded from card to
2647  * host and processed accordingly.
2648  */
2649 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
2650 {
2651 	int ret;
2652 	u32 pcie_ireg = 0;
2653 	unsigned long flags;
2654 	struct pcie_service_card *card = adapter->card;
2655 
2656 	spin_lock_irqsave(&adapter->int_lock, flags);
2657 	if (!card->msi_enable) {
2658 		/* Clear out unused interrupts */
2659 		pcie_ireg = adapter->int_status;
2660 	}
2661 	adapter->int_status = 0;
2662 	spin_unlock_irqrestore(&adapter->int_lock, flags);
2663 
2664 	if (card->msi_enable) {
2665 		if (mwifiex_pcie_ok_to_access_hw(adapter)) {
2666 			if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2667 					     &pcie_ireg)) {
2668 				mwifiex_dbg(adapter, ERROR,
2669 					    "Read register failed\n");
2670 				return -1;
2671 			}
2672 
2673 			if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2674 				if (mwifiex_write_reg(adapter,
2675 						      PCIE_HOST_INT_STATUS,
2676 						      ~pcie_ireg)) {
2677 					mwifiex_dbg(adapter, ERROR,
2678 						    "Write register failed\n");
2679 					return -1;
2680 				}
2681 				if (!adapter->pps_uapsd_mode &&
2682 				    adapter->ps_state == PS_STATE_SLEEP) {
2683 					adapter->ps_state = PS_STATE_AWAKE;
2684 					adapter->pm_wakeup_fw_try = false;
2685 					del_timer(&adapter->wakeup_timer);
2686 				}
2687 			}
2688 		}
2689 	}
2690 
2691 	if (pcie_ireg & HOST_INTR_DNLD_DONE) {
2692 		mwifiex_dbg(adapter, INTR, "info: TX DNLD Done\n");
2693 		ret = mwifiex_pcie_send_data_complete(adapter);
2694 		if (ret)
2695 			return ret;
2696 	}
2697 	if (pcie_ireg & HOST_INTR_UPLD_RDY) {
2698 		mwifiex_dbg(adapter, INTR, "info: Rx DATA\n");
2699 		ret = mwifiex_pcie_process_recv_data(adapter);
2700 		if (ret)
2701 			return ret;
2702 	}
2703 	if (pcie_ireg & HOST_INTR_EVENT_RDY) {
2704 		mwifiex_dbg(adapter, INTR, "info: Rx EVENT\n");
2705 		ret = mwifiex_pcie_process_event_ready(adapter);
2706 		if (ret)
2707 			return ret;
2708 	}
2709 	if (pcie_ireg & HOST_INTR_CMD_DONE) {
2710 		if (adapter->cmd_sent) {
2711 			mwifiex_dbg(adapter, INTR,
2712 				    "info: CMD sent Interrupt\n");
2713 			adapter->cmd_sent = false;
2714 		}
2715 		/* Handle command response */
2716 		ret = mwifiex_pcie_process_cmd_complete(adapter);
2717 		if (ret)
2718 			return ret;
2719 	}
2720 
2721 	mwifiex_dbg(adapter, INTR,
2722 		    "info: cmd_sent=%d data_sent=%d\n",
2723 		    adapter->cmd_sent, adapter->data_sent);
2724 	if (!card->msi_enable && !card->msix_enable &&
2725 				 adapter->ps_state != PS_STATE_SLEEP)
2726 		mwifiex_pcie_enable_host_int(adapter);
2727 
2728 	return 0;
2729 }
2730 
2731 /*
2732  * This function downloads data from driver to card.
2733  *
2734  * Both commands and data packets are transferred to the card by this
2735  * function.
2736  *
2737  * This function adds the PCIE specific header to the front of the buffer
2738  * before transferring. The header contains the length of the packet and
2739  * the type. The firmware handles the packets based upon this set type.
2740  */
2741 static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
2742 				     struct sk_buff *skb,
2743 				     struct mwifiex_tx_param *tx_param)
2744 {
2745 	if (!skb) {
2746 		mwifiex_dbg(adapter, ERROR,
2747 			    "Passed NULL skb to %s\n", __func__);
2748 		return -1;
2749 	}
2750 
2751 	if (type == MWIFIEX_TYPE_DATA)
2752 		return mwifiex_pcie_send_data(adapter, skb, tx_param);
2753 	else if (type == MWIFIEX_TYPE_CMD)
2754 		return mwifiex_pcie_send_cmd(adapter, skb);
2755 
2756 	return 0;
2757 }
2758 
2759 /* Function to dump PCIE scratch registers in case of FW crash
2760  */
2761 static int
2762 mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf)
2763 {
2764 	char *p = drv_buf;
2765 	char buf[256], *ptr;
2766 	int i;
2767 	u32 value;
2768 	struct pcie_service_card *card = adapter->card;
2769 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2770 	int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG,
2771 				  PCIE_SCRATCH_14_REG,
2772 				  PCIE_SCRATCH_15_REG};
2773 
2774 	if (!p)
2775 		return 0;
2776 
2777 	mwifiex_dbg(adapter, MSG, "PCIE register dump start\n");
2778 
2779 	if (mwifiex_read_reg(adapter, reg->fw_status, &value)) {
2780 		mwifiex_dbg(adapter, ERROR, "failed to read firmware status");
2781 		return 0;
2782 	}
2783 
2784 	ptr = buf;
2785 	mwifiex_dbg(adapter, MSG, "pcie scratch register:");
2786 	for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) {
2787 		mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value);
2788 		ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n",
2789 			       pcie_scratch_reg[i], value);
2790 	}
2791 
2792 	mwifiex_dbg(adapter, MSG, "%s\n", buf);
2793 	p += sprintf(p, "%s\n", buf);
2794 
2795 	mwifiex_dbg(adapter, MSG, "PCIE register dump end\n");
2796 
2797 	return p - drv_buf;
2798 }
2799 
2800 /* This function read/write firmware */
2801 static enum rdwr_status
2802 mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag)
2803 {
2804 	int ret, tries;
2805 	u8 ctrl_data;
2806 	u32 fw_status;
2807 	struct pcie_service_card *card = adapter->card;
2808 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2809 
2810 	if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status))
2811 		return RDWR_STATUS_FAILURE;
2812 
2813 	ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2814 				reg->fw_dump_host_ready);
2815 	if (ret) {
2816 		mwifiex_dbg(adapter, ERROR,
2817 			    "PCIE write err\n");
2818 		return RDWR_STATUS_FAILURE;
2819 	}
2820 
2821 	for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2822 		mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data);
2823 		if (ctrl_data == FW_DUMP_DONE)
2824 			return RDWR_STATUS_SUCCESS;
2825 		if (doneflag && ctrl_data == doneflag)
2826 			return RDWR_STATUS_DONE;
2827 		if (ctrl_data != reg->fw_dump_host_ready) {
2828 			mwifiex_dbg(adapter, WARN,
2829 				    "The ctrl reg was changed, re-try again!\n");
2830 			ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2831 						reg->fw_dump_host_ready);
2832 			if (ret) {
2833 				mwifiex_dbg(adapter, ERROR,
2834 					    "PCIE write err\n");
2835 				return RDWR_STATUS_FAILURE;
2836 			}
2837 		}
2838 		usleep_range(100, 200);
2839 	}
2840 
2841 	mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n");
2842 	return RDWR_STATUS_FAILURE;
2843 }
2844 
2845 /* This function dump firmware memory to file */
2846 static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter)
2847 {
2848 	struct pcie_service_card *card = adapter->card;
2849 	const struct mwifiex_pcie_card_reg *creg = card->pcie.reg;
2850 	unsigned int reg, reg_start, reg_end;
2851 	u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num;
2852 	u8 idx, i, read_reg, doneflag = 0;
2853 	enum rdwr_status stat;
2854 	u32 memory_size;
2855 	int ret;
2856 
2857 	if (!card->pcie.can_dump_fw)
2858 		return;
2859 
2860 	for (idx = 0; idx < adapter->num_mem_types; idx++) {
2861 		struct memory_type_mapping *entry =
2862 				&adapter->mem_type_mapping_tbl[idx];
2863 
2864 		if (entry->mem_ptr) {
2865 			vfree(entry->mem_ptr);
2866 			entry->mem_ptr = NULL;
2867 		}
2868 		entry->mem_size = 0;
2869 	}
2870 
2871 	mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n");
2872 
2873 	/* Read the number of the memories which will dump */
2874 	stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2875 	if (stat == RDWR_STATUS_FAILURE)
2876 		return;
2877 
2878 	reg = creg->fw_dump_start;
2879 	mwifiex_read_reg_byte(adapter, reg, &fw_dump_num);
2880 
2881 	/* W8997 chipset firmware dump will be restore in single region*/
2882 	if (fw_dump_num == 0)
2883 		dump_num = 1;
2884 	else
2885 		dump_num = fw_dump_num;
2886 
2887 	/* Read the length of every memory which will dump */
2888 	for (idx = 0; idx < dump_num; idx++) {
2889 		struct memory_type_mapping *entry =
2890 				&adapter->mem_type_mapping_tbl[idx];
2891 		memory_size = 0;
2892 		if (fw_dump_num != 0) {
2893 			stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2894 			if (stat == RDWR_STATUS_FAILURE)
2895 				return;
2896 
2897 			reg = creg->fw_dump_start;
2898 			for (i = 0; i < 4; i++) {
2899 				mwifiex_read_reg_byte(adapter, reg, &read_reg);
2900 				memory_size |= (read_reg << (i * 8));
2901 				reg++;
2902 			}
2903 		} else {
2904 			memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE;
2905 		}
2906 
2907 		if (memory_size == 0) {
2908 			mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n");
2909 			ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl,
2910 						creg->fw_dump_read_done);
2911 			if (ret) {
2912 				mwifiex_dbg(adapter, ERROR, "PCIE write err\n");
2913 				return;
2914 			}
2915 			break;
2916 		}
2917 
2918 		mwifiex_dbg(adapter, DUMP,
2919 			    "%s_SIZE=0x%x\n", entry->mem_name, memory_size);
2920 		entry->mem_ptr = vmalloc(memory_size + 1);
2921 		entry->mem_size = memory_size;
2922 		if (!entry->mem_ptr) {
2923 			mwifiex_dbg(adapter, ERROR,
2924 				    "Vmalloc %s failed\n", entry->mem_name);
2925 			return;
2926 		}
2927 		dbg_ptr = entry->mem_ptr;
2928 		end_ptr = dbg_ptr + memory_size;
2929 
2930 		doneflag = entry->done_flag;
2931 		mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n",
2932 			    entry->mem_name);
2933 
2934 		do {
2935 			stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2936 			if (RDWR_STATUS_FAILURE == stat)
2937 				return;
2938 
2939 			reg_start = creg->fw_dump_start;
2940 			reg_end = creg->fw_dump_end;
2941 			for (reg = reg_start; reg <= reg_end; reg++) {
2942 				mwifiex_read_reg_byte(adapter, reg, dbg_ptr);
2943 				if (dbg_ptr < end_ptr) {
2944 					dbg_ptr++;
2945 					continue;
2946 				}
2947 				mwifiex_dbg(adapter, ERROR,
2948 					    "pre-allocated buf not enough\n");
2949 				tmp_ptr =
2950 					vzalloc(memory_size + MWIFIEX_SIZE_4K);
2951 				if (!tmp_ptr)
2952 					return;
2953 				memcpy(tmp_ptr, entry->mem_ptr, memory_size);
2954 				vfree(entry->mem_ptr);
2955 				entry->mem_ptr = tmp_ptr;
2956 				tmp_ptr = NULL;
2957 				dbg_ptr = entry->mem_ptr + memory_size;
2958 				memory_size += MWIFIEX_SIZE_4K;
2959 				end_ptr = entry->mem_ptr + memory_size;
2960 			}
2961 
2962 			if (stat != RDWR_STATUS_DONE)
2963 				continue;
2964 
2965 			mwifiex_dbg(adapter, DUMP,
2966 				    "%s done: size=0x%tx\n",
2967 				    entry->mem_name, dbg_ptr - entry->mem_ptr);
2968 			break;
2969 		} while (true);
2970 	}
2971 	mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n");
2972 }
2973 
2974 static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter)
2975 {
2976 	adapter->devdump_data = vzalloc(MWIFIEX_FW_DUMP_SIZE);
2977 	if (!adapter->devdump_data) {
2978 		mwifiex_dbg(adapter, ERROR,
2979 			    "vzalloc devdump data failure!\n");
2980 		return;
2981 	}
2982 
2983 	mwifiex_drv_info_dump(adapter);
2984 	mwifiex_pcie_fw_dump(adapter);
2985 	mwifiex_prepare_fw_dump_info(adapter);
2986 	mwifiex_upload_device_dump(adapter);
2987 }
2988 
2989 static void mwifiex_pcie_card_reset_work(struct mwifiex_adapter *adapter)
2990 {
2991 	struct pcie_service_card *card = adapter->card;
2992 
2993 	/* We can't afford to wait here; remove() might be waiting on us. If we
2994 	 * can't grab the device lock, maybe we'll get another chance later.
2995 	 */
2996 	pci_try_reset_function(card->dev);
2997 }
2998 
2999 static void mwifiex_pcie_work(struct work_struct *work)
3000 {
3001 	struct pcie_service_card *card =
3002 		container_of(work, struct pcie_service_card, work);
3003 
3004 	if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
3005 			       &card->work_flags))
3006 		mwifiex_pcie_device_dump_work(card->adapter);
3007 	if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET,
3008 			       &card->work_flags))
3009 		mwifiex_pcie_card_reset_work(card->adapter);
3010 }
3011 
3012 /* This function dumps FW information */
3013 static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter)
3014 {
3015 	struct pcie_service_card *card = adapter->card;
3016 
3017 	if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
3018 			      &card->work_flags))
3019 		schedule_work(&card->work);
3020 }
3021 
3022 static void mwifiex_pcie_card_reset(struct mwifiex_adapter *adapter)
3023 {
3024 	struct pcie_service_card *card = adapter->card;
3025 
3026 	if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags))
3027 		schedule_work(&card->work);
3028 }
3029 
3030 static int mwifiex_pcie_alloc_buffers(struct mwifiex_adapter *adapter)
3031 {
3032 	struct pcie_service_card *card = adapter->card;
3033 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
3034 	int ret;
3035 
3036 	card->cmdrsp_buf = NULL;
3037 	ret = mwifiex_pcie_create_txbd_ring(adapter);
3038 	if (ret) {
3039 		mwifiex_dbg(adapter, ERROR, "Failed to create txbd ring\n");
3040 		goto err_cre_txbd;
3041 	}
3042 
3043 	ret = mwifiex_pcie_create_rxbd_ring(adapter);
3044 	if (ret) {
3045 		mwifiex_dbg(adapter, ERROR, "Failed to create rxbd ring\n");
3046 		goto err_cre_rxbd;
3047 	}
3048 
3049 	ret = mwifiex_pcie_create_evtbd_ring(adapter);
3050 	if (ret) {
3051 		mwifiex_dbg(adapter, ERROR, "Failed to create evtbd ring\n");
3052 		goto err_cre_evtbd;
3053 	}
3054 
3055 	ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
3056 	if (ret) {
3057 		mwifiex_dbg(adapter, ERROR, "Failed to allocate cmdbuf buffer\n");
3058 		goto err_alloc_cmdbuf;
3059 	}
3060 
3061 	if (reg->sleep_cookie) {
3062 		ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
3063 		if (ret) {
3064 			mwifiex_dbg(adapter, ERROR, "Failed to allocate sleep_cookie buffer\n");
3065 			goto err_alloc_cookie;
3066 		}
3067 	} else {
3068 		card->sleep_cookie_vbase = NULL;
3069 	}
3070 
3071 	return 0;
3072 
3073 err_alloc_cookie:
3074 	mwifiex_pcie_delete_cmdrsp_buf(adapter);
3075 err_alloc_cmdbuf:
3076 	mwifiex_pcie_delete_evtbd_ring(adapter);
3077 err_cre_evtbd:
3078 	mwifiex_pcie_delete_rxbd_ring(adapter);
3079 err_cre_rxbd:
3080 	mwifiex_pcie_delete_txbd_ring(adapter);
3081 err_cre_txbd:
3082 	return ret;
3083 }
3084 
3085 static void mwifiex_pcie_free_buffers(struct mwifiex_adapter *adapter)
3086 {
3087 	struct pcie_service_card *card = adapter->card;
3088 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
3089 
3090 	if (reg->sleep_cookie)
3091 		mwifiex_pcie_delete_sleep_cookie_buf(adapter);
3092 
3093 	mwifiex_pcie_delete_cmdrsp_buf(adapter);
3094 	mwifiex_pcie_delete_evtbd_ring(adapter);
3095 	mwifiex_pcie_delete_rxbd_ring(adapter);
3096 	mwifiex_pcie_delete_txbd_ring(adapter);
3097 }
3098 
3099 /*
3100  * This function initializes the PCI-E host memory space, WCB rings, etc.
3101  */
3102 static int mwifiex_init_pcie(struct mwifiex_adapter *adapter)
3103 {
3104 	struct pcie_service_card *card = adapter->card;
3105 	int ret;
3106 	struct pci_dev *pdev = card->dev;
3107 
3108 	pci_set_drvdata(pdev, card);
3109 
3110 	ret = pci_enable_device(pdev);
3111 	if (ret)
3112 		goto err_enable_dev;
3113 
3114 	pci_set_master(pdev);
3115 
3116 	ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
3117 	if (ret) {
3118 		pr_err("dma_set_mask(32) failed: %d\n", ret);
3119 		goto err_set_dma_mask;
3120 	}
3121 
3122 	ret = pci_request_region(pdev, 0, DRV_NAME);
3123 	if (ret) {
3124 		pr_err("req_reg(0) error\n");
3125 		goto err_req_region0;
3126 	}
3127 	card->pci_mmap = pci_iomap(pdev, 0, 0);
3128 	if (!card->pci_mmap) {
3129 		pr_err("iomap(0) error\n");
3130 		ret = -EIO;
3131 		goto err_iomap0;
3132 	}
3133 	ret = pci_request_region(pdev, 2, DRV_NAME);
3134 	if (ret) {
3135 		pr_err("req_reg(2) error\n");
3136 		goto err_req_region2;
3137 	}
3138 	card->pci_mmap1 = pci_iomap(pdev, 2, 0);
3139 	if (!card->pci_mmap1) {
3140 		pr_err("iomap(2) error\n");
3141 		ret = -EIO;
3142 		goto err_iomap2;
3143 	}
3144 
3145 	pr_notice("PCI memory map Virt0: %pK PCI memory map Virt2: %pK\n",
3146 		  card->pci_mmap, card->pci_mmap1);
3147 
3148 	ret = mwifiex_pcie_alloc_buffers(adapter);
3149 	if (ret)
3150 		goto err_alloc_buffers;
3151 
3152 	if (pdev->device == PCIE_DEVICE_ID_MARVELL_88W8897)
3153 		adapter->ignore_btcoex_events = true;
3154 
3155 	return 0;
3156 
3157 err_alloc_buffers:
3158 	pci_iounmap(pdev, card->pci_mmap1);
3159 err_iomap2:
3160 	pci_release_region(pdev, 2);
3161 err_req_region2:
3162 	pci_iounmap(pdev, card->pci_mmap);
3163 err_iomap0:
3164 	pci_release_region(pdev, 0);
3165 err_req_region0:
3166 err_set_dma_mask:
3167 	pci_disable_device(pdev);
3168 err_enable_dev:
3169 	return ret;
3170 }
3171 
3172 /*
3173  * This function cleans up the allocated card buffers.
3174  */
3175 static void mwifiex_cleanup_pcie(struct mwifiex_adapter *adapter)
3176 {
3177 	struct pcie_service_card *card = adapter->card;
3178 	struct pci_dev *pdev = card->dev;
3179 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
3180 	u32 fw_status;
3181 
3182 	/* Perform the cancel_work_sync() only when we're not resetting
3183 	 * the card. It's because that function never returns if we're
3184 	 * in reset path. If we're here when resetting the card, it means
3185 	 * that we failed to reset the card (reset failure path).
3186 	 */
3187 	if (!card->pci_reset_ongoing) {
3188 		mwifiex_dbg(adapter, MSG, "performing cancel_work_sync()...\n");
3189 		cancel_work_sync(&card->work);
3190 		mwifiex_dbg(adapter, MSG, "cancel_work_sync() done\n");
3191 	} else {
3192 		mwifiex_dbg(adapter, MSG,
3193 			    "skipped cancel_work_sync() because we're in card reset failure path\n");
3194 	}
3195 
3196 	mwifiex_read_reg(adapter, reg->fw_status, &fw_status);
3197 	if (fw_status == FIRMWARE_READY_PCIE) {
3198 		mwifiex_dbg(adapter, INFO,
3199 			    "Clearing driver ready signature\n");
3200 		if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
3201 			mwifiex_dbg(adapter, ERROR,
3202 				    "Failed to write driver not-ready signature\n");
3203 	}
3204 
3205 	pci_disable_device(pdev);
3206 
3207 	pci_iounmap(pdev, card->pci_mmap);
3208 	pci_iounmap(pdev, card->pci_mmap1);
3209 	pci_release_region(pdev, 2);
3210 	pci_release_region(pdev, 0);
3211 
3212 	mwifiex_pcie_free_buffers(adapter);
3213 }
3214 
3215 static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter)
3216 {
3217 	int ret, i, j;
3218 	struct pcie_service_card *card = adapter->card;
3219 	struct pci_dev *pdev = card->dev;
3220 
3221 	if (card->pcie.reg->msix_support) {
3222 		for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3223 			card->msix_entries[i].entry = i;
3224 		ret = pci_enable_msix_exact(pdev, card->msix_entries,
3225 					    MWIFIEX_NUM_MSIX_VECTORS);
3226 		if (!ret) {
3227 			for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) {
3228 				card->msix_ctx[i].dev = pdev;
3229 				card->msix_ctx[i].msg_id = i;
3230 
3231 				ret = request_irq(card->msix_entries[i].vector,
3232 						  mwifiex_pcie_interrupt, 0,
3233 						  "MWIFIEX_PCIE_MSIX",
3234 						  &card->msix_ctx[i]);
3235 				if (ret)
3236 					break;
3237 			}
3238 
3239 			if (ret) {
3240 				mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n",
3241 					    ret);
3242 				for (j = 0; j < i; j++)
3243 					free_irq(card->msix_entries[j].vector,
3244 						 &card->msix_ctx[i]);
3245 				pci_disable_msix(pdev);
3246 			} else {
3247 				mwifiex_dbg(adapter, MSG, "MSIx enabled!");
3248 				card->msix_enable = 1;
3249 				return 0;
3250 			}
3251 		}
3252 	}
3253 
3254 	if (pci_enable_msi(pdev) != 0)
3255 		pci_disable_msi(pdev);
3256 	else
3257 		card->msi_enable = 1;
3258 
3259 	mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable);
3260 
3261 	card->share_irq_ctx.dev = pdev;
3262 	card->share_irq_ctx.msg_id = -1;
3263 	ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
3264 			  "MRVL_PCIE", &card->share_irq_ctx);
3265 	if (ret) {
3266 		pr_err("request_irq failed: ret=%d\n", ret);
3267 		return -1;
3268 	}
3269 
3270 	return 0;
3271 }
3272 
3273 /*
3274  * This function gets the firmware name for downloading by revision id
3275  *
3276  * Read revision id register to get revision id
3277  */
3278 static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter)
3279 {
3280 	int revision_id = 0;
3281 	int version, magic;
3282 	struct pcie_service_card *card = adapter->card;
3283 
3284 	switch (card->dev->device) {
3285 	case PCIE_DEVICE_ID_MARVELL_88W8766P:
3286 		strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME);
3287 		break;
3288 	case PCIE_DEVICE_ID_MARVELL_88W8897:
3289 		mwifiex_write_reg(adapter, 0x0c58, 0x80c00000);
3290 		mwifiex_read_reg(adapter, 0x0c58, &revision_id);
3291 		revision_id &= 0xff00;
3292 		switch (revision_id) {
3293 		case PCIE8897_A0:
3294 			strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME);
3295 			break;
3296 		case PCIE8897_B0:
3297 			strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME);
3298 			break;
3299 		default:
3300 			strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME);
3301 
3302 			break;
3303 		}
3304 		break;
3305 	case PCIE_DEVICE_ID_MARVELL_88W8997:
3306 		mwifiex_read_reg(adapter, 0x8, &revision_id);
3307 		mwifiex_read_reg(adapter, 0x0cd0, &version);
3308 		mwifiex_read_reg(adapter, 0x0cd4, &magic);
3309 		revision_id &= 0xff;
3310 		version &= 0x7;
3311 		magic &= 0xff;
3312 		if (revision_id == PCIE8997_A1 &&
3313 		    magic == CHIP_MAGIC_VALUE &&
3314 		    version == CHIP_VER_PCIEUART)
3315 			strcpy(adapter->fw_name, PCIEUART8997_FW_NAME_V4);
3316 		else
3317 			strcpy(adapter->fw_name, PCIEUSB8997_FW_NAME_V4);
3318 		break;
3319 	default:
3320 		break;
3321 	}
3322 }
3323 
3324 /*
3325  * This function registers the PCIE device.
3326  *
3327  * PCIE IRQ is claimed, block size is set and driver data is initialized.
3328  */
3329 static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
3330 {
3331 	struct pcie_service_card *card = adapter->card;
3332 
3333 	/* save adapter pointer in card */
3334 	card->adapter = adapter;
3335 
3336 	if (mwifiex_pcie_request_irq(adapter))
3337 		return -1;
3338 
3339 	adapter->tx_buf_size = card->pcie.tx_buf_size;
3340 	adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl;
3341 	adapter->num_mem_types = card->pcie.num_mem_types;
3342 	adapter->ext_scan = card->pcie.can_ext_scan;
3343 	mwifiex_pcie_get_fw_name(adapter);
3344 
3345 	return 0;
3346 }
3347 
3348 /*
3349  * This function unregisters the PCIE device.
3350  *
3351  * The PCIE IRQ is released, the function is disabled and driver
3352  * data is set to null.
3353  */
3354 static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
3355 {
3356 	struct pcie_service_card *card = adapter->card;
3357 	struct pci_dev *pdev = card->dev;
3358 	int i;
3359 
3360 	if (card->msix_enable) {
3361 		for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3362 			synchronize_irq(card->msix_entries[i].vector);
3363 
3364 		for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3365 			free_irq(card->msix_entries[i].vector,
3366 				 &card->msix_ctx[i]);
3367 
3368 		card->msix_enable = 0;
3369 		pci_disable_msix(pdev);
3370 	} else {
3371 		mwifiex_dbg(adapter, INFO,
3372 			    "%s(): calling free_irq()\n", __func__);
3373 		free_irq(card->dev->irq, &card->share_irq_ctx);
3374 
3375 		if (card->msi_enable)
3376 			pci_disable_msi(pdev);
3377 	}
3378 	card->adapter = NULL;
3379 }
3380 
3381 /*
3382  * This function initializes the PCI-E host memory space, WCB rings, etc.,
3383  * similar to mwifiex_init_pcie(), but without resetting PCI-E state.
3384  */
3385 static void mwifiex_pcie_up_dev(struct mwifiex_adapter *adapter)
3386 {
3387 	struct pcie_service_card *card = adapter->card;
3388 	struct pci_dev *pdev = card->dev;
3389 
3390 	/* tx_buf_size might be changed to 3584 by firmware during
3391 	 * data transfer, we should reset it to default size.
3392 	 */
3393 	adapter->tx_buf_size = card->pcie.tx_buf_size;
3394 
3395 	mwifiex_pcie_alloc_buffers(adapter);
3396 
3397 	pci_set_master(pdev);
3398 }
3399 
3400 /* This function cleans up the PCI-E host memory space. */
3401 static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter)
3402 {
3403 	struct pcie_service_card *card = adapter->card;
3404 	const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
3405 	struct pci_dev *pdev = card->dev;
3406 
3407 	if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
3408 		mwifiex_dbg(adapter, ERROR, "Failed to write driver not-ready signature\n");
3409 
3410 	pci_clear_master(pdev);
3411 
3412 	adapter->seq_num = 0;
3413 
3414 	mwifiex_pcie_free_buffers(adapter);
3415 }
3416 
3417 static struct mwifiex_if_ops pcie_ops = {
3418 	.init_if =			mwifiex_init_pcie,
3419 	.cleanup_if =			mwifiex_cleanup_pcie,
3420 	.check_fw_status =		mwifiex_check_fw_status,
3421 	.check_winner_status =          mwifiex_check_winner_status,
3422 	.prog_fw =			mwifiex_prog_fw_w_helper,
3423 	.register_dev =			mwifiex_register_dev,
3424 	.unregister_dev =		mwifiex_unregister_dev,
3425 	.enable_int =			mwifiex_pcie_enable_host_int,
3426 	.disable_int =			mwifiex_pcie_disable_host_int_noerr,
3427 	.process_int_status =		mwifiex_process_int_status,
3428 	.host_to_card =			mwifiex_pcie_host_to_card,
3429 	.wakeup =			mwifiex_pm_wakeup_card,
3430 	.wakeup_complete =		mwifiex_pm_wakeup_card_complete,
3431 
3432 	/* PCIE specific */
3433 	.cmdrsp_complete =		mwifiex_pcie_cmdrsp_complete,
3434 	.event_complete =		mwifiex_pcie_event_complete,
3435 	.update_mp_end_port =		NULL,
3436 	.cleanup_mpa_buf =		NULL,
3437 	.init_fw_port =			mwifiex_pcie_init_fw_port,
3438 	.clean_pcie_ring =		mwifiex_clean_pcie_ring_buf,
3439 	.card_reset =			mwifiex_pcie_card_reset,
3440 	.reg_dump =			mwifiex_pcie_reg_dump,
3441 	.device_dump =			mwifiex_pcie_device_dump,
3442 	.down_dev =			mwifiex_pcie_down_dev,
3443 	.up_dev =			mwifiex_pcie_up_dev,
3444 };
3445 
3446 module_pci_driver(mwifiex_pcie);
3447 
3448 MODULE_AUTHOR("Marvell International Ltd.");
3449 MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
3450 MODULE_VERSION(PCIE_VERSION);
3451 MODULE_LICENSE("GPL v2");
3452