1 /* 2 * Marvell Wireless LAN device driver: PCIE specific handling 3 * 4 * Copyright (C) 2011-2014, Marvell International Ltd. 5 * 6 * This software file (the "File") is distributed by Marvell International 7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991 8 * (the "License"). You may use, redistribute and/or modify this File in 9 * accordance with the terms and conditions of the License, a copy of which 10 * is available by writing to the Free Software Foundation, Inc., 11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the 12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. 13 * 14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about 17 * this warranty disclaimer. 18 */ 19 20 #include <linux/firmware.h> 21 22 #include "decl.h" 23 #include "ioctl.h" 24 #include "util.h" 25 #include "fw.h" 26 #include "main.h" 27 #include "wmm.h" 28 #include "11n.h" 29 #include "pcie.h" 30 31 #define PCIE_VERSION "1.0" 32 #define DRV_NAME "Marvell mwifiex PCIe" 33 34 static struct mwifiex_if_ops pcie_ops; 35 36 static const struct of_device_id mwifiex_pcie_of_match_table[] = { 37 { .compatible = "pci11ab,2b42" }, 38 { .compatible = "pci1b4b,2b42" }, 39 { } 40 }; 41 42 static int mwifiex_pcie_probe_of(struct device *dev) 43 { 44 if (!of_match_node(mwifiex_pcie_of_match_table, dev->of_node)) { 45 dev_err(dev, "required compatible string missing\n"); 46 return -EINVAL; 47 } 48 49 return 0; 50 } 51 52 static void mwifiex_pcie_work(struct work_struct *work); 53 54 static int 55 mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb, 56 size_t size, int flags) 57 { 58 struct pcie_service_card *card = adapter->card; 59 struct mwifiex_dma_mapping mapping; 60 61 mapping.addr = pci_map_single(card->dev, skb->data, size, flags); 62 if (pci_dma_mapping_error(card->dev, mapping.addr)) { 63 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n"); 64 return -1; 65 } 66 mapping.len = size; 67 mwifiex_store_mapping(skb, &mapping); 68 return 0; 69 } 70 71 static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter, 72 struct sk_buff *skb, int flags) 73 { 74 struct pcie_service_card *card = adapter->card; 75 struct mwifiex_dma_mapping mapping; 76 77 mwifiex_get_mapping(skb, &mapping); 78 pci_unmap_single(card->dev, mapping.addr, mapping.len, flags); 79 } 80 81 /* 82 * This function writes data into PCIE card register. 83 */ 84 static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data) 85 { 86 struct pcie_service_card *card = adapter->card; 87 88 iowrite32(data, card->pci_mmap1 + reg); 89 90 return 0; 91 } 92 93 /* This function reads data from PCIE card register. 94 */ 95 static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data) 96 { 97 struct pcie_service_card *card = adapter->card; 98 99 *data = ioread32(card->pci_mmap1 + reg); 100 if (*data == 0xffffffff) 101 return 0xffffffff; 102 103 return 0; 104 } 105 106 /* This function reads u8 data from PCIE card register. */ 107 static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter, 108 int reg, u8 *data) 109 { 110 struct pcie_service_card *card = adapter->card; 111 112 *data = ioread8(card->pci_mmap1 + reg); 113 114 return 0; 115 } 116 117 /* 118 * This function reads sleep cookie and checks if FW is ready 119 */ 120 static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter) 121 { 122 u32 cookie_value; 123 struct pcie_service_card *card = adapter->card; 124 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 125 126 if (!reg->sleep_cookie) 127 return true; 128 129 if (card->sleep_cookie_vbase) { 130 cookie_value = get_unaligned_le32(card->sleep_cookie_vbase); 131 mwifiex_dbg(adapter, INFO, 132 "info: ACCESS_HW: sleep cookie=0x%x\n", 133 cookie_value); 134 if (cookie_value == FW_AWAKE_COOKIE) 135 return true; 136 } 137 138 return false; 139 } 140 141 #ifdef CONFIG_PM_SLEEP 142 /* 143 * Kernel needs to suspend all functions separately. Therefore all 144 * registered functions must have drivers with suspend and resume 145 * methods. Failing that the kernel simply removes the whole card. 146 * 147 * If already not suspended, this function allocates and sends a host 148 * sleep activate request to the firmware and turns off the traffic. 149 */ 150 static int mwifiex_pcie_suspend(struct device *dev) 151 { 152 struct mwifiex_adapter *adapter; 153 struct pcie_service_card *card; 154 struct pci_dev *pdev = to_pci_dev(dev); 155 156 card = pci_get_drvdata(pdev); 157 158 /* Might still be loading firmware */ 159 wait_for_completion(&card->fw_done); 160 161 adapter = card->adapter; 162 if (!adapter) { 163 dev_err(dev, "adapter is not valid\n"); 164 return 0; 165 } 166 167 mwifiex_enable_wake(adapter); 168 169 /* Enable the Host Sleep */ 170 if (!mwifiex_enable_hs(adapter)) { 171 mwifiex_dbg(adapter, ERROR, 172 "cmd: failed to suspend\n"); 173 adapter->hs_enabling = false; 174 mwifiex_disable_wake(adapter); 175 return -EFAULT; 176 } 177 178 flush_workqueue(adapter->workqueue); 179 180 /* Indicate device suspended */ 181 adapter->is_suspended = true; 182 adapter->hs_enabling = false; 183 184 return 0; 185 } 186 187 /* 188 * Kernel needs to suspend all functions separately. Therefore all 189 * registered functions must have drivers with suspend and resume 190 * methods. Failing that the kernel simply removes the whole card. 191 * 192 * If already not resumed, this function turns on the traffic and 193 * sends a host sleep cancel request to the firmware. 194 */ 195 static int mwifiex_pcie_resume(struct device *dev) 196 { 197 struct mwifiex_adapter *adapter; 198 struct pcie_service_card *card; 199 struct pci_dev *pdev = to_pci_dev(dev); 200 201 card = pci_get_drvdata(pdev); 202 203 if (!card->adapter) { 204 dev_err(dev, "adapter structure is not valid\n"); 205 return 0; 206 } 207 208 adapter = card->adapter; 209 210 if (!adapter->is_suspended) { 211 mwifiex_dbg(adapter, WARN, 212 "Device already resumed\n"); 213 return 0; 214 } 215 216 adapter->is_suspended = false; 217 218 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA), 219 MWIFIEX_ASYNC_CMD); 220 mwifiex_disable_wake(adapter); 221 222 return 0; 223 } 224 #endif 225 226 /* 227 * This function probes an mwifiex device and registers it. It allocates 228 * the card structure, enables PCIE function number and initiates the 229 * device registration and initialization procedure by adding a logical 230 * interface. 231 */ 232 static int mwifiex_pcie_probe(struct pci_dev *pdev, 233 const struct pci_device_id *ent) 234 { 235 struct pcie_service_card *card; 236 int ret; 237 238 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n", 239 pdev->vendor, pdev->device, pdev->revision); 240 241 card = devm_kzalloc(&pdev->dev, sizeof(*card), GFP_KERNEL); 242 if (!card) 243 return -ENOMEM; 244 245 init_completion(&card->fw_done); 246 247 card->dev = pdev; 248 249 if (ent->driver_data) { 250 struct mwifiex_pcie_device *data = (void *)ent->driver_data; 251 card->pcie.reg = data->reg; 252 card->pcie.blksz_fw_dl = data->blksz_fw_dl; 253 card->pcie.tx_buf_size = data->tx_buf_size; 254 card->pcie.can_dump_fw = data->can_dump_fw; 255 card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl; 256 card->pcie.num_mem_types = data->num_mem_types; 257 card->pcie.can_ext_scan = data->can_ext_scan; 258 INIT_WORK(&card->work, mwifiex_pcie_work); 259 } 260 261 /* device tree node parsing and platform specific configuration*/ 262 if (pdev->dev.of_node) { 263 ret = mwifiex_pcie_probe_of(&pdev->dev); 264 if (ret) 265 return ret; 266 } 267 268 if (mwifiex_add_card(card, &card->fw_done, &pcie_ops, 269 MWIFIEX_PCIE, &pdev->dev)) { 270 pr_err("%s failed\n", __func__); 271 return -1; 272 } 273 274 return 0; 275 } 276 277 /* 278 * This function removes the interface and frees up the card structure. 279 */ 280 static void mwifiex_pcie_remove(struct pci_dev *pdev) 281 { 282 struct pcie_service_card *card; 283 struct mwifiex_adapter *adapter; 284 struct mwifiex_private *priv; 285 const struct mwifiex_pcie_card_reg *reg; 286 u32 fw_status; 287 int ret; 288 289 card = pci_get_drvdata(pdev); 290 291 wait_for_completion(&card->fw_done); 292 293 adapter = card->adapter; 294 if (!adapter || !adapter->priv_num) 295 return; 296 297 reg = card->pcie.reg; 298 if (reg) 299 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status); 300 else 301 fw_status = -1; 302 303 if (fw_status == FIRMWARE_READY_PCIE && !adapter->mfg_mode) { 304 mwifiex_deauthenticate_all(adapter); 305 306 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 307 308 mwifiex_disable_auto_ds(priv); 309 310 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN); 311 } 312 313 mwifiex_remove_card(adapter); 314 } 315 316 static void mwifiex_pcie_shutdown(struct pci_dev *pdev) 317 { 318 mwifiex_pcie_remove(pdev); 319 320 return; 321 } 322 323 static const struct pci_device_id mwifiex_ids[] = { 324 { 325 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P, 326 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 327 .driver_data = (unsigned long)&mwifiex_pcie8766, 328 }, 329 { 330 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897, 331 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 332 .driver_data = (unsigned long)&mwifiex_pcie8897, 333 }, 334 { 335 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 336 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 337 .driver_data = (unsigned long)&mwifiex_pcie8997, 338 }, 339 { 340 PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 341 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 342 .driver_data = (unsigned long)&mwifiex_pcie8997, 343 }, 344 {}, 345 }; 346 347 MODULE_DEVICE_TABLE(pci, mwifiex_ids); 348 349 /* 350 * Cleanup all software without cleaning anything related to PCIe and HW. 351 */ 352 static void mwifiex_pcie_reset_prepare(struct pci_dev *pdev) 353 { 354 struct pcie_service_card *card = pci_get_drvdata(pdev); 355 struct mwifiex_adapter *adapter = card->adapter; 356 357 if (!adapter) { 358 dev_err(&pdev->dev, "%s: adapter structure is not valid\n", 359 __func__); 360 return; 361 } 362 363 mwifiex_dbg(adapter, INFO, 364 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Pre-FLR\n", 365 __func__, pdev->vendor, pdev->device, pdev->revision); 366 367 mwifiex_shutdown_sw(adapter); 368 clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags); 369 clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags); 370 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__); 371 } 372 373 /* 374 * Kernel stores and restores PCIe function context before and after performing 375 * FLR respectively. Reconfigure the software and firmware including firmware 376 * redownload. 377 */ 378 static void mwifiex_pcie_reset_done(struct pci_dev *pdev) 379 { 380 struct pcie_service_card *card = pci_get_drvdata(pdev); 381 struct mwifiex_adapter *adapter = card->adapter; 382 int ret; 383 384 if (!adapter) { 385 dev_err(&pdev->dev, "%s: adapter structure is not valid\n", 386 __func__); 387 return; 388 } 389 390 mwifiex_dbg(adapter, INFO, 391 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Post-FLR\n", 392 __func__, pdev->vendor, pdev->device, pdev->revision); 393 394 ret = mwifiex_reinit_sw(adapter); 395 if (ret) 396 dev_err(&pdev->dev, "reinit failed: %d\n", ret); 397 else 398 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__); 399 } 400 401 static const struct pci_error_handlers mwifiex_pcie_err_handler = { 402 .reset_prepare = mwifiex_pcie_reset_prepare, 403 .reset_done = mwifiex_pcie_reset_done, 404 }; 405 406 #ifdef CONFIG_PM_SLEEP 407 /* Power Management Hooks */ 408 static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend, 409 mwifiex_pcie_resume); 410 #endif 411 412 /* PCI Device Driver */ 413 static struct pci_driver __refdata mwifiex_pcie = { 414 .name = "mwifiex_pcie", 415 .id_table = mwifiex_ids, 416 .probe = mwifiex_pcie_probe, 417 .remove = mwifiex_pcie_remove, 418 #ifdef CONFIG_PM_SLEEP 419 .driver = { 420 .pm = &mwifiex_pcie_pm_ops, 421 }, 422 #endif 423 .shutdown = mwifiex_pcie_shutdown, 424 .err_handler = &mwifiex_pcie_err_handler, 425 }; 426 427 /* 428 * This function adds delay loop to ensure FW is awake before proceeding. 429 */ 430 static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter) 431 { 432 int i = 0; 433 434 while (mwifiex_pcie_ok_to_access_hw(adapter)) { 435 i++; 436 usleep_range(10, 20); 437 /* 50ms max wait */ 438 if (i == 5000) 439 break; 440 } 441 442 return; 443 } 444 445 static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter, 446 u32 max_delay_loop_cnt) 447 { 448 struct pcie_service_card *card = adapter->card; 449 u8 *buffer; 450 u32 sleep_cookie, count; 451 struct sk_buff *cmdrsp = card->cmdrsp_buf; 452 453 for (count = 0; count < max_delay_loop_cnt; count++) { 454 pci_dma_sync_single_for_cpu(card->dev, 455 MWIFIEX_SKB_DMA_ADDR(cmdrsp), 456 sizeof(sleep_cookie), 457 PCI_DMA_FROMDEVICE); 458 buffer = cmdrsp->data; 459 sleep_cookie = get_unaligned_le32(buffer); 460 461 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) { 462 mwifiex_dbg(adapter, INFO, 463 "sleep cookie found at count %d\n", count); 464 break; 465 } 466 pci_dma_sync_single_for_device(card->dev, 467 MWIFIEX_SKB_DMA_ADDR(cmdrsp), 468 sizeof(sleep_cookie), 469 PCI_DMA_FROMDEVICE); 470 usleep_range(20, 30); 471 } 472 473 if (count >= max_delay_loop_cnt) 474 mwifiex_dbg(adapter, INFO, 475 "max count reached while accessing sleep cookie\n"); 476 } 477 478 /* This function wakes up the card by reading fw_status register. */ 479 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) 480 { 481 struct pcie_service_card *card = adapter->card; 482 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 483 484 mwifiex_dbg(adapter, EVENT, 485 "event: Wakeup device...\n"); 486 487 if (reg->sleep_cookie) 488 mwifiex_pcie_dev_wakeup_delay(adapter); 489 490 /* Accessing fw_status register will wakeup device */ 491 if (mwifiex_write_reg(adapter, reg->fw_status, FIRMWARE_READY_PCIE)) { 492 mwifiex_dbg(adapter, ERROR, 493 "Writing fw_status register failed\n"); 494 return -1; 495 } 496 497 if (reg->sleep_cookie) { 498 mwifiex_pcie_dev_wakeup_delay(adapter); 499 mwifiex_dbg(adapter, INFO, 500 "PCIE wakeup: Setting PS_STATE_AWAKE\n"); 501 adapter->ps_state = PS_STATE_AWAKE; 502 } 503 504 return 0; 505 } 506 507 /* 508 * This function is called after the card has woken up. 509 * 510 * The card configuration register is reset. 511 */ 512 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter) 513 { 514 mwifiex_dbg(adapter, CMD, 515 "cmd: Wakeup device completed\n"); 516 517 return 0; 518 } 519 520 /* 521 * This function disables the host interrupt. 522 * 523 * The host interrupt mask is read, the disable bit is reset and 524 * written back to the card host interrupt mask register. 525 */ 526 static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter) 527 { 528 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 529 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 530 0x00000000)) { 531 mwifiex_dbg(adapter, ERROR, 532 "Disable host interrupt failed\n"); 533 return -1; 534 } 535 } 536 537 atomic_set(&adapter->tx_hw_pending, 0); 538 return 0; 539 } 540 541 static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter) 542 { 543 WARN_ON(mwifiex_pcie_disable_host_int(adapter)); 544 } 545 546 /* 547 * This function enables the host interrupt. 548 * 549 * The host interrupt enable mask is written to the card 550 * host interrupt mask register. 551 */ 552 static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter) 553 { 554 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 555 /* Simply write the mask to the register */ 556 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 557 HOST_INTR_MASK)) { 558 mwifiex_dbg(adapter, ERROR, 559 "Enable host interrupt failed\n"); 560 return -1; 561 } 562 } 563 564 return 0; 565 } 566 567 /* 568 * This function initializes TX buffer ring descriptors 569 */ 570 static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter) 571 { 572 struct pcie_service_card *card = adapter->card; 573 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 574 struct mwifiex_pcie_buf_desc *desc; 575 struct mwifiex_pfu_buf_desc *desc2; 576 int i; 577 578 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 579 card->tx_buf_list[i] = NULL; 580 if (reg->pfu_enabled) { 581 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 582 (sizeof(*desc2) * i); 583 desc2 = card->txbd_ring[i]; 584 memset(desc2, 0, sizeof(*desc2)); 585 } else { 586 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 587 (sizeof(*desc) * i); 588 desc = card->txbd_ring[i]; 589 memset(desc, 0, sizeof(*desc)); 590 } 591 } 592 593 return 0; 594 } 595 596 /* This function initializes RX buffer ring descriptors. Each SKB is allocated 597 * here and after mapping PCI memory, its physical address is assigned to 598 * PCIE Rx buffer descriptor's physical address. 599 */ 600 static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter) 601 { 602 struct pcie_service_card *card = adapter->card; 603 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 604 struct sk_buff *skb; 605 struct mwifiex_pcie_buf_desc *desc; 606 struct mwifiex_pfu_buf_desc *desc2; 607 dma_addr_t buf_pa; 608 int i; 609 610 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 611 /* Allocate skb here so that firmware can DMA data from it */ 612 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 613 GFP_KERNEL); 614 if (!skb) { 615 mwifiex_dbg(adapter, ERROR, 616 "Unable to allocate skb for RX ring.\n"); 617 kfree(card->rxbd_ring_vbase); 618 return -ENOMEM; 619 } 620 621 if (mwifiex_map_pci_memory(adapter, skb, 622 MWIFIEX_RX_DATA_BUF_SIZE, 623 PCI_DMA_FROMDEVICE)) 624 return -1; 625 626 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 627 628 mwifiex_dbg(adapter, INFO, 629 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 630 skb, skb->len, skb->data, (u32)buf_pa, 631 (u32)((u64)buf_pa >> 32)); 632 633 card->rx_buf_list[i] = skb; 634 if (reg->pfu_enabled) { 635 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase + 636 (sizeof(*desc2) * i); 637 desc2 = card->rxbd_ring[i]; 638 desc2->paddr = buf_pa; 639 desc2->len = (u16)skb->len; 640 desc2->frag_len = (u16)skb->len; 641 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop; 642 desc2->offset = 0; 643 } else { 644 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase + 645 (sizeof(*desc) * i)); 646 desc = card->rxbd_ring[i]; 647 desc->paddr = buf_pa; 648 desc->len = (u16)skb->len; 649 desc->flags = 0; 650 } 651 } 652 653 return 0; 654 } 655 656 /* This function initializes event buffer ring descriptors. Each SKB is 657 * allocated here and after mapping PCI memory, its physical address is assigned 658 * to PCIE Rx buffer descriptor's physical address 659 */ 660 static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter) 661 { 662 struct pcie_service_card *card = adapter->card; 663 struct mwifiex_evt_buf_desc *desc; 664 struct sk_buff *skb; 665 dma_addr_t buf_pa; 666 int i; 667 668 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 669 /* Allocate skb here so that firmware can DMA data from it */ 670 skb = dev_alloc_skb(MAX_EVENT_SIZE); 671 if (!skb) { 672 mwifiex_dbg(adapter, ERROR, 673 "Unable to allocate skb for EVENT buf.\n"); 674 kfree(card->evtbd_ring_vbase); 675 return -ENOMEM; 676 } 677 skb_put(skb, MAX_EVENT_SIZE); 678 679 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE, 680 PCI_DMA_FROMDEVICE)) 681 return -1; 682 683 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 684 685 mwifiex_dbg(adapter, EVENT, 686 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 687 skb, skb->len, skb->data, (u32)buf_pa, 688 (u32)((u64)buf_pa >> 32)); 689 690 card->evt_buf_list[i] = skb; 691 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase + 692 (sizeof(*desc) * i)); 693 desc = card->evtbd_ring[i]; 694 desc->paddr = buf_pa; 695 desc->len = (u16)skb->len; 696 desc->flags = 0; 697 } 698 699 return 0; 700 } 701 702 /* This function cleans up TX buffer rings. If any of the buffer list has valid 703 * SKB address, associated SKB is freed. 704 */ 705 static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter) 706 { 707 struct pcie_service_card *card = adapter->card; 708 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 709 struct sk_buff *skb; 710 struct mwifiex_pcie_buf_desc *desc; 711 struct mwifiex_pfu_buf_desc *desc2; 712 int i; 713 714 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 715 if (reg->pfu_enabled) { 716 desc2 = card->txbd_ring[i]; 717 if (card->tx_buf_list[i]) { 718 skb = card->tx_buf_list[i]; 719 mwifiex_unmap_pci_memory(adapter, skb, 720 PCI_DMA_TODEVICE); 721 dev_kfree_skb_any(skb); 722 } 723 memset(desc2, 0, sizeof(*desc2)); 724 } else { 725 desc = card->txbd_ring[i]; 726 if (card->tx_buf_list[i]) { 727 skb = card->tx_buf_list[i]; 728 mwifiex_unmap_pci_memory(adapter, skb, 729 PCI_DMA_TODEVICE); 730 dev_kfree_skb_any(skb); 731 } 732 memset(desc, 0, sizeof(*desc)); 733 } 734 card->tx_buf_list[i] = NULL; 735 } 736 737 atomic_set(&adapter->tx_hw_pending, 0); 738 return; 739 } 740 741 /* This function cleans up RX buffer rings. If any of the buffer list has valid 742 * SKB address, associated SKB is freed. 743 */ 744 static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter) 745 { 746 struct pcie_service_card *card = adapter->card; 747 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 748 struct mwifiex_pcie_buf_desc *desc; 749 struct mwifiex_pfu_buf_desc *desc2; 750 struct sk_buff *skb; 751 int i; 752 753 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 754 if (reg->pfu_enabled) { 755 desc2 = card->rxbd_ring[i]; 756 if (card->rx_buf_list[i]) { 757 skb = card->rx_buf_list[i]; 758 mwifiex_unmap_pci_memory(adapter, skb, 759 PCI_DMA_FROMDEVICE); 760 dev_kfree_skb_any(skb); 761 } 762 memset(desc2, 0, sizeof(*desc2)); 763 } else { 764 desc = card->rxbd_ring[i]; 765 if (card->rx_buf_list[i]) { 766 skb = card->rx_buf_list[i]; 767 mwifiex_unmap_pci_memory(adapter, skb, 768 PCI_DMA_FROMDEVICE); 769 dev_kfree_skb_any(skb); 770 } 771 memset(desc, 0, sizeof(*desc)); 772 } 773 card->rx_buf_list[i] = NULL; 774 } 775 776 return; 777 } 778 779 /* This function cleans up event buffer rings. If any of the buffer list has 780 * valid SKB address, associated SKB is freed. 781 */ 782 static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter) 783 { 784 struct pcie_service_card *card = adapter->card; 785 struct mwifiex_evt_buf_desc *desc; 786 struct sk_buff *skb; 787 int i; 788 789 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 790 desc = card->evtbd_ring[i]; 791 if (card->evt_buf_list[i]) { 792 skb = card->evt_buf_list[i]; 793 mwifiex_unmap_pci_memory(adapter, skb, 794 PCI_DMA_FROMDEVICE); 795 dev_kfree_skb_any(skb); 796 } 797 card->evt_buf_list[i] = NULL; 798 memset(desc, 0, sizeof(*desc)); 799 } 800 801 return; 802 } 803 804 /* This function creates buffer descriptor ring for TX 805 */ 806 static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter) 807 { 808 struct pcie_service_card *card = adapter->card; 809 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 810 811 /* 812 * driver maintaines the write pointer and firmware maintaines the read 813 * pointer. The write pointer starts at 0 (zero) while the read pointer 814 * starts at zero with rollover bit set 815 */ 816 card->txbd_wrptr = 0; 817 818 if (reg->pfu_enabled) 819 card->txbd_rdptr = 0; 820 else 821 card->txbd_rdptr |= reg->tx_rollover_ind; 822 823 /* allocate shared memory for the BD ring and divide the same in to 824 several descriptors */ 825 if (reg->pfu_enabled) 826 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 827 MWIFIEX_MAX_TXRX_BD; 828 else 829 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 830 MWIFIEX_MAX_TXRX_BD; 831 832 mwifiex_dbg(adapter, INFO, 833 "info: txbd_ring: Allocating %d bytes\n", 834 card->txbd_ring_size); 835 card->txbd_ring_vbase = pci_alloc_consistent(card->dev, 836 card->txbd_ring_size, 837 &card->txbd_ring_pbase); 838 if (!card->txbd_ring_vbase) { 839 mwifiex_dbg(adapter, ERROR, 840 "allocate consistent memory (%d bytes) failed!\n", 841 card->txbd_ring_size); 842 return -ENOMEM; 843 } 844 mwifiex_dbg(adapter, DATA, 845 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n", 846 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase, 847 (u32)((u64)card->txbd_ring_pbase >> 32), 848 card->txbd_ring_size); 849 850 return mwifiex_init_txq_ring(adapter); 851 } 852 853 static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter) 854 { 855 struct pcie_service_card *card = adapter->card; 856 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 857 858 mwifiex_cleanup_txq_ring(adapter); 859 860 if (card->txbd_ring_vbase) 861 pci_free_consistent(card->dev, card->txbd_ring_size, 862 card->txbd_ring_vbase, 863 card->txbd_ring_pbase); 864 card->txbd_ring_size = 0; 865 card->txbd_wrptr = 0; 866 card->txbd_rdptr = 0 | reg->tx_rollover_ind; 867 card->txbd_ring_vbase = NULL; 868 card->txbd_ring_pbase = 0; 869 870 return 0; 871 } 872 873 /* 874 * This function creates buffer descriptor ring for RX 875 */ 876 static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter) 877 { 878 struct pcie_service_card *card = adapter->card; 879 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 880 881 /* 882 * driver maintaines the read pointer and firmware maintaines the write 883 * pointer. The write pointer starts at 0 (zero) while the read pointer 884 * starts at zero with rollover bit set 885 */ 886 card->rxbd_wrptr = 0; 887 card->rxbd_rdptr = reg->rx_rollover_ind; 888 889 if (reg->pfu_enabled) 890 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 891 MWIFIEX_MAX_TXRX_BD; 892 else 893 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 894 MWIFIEX_MAX_TXRX_BD; 895 896 mwifiex_dbg(adapter, INFO, 897 "info: rxbd_ring: Allocating %d bytes\n", 898 card->rxbd_ring_size); 899 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev, 900 card->rxbd_ring_size, 901 &card->rxbd_ring_pbase); 902 if (!card->rxbd_ring_vbase) { 903 mwifiex_dbg(adapter, ERROR, 904 "allocate consistent memory (%d bytes) failed!\n", 905 card->rxbd_ring_size); 906 return -ENOMEM; 907 } 908 909 mwifiex_dbg(adapter, DATA, 910 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n", 911 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase, 912 (u32)((u64)card->rxbd_ring_pbase >> 32), 913 card->rxbd_ring_size); 914 915 return mwifiex_init_rxq_ring(adapter); 916 } 917 918 /* 919 * This function deletes Buffer descriptor ring for RX 920 */ 921 static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter) 922 { 923 struct pcie_service_card *card = adapter->card; 924 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 925 926 mwifiex_cleanup_rxq_ring(adapter); 927 928 if (card->rxbd_ring_vbase) 929 pci_free_consistent(card->dev, card->rxbd_ring_size, 930 card->rxbd_ring_vbase, 931 card->rxbd_ring_pbase); 932 card->rxbd_ring_size = 0; 933 card->rxbd_wrptr = 0; 934 card->rxbd_rdptr = 0 | reg->rx_rollover_ind; 935 card->rxbd_ring_vbase = NULL; 936 card->rxbd_ring_pbase = 0; 937 938 return 0; 939 } 940 941 /* 942 * This function creates buffer descriptor ring for Events 943 */ 944 static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter) 945 { 946 struct pcie_service_card *card = adapter->card; 947 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 948 949 /* 950 * driver maintaines the read pointer and firmware maintaines the write 951 * pointer. The write pointer starts at 0 (zero) while the read pointer 952 * starts at zero with rollover bit set 953 */ 954 card->evtbd_wrptr = 0; 955 card->evtbd_rdptr = reg->evt_rollover_ind; 956 957 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) * 958 MWIFIEX_MAX_EVT_BD; 959 960 mwifiex_dbg(adapter, INFO, 961 "info: evtbd_ring: Allocating %d bytes\n", 962 card->evtbd_ring_size); 963 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev, 964 card->evtbd_ring_size, 965 &card->evtbd_ring_pbase); 966 if (!card->evtbd_ring_vbase) { 967 mwifiex_dbg(adapter, ERROR, 968 "allocate consistent memory (%d bytes) failed!\n", 969 card->evtbd_ring_size); 970 return -ENOMEM; 971 } 972 973 mwifiex_dbg(adapter, EVENT, 974 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n", 975 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase, 976 (u32)((u64)card->evtbd_ring_pbase >> 32), 977 card->evtbd_ring_size); 978 979 return mwifiex_pcie_init_evt_ring(adapter); 980 } 981 982 /* 983 * This function deletes Buffer descriptor ring for Events 984 */ 985 static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter) 986 { 987 struct pcie_service_card *card = adapter->card; 988 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 989 990 mwifiex_cleanup_evt_ring(adapter); 991 992 if (card->evtbd_ring_vbase) 993 pci_free_consistent(card->dev, card->evtbd_ring_size, 994 card->evtbd_ring_vbase, 995 card->evtbd_ring_pbase); 996 card->evtbd_wrptr = 0; 997 card->evtbd_rdptr = 0 | reg->evt_rollover_ind; 998 card->evtbd_ring_size = 0; 999 card->evtbd_ring_vbase = NULL; 1000 card->evtbd_ring_pbase = 0; 1001 1002 return 0; 1003 } 1004 1005 /* 1006 * This function allocates a buffer for CMDRSP 1007 */ 1008 static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter) 1009 { 1010 struct pcie_service_card *card = adapter->card; 1011 struct sk_buff *skb; 1012 1013 /* Allocate memory for receiving command response data */ 1014 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 1015 if (!skb) { 1016 mwifiex_dbg(adapter, ERROR, 1017 "Unable to allocate skb for command response data.\n"); 1018 return -ENOMEM; 1019 } 1020 skb_put(skb, MWIFIEX_UPLD_SIZE); 1021 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1022 PCI_DMA_FROMDEVICE)) 1023 return -1; 1024 1025 card->cmdrsp_buf = skb; 1026 1027 return 0; 1028 } 1029 1030 /* 1031 * This function deletes a buffer for CMDRSP 1032 */ 1033 static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter) 1034 { 1035 struct pcie_service_card *card; 1036 1037 if (!adapter) 1038 return 0; 1039 1040 card = adapter->card; 1041 1042 if (card && card->cmdrsp_buf) { 1043 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf, 1044 PCI_DMA_FROMDEVICE); 1045 dev_kfree_skb_any(card->cmdrsp_buf); 1046 } 1047 1048 if (card && card->cmd_buf) { 1049 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1050 PCI_DMA_TODEVICE); 1051 dev_kfree_skb_any(card->cmd_buf); 1052 } 1053 return 0; 1054 } 1055 1056 /* 1057 * This function allocates a buffer for sleep cookie 1058 */ 1059 static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter) 1060 { 1061 struct pcie_service_card *card = adapter->card; 1062 u32 tmp; 1063 1064 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32), 1065 &card->sleep_cookie_pbase); 1066 if (!card->sleep_cookie_vbase) { 1067 mwifiex_dbg(adapter, ERROR, 1068 "pci_alloc_consistent failed!\n"); 1069 return -ENOMEM; 1070 } 1071 /* Init val of Sleep Cookie */ 1072 tmp = FW_AWAKE_COOKIE; 1073 put_unaligned(tmp, card->sleep_cookie_vbase); 1074 1075 mwifiex_dbg(adapter, INFO, 1076 "alloc_scook: sleep cookie=0x%x\n", 1077 get_unaligned(card->sleep_cookie_vbase)); 1078 1079 return 0; 1080 } 1081 1082 /* 1083 * This function deletes buffer for sleep cookie 1084 */ 1085 static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter) 1086 { 1087 struct pcie_service_card *card; 1088 1089 if (!adapter) 1090 return 0; 1091 1092 card = adapter->card; 1093 1094 if (card && card->sleep_cookie_vbase) { 1095 pci_free_consistent(card->dev, sizeof(u32), 1096 card->sleep_cookie_vbase, 1097 card->sleep_cookie_pbase); 1098 card->sleep_cookie_vbase = NULL; 1099 } 1100 1101 return 0; 1102 } 1103 1104 /* This function flushes the TX buffer descriptor ring 1105 * This function defined as handler is also called while cleaning TXRX 1106 * during disconnect/ bss stop. 1107 */ 1108 static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter) 1109 { 1110 struct pcie_service_card *card = adapter->card; 1111 1112 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) { 1113 card->txbd_flush = 1; 1114 /* write pointer already set at last send 1115 * send dnld-rdy intr again, wait for completion. 1116 */ 1117 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1118 CPU_INTR_DNLD_RDY)) { 1119 mwifiex_dbg(adapter, ERROR, 1120 "failed to assert dnld-rdy interrupt.\n"); 1121 return -1; 1122 } 1123 } 1124 return 0; 1125 } 1126 1127 /* 1128 * This function unmaps and frees downloaded data buffer 1129 */ 1130 static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter) 1131 { 1132 struct sk_buff *skb; 1133 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0; 1134 struct mwifiex_pcie_buf_desc *desc; 1135 struct mwifiex_pfu_buf_desc *desc2; 1136 struct pcie_service_card *card = adapter->card; 1137 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1138 1139 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1140 mwifiex_pm_wakeup_card(adapter); 1141 1142 /* Read the TX ring read pointer set by firmware */ 1143 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) { 1144 mwifiex_dbg(adapter, ERROR, 1145 "SEND COMP: failed to read reg->tx_rdptr\n"); 1146 return -1; 1147 } 1148 1149 mwifiex_dbg(adapter, DATA, 1150 "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n", 1151 card->txbd_rdptr, rdptr); 1152 1153 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1154 /* free from previous txbd_rdptr to current txbd_rdptr */ 1155 while (((card->txbd_rdptr & reg->tx_mask) != 1156 (rdptr & reg->tx_mask)) || 1157 ((card->txbd_rdptr & reg->tx_rollover_ind) != 1158 (rdptr & reg->tx_rollover_ind))) { 1159 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >> 1160 reg->tx_start_ptr; 1161 1162 skb = card->tx_buf_list[wrdoneidx]; 1163 1164 if (skb) { 1165 mwifiex_dbg(adapter, DATA, 1166 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n", 1167 skb, wrdoneidx); 1168 mwifiex_unmap_pci_memory(adapter, skb, 1169 PCI_DMA_TODEVICE); 1170 1171 unmap_count++; 1172 1173 if (card->txbd_flush) 1174 mwifiex_write_data_complete(adapter, skb, 0, 1175 -1); 1176 else 1177 mwifiex_write_data_complete(adapter, skb, 0, 0); 1178 atomic_dec(&adapter->tx_hw_pending); 1179 } 1180 1181 card->tx_buf_list[wrdoneidx] = NULL; 1182 1183 if (reg->pfu_enabled) { 1184 desc2 = card->txbd_ring[wrdoneidx]; 1185 memset(desc2, 0, sizeof(*desc2)); 1186 } else { 1187 desc = card->txbd_ring[wrdoneidx]; 1188 memset(desc, 0, sizeof(*desc)); 1189 } 1190 switch (card->dev->device) { 1191 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1192 card->txbd_rdptr++; 1193 break; 1194 case PCIE_DEVICE_ID_MARVELL_88W8897: 1195 case PCIE_DEVICE_ID_MARVELL_88W8997: 1196 card->txbd_rdptr += reg->ring_tx_start_ptr; 1197 break; 1198 } 1199 1200 1201 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs) 1202 card->txbd_rdptr = ((card->txbd_rdptr & 1203 reg->tx_rollover_ind) ^ 1204 reg->tx_rollover_ind); 1205 } 1206 1207 if (unmap_count) 1208 adapter->data_sent = false; 1209 1210 if (card->txbd_flush) { 1211 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) 1212 card->txbd_flush = 0; 1213 else 1214 mwifiex_clean_pcie_ring_buf(adapter); 1215 } 1216 1217 return 0; 1218 } 1219 1220 /* This function sends data buffer to device. First 4 bytes of payload 1221 * are filled with payload length and payload type. Then this payload 1222 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly. 1223 * Download ready interrupt to FW is deffered if Tx ring is not full and 1224 * additional payload can be accomodated. 1225 * Caller must ensure tx_param parameter to this function is not NULL. 1226 */ 1227 static int 1228 mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb, 1229 struct mwifiex_tx_param *tx_param) 1230 { 1231 struct pcie_service_card *card = adapter->card; 1232 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1233 u32 wrindx, num_tx_buffs, rx_val; 1234 int ret; 1235 dma_addr_t buf_pa; 1236 struct mwifiex_pcie_buf_desc *desc = NULL; 1237 struct mwifiex_pfu_buf_desc *desc2 = NULL; 1238 1239 if (!(skb->data && skb->len)) { 1240 mwifiex_dbg(adapter, ERROR, 1241 "%s(): invalid parameter <%p, %#x>\n", 1242 __func__, skb->data, skb->len); 1243 return -1; 1244 } 1245 1246 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1247 mwifiex_pm_wakeup_card(adapter); 1248 1249 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1250 mwifiex_dbg(adapter, DATA, 1251 "info: SEND DATA: <Rd: %#x, Wr: %#x>\n", 1252 card->txbd_rdptr, card->txbd_wrptr); 1253 if (mwifiex_pcie_txbd_not_full(card)) { 1254 u8 *payload; 1255 1256 adapter->data_sent = true; 1257 payload = skb->data; 1258 put_unaligned_le16((u16)skb->len, payload + 0); 1259 put_unaligned_le16(MWIFIEX_TYPE_DATA, payload + 2); 1260 1261 if (mwifiex_map_pci_memory(adapter, skb, skb->len, 1262 PCI_DMA_TODEVICE)) 1263 return -1; 1264 1265 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr; 1266 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1267 card->tx_buf_list[wrindx] = skb; 1268 atomic_inc(&adapter->tx_hw_pending); 1269 1270 if (reg->pfu_enabled) { 1271 desc2 = card->txbd_ring[wrindx]; 1272 desc2->paddr = buf_pa; 1273 desc2->len = (u16)skb->len; 1274 desc2->frag_len = (u16)skb->len; 1275 desc2->offset = 0; 1276 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1277 MWIFIEX_BD_FLAG_LAST_DESC; 1278 } else { 1279 desc = card->txbd_ring[wrindx]; 1280 desc->paddr = buf_pa; 1281 desc->len = (u16)skb->len; 1282 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1283 MWIFIEX_BD_FLAG_LAST_DESC; 1284 } 1285 1286 switch (card->dev->device) { 1287 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1288 card->txbd_wrptr++; 1289 break; 1290 case PCIE_DEVICE_ID_MARVELL_88W8897: 1291 case PCIE_DEVICE_ID_MARVELL_88W8997: 1292 card->txbd_wrptr += reg->ring_tx_start_ptr; 1293 break; 1294 } 1295 1296 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs) 1297 card->txbd_wrptr = ((card->txbd_wrptr & 1298 reg->tx_rollover_ind) ^ 1299 reg->tx_rollover_ind); 1300 1301 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask; 1302 /* Write the TX ring write pointer in to reg->tx_wrptr */ 1303 if (mwifiex_write_reg(adapter, reg->tx_wrptr, 1304 card->txbd_wrptr | rx_val)) { 1305 mwifiex_dbg(adapter, ERROR, 1306 "SEND DATA: failed to write reg->tx_wrptr\n"); 1307 ret = -1; 1308 goto done_unmap; 1309 } 1310 if ((mwifiex_pcie_txbd_not_full(card)) && 1311 tx_param->next_pkt_len) { 1312 /* have more packets and TxBD still can hold more */ 1313 mwifiex_dbg(adapter, DATA, 1314 "SEND DATA: delay dnld-rdy interrupt.\n"); 1315 adapter->data_sent = false; 1316 } else { 1317 /* Send the TX ready interrupt */ 1318 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1319 CPU_INTR_DNLD_RDY)) { 1320 mwifiex_dbg(adapter, ERROR, 1321 "SEND DATA: failed to assert dnld-rdy interrupt.\n"); 1322 ret = -1; 1323 goto done_unmap; 1324 } 1325 } 1326 mwifiex_dbg(adapter, DATA, 1327 "info: SEND DATA: Updated <Rd: %#x, Wr:\t" 1328 "%#x> and sent packet to firmware successfully\n", 1329 card->txbd_rdptr, card->txbd_wrptr); 1330 } else { 1331 mwifiex_dbg(adapter, DATA, 1332 "info: TX Ring full, can't send packets to fw\n"); 1333 adapter->data_sent = true; 1334 /* Send the TX ready interrupt */ 1335 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1336 CPU_INTR_DNLD_RDY)) 1337 mwifiex_dbg(adapter, ERROR, 1338 "SEND DATA: failed to assert door-bell intr\n"); 1339 return -EBUSY; 1340 } 1341 1342 return -EINPROGRESS; 1343 done_unmap: 1344 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1345 card->tx_buf_list[wrindx] = NULL; 1346 atomic_dec(&adapter->tx_hw_pending); 1347 if (reg->pfu_enabled) 1348 memset(desc2, 0, sizeof(*desc2)); 1349 else 1350 memset(desc, 0, sizeof(*desc)); 1351 1352 return ret; 1353 } 1354 1355 /* 1356 * This function handles received buffer ring and 1357 * dispatches packets to upper 1358 */ 1359 static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter) 1360 { 1361 struct pcie_service_card *card = adapter->card; 1362 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1363 u32 wrptr, rd_index, tx_val; 1364 dma_addr_t buf_pa; 1365 int ret = 0; 1366 struct sk_buff *skb_tmp = NULL; 1367 struct mwifiex_pcie_buf_desc *desc; 1368 struct mwifiex_pfu_buf_desc *desc2; 1369 1370 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1371 mwifiex_pm_wakeup_card(adapter); 1372 1373 /* Read the RX ring Write pointer set by firmware */ 1374 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1375 mwifiex_dbg(adapter, ERROR, 1376 "RECV DATA: failed to read reg->rx_wrptr\n"); 1377 ret = -1; 1378 goto done; 1379 } 1380 card->rxbd_wrptr = wrptr; 1381 1382 while (((wrptr & reg->rx_mask) != 1383 (card->rxbd_rdptr & reg->rx_mask)) || 1384 ((wrptr & reg->rx_rollover_ind) == 1385 (card->rxbd_rdptr & reg->rx_rollover_ind))) { 1386 struct sk_buff *skb_data; 1387 u16 rx_len; 1388 1389 rd_index = card->rxbd_rdptr & reg->rx_mask; 1390 skb_data = card->rx_buf_list[rd_index]; 1391 1392 /* If skb allocation was failed earlier for Rx packet, 1393 * rx_buf_list[rd_index] would have been left with a NULL. 1394 */ 1395 if (!skb_data) 1396 return -ENOMEM; 1397 1398 mwifiex_unmap_pci_memory(adapter, skb_data, PCI_DMA_FROMDEVICE); 1399 card->rx_buf_list[rd_index] = NULL; 1400 1401 /* Get data length from interface header - 1402 * first 2 bytes for len, next 2 bytes is for type 1403 */ 1404 rx_len = get_unaligned_le16(skb_data->data); 1405 if (WARN_ON(rx_len <= adapter->intf_hdr_len || 1406 rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) { 1407 mwifiex_dbg(adapter, ERROR, 1408 "Invalid RX len %d, Rd=%#x, Wr=%#x\n", 1409 rx_len, card->rxbd_rdptr, wrptr); 1410 dev_kfree_skb_any(skb_data); 1411 } else { 1412 skb_put(skb_data, rx_len); 1413 mwifiex_dbg(adapter, DATA, 1414 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n", 1415 card->rxbd_rdptr, wrptr, rx_len); 1416 skb_pull(skb_data, adapter->intf_hdr_len); 1417 if (adapter->rx_work_enabled) { 1418 skb_queue_tail(&adapter->rx_data_q, skb_data); 1419 adapter->data_received = true; 1420 atomic_inc(&adapter->rx_pending); 1421 } else { 1422 mwifiex_handle_rx_packet(adapter, skb_data); 1423 } 1424 } 1425 1426 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 1427 GFP_KERNEL); 1428 if (!skb_tmp) { 1429 mwifiex_dbg(adapter, ERROR, 1430 "Unable to allocate skb.\n"); 1431 return -ENOMEM; 1432 } 1433 1434 if (mwifiex_map_pci_memory(adapter, skb_tmp, 1435 MWIFIEX_RX_DATA_BUF_SIZE, 1436 PCI_DMA_FROMDEVICE)) 1437 return -1; 1438 1439 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp); 1440 1441 mwifiex_dbg(adapter, INFO, 1442 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n", 1443 skb_tmp, rd_index); 1444 card->rx_buf_list[rd_index] = skb_tmp; 1445 1446 if (reg->pfu_enabled) { 1447 desc2 = card->rxbd_ring[rd_index]; 1448 desc2->paddr = buf_pa; 1449 desc2->len = skb_tmp->len; 1450 desc2->frag_len = skb_tmp->len; 1451 desc2->offset = 0; 1452 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop; 1453 } else { 1454 desc = card->rxbd_ring[rd_index]; 1455 desc->paddr = buf_pa; 1456 desc->len = skb_tmp->len; 1457 desc->flags = 0; 1458 } 1459 1460 if ((++card->rxbd_rdptr & reg->rx_mask) == 1461 MWIFIEX_MAX_TXRX_BD) { 1462 card->rxbd_rdptr = ((card->rxbd_rdptr & 1463 reg->rx_rollover_ind) ^ 1464 reg->rx_rollover_ind); 1465 } 1466 mwifiex_dbg(adapter, DATA, 1467 "info: RECV DATA: <Rd: %#x, Wr: %#x>\n", 1468 card->rxbd_rdptr, wrptr); 1469 1470 tx_val = card->txbd_wrptr & reg->tx_wrap_mask; 1471 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1472 if (mwifiex_write_reg(adapter, reg->rx_rdptr, 1473 card->rxbd_rdptr | tx_val)) { 1474 mwifiex_dbg(adapter, DATA, 1475 "RECV DATA: failed to write reg->rx_rdptr\n"); 1476 ret = -1; 1477 goto done; 1478 } 1479 1480 /* Read the RX ring Write pointer set by firmware */ 1481 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1482 mwifiex_dbg(adapter, ERROR, 1483 "RECV DATA: failed to read reg->rx_wrptr\n"); 1484 ret = -1; 1485 goto done; 1486 } 1487 mwifiex_dbg(adapter, DATA, 1488 "info: RECV DATA: Rcvd packet from fw successfully\n"); 1489 card->rxbd_wrptr = wrptr; 1490 } 1491 1492 done: 1493 return ret; 1494 } 1495 1496 /* 1497 * This function downloads the boot command to device 1498 */ 1499 static int 1500 mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1501 { 1502 dma_addr_t buf_pa; 1503 struct pcie_service_card *card = adapter->card; 1504 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1505 1506 if (!(skb->data && skb->len)) { 1507 mwifiex_dbg(adapter, ERROR, 1508 "Invalid parameter in %s <%p. len %d>\n", 1509 __func__, skb->data, skb->len); 1510 return -1; 1511 } 1512 1513 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE)) 1514 return -1; 1515 1516 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1517 1518 /* Write the lower 32bits of the physical address to low command 1519 * address scratch register 1520 */ 1521 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) { 1522 mwifiex_dbg(adapter, ERROR, 1523 "%s: failed to write download command to boot code.\n", 1524 __func__); 1525 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1526 return -1; 1527 } 1528 1529 /* Write the upper 32bits of the physical address to high command 1530 * address scratch register 1531 */ 1532 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1533 (u32)((u64)buf_pa >> 32))) { 1534 mwifiex_dbg(adapter, ERROR, 1535 "%s: failed to write download command to boot code.\n", 1536 __func__); 1537 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1538 return -1; 1539 } 1540 1541 /* Write the command length to cmd_size scratch register */ 1542 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) { 1543 mwifiex_dbg(adapter, ERROR, 1544 "%s: failed to write command len to cmd_size scratch reg\n", 1545 __func__); 1546 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1547 return -1; 1548 } 1549 1550 /* Ring the door bell */ 1551 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1552 CPU_INTR_DOOR_BELL)) { 1553 mwifiex_dbg(adapter, ERROR, 1554 "%s: failed to assert door-bell intr\n", __func__); 1555 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1556 return -1; 1557 } 1558 1559 return 0; 1560 } 1561 1562 /* This function init rx port in firmware which in turn enables to receive data 1563 * from device before transmitting any packet. 1564 */ 1565 static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter) 1566 { 1567 struct pcie_service_card *card = adapter->card; 1568 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1569 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask; 1570 1571 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1572 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr | 1573 tx_wrap)) { 1574 mwifiex_dbg(adapter, ERROR, 1575 "RECV DATA: failed to write reg->rx_rdptr\n"); 1576 return -1; 1577 } 1578 return 0; 1579 } 1580 1581 /* This function downloads commands to the device 1582 */ 1583 static int 1584 mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1585 { 1586 struct pcie_service_card *card = adapter->card; 1587 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1588 int ret = 0; 1589 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa; 1590 u8 *payload = (u8 *)skb->data; 1591 1592 if (!(skb->data && skb->len)) { 1593 mwifiex_dbg(adapter, ERROR, 1594 "Invalid parameter in %s <%p, %#x>\n", 1595 __func__, skb->data, skb->len); 1596 return -1; 1597 } 1598 1599 /* Make sure a command response buffer is available */ 1600 if (!card->cmdrsp_buf) { 1601 mwifiex_dbg(adapter, ERROR, 1602 "No response buffer available, send command failed\n"); 1603 return -EBUSY; 1604 } 1605 1606 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1607 mwifiex_pm_wakeup_card(adapter); 1608 1609 adapter->cmd_sent = true; 1610 1611 put_unaligned_le16((u16)skb->len, &payload[0]); 1612 put_unaligned_le16(MWIFIEX_TYPE_CMD, &payload[2]); 1613 1614 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE)) 1615 return -1; 1616 1617 card->cmd_buf = skb; 1618 /* 1619 * Need to keep a reference, since core driver might free up this 1620 * buffer before we've unmapped it. 1621 */ 1622 skb_get(skb); 1623 1624 /* To send a command, the driver will: 1625 1. Write the 64bit physical address of the data buffer to 1626 cmd response address low + cmd response address high 1627 2. Ring the door bell (i.e. set the door bell interrupt) 1628 1629 In response to door bell interrupt, the firmware will perform 1630 the DMA of the command packet (first header to obtain the total 1631 length and then rest of the command). 1632 */ 1633 1634 if (card->cmdrsp_buf) { 1635 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf); 1636 /* Write the lower 32bits of the cmdrsp buffer physical 1637 address */ 1638 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 1639 (u32)cmdrsp_buf_pa)) { 1640 mwifiex_dbg(adapter, ERROR, 1641 "Failed to write download cmd to boot code.\n"); 1642 ret = -1; 1643 goto done; 1644 } 1645 /* Write the upper 32bits of the cmdrsp buffer physical 1646 address */ 1647 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 1648 (u32)((u64)cmdrsp_buf_pa >> 32))) { 1649 mwifiex_dbg(adapter, ERROR, 1650 "Failed to write download cmd to boot code.\n"); 1651 ret = -1; 1652 goto done; 1653 } 1654 } 1655 1656 cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf); 1657 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */ 1658 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, 1659 (u32)cmd_buf_pa)) { 1660 mwifiex_dbg(adapter, ERROR, 1661 "Failed to write download cmd to boot code.\n"); 1662 ret = -1; 1663 goto done; 1664 } 1665 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */ 1666 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1667 (u32)((u64)cmd_buf_pa >> 32))) { 1668 mwifiex_dbg(adapter, ERROR, 1669 "Failed to write download cmd to boot code.\n"); 1670 ret = -1; 1671 goto done; 1672 } 1673 1674 /* Write the command length to reg->cmd_size */ 1675 if (mwifiex_write_reg(adapter, reg->cmd_size, 1676 card->cmd_buf->len)) { 1677 mwifiex_dbg(adapter, ERROR, 1678 "Failed to write cmd len to reg->cmd_size\n"); 1679 ret = -1; 1680 goto done; 1681 } 1682 1683 /* Ring the door bell */ 1684 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1685 CPU_INTR_DOOR_BELL)) { 1686 mwifiex_dbg(adapter, ERROR, 1687 "Failed to assert door-bell intr\n"); 1688 ret = -1; 1689 goto done; 1690 } 1691 1692 done: 1693 if (ret) 1694 adapter->cmd_sent = false; 1695 1696 return 0; 1697 } 1698 1699 /* 1700 * This function handles command complete interrupt 1701 */ 1702 static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter) 1703 { 1704 struct pcie_service_card *card = adapter->card; 1705 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1706 struct sk_buff *skb = card->cmdrsp_buf; 1707 int count = 0; 1708 u16 rx_len; 1709 1710 mwifiex_dbg(adapter, CMD, 1711 "info: Rx CMD Response\n"); 1712 1713 if (adapter->curr_cmd) 1714 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_FROMDEVICE); 1715 else 1716 pci_dma_sync_single_for_cpu(card->dev, 1717 MWIFIEX_SKB_DMA_ADDR(skb), 1718 MWIFIEX_UPLD_SIZE, 1719 PCI_DMA_FROMDEVICE); 1720 1721 /* Unmap the command as a response has been received. */ 1722 if (card->cmd_buf) { 1723 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1724 PCI_DMA_TODEVICE); 1725 dev_kfree_skb_any(card->cmd_buf); 1726 card->cmd_buf = NULL; 1727 } 1728 1729 rx_len = get_unaligned_le16(skb->data); 1730 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 1731 skb_trim(skb, rx_len); 1732 1733 if (!adapter->curr_cmd) { 1734 if (adapter->ps_state == PS_STATE_SLEEP_CFM) { 1735 pci_dma_sync_single_for_device(card->dev, 1736 MWIFIEX_SKB_DMA_ADDR(skb), 1737 MWIFIEX_SLEEP_COOKIE_SIZE, 1738 PCI_DMA_FROMDEVICE); 1739 if (mwifiex_write_reg(adapter, 1740 PCIE_CPU_INT_EVENT, 1741 CPU_INTR_SLEEP_CFM_DONE)) { 1742 mwifiex_dbg(adapter, ERROR, 1743 "Write register failed\n"); 1744 return -1; 1745 } 1746 mwifiex_delay_for_sleep_cookie(adapter, 1747 MWIFIEX_MAX_DELAY_COUNT); 1748 mwifiex_unmap_pci_memory(adapter, skb, 1749 PCI_DMA_FROMDEVICE); 1750 skb_pull(skb, adapter->intf_hdr_len); 1751 while (reg->sleep_cookie && (count++ < 10) && 1752 mwifiex_pcie_ok_to_access_hw(adapter)) 1753 usleep_range(50, 60); 1754 mwifiex_pcie_enable_host_int(adapter); 1755 mwifiex_process_sleep_confirm_resp(adapter, skb->data, 1756 skb->len); 1757 } else { 1758 mwifiex_dbg(adapter, ERROR, 1759 "There is no command but got cmdrsp\n"); 1760 } 1761 memcpy(adapter->upld_buf, skb->data, 1762 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len)); 1763 skb_push(skb, adapter->intf_hdr_len); 1764 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1765 PCI_DMA_FROMDEVICE)) 1766 return -1; 1767 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) { 1768 skb_pull(skb, adapter->intf_hdr_len); 1769 adapter->curr_cmd->resp_skb = skb; 1770 adapter->cmd_resp_received = true; 1771 /* Take the pointer and set it to CMD node and will 1772 return in the response complete callback */ 1773 card->cmdrsp_buf = NULL; 1774 1775 /* Clear the cmd-rsp buffer address in scratch registers. This 1776 will prevent firmware from writing to the same response 1777 buffer again. */ 1778 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) { 1779 mwifiex_dbg(adapter, ERROR, 1780 "cmd_done: failed to clear cmd_rsp_addr_lo\n"); 1781 return -1; 1782 } 1783 /* Write the upper 32bits of the cmdrsp buffer physical 1784 address */ 1785 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) { 1786 mwifiex_dbg(adapter, ERROR, 1787 "cmd_done: failed to clear cmd_rsp_addr_hi\n"); 1788 return -1; 1789 } 1790 } 1791 1792 return 0; 1793 } 1794 1795 /* 1796 * Command Response processing complete handler 1797 */ 1798 static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter, 1799 struct sk_buff *skb) 1800 { 1801 struct pcie_service_card *card = adapter->card; 1802 1803 if (skb) { 1804 card->cmdrsp_buf = skb; 1805 skb_push(card->cmdrsp_buf, adapter->intf_hdr_len); 1806 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1807 PCI_DMA_FROMDEVICE)) 1808 return -1; 1809 } 1810 1811 return 0; 1812 } 1813 1814 /* 1815 * This function handles firmware event ready interrupt 1816 */ 1817 static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter) 1818 { 1819 struct pcie_service_card *card = adapter->card; 1820 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1821 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 1822 u32 wrptr, event; 1823 struct mwifiex_evt_buf_desc *desc; 1824 1825 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1826 mwifiex_pm_wakeup_card(adapter); 1827 1828 if (adapter->event_received) { 1829 mwifiex_dbg(adapter, EVENT, 1830 "info: Event being processed,\t" 1831 "do not process this interrupt just yet\n"); 1832 return 0; 1833 } 1834 1835 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 1836 mwifiex_dbg(adapter, ERROR, 1837 "info: Invalid read pointer...\n"); 1838 return -1; 1839 } 1840 1841 /* Read the event ring write pointer set by firmware */ 1842 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 1843 mwifiex_dbg(adapter, ERROR, 1844 "EventReady: failed to read reg->evt_wrptr\n"); 1845 return -1; 1846 } 1847 1848 mwifiex_dbg(adapter, EVENT, 1849 "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>", 1850 card->evtbd_rdptr, wrptr); 1851 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr 1852 & MWIFIEX_EVTBD_MASK)) || 1853 ((wrptr & reg->evt_rollover_ind) == 1854 (card->evtbd_rdptr & reg->evt_rollover_ind))) { 1855 struct sk_buff *skb_cmd; 1856 __le16 data_len = 0; 1857 u16 evt_len; 1858 1859 mwifiex_dbg(adapter, INFO, 1860 "info: Read Index: %d\n", rdptr); 1861 skb_cmd = card->evt_buf_list[rdptr]; 1862 mwifiex_unmap_pci_memory(adapter, skb_cmd, PCI_DMA_FROMDEVICE); 1863 1864 /* Take the pointer and set it to event pointer in adapter 1865 and will return back after event handling callback */ 1866 card->evt_buf_list[rdptr] = NULL; 1867 desc = card->evtbd_ring[rdptr]; 1868 memset(desc, 0, sizeof(*desc)); 1869 1870 event = get_unaligned_le32( 1871 &skb_cmd->data[adapter->intf_hdr_len]); 1872 adapter->event_cause = event; 1873 /* The first 4bytes will be the event transfer header 1874 len is 2 bytes followed by type which is 2 bytes */ 1875 memcpy(&data_len, skb_cmd->data, sizeof(__le16)); 1876 evt_len = le16_to_cpu(data_len); 1877 skb_trim(skb_cmd, evt_len); 1878 skb_pull(skb_cmd, adapter->intf_hdr_len); 1879 mwifiex_dbg(adapter, EVENT, 1880 "info: Event length: %d\n", evt_len); 1881 1882 if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE)) 1883 memcpy(adapter->event_body, skb_cmd->data + 1884 MWIFIEX_EVENT_HEADER_LEN, evt_len - 1885 MWIFIEX_EVENT_HEADER_LEN); 1886 1887 adapter->event_received = true; 1888 adapter->event_skb = skb_cmd; 1889 1890 /* Do not update the event read pointer here, wait till the 1891 buffer is released. This is just to make things simpler, 1892 we need to find a better method of managing these buffers. 1893 */ 1894 } else { 1895 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1896 CPU_INTR_EVENT_DONE)) { 1897 mwifiex_dbg(adapter, ERROR, 1898 "Write register failed\n"); 1899 return -1; 1900 } 1901 } 1902 1903 return 0; 1904 } 1905 1906 /* 1907 * Event processing complete handler 1908 */ 1909 static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter, 1910 struct sk_buff *skb) 1911 { 1912 struct pcie_service_card *card = adapter->card; 1913 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1914 int ret = 0; 1915 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 1916 u32 wrptr; 1917 struct mwifiex_evt_buf_desc *desc; 1918 1919 if (!skb) 1920 return 0; 1921 1922 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 1923 mwifiex_dbg(adapter, ERROR, 1924 "event_complete: Invalid rdptr 0x%x\n", 1925 rdptr); 1926 return -EINVAL; 1927 } 1928 1929 /* Read the event ring write pointer set by firmware */ 1930 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 1931 mwifiex_dbg(adapter, ERROR, 1932 "event_complete: failed to read reg->evt_wrptr\n"); 1933 return -1; 1934 } 1935 1936 if (!card->evt_buf_list[rdptr]) { 1937 skb_push(skb, adapter->intf_hdr_len); 1938 skb_put(skb, MAX_EVENT_SIZE - skb->len); 1939 if (mwifiex_map_pci_memory(adapter, skb, 1940 MAX_EVENT_SIZE, 1941 PCI_DMA_FROMDEVICE)) 1942 return -1; 1943 card->evt_buf_list[rdptr] = skb; 1944 desc = card->evtbd_ring[rdptr]; 1945 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb); 1946 desc->len = (u16)skb->len; 1947 desc->flags = 0; 1948 skb = NULL; 1949 } else { 1950 mwifiex_dbg(adapter, ERROR, 1951 "info: ERROR: buf still valid at index %d, <%p, %p>\n", 1952 rdptr, card->evt_buf_list[rdptr], skb); 1953 } 1954 1955 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) { 1956 card->evtbd_rdptr = ((card->evtbd_rdptr & 1957 reg->evt_rollover_ind) ^ 1958 reg->evt_rollover_ind); 1959 } 1960 1961 mwifiex_dbg(adapter, EVENT, 1962 "info: Updated <Rd: 0x%x, Wr: 0x%x>", 1963 card->evtbd_rdptr, wrptr); 1964 1965 /* Write the event ring read pointer in to reg->evt_rdptr */ 1966 if (mwifiex_write_reg(adapter, reg->evt_rdptr, 1967 card->evtbd_rdptr)) { 1968 mwifiex_dbg(adapter, ERROR, 1969 "event_complete: failed to read reg->evt_rdptr\n"); 1970 return -1; 1971 } 1972 1973 mwifiex_dbg(adapter, EVENT, 1974 "info: Check Events Again\n"); 1975 ret = mwifiex_pcie_process_event_ready(adapter); 1976 1977 return ret; 1978 } 1979 1980 /* Combo firmware image is a combination of 1981 * (1) combo crc heaer, start with CMD5 1982 * (2) bluetooth image, start with CMD7, end with CMD6, data wrapped in CMD1. 1983 * (3) wifi image. 1984 * 1985 * This function bypass the header and bluetooth part, return 1986 * the offset of tail wifi-only part. 1987 */ 1988 1989 static int mwifiex_extract_wifi_fw(struct mwifiex_adapter *adapter, 1990 const void *firmware, u32 firmware_len) { 1991 const struct mwifiex_fw_data *fwdata; 1992 u32 offset = 0, data_len, dnld_cmd; 1993 int ret = 0; 1994 bool cmd7_before = false; 1995 1996 while (1) { 1997 /* Check for integer and buffer overflow */ 1998 if (offset + sizeof(fwdata->header) < sizeof(fwdata->header) || 1999 offset + sizeof(fwdata->header) >= firmware_len) { 2000 mwifiex_dbg(adapter, ERROR, 2001 "extract wifi-only fw failure!\n"); 2002 ret = -1; 2003 goto done; 2004 } 2005 2006 fwdata = firmware + offset; 2007 dnld_cmd = le32_to_cpu(fwdata->header.dnld_cmd); 2008 data_len = le32_to_cpu(fwdata->header.data_length); 2009 2010 /* Skip past header */ 2011 offset += sizeof(fwdata->header); 2012 2013 switch (dnld_cmd) { 2014 case MWIFIEX_FW_DNLD_CMD_1: 2015 if (!cmd7_before) { 2016 mwifiex_dbg(adapter, ERROR, 2017 "no cmd7 before cmd1!\n"); 2018 ret = -1; 2019 goto done; 2020 } 2021 if (offset + data_len < data_len) { 2022 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2023 ret = -1; 2024 goto done; 2025 } 2026 offset += data_len; 2027 break; 2028 case MWIFIEX_FW_DNLD_CMD_5: 2029 /* Check for integer overflow */ 2030 if (offset + data_len < data_len) { 2031 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2032 ret = -1; 2033 goto done; 2034 } 2035 offset += data_len; 2036 break; 2037 case MWIFIEX_FW_DNLD_CMD_6: 2038 /* Check for integer overflow */ 2039 if (offset + data_len < data_len) { 2040 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2041 ret = -1; 2042 goto done; 2043 } 2044 offset += data_len; 2045 if (offset >= firmware_len) { 2046 mwifiex_dbg(adapter, ERROR, 2047 "extract wifi-only fw failure!\n"); 2048 ret = -1; 2049 } else { 2050 ret = offset; 2051 } 2052 goto done; 2053 case MWIFIEX_FW_DNLD_CMD_7: 2054 cmd7_before = true; 2055 break; 2056 default: 2057 mwifiex_dbg(adapter, ERROR, "unknown dnld_cmd %d\n", 2058 dnld_cmd); 2059 ret = -1; 2060 goto done; 2061 } 2062 } 2063 2064 done: 2065 return ret; 2066 } 2067 2068 /* 2069 * This function downloads the firmware to the card. 2070 * 2071 * Firmware is downloaded to the card in blocks. Every block download 2072 * is tested for CRC errors, and retried a number of times before 2073 * returning failure. 2074 */ 2075 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter, 2076 struct mwifiex_fw_image *fw) 2077 { 2078 int ret; 2079 u8 *firmware = fw->fw_buf; 2080 u32 firmware_len = fw->fw_len; 2081 u32 offset = 0; 2082 struct sk_buff *skb; 2083 u32 txlen, tx_blocks = 0, tries, len, val; 2084 u32 block_retry_cnt = 0; 2085 struct pcie_service_card *card = adapter->card; 2086 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2087 2088 if (!firmware || !firmware_len) { 2089 mwifiex_dbg(adapter, ERROR, 2090 "No firmware image found! Terminating download\n"); 2091 return -1; 2092 } 2093 2094 mwifiex_dbg(adapter, INFO, 2095 "info: Downloading FW image (%d bytes)\n", 2096 firmware_len); 2097 2098 if (mwifiex_pcie_disable_host_int(adapter)) { 2099 mwifiex_dbg(adapter, ERROR, 2100 "%s: Disabling interrupts failed.\n", __func__); 2101 return -1; 2102 } 2103 2104 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 2105 if (!skb) { 2106 ret = -ENOMEM; 2107 goto done; 2108 } 2109 2110 ret = mwifiex_read_reg(adapter, PCIE_SCRATCH_13_REG, &val); 2111 if (ret) { 2112 mwifiex_dbg(adapter, FATAL, "Failed to read scratch register 13\n"); 2113 goto done; 2114 } 2115 2116 /* PCIE FLR case: extract wifi part from combo firmware*/ 2117 if (val == MWIFIEX_PCIE_FLR_HAPPENS) { 2118 ret = mwifiex_extract_wifi_fw(adapter, firmware, firmware_len); 2119 if (ret < 0) { 2120 mwifiex_dbg(adapter, ERROR, "Failed to extract wifi fw\n"); 2121 goto done; 2122 } 2123 offset = ret; 2124 mwifiex_dbg(adapter, MSG, 2125 "info: dnld wifi firmware from %d bytes\n", offset); 2126 } 2127 2128 /* Perform firmware data transfer */ 2129 do { 2130 u32 ireg_intr = 0; 2131 2132 /* More data? */ 2133 if (offset >= firmware_len) 2134 break; 2135 2136 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2137 ret = mwifiex_read_reg(adapter, reg->cmd_size, 2138 &len); 2139 if (ret) { 2140 mwifiex_dbg(adapter, FATAL, 2141 "Failed reading len from boot code\n"); 2142 goto done; 2143 } 2144 if (len) 2145 break; 2146 usleep_range(10, 20); 2147 } 2148 2149 if (!len) { 2150 break; 2151 } else if (len > MWIFIEX_UPLD_SIZE) { 2152 mwifiex_dbg(adapter, ERROR, 2153 "FW download failure @ %d, invalid length %d\n", 2154 offset, len); 2155 ret = -1; 2156 goto done; 2157 } 2158 2159 txlen = len; 2160 2161 if (len & BIT(0)) { 2162 block_retry_cnt++; 2163 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) { 2164 mwifiex_dbg(adapter, ERROR, 2165 "FW download failure @ %d, over max\t" 2166 "retry count\n", offset); 2167 ret = -1; 2168 goto done; 2169 } 2170 mwifiex_dbg(adapter, ERROR, 2171 "FW CRC error indicated by the\t" 2172 "helper: len = 0x%04X, txlen = %d\n", 2173 len, txlen); 2174 len &= ~BIT(0); 2175 /* Setting this to 0 to resend from same offset */ 2176 txlen = 0; 2177 } else { 2178 block_retry_cnt = 0; 2179 /* Set blocksize to transfer - checking for 2180 last block */ 2181 if (firmware_len - offset < txlen) 2182 txlen = firmware_len - offset; 2183 2184 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) / 2185 card->pcie.blksz_fw_dl; 2186 2187 /* Copy payload to buffer */ 2188 memmove(skb->data, &firmware[offset], txlen); 2189 } 2190 2191 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 2192 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl); 2193 2194 /* Send the boot command to device */ 2195 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) { 2196 mwifiex_dbg(adapter, ERROR, 2197 "Failed to send firmware download command\n"); 2198 ret = -1; 2199 goto done; 2200 } 2201 2202 /* Wait for the command done interrupt */ 2203 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2204 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS, 2205 &ireg_intr)) { 2206 mwifiex_dbg(adapter, ERROR, 2207 "%s: Failed to read\t" 2208 "interrupt status during fw dnld.\n", 2209 __func__); 2210 mwifiex_unmap_pci_memory(adapter, skb, 2211 PCI_DMA_TODEVICE); 2212 ret = -1; 2213 goto done; 2214 } 2215 if (!(ireg_intr & CPU_INTR_DOOR_BELL)) 2216 break; 2217 usleep_range(10, 20); 2218 } 2219 if (ireg_intr & CPU_INTR_DOOR_BELL) { 2220 mwifiex_dbg(adapter, ERROR, "%s: Card failed to ACK download\n", 2221 __func__); 2222 mwifiex_unmap_pci_memory(adapter, skb, 2223 PCI_DMA_TODEVICE); 2224 ret = -1; 2225 goto done; 2226 } 2227 2228 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 2229 2230 offset += txlen; 2231 } while (true); 2232 2233 mwifiex_dbg(adapter, MSG, 2234 "info: FW download over, size %d bytes\n", offset); 2235 2236 ret = 0; 2237 2238 done: 2239 dev_kfree_skb_any(skb); 2240 return ret; 2241 } 2242 2243 /* 2244 * This function checks the firmware status in card. 2245 */ 2246 static int 2247 mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num) 2248 { 2249 int ret = 0; 2250 u32 firmware_stat; 2251 struct pcie_service_card *card = adapter->card; 2252 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2253 u32 tries; 2254 2255 /* Mask spurios interrupts */ 2256 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK, 2257 HOST_INTR_MASK)) { 2258 mwifiex_dbg(adapter, ERROR, 2259 "Write register failed\n"); 2260 return -1; 2261 } 2262 2263 mwifiex_dbg(adapter, INFO, 2264 "Setting driver ready signature\n"); 2265 if (mwifiex_write_reg(adapter, reg->drv_rdy, 2266 FIRMWARE_READY_PCIE)) { 2267 mwifiex_dbg(adapter, ERROR, 2268 "Failed to write driver ready signature\n"); 2269 return -1; 2270 } 2271 2272 /* Wait for firmware initialization event */ 2273 for (tries = 0; tries < poll_num; tries++) { 2274 if (mwifiex_read_reg(adapter, reg->fw_status, 2275 &firmware_stat)) 2276 ret = -1; 2277 else 2278 ret = 0; 2279 2280 mwifiex_dbg(adapter, INFO, "Try %d if FW is ready <%d,%#x>", 2281 tries, ret, firmware_stat); 2282 2283 if (ret) 2284 continue; 2285 if (firmware_stat == FIRMWARE_READY_PCIE) { 2286 ret = 0; 2287 break; 2288 } else { 2289 msleep(100); 2290 ret = -1; 2291 } 2292 } 2293 2294 return ret; 2295 } 2296 2297 /* This function checks if WLAN is the winner. 2298 */ 2299 static int 2300 mwifiex_check_winner_status(struct mwifiex_adapter *adapter) 2301 { 2302 u32 winner = 0; 2303 int ret = 0; 2304 struct pcie_service_card *card = adapter->card; 2305 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2306 2307 if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) { 2308 ret = -1; 2309 } else if (!winner) { 2310 mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n"); 2311 adapter->winner = 1; 2312 } else { 2313 mwifiex_dbg(adapter, ERROR, 2314 "PCI-E is not the winner <%#x>", winner); 2315 } 2316 2317 return ret; 2318 } 2319 2320 /* 2321 * This function reads the interrupt status from card. 2322 */ 2323 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter, 2324 int msg_id) 2325 { 2326 u32 pcie_ireg; 2327 unsigned long flags; 2328 struct pcie_service_card *card = adapter->card; 2329 2330 if (card->msi_enable) { 2331 spin_lock_irqsave(&adapter->int_lock, flags); 2332 adapter->int_status = 1; 2333 spin_unlock_irqrestore(&adapter->int_lock, flags); 2334 return; 2335 } 2336 2337 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 2338 return; 2339 2340 if (card->msix_enable && msg_id >= 0) { 2341 pcie_ireg = BIT(msg_id); 2342 } else { 2343 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2344 &pcie_ireg)) { 2345 mwifiex_dbg(adapter, ERROR, "Read register failed\n"); 2346 return; 2347 } 2348 2349 if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg) 2350 return; 2351 2352 2353 mwifiex_pcie_disable_host_int(adapter); 2354 2355 /* Clear the pending interrupts */ 2356 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS, 2357 ~pcie_ireg)) { 2358 mwifiex_dbg(adapter, ERROR, 2359 "Write register failed\n"); 2360 return; 2361 } 2362 } 2363 2364 if (!adapter->pps_uapsd_mode && 2365 adapter->ps_state == PS_STATE_SLEEP && 2366 mwifiex_pcie_ok_to_access_hw(adapter)) { 2367 /* Potentially for PCIe we could get other 2368 * interrupts like shared. Don't change power 2369 * state until cookie is set 2370 */ 2371 adapter->ps_state = PS_STATE_AWAKE; 2372 adapter->pm_wakeup_fw_try = false; 2373 del_timer(&adapter->wakeup_timer); 2374 } 2375 2376 spin_lock_irqsave(&adapter->int_lock, flags); 2377 adapter->int_status |= pcie_ireg; 2378 spin_unlock_irqrestore(&adapter->int_lock, flags); 2379 mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg); 2380 } 2381 2382 /* 2383 * Interrupt handler for PCIe root port 2384 * 2385 * This function reads the interrupt status from firmware and assigns 2386 * the main process in workqueue which will handle the interrupt. 2387 */ 2388 static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context) 2389 { 2390 struct mwifiex_msix_context *ctx = context; 2391 struct pci_dev *pdev = ctx->dev; 2392 struct pcie_service_card *card; 2393 struct mwifiex_adapter *adapter; 2394 2395 card = pci_get_drvdata(pdev); 2396 2397 if (!card->adapter) { 2398 pr_err("info: %s: card=%p adapter=%p\n", __func__, card, 2399 card ? card->adapter : NULL); 2400 goto exit; 2401 } 2402 adapter = card->adapter; 2403 2404 if (adapter->surprise_removed) 2405 goto exit; 2406 2407 if (card->msix_enable) 2408 mwifiex_interrupt_status(adapter, ctx->msg_id); 2409 else 2410 mwifiex_interrupt_status(adapter, -1); 2411 2412 mwifiex_queue_main_work(adapter); 2413 2414 exit: 2415 return IRQ_HANDLED; 2416 } 2417 2418 /* 2419 * This function checks the current interrupt status. 2420 * 2421 * The following interrupts are checked and handled by this function - 2422 * - Data sent 2423 * - Command sent 2424 * - Command received 2425 * - Packets received 2426 * - Events received 2427 * 2428 * In case of Rx packets received, the packets are uploaded from card to 2429 * host and processed accordingly. 2430 */ 2431 static int mwifiex_process_pcie_int(struct mwifiex_adapter *adapter) 2432 { 2433 int ret; 2434 u32 pcie_ireg = 0; 2435 unsigned long flags; 2436 struct pcie_service_card *card = adapter->card; 2437 2438 spin_lock_irqsave(&adapter->int_lock, flags); 2439 if (!card->msi_enable) { 2440 /* Clear out unused interrupts */ 2441 pcie_ireg = adapter->int_status; 2442 } 2443 adapter->int_status = 0; 2444 spin_unlock_irqrestore(&adapter->int_lock, flags); 2445 2446 if (card->msi_enable) { 2447 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 2448 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2449 &pcie_ireg)) { 2450 mwifiex_dbg(adapter, ERROR, 2451 "Read register failed\n"); 2452 return -1; 2453 } 2454 2455 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) { 2456 if (mwifiex_write_reg(adapter, 2457 PCIE_HOST_INT_STATUS, 2458 ~pcie_ireg)) { 2459 mwifiex_dbg(adapter, ERROR, 2460 "Write register failed\n"); 2461 return -1; 2462 } 2463 if (!adapter->pps_uapsd_mode && 2464 adapter->ps_state == PS_STATE_SLEEP) { 2465 adapter->ps_state = PS_STATE_AWAKE; 2466 adapter->pm_wakeup_fw_try = false; 2467 del_timer(&adapter->wakeup_timer); 2468 } 2469 } 2470 } 2471 } 2472 2473 if (pcie_ireg & HOST_INTR_DNLD_DONE) { 2474 pcie_ireg &= ~HOST_INTR_DNLD_DONE; 2475 mwifiex_dbg(adapter, INTR, "info: TX DNLD Done\n"); 2476 ret = mwifiex_pcie_send_data_complete(adapter); 2477 if (ret) 2478 return ret; 2479 } 2480 if (pcie_ireg & HOST_INTR_UPLD_RDY) { 2481 pcie_ireg &= ~HOST_INTR_UPLD_RDY; 2482 mwifiex_dbg(adapter, INTR, "info: Rx DATA\n"); 2483 ret = mwifiex_pcie_process_recv_data(adapter); 2484 if (ret) 2485 return ret; 2486 } 2487 if (pcie_ireg & HOST_INTR_EVENT_RDY) { 2488 pcie_ireg &= ~HOST_INTR_EVENT_RDY; 2489 mwifiex_dbg(adapter, INTR, "info: Rx EVENT\n"); 2490 ret = mwifiex_pcie_process_event_ready(adapter); 2491 if (ret) 2492 return ret; 2493 } 2494 if (pcie_ireg & HOST_INTR_CMD_DONE) { 2495 pcie_ireg &= ~HOST_INTR_CMD_DONE; 2496 if (adapter->cmd_sent) { 2497 mwifiex_dbg(adapter, INTR, 2498 "info: CMD sent Interrupt\n"); 2499 adapter->cmd_sent = false; 2500 } 2501 /* Handle command response */ 2502 ret = mwifiex_pcie_process_cmd_complete(adapter); 2503 if (ret) 2504 return ret; 2505 } 2506 2507 mwifiex_dbg(adapter, INTR, 2508 "info: cmd_sent=%d data_sent=%d\n", 2509 adapter->cmd_sent, adapter->data_sent); 2510 if (!card->msi_enable && adapter->ps_state != PS_STATE_SLEEP) 2511 mwifiex_pcie_enable_host_int(adapter); 2512 2513 return 0; 2514 } 2515 2516 static int mwifiex_process_msix_int(struct mwifiex_adapter *adapter) 2517 { 2518 int ret; 2519 u32 pcie_ireg; 2520 unsigned long flags; 2521 2522 spin_lock_irqsave(&adapter->int_lock, flags); 2523 /* Clear out unused interrupts */ 2524 pcie_ireg = adapter->int_status; 2525 adapter->int_status = 0; 2526 spin_unlock_irqrestore(&adapter->int_lock, flags); 2527 2528 if (pcie_ireg & HOST_INTR_DNLD_DONE) { 2529 mwifiex_dbg(adapter, INTR, 2530 "info: TX DNLD Done\n"); 2531 ret = mwifiex_pcie_send_data_complete(adapter); 2532 if (ret) 2533 return ret; 2534 } 2535 if (pcie_ireg & HOST_INTR_UPLD_RDY) { 2536 mwifiex_dbg(adapter, INTR, 2537 "info: Rx DATA\n"); 2538 ret = mwifiex_pcie_process_recv_data(adapter); 2539 if (ret) 2540 return ret; 2541 } 2542 if (pcie_ireg & HOST_INTR_EVENT_RDY) { 2543 mwifiex_dbg(adapter, INTR, 2544 "info: Rx EVENT\n"); 2545 ret = mwifiex_pcie_process_event_ready(adapter); 2546 if (ret) 2547 return ret; 2548 } 2549 2550 if (pcie_ireg & HOST_INTR_CMD_DONE) { 2551 if (adapter->cmd_sent) { 2552 mwifiex_dbg(adapter, INTR, 2553 "info: CMD sent Interrupt\n"); 2554 adapter->cmd_sent = false; 2555 } 2556 /* Handle command response */ 2557 ret = mwifiex_pcie_process_cmd_complete(adapter); 2558 if (ret) 2559 return ret; 2560 } 2561 2562 mwifiex_dbg(adapter, INTR, 2563 "info: cmd_sent=%d data_sent=%d\n", 2564 adapter->cmd_sent, adapter->data_sent); 2565 2566 return 0; 2567 } 2568 2569 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter) 2570 { 2571 struct pcie_service_card *card = adapter->card; 2572 2573 if (card->msix_enable) 2574 return mwifiex_process_msix_int(adapter); 2575 else 2576 return mwifiex_process_pcie_int(adapter); 2577 } 2578 2579 /* 2580 * This function downloads data from driver to card. 2581 * 2582 * Both commands and data packets are transferred to the card by this 2583 * function. 2584 * 2585 * This function adds the PCIE specific header to the front of the buffer 2586 * before transferring. The header contains the length of the packet and 2587 * the type. The firmware handles the packets based upon this set type. 2588 */ 2589 static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type, 2590 struct sk_buff *skb, 2591 struct mwifiex_tx_param *tx_param) 2592 { 2593 if (!skb) { 2594 mwifiex_dbg(adapter, ERROR, 2595 "Passed NULL skb to %s\n", __func__); 2596 return -1; 2597 } 2598 2599 if (type == MWIFIEX_TYPE_DATA) 2600 return mwifiex_pcie_send_data(adapter, skb, tx_param); 2601 else if (type == MWIFIEX_TYPE_CMD) 2602 return mwifiex_pcie_send_cmd(adapter, skb); 2603 2604 return 0; 2605 } 2606 2607 /* Function to dump PCIE scratch registers in case of FW crash 2608 */ 2609 static int 2610 mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf) 2611 { 2612 char *p = drv_buf; 2613 char buf[256], *ptr; 2614 int i; 2615 u32 value; 2616 struct pcie_service_card *card = adapter->card; 2617 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2618 int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG, 2619 PCIE_SCRATCH_14_REG, 2620 PCIE_SCRATCH_15_REG}; 2621 2622 if (!p) 2623 return 0; 2624 2625 mwifiex_dbg(adapter, MSG, "PCIE register dump start\n"); 2626 2627 if (mwifiex_read_reg(adapter, reg->fw_status, &value)) { 2628 mwifiex_dbg(adapter, ERROR, "failed to read firmware status"); 2629 return 0; 2630 } 2631 2632 ptr = buf; 2633 mwifiex_dbg(adapter, MSG, "pcie scratch register:"); 2634 for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) { 2635 mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value); 2636 ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n", 2637 pcie_scratch_reg[i], value); 2638 } 2639 2640 mwifiex_dbg(adapter, MSG, "%s\n", buf); 2641 p += sprintf(p, "%s\n", buf); 2642 2643 mwifiex_dbg(adapter, MSG, "PCIE register dump end\n"); 2644 2645 return p - drv_buf; 2646 } 2647 2648 /* This function read/write firmware */ 2649 static enum rdwr_status 2650 mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag) 2651 { 2652 int ret, tries; 2653 u8 ctrl_data; 2654 u32 fw_status; 2655 struct pcie_service_card *card = adapter->card; 2656 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2657 2658 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) 2659 return RDWR_STATUS_FAILURE; 2660 2661 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2662 reg->fw_dump_host_ready); 2663 if (ret) { 2664 mwifiex_dbg(adapter, ERROR, 2665 "PCIE write err\n"); 2666 return RDWR_STATUS_FAILURE; 2667 } 2668 2669 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2670 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data); 2671 if (ctrl_data == FW_DUMP_DONE) 2672 return RDWR_STATUS_SUCCESS; 2673 if (doneflag && ctrl_data == doneflag) 2674 return RDWR_STATUS_DONE; 2675 if (ctrl_data != reg->fw_dump_host_ready) { 2676 mwifiex_dbg(adapter, WARN, 2677 "The ctrl reg was changed, re-try again!\n"); 2678 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2679 reg->fw_dump_host_ready); 2680 if (ret) { 2681 mwifiex_dbg(adapter, ERROR, 2682 "PCIE write err\n"); 2683 return RDWR_STATUS_FAILURE; 2684 } 2685 } 2686 usleep_range(100, 200); 2687 } 2688 2689 mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n"); 2690 return RDWR_STATUS_FAILURE; 2691 } 2692 2693 /* This function dump firmware memory to file */ 2694 static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter) 2695 { 2696 struct pcie_service_card *card = adapter->card; 2697 const struct mwifiex_pcie_card_reg *creg = card->pcie.reg; 2698 unsigned int reg, reg_start, reg_end; 2699 u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num; 2700 u8 idx, i, read_reg, doneflag = 0; 2701 enum rdwr_status stat; 2702 u32 memory_size; 2703 int ret; 2704 2705 if (!card->pcie.can_dump_fw) 2706 return; 2707 2708 for (idx = 0; idx < adapter->num_mem_types; idx++) { 2709 struct memory_type_mapping *entry = 2710 &adapter->mem_type_mapping_tbl[idx]; 2711 2712 if (entry->mem_ptr) { 2713 vfree(entry->mem_ptr); 2714 entry->mem_ptr = NULL; 2715 } 2716 entry->mem_size = 0; 2717 } 2718 2719 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n"); 2720 2721 /* Read the number of the memories which will dump */ 2722 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2723 if (stat == RDWR_STATUS_FAILURE) 2724 return; 2725 2726 reg = creg->fw_dump_start; 2727 mwifiex_read_reg_byte(adapter, reg, &fw_dump_num); 2728 2729 /* W8997 chipset firmware dump will be restore in single region*/ 2730 if (fw_dump_num == 0) 2731 dump_num = 1; 2732 else 2733 dump_num = fw_dump_num; 2734 2735 /* Read the length of every memory which will dump */ 2736 for (idx = 0; idx < dump_num; idx++) { 2737 struct memory_type_mapping *entry = 2738 &adapter->mem_type_mapping_tbl[idx]; 2739 memory_size = 0; 2740 if (fw_dump_num != 0) { 2741 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2742 if (stat == RDWR_STATUS_FAILURE) 2743 return; 2744 2745 reg = creg->fw_dump_start; 2746 for (i = 0; i < 4; i++) { 2747 mwifiex_read_reg_byte(adapter, reg, &read_reg); 2748 memory_size |= (read_reg << (i * 8)); 2749 reg++; 2750 } 2751 } else { 2752 memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE; 2753 } 2754 2755 if (memory_size == 0) { 2756 mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n"); 2757 ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl, 2758 creg->fw_dump_read_done); 2759 if (ret) { 2760 mwifiex_dbg(adapter, ERROR, "PCIE write err\n"); 2761 return; 2762 } 2763 break; 2764 } 2765 2766 mwifiex_dbg(adapter, DUMP, 2767 "%s_SIZE=0x%x\n", entry->mem_name, memory_size); 2768 entry->mem_ptr = vmalloc(memory_size + 1); 2769 entry->mem_size = memory_size; 2770 if (!entry->mem_ptr) { 2771 mwifiex_dbg(adapter, ERROR, 2772 "Vmalloc %s failed\n", entry->mem_name); 2773 return; 2774 } 2775 dbg_ptr = entry->mem_ptr; 2776 end_ptr = dbg_ptr + memory_size; 2777 2778 doneflag = entry->done_flag; 2779 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n", 2780 entry->mem_name); 2781 2782 do { 2783 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2784 if (RDWR_STATUS_FAILURE == stat) 2785 return; 2786 2787 reg_start = creg->fw_dump_start; 2788 reg_end = creg->fw_dump_end; 2789 for (reg = reg_start; reg <= reg_end; reg++) { 2790 mwifiex_read_reg_byte(adapter, reg, dbg_ptr); 2791 if (dbg_ptr < end_ptr) { 2792 dbg_ptr++; 2793 continue; 2794 } 2795 mwifiex_dbg(adapter, ERROR, 2796 "pre-allocated buf not enough\n"); 2797 tmp_ptr = 2798 vzalloc(memory_size + MWIFIEX_SIZE_4K); 2799 if (!tmp_ptr) 2800 return; 2801 memcpy(tmp_ptr, entry->mem_ptr, memory_size); 2802 vfree(entry->mem_ptr); 2803 entry->mem_ptr = tmp_ptr; 2804 tmp_ptr = NULL; 2805 dbg_ptr = entry->mem_ptr + memory_size; 2806 memory_size += MWIFIEX_SIZE_4K; 2807 end_ptr = entry->mem_ptr + memory_size; 2808 } 2809 2810 if (stat != RDWR_STATUS_DONE) 2811 continue; 2812 2813 mwifiex_dbg(adapter, DUMP, 2814 "%s done: size=0x%tx\n", 2815 entry->mem_name, dbg_ptr - entry->mem_ptr); 2816 break; 2817 } while (true); 2818 } 2819 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n"); 2820 } 2821 2822 static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter) 2823 { 2824 int drv_info_size; 2825 void *drv_info; 2826 2827 drv_info_size = mwifiex_drv_info_dump(adapter, &drv_info); 2828 mwifiex_pcie_fw_dump(adapter); 2829 mwifiex_upload_device_dump(adapter, drv_info, drv_info_size); 2830 } 2831 2832 static void mwifiex_pcie_card_reset_work(struct mwifiex_adapter *adapter) 2833 { 2834 struct pcie_service_card *card = adapter->card; 2835 2836 pci_reset_function(card->dev); 2837 } 2838 2839 static void mwifiex_pcie_work(struct work_struct *work) 2840 { 2841 struct pcie_service_card *card = 2842 container_of(work, struct pcie_service_card, work); 2843 2844 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 2845 &card->work_flags)) 2846 mwifiex_pcie_device_dump_work(card->adapter); 2847 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, 2848 &card->work_flags)) 2849 mwifiex_pcie_card_reset_work(card->adapter); 2850 } 2851 2852 /* This function dumps FW information */ 2853 static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter) 2854 { 2855 struct pcie_service_card *card = adapter->card; 2856 2857 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 2858 &card->work_flags)) 2859 schedule_work(&card->work); 2860 } 2861 2862 static void mwifiex_pcie_card_reset(struct mwifiex_adapter *adapter) 2863 { 2864 struct pcie_service_card *card = adapter->card; 2865 2866 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags)) 2867 schedule_work(&card->work); 2868 } 2869 2870 static int mwifiex_pcie_alloc_buffers(struct mwifiex_adapter *adapter) 2871 { 2872 struct pcie_service_card *card = adapter->card; 2873 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2874 int ret; 2875 2876 card->cmdrsp_buf = NULL; 2877 ret = mwifiex_pcie_create_txbd_ring(adapter); 2878 if (ret) { 2879 mwifiex_dbg(adapter, ERROR, "Failed to create txbd ring\n"); 2880 goto err_cre_txbd; 2881 } 2882 2883 ret = mwifiex_pcie_create_rxbd_ring(adapter); 2884 if (ret) { 2885 mwifiex_dbg(adapter, ERROR, "Failed to create rxbd ring\n"); 2886 goto err_cre_rxbd; 2887 } 2888 2889 ret = mwifiex_pcie_create_evtbd_ring(adapter); 2890 if (ret) { 2891 mwifiex_dbg(adapter, ERROR, "Failed to create evtbd ring\n"); 2892 goto err_cre_evtbd; 2893 } 2894 2895 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter); 2896 if (ret) { 2897 mwifiex_dbg(adapter, ERROR, "Failed to allocate cmdbuf buffer\n"); 2898 goto err_alloc_cmdbuf; 2899 } 2900 2901 if (reg->sleep_cookie) { 2902 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter); 2903 if (ret) { 2904 mwifiex_dbg(adapter, ERROR, "Failed to allocate sleep_cookie buffer\n"); 2905 goto err_alloc_cookie; 2906 } 2907 } else { 2908 card->sleep_cookie_vbase = NULL; 2909 } 2910 2911 return 0; 2912 2913 err_alloc_cookie: 2914 mwifiex_pcie_delete_cmdrsp_buf(adapter); 2915 err_alloc_cmdbuf: 2916 mwifiex_pcie_delete_evtbd_ring(adapter); 2917 err_cre_evtbd: 2918 mwifiex_pcie_delete_rxbd_ring(adapter); 2919 err_cre_rxbd: 2920 mwifiex_pcie_delete_txbd_ring(adapter); 2921 err_cre_txbd: 2922 return ret; 2923 } 2924 2925 static void mwifiex_pcie_free_buffers(struct mwifiex_adapter *adapter) 2926 { 2927 struct pcie_service_card *card = adapter->card; 2928 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2929 2930 if (reg->sleep_cookie) 2931 mwifiex_pcie_delete_sleep_cookie_buf(adapter); 2932 2933 mwifiex_pcie_delete_cmdrsp_buf(adapter); 2934 mwifiex_pcie_delete_evtbd_ring(adapter); 2935 mwifiex_pcie_delete_rxbd_ring(adapter); 2936 mwifiex_pcie_delete_txbd_ring(adapter); 2937 card->cmdrsp_buf = NULL; 2938 } 2939 2940 /* 2941 * This function initializes the PCI-E host memory space, WCB rings, etc. 2942 */ 2943 static int mwifiex_init_pcie(struct mwifiex_adapter *adapter) 2944 { 2945 struct pcie_service_card *card = adapter->card; 2946 int ret; 2947 struct pci_dev *pdev = card->dev; 2948 2949 pci_set_drvdata(pdev, card); 2950 2951 ret = pci_enable_device(pdev); 2952 if (ret) 2953 goto err_enable_dev; 2954 2955 pci_set_master(pdev); 2956 2957 pr_notice("try set_consistent_dma_mask(32)\n"); 2958 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2959 if (ret) { 2960 pr_err("set_dma_mask(32) failed\n"); 2961 goto err_set_dma_mask; 2962 } 2963 2964 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 2965 if (ret) { 2966 pr_err("set_consistent_dma_mask(64) failed\n"); 2967 goto err_set_dma_mask; 2968 } 2969 2970 ret = pci_request_region(pdev, 0, DRV_NAME); 2971 if (ret) { 2972 pr_err("req_reg(0) error\n"); 2973 goto err_req_region0; 2974 } 2975 card->pci_mmap = pci_iomap(pdev, 0, 0); 2976 if (!card->pci_mmap) { 2977 pr_err("iomap(0) error\n"); 2978 ret = -EIO; 2979 goto err_iomap0; 2980 } 2981 ret = pci_request_region(pdev, 2, DRV_NAME); 2982 if (ret) { 2983 pr_err("req_reg(2) error\n"); 2984 goto err_req_region2; 2985 } 2986 card->pci_mmap1 = pci_iomap(pdev, 2, 0); 2987 if (!card->pci_mmap1) { 2988 pr_err("iomap(2) error\n"); 2989 ret = -EIO; 2990 goto err_iomap2; 2991 } 2992 2993 pr_notice("PCI memory map Virt0: %p PCI memory map Virt2: %p\n", 2994 card->pci_mmap, card->pci_mmap1); 2995 2996 ret = mwifiex_pcie_alloc_buffers(adapter); 2997 if (ret) 2998 goto err_alloc_buffers; 2999 3000 return 0; 3001 3002 err_alloc_buffers: 3003 pci_iounmap(pdev, card->pci_mmap1); 3004 err_iomap2: 3005 pci_release_region(pdev, 2); 3006 err_req_region2: 3007 pci_iounmap(pdev, card->pci_mmap); 3008 err_iomap0: 3009 pci_release_region(pdev, 0); 3010 err_req_region0: 3011 err_set_dma_mask: 3012 pci_disable_device(pdev); 3013 err_enable_dev: 3014 return ret; 3015 } 3016 3017 /* 3018 * This function cleans up the allocated card buffers. 3019 */ 3020 static void mwifiex_cleanup_pcie(struct mwifiex_adapter *adapter) 3021 { 3022 struct pcie_service_card *card = adapter->card; 3023 struct pci_dev *pdev = card->dev; 3024 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 3025 int ret; 3026 u32 fw_status; 3027 3028 cancel_work_sync(&card->work); 3029 3030 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status); 3031 if (fw_status == FIRMWARE_READY_PCIE) { 3032 mwifiex_dbg(adapter, INFO, 3033 "Clearing driver ready signature\n"); 3034 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 3035 mwifiex_dbg(adapter, ERROR, 3036 "Failed to write driver not-ready signature\n"); 3037 } 3038 3039 mwifiex_pcie_free_buffers(adapter); 3040 3041 if (pdev) { 3042 pci_iounmap(pdev, card->pci_mmap); 3043 pci_iounmap(pdev, card->pci_mmap1); 3044 pci_disable_device(pdev); 3045 pci_release_region(pdev, 2); 3046 pci_release_region(pdev, 0); 3047 } 3048 } 3049 3050 static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter) 3051 { 3052 int ret, i, j; 3053 struct pcie_service_card *card = adapter->card; 3054 struct pci_dev *pdev = card->dev; 3055 3056 if (card->pcie.reg->msix_support) { 3057 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3058 card->msix_entries[i].entry = i; 3059 ret = pci_enable_msix_exact(pdev, card->msix_entries, 3060 MWIFIEX_NUM_MSIX_VECTORS); 3061 if (!ret) { 3062 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) { 3063 card->msix_ctx[i].dev = pdev; 3064 card->msix_ctx[i].msg_id = i; 3065 3066 ret = request_irq(card->msix_entries[i].vector, 3067 mwifiex_pcie_interrupt, 0, 3068 "MWIFIEX_PCIE_MSIX", 3069 &card->msix_ctx[i]); 3070 if (ret) 3071 break; 3072 } 3073 3074 if (ret) { 3075 mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n", 3076 ret); 3077 for (j = 0; j < i; j++) 3078 free_irq(card->msix_entries[j].vector, 3079 &card->msix_ctx[i]); 3080 pci_disable_msix(pdev); 3081 } else { 3082 mwifiex_dbg(adapter, MSG, "MSIx enabled!"); 3083 card->msix_enable = 1; 3084 return 0; 3085 } 3086 } 3087 } 3088 3089 if (pci_enable_msi(pdev) != 0) 3090 pci_disable_msi(pdev); 3091 else 3092 card->msi_enable = 1; 3093 3094 mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable); 3095 3096 card->share_irq_ctx.dev = pdev; 3097 card->share_irq_ctx.msg_id = -1; 3098 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED, 3099 "MRVL_PCIE", &card->share_irq_ctx); 3100 if (ret) { 3101 pr_err("request_irq failed: ret=%d\n", ret); 3102 return -1; 3103 } 3104 3105 return 0; 3106 } 3107 3108 /* 3109 * This function gets the firmware name for downloading by revision id 3110 * 3111 * Read revision id register to get revision id 3112 */ 3113 static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter) 3114 { 3115 int revision_id = 0; 3116 int version, magic; 3117 struct pcie_service_card *card = adapter->card; 3118 3119 switch (card->dev->device) { 3120 case PCIE_DEVICE_ID_MARVELL_88W8766P: 3121 strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME); 3122 break; 3123 case PCIE_DEVICE_ID_MARVELL_88W8897: 3124 mwifiex_write_reg(adapter, 0x0c58, 0x80c00000); 3125 mwifiex_read_reg(adapter, 0x0c58, &revision_id); 3126 revision_id &= 0xff00; 3127 switch (revision_id) { 3128 case PCIE8897_A0: 3129 strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME); 3130 break; 3131 case PCIE8897_B0: 3132 strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME); 3133 break; 3134 default: 3135 strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME); 3136 3137 break; 3138 } 3139 break; 3140 case PCIE_DEVICE_ID_MARVELL_88W8997: 3141 mwifiex_read_reg(adapter, 0x8, &revision_id); 3142 mwifiex_read_reg(adapter, 0x0cd0, &version); 3143 mwifiex_read_reg(adapter, 0x0cd4, &magic); 3144 revision_id &= 0xff; 3145 version &= 0x7; 3146 magic &= 0xff; 3147 if (revision_id == PCIE8997_A1 && 3148 magic == CHIP_MAGIC_VALUE && 3149 version == CHIP_VER_PCIEUART) 3150 strcpy(adapter->fw_name, PCIEUART8997_FW_NAME_V4); 3151 else 3152 strcpy(adapter->fw_name, PCIEUSB8997_FW_NAME_V4); 3153 break; 3154 default: 3155 break; 3156 } 3157 } 3158 3159 /* 3160 * This function registers the PCIE device. 3161 * 3162 * PCIE IRQ is claimed, block size is set and driver data is initialized. 3163 */ 3164 static int mwifiex_register_dev(struct mwifiex_adapter *adapter) 3165 { 3166 struct pcie_service_card *card = adapter->card; 3167 3168 /* save adapter pointer in card */ 3169 card->adapter = adapter; 3170 3171 if (mwifiex_pcie_request_irq(adapter)) 3172 return -1; 3173 3174 adapter->tx_buf_size = card->pcie.tx_buf_size; 3175 adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl; 3176 adapter->num_mem_types = card->pcie.num_mem_types; 3177 adapter->ext_scan = card->pcie.can_ext_scan; 3178 mwifiex_pcie_get_fw_name(adapter); 3179 3180 return 0; 3181 } 3182 3183 /* 3184 * This function unregisters the PCIE device. 3185 * 3186 * The PCIE IRQ is released, the function is disabled and driver 3187 * data is set to null. 3188 */ 3189 static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter) 3190 { 3191 struct pcie_service_card *card = adapter->card; 3192 struct pci_dev *pdev = card->dev; 3193 int i; 3194 3195 if (card->msix_enable) { 3196 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3197 synchronize_irq(card->msix_entries[i].vector); 3198 3199 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3200 free_irq(card->msix_entries[i].vector, 3201 &card->msix_ctx[i]); 3202 3203 card->msix_enable = 0; 3204 pci_disable_msix(pdev); 3205 } else { 3206 mwifiex_dbg(adapter, INFO, 3207 "%s(): calling free_irq()\n", __func__); 3208 free_irq(card->dev->irq, &card->share_irq_ctx); 3209 3210 if (card->msi_enable) 3211 pci_disable_msi(pdev); 3212 } 3213 card->adapter = NULL; 3214 } 3215 3216 /* 3217 * This function initializes the PCI-E host memory space, WCB rings, etc., 3218 * similar to mwifiex_init_pcie(), but without resetting PCI-E state. 3219 */ 3220 static void mwifiex_pcie_up_dev(struct mwifiex_adapter *adapter) 3221 { 3222 struct pcie_service_card *card = adapter->card; 3223 int ret; 3224 struct pci_dev *pdev = card->dev; 3225 3226 /* tx_buf_size might be changed to 3584 by firmware during 3227 * data transfer, we should reset it to default size. 3228 */ 3229 adapter->tx_buf_size = card->pcie.tx_buf_size; 3230 3231 ret = mwifiex_pcie_alloc_buffers(adapter); 3232 if (!ret) 3233 return; 3234 3235 pci_iounmap(pdev, card->pci_mmap1); 3236 } 3237 3238 /* This function cleans up the PCI-E host memory space. */ 3239 static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter) 3240 { 3241 struct pcie_service_card *card = adapter->card; 3242 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 3243 3244 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 3245 mwifiex_dbg(adapter, ERROR, "Failed to write driver not-ready signature\n"); 3246 3247 adapter->seq_num = 0; 3248 3249 mwifiex_pcie_free_buffers(adapter); 3250 } 3251 3252 static struct mwifiex_if_ops pcie_ops = { 3253 .init_if = mwifiex_init_pcie, 3254 .cleanup_if = mwifiex_cleanup_pcie, 3255 .check_fw_status = mwifiex_check_fw_status, 3256 .check_winner_status = mwifiex_check_winner_status, 3257 .prog_fw = mwifiex_prog_fw_w_helper, 3258 .register_dev = mwifiex_register_dev, 3259 .unregister_dev = mwifiex_unregister_dev, 3260 .enable_int = mwifiex_pcie_enable_host_int, 3261 .disable_int = mwifiex_pcie_disable_host_int_noerr, 3262 .process_int_status = mwifiex_process_int_status, 3263 .host_to_card = mwifiex_pcie_host_to_card, 3264 .wakeup = mwifiex_pm_wakeup_card, 3265 .wakeup_complete = mwifiex_pm_wakeup_card_complete, 3266 3267 /* PCIE specific */ 3268 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete, 3269 .event_complete = mwifiex_pcie_event_complete, 3270 .update_mp_end_port = NULL, 3271 .cleanup_mpa_buf = NULL, 3272 .init_fw_port = mwifiex_pcie_init_fw_port, 3273 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf, 3274 .card_reset = mwifiex_pcie_card_reset, 3275 .reg_dump = mwifiex_pcie_reg_dump, 3276 .device_dump = mwifiex_pcie_device_dump, 3277 .down_dev = mwifiex_pcie_down_dev, 3278 .up_dev = mwifiex_pcie_up_dev, 3279 }; 3280 3281 module_pci_driver(mwifiex_pcie); 3282 3283 MODULE_AUTHOR("Marvell International Ltd."); 3284 MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION); 3285 MODULE_VERSION(PCIE_VERSION); 3286 MODULE_LICENSE("GPL v2"); 3287