1 /* 2 * NXP Wireless LAN device driver: PCIE specific handling 3 * 4 * Copyright 2011-2020 NXP 5 * 6 * This software file (the "File") is distributed by NXP 7 * under the terms of the GNU General Public License Version 2, June 1991 8 * (the "License"). You may use, redistribute and/or modify this File in 9 * accordance with the terms and conditions of the License, a copy of which 10 * is available by writing to the Free Software Foundation, Inc., 11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the 12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. 13 * 14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about 17 * this warranty disclaimer. 18 */ 19 20 #include <linux/firmware.h> 21 22 #include "decl.h" 23 #include "ioctl.h" 24 #include "util.h" 25 #include "fw.h" 26 #include "main.h" 27 #include "wmm.h" 28 #include "11n.h" 29 #include "pcie.h" 30 31 #define PCIE_VERSION "1.0" 32 #define DRV_NAME "Marvell mwifiex PCIe" 33 34 static struct mwifiex_if_ops pcie_ops; 35 36 static const struct of_device_id mwifiex_pcie_of_match_table[] = { 37 { .compatible = "pci11ab,2b42" }, 38 { .compatible = "pci1b4b,2b42" }, 39 { } 40 }; 41 42 static int mwifiex_pcie_probe_of(struct device *dev) 43 { 44 if (!of_match_node(mwifiex_pcie_of_match_table, dev->of_node)) { 45 dev_err(dev, "required compatible string missing\n"); 46 return -EINVAL; 47 } 48 49 return 0; 50 } 51 52 static void mwifiex_pcie_work(struct work_struct *work); 53 54 static int 55 mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb, 56 size_t size, int flags) 57 { 58 struct pcie_service_card *card = adapter->card; 59 struct mwifiex_dma_mapping mapping; 60 61 mapping.addr = dma_map_single(&card->dev->dev, skb->data, size, flags); 62 if (dma_mapping_error(&card->dev->dev, mapping.addr)) { 63 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n"); 64 return -1; 65 } 66 mapping.len = size; 67 mwifiex_store_mapping(skb, &mapping); 68 return 0; 69 } 70 71 static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter, 72 struct sk_buff *skb, int flags) 73 { 74 struct pcie_service_card *card = adapter->card; 75 struct mwifiex_dma_mapping mapping; 76 77 mwifiex_get_mapping(skb, &mapping); 78 dma_unmap_single(&card->dev->dev, mapping.addr, mapping.len, flags); 79 } 80 81 /* 82 * This function writes data into PCIE card register. 83 */ 84 static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data) 85 { 86 struct pcie_service_card *card = adapter->card; 87 88 iowrite32(data, card->pci_mmap1 + reg); 89 90 return 0; 91 } 92 93 /* This function reads data from PCIE card register. 94 */ 95 static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data) 96 { 97 struct pcie_service_card *card = adapter->card; 98 99 *data = ioread32(card->pci_mmap1 + reg); 100 if (*data == 0xffffffff) 101 return 0xffffffff; 102 103 return 0; 104 } 105 106 /* This function reads u8 data from PCIE card register. */ 107 static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter, 108 int reg, u8 *data) 109 { 110 struct pcie_service_card *card = adapter->card; 111 112 *data = ioread8(card->pci_mmap1 + reg); 113 114 return 0; 115 } 116 117 /* 118 * This function reads sleep cookie and checks if FW is ready 119 */ 120 static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter) 121 { 122 u32 cookie_value; 123 struct pcie_service_card *card = adapter->card; 124 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 125 126 if (!reg->sleep_cookie) 127 return true; 128 129 if (card->sleep_cookie_vbase) { 130 cookie_value = get_unaligned_le32(card->sleep_cookie_vbase); 131 mwifiex_dbg(adapter, INFO, 132 "info: ACCESS_HW: sleep cookie=0x%x\n", 133 cookie_value); 134 if (cookie_value == FW_AWAKE_COOKIE) 135 return true; 136 } 137 138 return false; 139 } 140 141 #ifdef CONFIG_PM_SLEEP 142 /* 143 * Kernel needs to suspend all functions separately. Therefore all 144 * registered functions must have drivers with suspend and resume 145 * methods. Failing that the kernel simply removes the whole card. 146 * 147 * If already not suspended, this function allocates and sends a host 148 * sleep activate request to the firmware and turns off the traffic. 149 */ 150 static int mwifiex_pcie_suspend(struct device *dev) 151 { 152 struct mwifiex_adapter *adapter; 153 struct pcie_service_card *card = dev_get_drvdata(dev); 154 155 156 /* Might still be loading firmware */ 157 wait_for_completion(&card->fw_done); 158 159 adapter = card->adapter; 160 if (!adapter) { 161 dev_err(dev, "adapter is not valid\n"); 162 return 0; 163 } 164 165 mwifiex_enable_wake(adapter); 166 167 /* Enable the Host Sleep */ 168 if (!mwifiex_enable_hs(adapter)) { 169 mwifiex_dbg(adapter, ERROR, 170 "cmd: failed to suspend\n"); 171 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags); 172 mwifiex_disable_wake(adapter); 173 return -EFAULT; 174 } 175 176 flush_workqueue(adapter->workqueue); 177 178 /* Indicate device suspended */ 179 set_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags); 180 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags); 181 182 return 0; 183 } 184 185 /* 186 * Kernel needs to suspend all functions separately. Therefore all 187 * registered functions must have drivers with suspend and resume 188 * methods. Failing that the kernel simply removes the whole card. 189 * 190 * If already not resumed, this function turns on the traffic and 191 * sends a host sleep cancel request to the firmware. 192 */ 193 static int mwifiex_pcie_resume(struct device *dev) 194 { 195 struct mwifiex_adapter *adapter; 196 struct pcie_service_card *card = dev_get_drvdata(dev); 197 198 199 if (!card->adapter) { 200 dev_err(dev, "adapter structure is not valid\n"); 201 return 0; 202 } 203 204 adapter = card->adapter; 205 206 if (!test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) { 207 mwifiex_dbg(adapter, WARN, 208 "Device already resumed\n"); 209 return 0; 210 } 211 212 clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags); 213 214 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA), 215 MWIFIEX_ASYNC_CMD); 216 mwifiex_disable_wake(adapter); 217 218 return 0; 219 } 220 #endif 221 222 /* 223 * This function probes an mwifiex device and registers it. It allocates 224 * the card structure, enables PCIE function number and initiates the 225 * device registration and initialization procedure by adding a logical 226 * interface. 227 */ 228 static int mwifiex_pcie_probe(struct pci_dev *pdev, 229 const struct pci_device_id *ent) 230 { 231 struct pcie_service_card *card; 232 int ret; 233 234 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n", 235 pdev->vendor, pdev->device, pdev->revision); 236 237 card = devm_kzalloc(&pdev->dev, sizeof(*card), GFP_KERNEL); 238 if (!card) 239 return -ENOMEM; 240 241 init_completion(&card->fw_done); 242 243 card->dev = pdev; 244 245 if (ent->driver_data) { 246 struct mwifiex_pcie_device *data = (void *)ent->driver_data; 247 card->pcie.reg = data->reg; 248 card->pcie.blksz_fw_dl = data->blksz_fw_dl; 249 card->pcie.tx_buf_size = data->tx_buf_size; 250 card->pcie.can_dump_fw = data->can_dump_fw; 251 card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl; 252 card->pcie.num_mem_types = data->num_mem_types; 253 card->pcie.can_ext_scan = data->can_ext_scan; 254 INIT_WORK(&card->work, mwifiex_pcie_work); 255 } 256 257 /* device tree node parsing and platform specific configuration*/ 258 if (pdev->dev.of_node) { 259 ret = mwifiex_pcie_probe_of(&pdev->dev); 260 if (ret) 261 return ret; 262 } 263 264 if (mwifiex_add_card(card, &card->fw_done, &pcie_ops, 265 MWIFIEX_PCIE, &pdev->dev)) { 266 pr_err("%s failed\n", __func__); 267 return -1; 268 } 269 270 return 0; 271 } 272 273 /* 274 * This function removes the interface and frees up the card structure. 275 */ 276 static void mwifiex_pcie_remove(struct pci_dev *pdev) 277 { 278 struct pcie_service_card *card; 279 struct mwifiex_adapter *adapter; 280 struct mwifiex_private *priv; 281 const struct mwifiex_pcie_card_reg *reg; 282 u32 fw_status; 283 int ret; 284 285 card = pci_get_drvdata(pdev); 286 287 wait_for_completion(&card->fw_done); 288 289 adapter = card->adapter; 290 if (!adapter || !adapter->priv_num) 291 return; 292 293 reg = card->pcie.reg; 294 if (reg) 295 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status); 296 else 297 fw_status = -1; 298 299 if (fw_status == FIRMWARE_READY_PCIE && !adapter->mfg_mode) { 300 mwifiex_deauthenticate_all(adapter); 301 302 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 303 304 mwifiex_disable_auto_ds(priv); 305 306 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN); 307 } 308 309 mwifiex_remove_card(adapter); 310 } 311 312 static void mwifiex_pcie_shutdown(struct pci_dev *pdev) 313 { 314 mwifiex_pcie_remove(pdev); 315 316 return; 317 } 318 319 static void mwifiex_pcie_coredump(struct device *dev) 320 { 321 struct pci_dev *pdev; 322 struct pcie_service_card *card; 323 324 pdev = container_of(dev, struct pci_dev, dev); 325 card = pci_get_drvdata(pdev); 326 327 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 328 &card->work_flags)) 329 schedule_work(&card->work); 330 } 331 332 static const struct pci_device_id mwifiex_ids[] = { 333 { 334 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P, 335 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 336 .driver_data = (unsigned long)&mwifiex_pcie8766, 337 }, 338 { 339 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897, 340 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 341 .driver_data = (unsigned long)&mwifiex_pcie8897, 342 }, 343 { 344 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 345 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 346 .driver_data = (unsigned long)&mwifiex_pcie8997, 347 }, 348 { 349 PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 350 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 351 .driver_data = (unsigned long)&mwifiex_pcie8997, 352 }, 353 {}, 354 }; 355 356 MODULE_DEVICE_TABLE(pci, mwifiex_ids); 357 358 /* 359 * Cleanup all software without cleaning anything related to PCIe and HW. 360 */ 361 static void mwifiex_pcie_reset_prepare(struct pci_dev *pdev) 362 { 363 struct pcie_service_card *card = pci_get_drvdata(pdev); 364 struct mwifiex_adapter *adapter = card->adapter; 365 366 if (!adapter) { 367 dev_err(&pdev->dev, "%s: adapter structure is not valid\n", 368 __func__); 369 return; 370 } 371 372 mwifiex_dbg(adapter, INFO, 373 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Pre-FLR\n", 374 __func__, pdev->vendor, pdev->device, pdev->revision); 375 376 mwifiex_shutdown_sw(adapter); 377 clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags); 378 clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags); 379 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__); 380 } 381 382 /* 383 * Kernel stores and restores PCIe function context before and after performing 384 * FLR respectively. Reconfigure the software and firmware including firmware 385 * redownload. 386 */ 387 static void mwifiex_pcie_reset_done(struct pci_dev *pdev) 388 { 389 struct pcie_service_card *card = pci_get_drvdata(pdev); 390 struct mwifiex_adapter *adapter = card->adapter; 391 int ret; 392 393 if (!adapter) { 394 dev_err(&pdev->dev, "%s: adapter structure is not valid\n", 395 __func__); 396 return; 397 } 398 399 mwifiex_dbg(adapter, INFO, 400 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Post-FLR\n", 401 __func__, pdev->vendor, pdev->device, pdev->revision); 402 403 ret = mwifiex_reinit_sw(adapter); 404 if (ret) 405 dev_err(&pdev->dev, "reinit failed: %d\n", ret); 406 else 407 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__); 408 } 409 410 static const struct pci_error_handlers mwifiex_pcie_err_handler = { 411 .reset_prepare = mwifiex_pcie_reset_prepare, 412 .reset_done = mwifiex_pcie_reset_done, 413 }; 414 415 #ifdef CONFIG_PM_SLEEP 416 /* Power Management Hooks */ 417 static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend, 418 mwifiex_pcie_resume); 419 #endif 420 421 /* PCI Device Driver */ 422 static struct pci_driver __refdata mwifiex_pcie = { 423 .name = "mwifiex_pcie", 424 .id_table = mwifiex_ids, 425 .probe = mwifiex_pcie_probe, 426 .remove = mwifiex_pcie_remove, 427 .driver = { 428 .coredump = mwifiex_pcie_coredump, 429 #ifdef CONFIG_PM_SLEEP 430 .pm = &mwifiex_pcie_pm_ops, 431 #endif 432 }, 433 .shutdown = mwifiex_pcie_shutdown, 434 .err_handler = &mwifiex_pcie_err_handler, 435 }; 436 437 /* 438 * This function adds delay loop to ensure FW is awake before proceeding. 439 */ 440 static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter) 441 { 442 int i = 0; 443 444 while (mwifiex_pcie_ok_to_access_hw(adapter)) { 445 i++; 446 usleep_range(10, 20); 447 /* 50ms max wait */ 448 if (i == 5000) 449 break; 450 } 451 452 return; 453 } 454 455 static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter, 456 u32 max_delay_loop_cnt) 457 { 458 struct pcie_service_card *card = adapter->card; 459 u8 *buffer; 460 u32 sleep_cookie, count; 461 struct sk_buff *cmdrsp = card->cmdrsp_buf; 462 463 for (count = 0; count < max_delay_loop_cnt; count++) { 464 dma_sync_single_for_cpu(&card->dev->dev, 465 MWIFIEX_SKB_DMA_ADDR(cmdrsp), 466 sizeof(sleep_cookie), DMA_FROM_DEVICE); 467 buffer = cmdrsp->data; 468 sleep_cookie = get_unaligned_le32(buffer); 469 470 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) { 471 mwifiex_dbg(adapter, INFO, 472 "sleep cookie found at count %d\n", count); 473 break; 474 } 475 dma_sync_single_for_device(&card->dev->dev, 476 MWIFIEX_SKB_DMA_ADDR(cmdrsp), 477 sizeof(sleep_cookie), 478 DMA_FROM_DEVICE); 479 usleep_range(20, 30); 480 } 481 482 if (count >= max_delay_loop_cnt) 483 mwifiex_dbg(adapter, INFO, 484 "max count reached while accessing sleep cookie\n"); 485 } 486 487 /* This function wakes up the card by reading fw_status register. */ 488 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) 489 { 490 struct pcie_service_card *card = adapter->card; 491 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 492 493 mwifiex_dbg(adapter, EVENT, 494 "event: Wakeup device...\n"); 495 496 if (reg->sleep_cookie) 497 mwifiex_pcie_dev_wakeup_delay(adapter); 498 499 /* Accessing fw_status register will wakeup device */ 500 if (mwifiex_write_reg(adapter, reg->fw_status, FIRMWARE_READY_PCIE)) { 501 mwifiex_dbg(adapter, ERROR, 502 "Writing fw_status register failed\n"); 503 return -1; 504 } 505 506 if (reg->sleep_cookie) { 507 mwifiex_pcie_dev_wakeup_delay(adapter); 508 mwifiex_dbg(adapter, INFO, 509 "PCIE wakeup: Setting PS_STATE_AWAKE\n"); 510 adapter->ps_state = PS_STATE_AWAKE; 511 } 512 513 return 0; 514 } 515 516 /* 517 * This function is called after the card has woken up. 518 * 519 * The card configuration register is reset. 520 */ 521 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter) 522 { 523 mwifiex_dbg(adapter, CMD, 524 "cmd: Wakeup device completed\n"); 525 526 return 0; 527 } 528 529 /* 530 * This function disables the host interrupt. 531 * 532 * The host interrupt mask is read, the disable bit is reset and 533 * written back to the card host interrupt mask register. 534 */ 535 static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter) 536 { 537 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 538 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 539 0x00000000)) { 540 mwifiex_dbg(adapter, ERROR, 541 "Disable host interrupt failed\n"); 542 return -1; 543 } 544 } 545 546 atomic_set(&adapter->tx_hw_pending, 0); 547 return 0; 548 } 549 550 static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter) 551 { 552 WARN_ON(mwifiex_pcie_disable_host_int(adapter)); 553 } 554 555 /* 556 * This function enables the host interrupt. 557 * 558 * The host interrupt enable mask is written to the card 559 * host interrupt mask register. 560 */ 561 static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter) 562 { 563 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 564 /* Simply write the mask to the register */ 565 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 566 HOST_INTR_MASK)) { 567 mwifiex_dbg(adapter, ERROR, 568 "Enable host interrupt failed\n"); 569 return -1; 570 } 571 } 572 573 return 0; 574 } 575 576 /* 577 * This function initializes TX buffer ring descriptors 578 */ 579 static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter) 580 { 581 struct pcie_service_card *card = adapter->card; 582 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 583 struct mwifiex_pcie_buf_desc *desc; 584 struct mwifiex_pfu_buf_desc *desc2; 585 int i; 586 587 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 588 card->tx_buf_list[i] = NULL; 589 if (reg->pfu_enabled) { 590 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 591 (sizeof(*desc2) * i); 592 desc2 = card->txbd_ring[i]; 593 memset(desc2, 0, sizeof(*desc2)); 594 } else { 595 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 596 (sizeof(*desc) * i); 597 desc = card->txbd_ring[i]; 598 memset(desc, 0, sizeof(*desc)); 599 } 600 } 601 602 return 0; 603 } 604 605 /* This function initializes RX buffer ring descriptors. Each SKB is allocated 606 * here and after mapping PCI memory, its physical address is assigned to 607 * PCIE Rx buffer descriptor's physical address. 608 */ 609 static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter) 610 { 611 struct pcie_service_card *card = adapter->card; 612 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 613 struct sk_buff *skb; 614 struct mwifiex_pcie_buf_desc *desc; 615 struct mwifiex_pfu_buf_desc *desc2; 616 dma_addr_t buf_pa; 617 int i; 618 619 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 620 /* Allocate skb here so that firmware can DMA data from it */ 621 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 622 GFP_KERNEL); 623 if (!skb) { 624 mwifiex_dbg(adapter, ERROR, 625 "Unable to allocate skb for RX ring.\n"); 626 kfree(card->rxbd_ring_vbase); 627 return -ENOMEM; 628 } 629 630 if (mwifiex_map_pci_memory(adapter, skb, 631 MWIFIEX_RX_DATA_BUF_SIZE, 632 DMA_FROM_DEVICE)) 633 return -1; 634 635 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 636 637 mwifiex_dbg(adapter, INFO, 638 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 639 skb, skb->len, skb->data, (u32)buf_pa, 640 (u32)((u64)buf_pa >> 32)); 641 642 card->rx_buf_list[i] = skb; 643 if (reg->pfu_enabled) { 644 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase + 645 (sizeof(*desc2) * i); 646 desc2 = card->rxbd_ring[i]; 647 desc2->paddr = buf_pa; 648 desc2->len = (u16)skb->len; 649 desc2->frag_len = (u16)skb->len; 650 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop; 651 desc2->offset = 0; 652 } else { 653 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase + 654 (sizeof(*desc) * i)); 655 desc = card->rxbd_ring[i]; 656 desc->paddr = buf_pa; 657 desc->len = (u16)skb->len; 658 desc->flags = 0; 659 } 660 } 661 662 return 0; 663 } 664 665 /* This function initializes event buffer ring descriptors. Each SKB is 666 * allocated here and after mapping PCI memory, its physical address is assigned 667 * to PCIE Rx buffer descriptor's physical address 668 */ 669 static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter) 670 { 671 struct pcie_service_card *card = adapter->card; 672 struct mwifiex_evt_buf_desc *desc; 673 struct sk_buff *skb; 674 dma_addr_t buf_pa; 675 int i; 676 677 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 678 /* Allocate skb here so that firmware can DMA data from it */ 679 skb = dev_alloc_skb(MAX_EVENT_SIZE); 680 if (!skb) { 681 mwifiex_dbg(adapter, ERROR, 682 "Unable to allocate skb for EVENT buf.\n"); 683 kfree(card->evtbd_ring_vbase); 684 return -ENOMEM; 685 } 686 skb_put(skb, MAX_EVENT_SIZE); 687 688 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE, 689 DMA_FROM_DEVICE)) { 690 kfree_skb(skb); 691 kfree(card->evtbd_ring_vbase); 692 return -1; 693 } 694 695 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 696 697 mwifiex_dbg(adapter, EVENT, 698 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 699 skb, skb->len, skb->data, (u32)buf_pa, 700 (u32)((u64)buf_pa >> 32)); 701 702 card->evt_buf_list[i] = skb; 703 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase + 704 (sizeof(*desc) * i)); 705 desc = card->evtbd_ring[i]; 706 desc->paddr = buf_pa; 707 desc->len = (u16)skb->len; 708 desc->flags = 0; 709 } 710 711 return 0; 712 } 713 714 /* This function cleans up TX buffer rings. If any of the buffer list has valid 715 * SKB address, associated SKB is freed. 716 */ 717 static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter) 718 { 719 struct pcie_service_card *card = adapter->card; 720 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 721 struct sk_buff *skb; 722 struct mwifiex_pcie_buf_desc *desc; 723 struct mwifiex_pfu_buf_desc *desc2; 724 int i; 725 726 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 727 if (reg->pfu_enabled) { 728 desc2 = card->txbd_ring[i]; 729 if (card->tx_buf_list[i]) { 730 skb = card->tx_buf_list[i]; 731 mwifiex_unmap_pci_memory(adapter, skb, 732 DMA_TO_DEVICE); 733 dev_kfree_skb_any(skb); 734 } 735 memset(desc2, 0, sizeof(*desc2)); 736 } else { 737 desc = card->txbd_ring[i]; 738 if (card->tx_buf_list[i]) { 739 skb = card->tx_buf_list[i]; 740 mwifiex_unmap_pci_memory(adapter, skb, 741 DMA_TO_DEVICE); 742 dev_kfree_skb_any(skb); 743 } 744 memset(desc, 0, sizeof(*desc)); 745 } 746 card->tx_buf_list[i] = NULL; 747 } 748 749 atomic_set(&adapter->tx_hw_pending, 0); 750 return; 751 } 752 753 /* This function cleans up RX buffer rings. If any of the buffer list has valid 754 * SKB address, associated SKB is freed. 755 */ 756 static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter) 757 { 758 struct pcie_service_card *card = adapter->card; 759 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 760 struct mwifiex_pcie_buf_desc *desc; 761 struct mwifiex_pfu_buf_desc *desc2; 762 struct sk_buff *skb; 763 int i; 764 765 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 766 if (reg->pfu_enabled) { 767 desc2 = card->rxbd_ring[i]; 768 if (card->rx_buf_list[i]) { 769 skb = card->rx_buf_list[i]; 770 mwifiex_unmap_pci_memory(adapter, skb, 771 DMA_FROM_DEVICE); 772 dev_kfree_skb_any(skb); 773 } 774 memset(desc2, 0, sizeof(*desc2)); 775 } else { 776 desc = card->rxbd_ring[i]; 777 if (card->rx_buf_list[i]) { 778 skb = card->rx_buf_list[i]; 779 mwifiex_unmap_pci_memory(adapter, skb, 780 DMA_FROM_DEVICE); 781 dev_kfree_skb_any(skb); 782 } 783 memset(desc, 0, sizeof(*desc)); 784 } 785 card->rx_buf_list[i] = NULL; 786 } 787 788 return; 789 } 790 791 /* This function cleans up event buffer rings. If any of the buffer list has 792 * valid SKB address, associated SKB is freed. 793 */ 794 static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter) 795 { 796 struct pcie_service_card *card = adapter->card; 797 struct mwifiex_evt_buf_desc *desc; 798 struct sk_buff *skb; 799 int i; 800 801 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 802 desc = card->evtbd_ring[i]; 803 if (card->evt_buf_list[i]) { 804 skb = card->evt_buf_list[i]; 805 mwifiex_unmap_pci_memory(adapter, skb, 806 DMA_FROM_DEVICE); 807 dev_kfree_skb_any(skb); 808 } 809 card->evt_buf_list[i] = NULL; 810 memset(desc, 0, sizeof(*desc)); 811 } 812 813 return; 814 } 815 816 /* This function creates buffer descriptor ring for TX 817 */ 818 static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter) 819 { 820 struct pcie_service_card *card = adapter->card; 821 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 822 823 /* 824 * driver maintaines the write pointer and firmware maintaines the read 825 * pointer. The write pointer starts at 0 (zero) while the read pointer 826 * starts at zero with rollover bit set 827 */ 828 card->txbd_wrptr = 0; 829 830 if (reg->pfu_enabled) 831 card->txbd_rdptr = 0; 832 else 833 card->txbd_rdptr |= reg->tx_rollover_ind; 834 835 /* allocate shared memory for the BD ring and divide the same in to 836 several descriptors */ 837 if (reg->pfu_enabled) 838 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 839 MWIFIEX_MAX_TXRX_BD; 840 else 841 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 842 MWIFIEX_MAX_TXRX_BD; 843 844 mwifiex_dbg(adapter, INFO, 845 "info: txbd_ring: Allocating %d bytes\n", 846 card->txbd_ring_size); 847 card->txbd_ring_vbase = dma_alloc_coherent(&card->dev->dev, 848 card->txbd_ring_size, 849 &card->txbd_ring_pbase, 850 GFP_KERNEL); 851 if (!card->txbd_ring_vbase) { 852 mwifiex_dbg(adapter, ERROR, 853 "allocate coherent memory (%d bytes) failed!\n", 854 card->txbd_ring_size); 855 return -ENOMEM; 856 } 857 858 mwifiex_dbg(adapter, DATA, 859 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %#x\n", 860 card->txbd_ring_vbase, (u32)card->txbd_ring_pbase, 861 (u32)((u64)card->txbd_ring_pbase >> 32), 862 card->txbd_ring_size); 863 864 return mwifiex_init_txq_ring(adapter); 865 } 866 867 static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter) 868 { 869 struct pcie_service_card *card = adapter->card; 870 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 871 872 mwifiex_cleanup_txq_ring(adapter); 873 874 if (card->txbd_ring_vbase) 875 dma_free_coherent(&card->dev->dev, card->txbd_ring_size, 876 card->txbd_ring_vbase, 877 card->txbd_ring_pbase); 878 card->txbd_ring_size = 0; 879 card->txbd_wrptr = 0; 880 card->txbd_rdptr = 0 | reg->tx_rollover_ind; 881 card->txbd_ring_vbase = NULL; 882 card->txbd_ring_pbase = 0; 883 884 return 0; 885 } 886 887 /* 888 * This function creates buffer descriptor ring for RX 889 */ 890 static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter) 891 { 892 struct pcie_service_card *card = adapter->card; 893 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 894 895 /* 896 * driver maintaines the read pointer and firmware maintaines the write 897 * pointer. The write pointer starts at 0 (zero) while the read pointer 898 * starts at zero with rollover bit set 899 */ 900 card->rxbd_wrptr = 0; 901 card->rxbd_rdptr = reg->rx_rollover_ind; 902 903 if (reg->pfu_enabled) 904 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 905 MWIFIEX_MAX_TXRX_BD; 906 else 907 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 908 MWIFIEX_MAX_TXRX_BD; 909 910 mwifiex_dbg(adapter, INFO, 911 "info: rxbd_ring: Allocating %d bytes\n", 912 card->rxbd_ring_size); 913 card->rxbd_ring_vbase = dma_alloc_coherent(&card->dev->dev, 914 card->rxbd_ring_size, 915 &card->rxbd_ring_pbase, 916 GFP_KERNEL); 917 if (!card->rxbd_ring_vbase) { 918 mwifiex_dbg(adapter, ERROR, 919 "allocate coherent memory (%d bytes) failed!\n", 920 card->rxbd_ring_size); 921 return -ENOMEM; 922 } 923 924 mwifiex_dbg(adapter, DATA, 925 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n", 926 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase, 927 (u32)((u64)card->rxbd_ring_pbase >> 32), 928 card->rxbd_ring_size); 929 930 return mwifiex_init_rxq_ring(adapter); 931 } 932 933 /* 934 * This function deletes Buffer descriptor ring for RX 935 */ 936 static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter) 937 { 938 struct pcie_service_card *card = adapter->card; 939 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 940 941 mwifiex_cleanup_rxq_ring(adapter); 942 943 if (card->rxbd_ring_vbase) 944 dma_free_coherent(&card->dev->dev, card->rxbd_ring_size, 945 card->rxbd_ring_vbase, 946 card->rxbd_ring_pbase); 947 card->rxbd_ring_size = 0; 948 card->rxbd_wrptr = 0; 949 card->rxbd_rdptr = 0 | reg->rx_rollover_ind; 950 card->rxbd_ring_vbase = NULL; 951 card->rxbd_ring_pbase = 0; 952 953 return 0; 954 } 955 956 /* 957 * This function creates buffer descriptor ring for Events 958 */ 959 static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter) 960 { 961 struct pcie_service_card *card = adapter->card; 962 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 963 964 /* 965 * driver maintaines the read pointer and firmware maintaines the write 966 * pointer. The write pointer starts at 0 (zero) while the read pointer 967 * starts at zero with rollover bit set 968 */ 969 card->evtbd_wrptr = 0; 970 card->evtbd_rdptr = reg->evt_rollover_ind; 971 972 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) * 973 MWIFIEX_MAX_EVT_BD; 974 975 mwifiex_dbg(adapter, INFO, 976 "info: evtbd_ring: Allocating %d bytes\n", 977 card->evtbd_ring_size); 978 card->evtbd_ring_vbase = dma_alloc_coherent(&card->dev->dev, 979 card->evtbd_ring_size, 980 &card->evtbd_ring_pbase, 981 GFP_KERNEL); 982 if (!card->evtbd_ring_vbase) { 983 mwifiex_dbg(adapter, ERROR, 984 "allocate coherent memory (%d bytes) failed!\n", 985 card->evtbd_ring_size); 986 return -ENOMEM; 987 } 988 989 mwifiex_dbg(adapter, EVENT, 990 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n", 991 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase, 992 (u32)((u64)card->evtbd_ring_pbase >> 32), 993 card->evtbd_ring_size); 994 995 return mwifiex_pcie_init_evt_ring(adapter); 996 } 997 998 /* 999 * This function deletes Buffer descriptor ring for Events 1000 */ 1001 static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter) 1002 { 1003 struct pcie_service_card *card = adapter->card; 1004 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1005 1006 mwifiex_cleanup_evt_ring(adapter); 1007 1008 if (card->evtbd_ring_vbase) 1009 dma_free_coherent(&card->dev->dev, card->evtbd_ring_size, 1010 card->evtbd_ring_vbase, 1011 card->evtbd_ring_pbase); 1012 card->evtbd_wrptr = 0; 1013 card->evtbd_rdptr = 0 | reg->evt_rollover_ind; 1014 card->evtbd_ring_size = 0; 1015 card->evtbd_ring_vbase = NULL; 1016 card->evtbd_ring_pbase = 0; 1017 1018 return 0; 1019 } 1020 1021 /* 1022 * This function allocates a buffer for CMDRSP 1023 */ 1024 static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter) 1025 { 1026 struct pcie_service_card *card = adapter->card; 1027 struct sk_buff *skb; 1028 1029 /* Allocate memory for receiving command response data */ 1030 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 1031 if (!skb) { 1032 mwifiex_dbg(adapter, ERROR, 1033 "Unable to allocate skb for command response data.\n"); 1034 return -ENOMEM; 1035 } 1036 skb_put(skb, MWIFIEX_UPLD_SIZE); 1037 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1038 DMA_FROM_DEVICE)) { 1039 kfree_skb(skb); 1040 return -1; 1041 } 1042 1043 card->cmdrsp_buf = skb; 1044 1045 return 0; 1046 } 1047 1048 /* 1049 * This function deletes a buffer for CMDRSP 1050 */ 1051 static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter) 1052 { 1053 struct pcie_service_card *card; 1054 1055 if (!adapter) 1056 return 0; 1057 1058 card = adapter->card; 1059 1060 if (card && card->cmdrsp_buf) { 1061 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf, 1062 DMA_FROM_DEVICE); 1063 dev_kfree_skb_any(card->cmdrsp_buf); 1064 card->cmdrsp_buf = NULL; 1065 } 1066 1067 if (card && card->cmd_buf) { 1068 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1069 DMA_TO_DEVICE); 1070 dev_kfree_skb_any(card->cmd_buf); 1071 card->cmd_buf = NULL; 1072 } 1073 return 0; 1074 } 1075 1076 /* 1077 * This function allocates a buffer for sleep cookie 1078 */ 1079 static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter) 1080 { 1081 struct pcie_service_card *card = adapter->card; 1082 u32 tmp; 1083 1084 card->sleep_cookie_vbase = dma_alloc_coherent(&card->dev->dev, 1085 sizeof(u32), 1086 &card->sleep_cookie_pbase, 1087 GFP_KERNEL); 1088 if (!card->sleep_cookie_vbase) { 1089 mwifiex_dbg(adapter, ERROR, 1090 "dma_alloc_coherent failed!\n"); 1091 return -ENOMEM; 1092 } 1093 /* Init val of Sleep Cookie */ 1094 tmp = FW_AWAKE_COOKIE; 1095 put_unaligned(tmp, card->sleep_cookie_vbase); 1096 1097 mwifiex_dbg(adapter, INFO, 1098 "alloc_scook: sleep cookie=0x%x\n", 1099 get_unaligned(card->sleep_cookie_vbase)); 1100 1101 return 0; 1102 } 1103 1104 /* 1105 * This function deletes buffer for sleep cookie 1106 */ 1107 static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter) 1108 { 1109 struct pcie_service_card *card; 1110 1111 if (!adapter) 1112 return 0; 1113 1114 card = adapter->card; 1115 1116 if (card && card->sleep_cookie_vbase) { 1117 dma_free_coherent(&card->dev->dev, sizeof(u32), 1118 card->sleep_cookie_vbase, 1119 card->sleep_cookie_pbase); 1120 card->sleep_cookie_vbase = NULL; 1121 } 1122 1123 return 0; 1124 } 1125 1126 /* This function flushes the TX buffer descriptor ring 1127 * This function defined as handler is also called while cleaning TXRX 1128 * during disconnect/ bss stop. 1129 */ 1130 static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter) 1131 { 1132 struct pcie_service_card *card = adapter->card; 1133 1134 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) { 1135 card->txbd_flush = 1; 1136 /* write pointer already set at last send 1137 * send dnld-rdy intr again, wait for completion. 1138 */ 1139 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1140 CPU_INTR_DNLD_RDY)) { 1141 mwifiex_dbg(adapter, ERROR, 1142 "failed to assert dnld-rdy interrupt.\n"); 1143 return -1; 1144 } 1145 } 1146 return 0; 1147 } 1148 1149 /* 1150 * This function unmaps and frees downloaded data buffer 1151 */ 1152 static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter) 1153 { 1154 struct sk_buff *skb; 1155 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0; 1156 struct mwifiex_pcie_buf_desc *desc; 1157 struct mwifiex_pfu_buf_desc *desc2; 1158 struct pcie_service_card *card = adapter->card; 1159 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1160 1161 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1162 mwifiex_pm_wakeup_card(adapter); 1163 1164 /* Read the TX ring read pointer set by firmware */ 1165 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) { 1166 mwifiex_dbg(adapter, ERROR, 1167 "SEND COMP: failed to read reg->tx_rdptr\n"); 1168 return -1; 1169 } 1170 1171 mwifiex_dbg(adapter, DATA, 1172 "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n", 1173 card->txbd_rdptr, rdptr); 1174 1175 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1176 /* free from previous txbd_rdptr to current txbd_rdptr */ 1177 while (((card->txbd_rdptr & reg->tx_mask) != 1178 (rdptr & reg->tx_mask)) || 1179 ((card->txbd_rdptr & reg->tx_rollover_ind) != 1180 (rdptr & reg->tx_rollover_ind))) { 1181 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >> 1182 reg->tx_start_ptr; 1183 1184 skb = card->tx_buf_list[wrdoneidx]; 1185 1186 if (skb) { 1187 mwifiex_dbg(adapter, DATA, 1188 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n", 1189 skb, wrdoneidx); 1190 mwifiex_unmap_pci_memory(adapter, skb, 1191 DMA_TO_DEVICE); 1192 1193 unmap_count++; 1194 1195 if (card->txbd_flush) 1196 mwifiex_write_data_complete(adapter, skb, 0, 1197 -1); 1198 else 1199 mwifiex_write_data_complete(adapter, skb, 0, 0); 1200 atomic_dec(&adapter->tx_hw_pending); 1201 } 1202 1203 card->tx_buf_list[wrdoneidx] = NULL; 1204 1205 if (reg->pfu_enabled) { 1206 desc2 = card->txbd_ring[wrdoneidx]; 1207 memset(desc2, 0, sizeof(*desc2)); 1208 } else { 1209 desc = card->txbd_ring[wrdoneidx]; 1210 memset(desc, 0, sizeof(*desc)); 1211 } 1212 switch (card->dev->device) { 1213 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1214 card->txbd_rdptr++; 1215 break; 1216 case PCIE_DEVICE_ID_MARVELL_88W8897: 1217 case PCIE_DEVICE_ID_MARVELL_88W8997: 1218 card->txbd_rdptr += reg->ring_tx_start_ptr; 1219 break; 1220 } 1221 1222 1223 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs) 1224 card->txbd_rdptr = ((card->txbd_rdptr & 1225 reg->tx_rollover_ind) ^ 1226 reg->tx_rollover_ind); 1227 } 1228 1229 if (unmap_count) 1230 adapter->data_sent = false; 1231 1232 if (card->txbd_flush) { 1233 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) 1234 card->txbd_flush = 0; 1235 else 1236 mwifiex_clean_pcie_ring_buf(adapter); 1237 } 1238 1239 return 0; 1240 } 1241 1242 /* This function sends data buffer to device. First 4 bytes of payload 1243 * are filled with payload length and payload type. Then this payload 1244 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly. 1245 * Download ready interrupt to FW is deffered if Tx ring is not full and 1246 * additional payload can be accomodated. 1247 * Caller must ensure tx_param parameter to this function is not NULL. 1248 */ 1249 static int 1250 mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb, 1251 struct mwifiex_tx_param *tx_param) 1252 { 1253 struct pcie_service_card *card = adapter->card; 1254 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1255 u32 wrindx, num_tx_buffs, rx_val; 1256 int ret; 1257 dma_addr_t buf_pa; 1258 struct mwifiex_pcie_buf_desc *desc = NULL; 1259 struct mwifiex_pfu_buf_desc *desc2 = NULL; 1260 1261 if (!(skb->data && skb->len)) { 1262 mwifiex_dbg(adapter, ERROR, 1263 "%s(): invalid parameter <%p, %#x>\n", 1264 __func__, skb->data, skb->len); 1265 return -1; 1266 } 1267 1268 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1269 mwifiex_pm_wakeup_card(adapter); 1270 1271 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1272 mwifiex_dbg(adapter, DATA, 1273 "info: SEND DATA: <Rd: %#x, Wr: %#x>\n", 1274 card->txbd_rdptr, card->txbd_wrptr); 1275 if (mwifiex_pcie_txbd_not_full(card)) { 1276 u8 *payload; 1277 1278 adapter->data_sent = true; 1279 payload = skb->data; 1280 put_unaligned_le16((u16)skb->len, payload + 0); 1281 put_unaligned_le16(MWIFIEX_TYPE_DATA, payload + 2); 1282 1283 if (mwifiex_map_pci_memory(adapter, skb, skb->len, 1284 DMA_TO_DEVICE)) 1285 return -1; 1286 1287 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr; 1288 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1289 card->tx_buf_list[wrindx] = skb; 1290 atomic_inc(&adapter->tx_hw_pending); 1291 1292 if (reg->pfu_enabled) { 1293 desc2 = card->txbd_ring[wrindx]; 1294 desc2->paddr = buf_pa; 1295 desc2->len = (u16)skb->len; 1296 desc2->frag_len = (u16)skb->len; 1297 desc2->offset = 0; 1298 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1299 MWIFIEX_BD_FLAG_LAST_DESC; 1300 } else { 1301 desc = card->txbd_ring[wrindx]; 1302 desc->paddr = buf_pa; 1303 desc->len = (u16)skb->len; 1304 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1305 MWIFIEX_BD_FLAG_LAST_DESC; 1306 } 1307 1308 switch (card->dev->device) { 1309 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1310 card->txbd_wrptr++; 1311 break; 1312 case PCIE_DEVICE_ID_MARVELL_88W8897: 1313 case PCIE_DEVICE_ID_MARVELL_88W8997: 1314 card->txbd_wrptr += reg->ring_tx_start_ptr; 1315 break; 1316 } 1317 1318 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs) 1319 card->txbd_wrptr = ((card->txbd_wrptr & 1320 reg->tx_rollover_ind) ^ 1321 reg->tx_rollover_ind); 1322 1323 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask; 1324 /* Write the TX ring write pointer in to reg->tx_wrptr */ 1325 if (mwifiex_write_reg(adapter, reg->tx_wrptr, 1326 card->txbd_wrptr | rx_val)) { 1327 mwifiex_dbg(adapter, ERROR, 1328 "SEND DATA: failed to write reg->tx_wrptr\n"); 1329 ret = -1; 1330 goto done_unmap; 1331 } 1332 if ((mwifiex_pcie_txbd_not_full(card)) && 1333 tx_param->next_pkt_len) { 1334 /* have more packets and TxBD still can hold more */ 1335 mwifiex_dbg(adapter, DATA, 1336 "SEND DATA: delay dnld-rdy interrupt.\n"); 1337 adapter->data_sent = false; 1338 } else { 1339 /* Send the TX ready interrupt */ 1340 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1341 CPU_INTR_DNLD_RDY)) { 1342 mwifiex_dbg(adapter, ERROR, 1343 "SEND DATA: failed to assert dnld-rdy interrupt.\n"); 1344 ret = -1; 1345 goto done_unmap; 1346 } 1347 } 1348 mwifiex_dbg(adapter, DATA, 1349 "info: SEND DATA: Updated <Rd: %#x, Wr:\t" 1350 "%#x> and sent packet to firmware successfully\n", 1351 card->txbd_rdptr, card->txbd_wrptr); 1352 } else { 1353 mwifiex_dbg(adapter, DATA, 1354 "info: TX Ring full, can't send packets to fw\n"); 1355 adapter->data_sent = true; 1356 /* Send the TX ready interrupt */ 1357 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1358 CPU_INTR_DNLD_RDY)) 1359 mwifiex_dbg(adapter, ERROR, 1360 "SEND DATA: failed to assert door-bell intr\n"); 1361 return -EBUSY; 1362 } 1363 1364 return -EINPROGRESS; 1365 done_unmap: 1366 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE); 1367 card->tx_buf_list[wrindx] = NULL; 1368 atomic_dec(&adapter->tx_hw_pending); 1369 if (reg->pfu_enabled) 1370 memset(desc2, 0, sizeof(*desc2)); 1371 else 1372 memset(desc, 0, sizeof(*desc)); 1373 1374 return ret; 1375 } 1376 1377 /* 1378 * This function handles received buffer ring and 1379 * dispatches packets to upper 1380 */ 1381 static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter) 1382 { 1383 struct pcie_service_card *card = adapter->card; 1384 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1385 u32 wrptr, rd_index, tx_val; 1386 dma_addr_t buf_pa; 1387 int ret = 0; 1388 struct sk_buff *skb_tmp = NULL; 1389 struct mwifiex_pcie_buf_desc *desc; 1390 struct mwifiex_pfu_buf_desc *desc2; 1391 1392 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1393 mwifiex_pm_wakeup_card(adapter); 1394 1395 /* Read the RX ring Write pointer set by firmware */ 1396 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1397 mwifiex_dbg(adapter, ERROR, 1398 "RECV DATA: failed to read reg->rx_wrptr\n"); 1399 ret = -1; 1400 goto done; 1401 } 1402 card->rxbd_wrptr = wrptr; 1403 1404 while (((wrptr & reg->rx_mask) != 1405 (card->rxbd_rdptr & reg->rx_mask)) || 1406 ((wrptr & reg->rx_rollover_ind) == 1407 (card->rxbd_rdptr & reg->rx_rollover_ind))) { 1408 struct sk_buff *skb_data; 1409 u16 rx_len; 1410 1411 rd_index = card->rxbd_rdptr & reg->rx_mask; 1412 skb_data = card->rx_buf_list[rd_index]; 1413 1414 /* If skb allocation was failed earlier for Rx packet, 1415 * rx_buf_list[rd_index] would have been left with a NULL. 1416 */ 1417 if (!skb_data) 1418 return -ENOMEM; 1419 1420 mwifiex_unmap_pci_memory(adapter, skb_data, DMA_FROM_DEVICE); 1421 card->rx_buf_list[rd_index] = NULL; 1422 1423 /* Get data length from interface header - 1424 * first 2 bytes for len, next 2 bytes is for type 1425 */ 1426 rx_len = get_unaligned_le16(skb_data->data); 1427 if (WARN_ON(rx_len <= adapter->intf_hdr_len || 1428 rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) { 1429 mwifiex_dbg(adapter, ERROR, 1430 "Invalid RX len %d, Rd=%#x, Wr=%#x\n", 1431 rx_len, card->rxbd_rdptr, wrptr); 1432 dev_kfree_skb_any(skb_data); 1433 } else { 1434 skb_put(skb_data, rx_len); 1435 mwifiex_dbg(adapter, DATA, 1436 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n", 1437 card->rxbd_rdptr, wrptr, rx_len); 1438 skb_pull(skb_data, adapter->intf_hdr_len); 1439 if (adapter->rx_work_enabled) { 1440 skb_queue_tail(&adapter->rx_data_q, skb_data); 1441 adapter->data_received = true; 1442 atomic_inc(&adapter->rx_pending); 1443 } else { 1444 mwifiex_handle_rx_packet(adapter, skb_data); 1445 } 1446 } 1447 1448 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 1449 GFP_KERNEL); 1450 if (!skb_tmp) { 1451 mwifiex_dbg(adapter, ERROR, 1452 "Unable to allocate skb.\n"); 1453 return -ENOMEM; 1454 } 1455 1456 if (mwifiex_map_pci_memory(adapter, skb_tmp, 1457 MWIFIEX_RX_DATA_BUF_SIZE, 1458 DMA_FROM_DEVICE)) 1459 return -1; 1460 1461 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp); 1462 1463 mwifiex_dbg(adapter, INFO, 1464 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n", 1465 skb_tmp, rd_index); 1466 card->rx_buf_list[rd_index] = skb_tmp; 1467 1468 if (reg->pfu_enabled) { 1469 desc2 = card->rxbd_ring[rd_index]; 1470 desc2->paddr = buf_pa; 1471 desc2->len = skb_tmp->len; 1472 desc2->frag_len = skb_tmp->len; 1473 desc2->offset = 0; 1474 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop; 1475 } else { 1476 desc = card->rxbd_ring[rd_index]; 1477 desc->paddr = buf_pa; 1478 desc->len = skb_tmp->len; 1479 desc->flags = 0; 1480 } 1481 1482 if ((++card->rxbd_rdptr & reg->rx_mask) == 1483 MWIFIEX_MAX_TXRX_BD) { 1484 card->rxbd_rdptr = ((card->rxbd_rdptr & 1485 reg->rx_rollover_ind) ^ 1486 reg->rx_rollover_ind); 1487 } 1488 mwifiex_dbg(adapter, DATA, 1489 "info: RECV DATA: <Rd: %#x, Wr: %#x>\n", 1490 card->rxbd_rdptr, wrptr); 1491 1492 tx_val = card->txbd_wrptr & reg->tx_wrap_mask; 1493 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1494 if (mwifiex_write_reg(adapter, reg->rx_rdptr, 1495 card->rxbd_rdptr | tx_val)) { 1496 mwifiex_dbg(adapter, DATA, 1497 "RECV DATA: failed to write reg->rx_rdptr\n"); 1498 ret = -1; 1499 goto done; 1500 } 1501 1502 /* Read the RX ring Write pointer set by firmware */ 1503 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1504 mwifiex_dbg(adapter, ERROR, 1505 "RECV DATA: failed to read reg->rx_wrptr\n"); 1506 ret = -1; 1507 goto done; 1508 } 1509 mwifiex_dbg(adapter, DATA, 1510 "info: RECV DATA: Rcvd packet from fw successfully\n"); 1511 card->rxbd_wrptr = wrptr; 1512 } 1513 1514 done: 1515 return ret; 1516 } 1517 1518 /* 1519 * This function downloads the boot command to device 1520 */ 1521 static int 1522 mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1523 { 1524 dma_addr_t buf_pa; 1525 struct pcie_service_card *card = adapter->card; 1526 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1527 1528 if (!(skb->data && skb->len)) { 1529 mwifiex_dbg(adapter, ERROR, 1530 "Invalid parameter in %s <%p. len %d>\n", 1531 __func__, skb->data, skb->len); 1532 return -1; 1533 } 1534 1535 if (mwifiex_map_pci_memory(adapter, skb, skb->len, DMA_TO_DEVICE)) 1536 return -1; 1537 1538 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1539 1540 /* Write the lower 32bits of the physical address to low command 1541 * address scratch register 1542 */ 1543 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) { 1544 mwifiex_dbg(adapter, ERROR, 1545 "%s: failed to write download command to boot code.\n", 1546 __func__); 1547 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE); 1548 return -1; 1549 } 1550 1551 /* Write the upper 32bits of the physical address to high command 1552 * address scratch register 1553 */ 1554 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1555 (u32)((u64)buf_pa >> 32))) { 1556 mwifiex_dbg(adapter, ERROR, 1557 "%s: failed to write download command to boot code.\n", 1558 __func__); 1559 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE); 1560 return -1; 1561 } 1562 1563 /* Write the command length to cmd_size scratch register */ 1564 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) { 1565 mwifiex_dbg(adapter, ERROR, 1566 "%s: failed to write command len to cmd_size scratch reg\n", 1567 __func__); 1568 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE); 1569 return -1; 1570 } 1571 1572 /* Ring the door bell */ 1573 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1574 CPU_INTR_DOOR_BELL)) { 1575 mwifiex_dbg(adapter, ERROR, 1576 "%s: failed to assert door-bell intr\n", __func__); 1577 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE); 1578 return -1; 1579 } 1580 1581 return 0; 1582 } 1583 1584 /* This function init rx port in firmware which in turn enables to receive data 1585 * from device before transmitting any packet. 1586 */ 1587 static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter) 1588 { 1589 struct pcie_service_card *card = adapter->card; 1590 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1591 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask; 1592 1593 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1594 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr | 1595 tx_wrap)) { 1596 mwifiex_dbg(adapter, ERROR, 1597 "RECV DATA: failed to write reg->rx_rdptr\n"); 1598 return -1; 1599 } 1600 return 0; 1601 } 1602 1603 /* This function downloads commands to the device 1604 */ 1605 static int 1606 mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1607 { 1608 struct pcie_service_card *card = adapter->card; 1609 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1610 int ret = 0; 1611 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa; 1612 u8 *payload = (u8 *)skb->data; 1613 1614 if (!(skb->data && skb->len)) { 1615 mwifiex_dbg(adapter, ERROR, 1616 "Invalid parameter in %s <%p, %#x>\n", 1617 __func__, skb->data, skb->len); 1618 return -1; 1619 } 1620 1621 /* Make sure a command response buffer is available */ 1622 if (!card->cmdrsp_buf) { 1623 mwifiex_dbg(adapter, ERROR, 1624 "No response buffer available, send command failed\n"); 1625 return -EBUSY; 1626 } 1627 1628 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1629 mwifiex_pm_wakeup_card(adapter); 1630 1631 adapter->cmd_sent = true; 1632 1633 put_unaligned_le16((u16)skb->len, &payload[0]); 1634 put_unaligned_le16(MWIFIEX_TYPE_CMD, &payload[2]); 1635 1636 if (mwifiex_map_pci_memory(adapter, skb, skb->len, DMA_TO_DEVICE)) 1637 return -1; 1638 1639 card->cmd_buf = skb; 1640 /* 1641 * Need to keep a reference, since core driver might free up this 1642 * buffer before we've unmapped it. 1643 */ 1644 skb_get(skb); 1645 1646 /* To send a command, the driver will: 1647 1. Write the 64bit physical address of the data buffer to 1648 cmd response address low + cmd response address high 1649 2. Ring the door bell (i.e. set the door bell interrupt) 1650 1651 In response to door bell interrupt, the firmware will perform 1652 the DMA of the command packet (first header to obtain the total 1653 length and then rest of the command). 1654 */ 1655 1656 if (card->cmdrsp_buf) { 1657 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf); 1658 /* Write the lower 32bits of the cmdrsp buffer physical 1659 address */ 1660 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 1661 (u32)cmdrsp_buf_pa)) { 1662 mwifiex_dbg(adapter, ERROR, 1663 "Failed to write download cmd to boot code.\n"); 1664 ret = -1; 1665 goto done; 1666 } 1667 /* Write the upper 32bits of the cmdrsp buffer physical 1668 address */ 1669 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 1670 (u32)((u64)cmdrsp_buf_pa >> 32))) { 1671 mwifiex_dbg(adapter, ERROR, 1672 "Failed to write download cmd to boot code.\n"); 1673 ret = -1; 1674 goto done; 1675 } 1676 } 1677 1678 cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf); 1679 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */ 1680 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, 1681 (u32)cmd_buf_pa)) { 1682 mwifiex_dbg(adapter, ERROR, 1683 "Failed to write download cmd to boot code.\n"); 1684 ret = -1; 1685 goto done; 1686 } 1687 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */ 1688 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1689 (u32)((u64)cmd_buf_pa >> 32))) { 1690 mwifiex_dbg(adapter, ERROR, 1691 "Failed to write download cmd to boot code.\n"); 1692 ret = -1; 1693 goto done; 1694 } 1695 1696 /* Write the command length to reg->cmd_size */ 1697 if (mwifiex_write_reg(adapter, reg->cmd_size, 1698 card->cmd_buf->len)) { 1699 mwifiex_dbg(adapter, ERROR, 1700 "Failed to write cmd len to reg->cmd_size\n"); 1701 ret = -1; 1702 goto done; 1703 } 1704 1705 /* Ring the door bell */ 1706 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1707 CPU_INTR_DOOR_BELL)) { 1708 mwifiex_dbg(adapter, ERROR, 1709 "Failed to assert door-bell intr\n"); 1710 ret = -1; 1711 goto done; 1712 } 1713 1714 done: 1715 if (ret) 1716 adapter->cmd_sent = false; 1717 1718 return 0; 1719 } 1720 1721 /* 1722 * This function handles command complete interrupt 1723 */ 1724 static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter) 1725 { 1726 struct pcie_service_card *card = adapter->card; 1727 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1728 struct sk_buff *skb = card->cmdrsp_buf; 1729 int count = 0; 1730 u16 rx_len; 1731 1732 mwifiex_dbg(adapter, CMD, 1733 "info: Rx CMD Response\n"); 1734 1735 if (adapter->curr_cmd) 1736 mwifiex_unmap_pci_memory(adapter, skb, DMA_FROM_DEVICE); 1737 else 1738 dma_sync_single_for_cpu(&card->dev->dev, 1739 MWIFIEX_SKB_DMA_ADDR(skb), 1740 MWIFIEX_UPLD_SIZE, DMA_FROM_DEVICE); 1741 1742 /* Unmap the command as a response has been received. */ 1743 if (card->cmd_buf) { 1744 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1745 DMA_TO_DEVICE); 1746 dev_kfree_skb_any(card->cmd_buf); 1747 card->cmd_buf = NULL; 1748 } 1749 1750 rx_len = get_unaligned_le16(skb->data); 1751 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 1752 skb_trim(skb, rx_len); 1753 1754 if (!adapter->curr_cmd) { 1755 if (adapter->ps_state == PS_STATE_SLEEP_CFM) { 1756 dma_sync_single_for_device(&card->dev->dev, 1757 MWIFIEX_SKB_DMA_ADDR(skb), 1758 MWIFIEX_SLEEP_COOKIE_SIZE, 1759 DMA_FROM_DEVICE); 1760 if (mwifiex_write_reg(adapter, 1761 PCIE_CPU_INT_EVENT, 1762 CPU_INTR_SLEEP_CFM_DONE)) { 1763 mwifiex_dbg(adapter, ERROR, 1764 "Write register failed\n"); 1765 return -1; 1766 } 1767 mwifiex_delay_for_sleep_cookie(adapter, 1768 MWIFIEX_MAX_DELAY_COUNT); 1769 mwifiex_unmap_pci_memory(adapter, skb, 1770 DMA_FROM_DEVICE); 1771 skb_pull(skb, adapter->intf_hdr_len); 1772 while (reg->sleep_cookie && (count++ < 10) && 1773 mwifiex_pcie_ok_to_access_hw(adapter)) 1774 usleep_range(50, 60); 1775 mwifiex_pcie_enable_host_int(adapter); 1776 mwifiex_process_sleep_confirm_resp(adapter, skb->data, 1777 skb->len); 1778 } else { 1779 mwifiex_dbg(adapter, ERROR, 1780 "There is no command but got cmdrsp\n"); 1781 } 1782 memcpy(adapter->upld_buf, skb->data, 1783 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len)); 1784 skb_push(skb, adapter->intf_hdr_len); 1785 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1786 DMA_FROM_DEVICE)) 1787 return -1; 1788 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) { 1789 skb_pull(skb, adapter->intf_hdr_len); 1790 adapter->curr_cmd->resp_skb = skb; 1791 adapter->cmd_resp_received = true; 1792 /* Take the pointer and set it to CMD node and will 1793 return in the response complete callback */ 1794 card->cmdrsp_buf = NULL; 1795 1796 /* Clear the cmd-rsp buffer address in scratch registers. This 1797 will prevent firmware from writing to the same response 1798 buffer again. */ 1799 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) { 1800 mwifiex_dbg(adapter, ERROR, 1801 "cmd_done: failed to clear cmd_rsp_addr_lo\n"); 1802 return -1; 1803 } 1804 /* Write the upper 32bits of the cmdrsp buffer physical 1805 address */ 1806 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) { 1807 mwifiex_dbg(adapter, ERROR, 1808 "cmd_done: failed to clear cmd_rsp_addr_hi\n"); 1809 return -1; 1810 } 1811 } 1812 1813 return 0; 1814 } 1815 1816 /* 1817 * Command Response processing complete handler 1818 */ 1819 static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter, 1820 struct sk_buff *skb) 1821 { 1822 struct pcie_service_card *card = adapter->card; 1823 1824 if (skb) { 1825 card->cmdrsp_buf = skb; 1826 skb_push(card->cmdrsp_buf, adapter->intf_hdr_len); 1827 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1828 DMA_FROM_DEVICE)) 1829 return -1; 1830 } 1831 1832 return 0; 1833 } 1834 1835 /* 1836 * This function handles firmware event ready interrupt 1837 */ 1838 static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter) 1839 { 1840 struct pcie_service_card *card = adapter->card; 1841 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1842 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 1843 u32 wrptr, event; 1844 struct mwifiex_evt_buf_desc *desc; 1845 1846 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1847 mwifiex_pm_wakeup_card(adapter); 1848 1849 if (adapter->event_received) { 1850 mwifiex_dbg(adapter, EVENT, 1851 "info: Event being processed,\t" 1852 "do not process this interrupt just yet\n"); 1853 return 0; 1854 } 1855 1856 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 1857 mwifiex_dbg(adapter, ERROR, 1858 "info: Invalid read pointer...\n"); 1859 return -1; 1860 } 1861 1862 /* Read the event ring write pointer set by firmware */ 1863 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 1864 mwifiex_dbg(adapter, ERROR, 1865 "EventReady: failed to read reg->evt_wrptr\n"); 1866 return -1; 1867 } 1868 1869 mwifiex_dbg(adapter, EVENT, 1870 "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>", 1871 card->evtbd_rdptr, wrptr); 1872 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr 1873 & MWIFIEX_EVTBD_MASK)) || 1874 ((wrptr & reg->evt_rollover_ind) == 1875 (card->evtbd_rdptr & reg->evt_rollover_ind))) { 1876 struct sk_buff *skb_cmd; 1877 __le16 data_len = 0; 1878 u16 evt_len; 1879 1880 mwifiex_dbg(adapter, INFO, 1881 "info: Read Index: %d\n", rdptr); 1882 skb_cmd = card->evt_buf_list[rdptr]; 1883 mwifiex_unmap_pci_memory(adapter, skb_cmd, DMA_FROM_DEVICE); 1884 1885 /* Take the pointer and set it to event pointer in adapter 1886 and will return back after event handling callback */ 1887 card->evt_buf_list[rdptr] = NULL; 1888 desc = card->evtbd_ring[rdptr]; 1889 memset(desc, 0, sizeof(*desc)); 1890 1891 event = get_unaligned_le32( 1892 &skb_cmd->data[adapter->intf_hdr_len]); 1893 adapter->event_cause = event; 1894 /* The first 4bytes will be the event transfer header 1895 len is 2 bytes followed by type which is 2 bytes */ 1896 memcpy(&data_len, skb_cmd->data, sizeof(__le16)); 1897 evt_len = le16_to_cpu(data_len); 1898 skb_trim(skb_cmd, evt_len); 1899 skb_pull(skb_cmd, adapter->intf_hdr_len); 1900 mwifiex_dbg(adapter, EVENT, 1901 "info: Event length: %d\n", evt_len); 1902 1903 if (evt_len > MWIFIEX_EVENT_HEADER_LEN && 1904 evt_len < MAX_EVENT_SIZE) 1905 memcpy(adapter->event_body, skb_cmd->data + 1906 MWIFIEX_EVENT_HEADER_LEN, evt_len - 1907 MWIFIEX_EVENT_HEADER_LEN); 1908 1909 adapter->event_received = true; 1910 adapter->event_skb = skb_cmd; 1911 1912 /* Do not update the event read pointer here, wait till the 1913 buffer is released. This is just to make things simpler, 1914 we need to find a better method of managing these buffers. 1915 */ 1916 } else { 1917 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1918 CPU_INTR_EVENT_DONE)) { 1919 mwifiex_dbg(adapter, ERROR, 1920 "Write register failed\n"); 1921 return -1; 1922 } 1923 } 1924 1925 return 0; 1926 } 1927 1928 /* 1929 * Event processing complete handler 1930 */ 1931 static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter, 1932 struct sk_buff *skb) 1933 { 1934 struct pcie_service_card *card = adapter->card; 1935 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1936 int ret = 0; 1937 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 1938 u32 wrptr; 1939 struct mwifiex_evt_buf_desc *desc; 1940 1941 if (!skb) 1942 return 0; 1943 1944 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 1945 mwifiex_dbg(adapter, ERROR, 1946 "event_complete: Invalid rdptr 0x%x\n", 1947 rdptr); 1948 return -EINVAL; 1949 } 1950 1951 /* Read the event ring write pointer set by firmware */ 1952 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 1953 mwifiex_dbg(adapter, ERROR, 1954 "event_complete: failed to read reg->evt_wrptr\n"); 1955 return -1; 1956 } 1957 1958 if (!card->evt_buf_list[rdptr]) { 1959 skb_push(skb, adapter->intf_hdr_len); 1960 skb_put(skb, MAX_EVENT_SIZE - skb->len); 1961 if (mwifiex_map_pci_memory(adapter, skb, 1962 MAX_EVENT_SIZE, 1963 DMA_FROM_DEVICE)) 1964 return -1; 1965 card->evt_buf_list[rdptr] = skb; 1966 desc = card->evtbd_ring[rdptr]; 1967 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb); 1968 desc->len = (u16)skb->len; 1969 desc->flags = 0; 1970 skb = NULL; 1971 } else { 1972 mwifiex_dbg(adapter, ERROR, 1973 "info: ERROR: buf still valid at index %d, <%p, %p>\n", 1974 rdptr, card->evt_buf_list[rdptr], skb); 1975 } 1976 1977 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) { 1978 card->evtbd_rdptr = ((card->evtbd_rdptr & 1979 reg->evt_rollover_ind) ^ 1980 reg->evt_rollover_ind); 1981 } 1982 1983 mwifiex_dbg(adapter, EVENT, 1984 "info: Updated <Rd: 0x%x, Wr: 0x%x>", 1985 card->evtbd_rdptr, wrptr); 1986 1987 /* Write the event ring read pointer in to reg->evt_rdptr */ 1988 if (mwifiex_write_reg(adapter, reg->evt_rdptr, 1989 card->evtbd_rdptr)) { 1990 mwifiex_dbg(adapter, ERROR, 1991 "event_complete: failed to read reg->evt_rdptr\n"); 1992 return -1; 1993 } 1994 1995 mwifiex_dbg(adapter, EVENT, 1996 "info: Check Events Again\n"); 1997 ret = mwifiex_pcie_process_event_ready(adapter); 1998 1999 return ret; 2000 } 2001 2002 /* Combo firmware image is a combination of 2003 * (1) combo crc heaer, start with CMD5 2004 * (2) bluetooth image, start with CMD7, end with CMD6, data wrapped in CMD1. 2005 * (3) wifi image. 2006 * 2007 * This function bypass the header and bluetooth part, return 2008 * the offset of tail wifi-only part. If the image is already wifi-only, 2009 * that is start with CMD1, return 0. 2010 */ 2011 2012 static int mwifiex_extract_wifi_fw(struct mwifiex_adapter *adapter, 2013 const void *firmware, u32 firmware_len) { 2014 const struct mwifiex_fw_data *fwdata; 2015 u32 offset = 0, data_len, dnld_cmd; 2016 int ret = 0; 2017 bool cmd7_before = false, first_cmd = false; 2018 2019 while (1) { 2020 /* Check for integer and buffer overflow */ 2021 if (offset + sizeof(fwdata->header) < sizeof(fwdata->header) || 2022 offset + sizeof(fwdata->header) >= firmware_len) { 2023 mwifiex_dbg(adapter, ERROR, 2024 "extract wifi-only fw failure!\n"); 2025 ret = -1; 2026 goto done; 2027 } 2028 2029 fwdata = firmware + offset; 2030 dnld_cmd = le32_to_cpu(fwdata->header.dnld_cmd); 2031 data_len = le32_to_cpu(fwdata->header.data_length); 2032 2033 /* Skip past header */ 2034 offset += sizeof(fwdata->header); 2035 2036 switch (dnld_cmd) { 2037 case MWIFIEX_FW_DNLD_CMD_1: 2038 if (offset + data_len < data_len) { 2039 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2040 ret = -1; 2041 goto done; 2042 } 2043 2044 /* Image start with cmd1, already wifi-only firmware */ 2045 if (!first_cmd) { 2046 mwifiex_dbg(adapter, MSG, 2047 "input wifi-only firmware\n"); 2048 return 0; 2049 } 2050 2051 if (!cmd7_before) { 2052 mwifiex_dbg(adapter, ERROR, 2053 "no cmd7 before cmd1!\n"); 2054 ret = -1; 2055 goto done; 2056 } 2057 offset += data_len; 2058 break; 2059 case MWIFIEX_FW_DNLD_CMD_5: 2060 first_cmd = true; 2061 /* Check for integer overflow */ 2062 if (offset + data_len < data_len) { 2063 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2064 ret = -1; 2065 goto done; 2066 } 2067 offset += data_len; 2068 break; 2069 case MWIFIEX_FW_DNLD_CMD_6: 2070 first_cmd = true; 2071 /* Check for integer overflow */ 2072 if (offset + data_len < data_len) { 2073 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2074 ret = -1; 2075 goto done; 2076 } 2077 offset += data_len; 2078 if (offset >= firmware_len) { 2079 mwifiex_dbg(adapter, ERROR, 2080 "extract wifi-only fw failure!\n"); 2081 ret = -1; 2082 } else { 2083 ret = offset; 2084 } 2085 goto done; 2086 case MWIFIEX_FW_DNLD_CMD_7: 2087 first_cmd = true; 2088 cmd7_before = true; 2089 break; 2090 default: 2091 mwifiex_dbg(adapter, ERROR, "unknown dnld_cmd %d\n", 2092 dnld_cmd); 2093 ret = -1; 2094 goto done; 2095 } 2096 } 2097 2098 done: 2099 return ret; 2100 } 2101 2102 /* 2103 * This function downloads the firmware to the card. 2104 * 2105 * Firmware is downloaded to the card in blocks. Every block download 2106 * is tested for CRC errors, and retried a number of times before 2107 * returning failure. 2108 */ 2109 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter, 2110 struct mwifiex_fw_image *fw) 2111 { 2112 int ret; 2113 u8 *firmware = fw->fw_buf; 2114 u32 firmware_len = fw->fw_len; 2115 u32 offset = 0; 2116 struct sk_buff *skb; 2117 u32 txlen, tx_blocks = 0, tries, len, val; 2118 u32 block_retry_cnt = 0; 2119 struct pcie_service_card *card = adapter->card; 2120 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2121 2122 if (!firmware || !firmware_len) { 2123 mwifiex_dbg(adapter, ERROR, 2124 "No firmware image found! Terminating download\n"); 2125 return -1; 2126 } 2127 2128 mwifiex_dbg(adapter, INFO, 2129 "info: Downloading FW image (%d bytes)\n", 2130 firmware_len); 2131 2132 if (mwifiex_pcie_disable_host_int(adapter)) { 2133 mwifiex_dbg(adapter, ERROR, 2134 "%s: Disabling interrupts failed.\n", __func__); 2135 return -1; 2136 } 2137 2138 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 2139 if (!skb) { 2140 ret = -ENOMEM; 2141 goto done; 2142 } 2143 2144 ret = mwifiex_read_reg(adapter, PCIE_SCRATCH_13_REG, &val); 2145 if (ret) { 2146 mwifiex_dbg(adapter, FATAL, "Failed to read scratch register 13\n"); 2147 goto done; 2148 } 2149 2150 /* PCIE FLR case: extract wifi part from combo firmware*/ 2151 if (val == MWIFIEX_PCIE_FLR_HAPPENS) { 2152 ret = mwifiex_extract_wifi_fw(adapter, firmware, firmware_len); 2153 if (ret < 0) { 2154 mwifiex_dbg(adapter, ERROR, "Failed to extract wifi fw\n"); 2155 goto done; 2156 } 2157 offset = ret; 2158 mwifiex_dbg(adapter, MSG, 2159 "info: dnld wifi firmware from %d bytes\n", offset); 2160 } 2161 2162 /* Perform firmware data transfer */ 2163 do { 2164 u32 ireg_intr = 0; 2165 2166 /* More data? */ 2167 if (offset >= firmware_len) 2168 break; 2169 2170 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2171 ret = mwifiex_read_reg(adapter, reg->cmd_size, 2172 &len); 2173 if (ret) { 2174 mwifiex_dbg(adapter, FATAL, 2175 "Failed reading len from boot code\n"); 2176 goto done; 2177 } 2178 if (len) 2179 break; 2180 usleep_range(10, 20); 2181 } 2182 2183 if (!len) { 2184 break; 2185 } else if (len > MWIFIEX_UPLD_SIZE) { 2186 mwifiex_dbg(adapter, ERROR, 2187 "FW download failure @ %d, invalid length %d\n", 2188 offset, len); 2189 ret = -1; 2190 goto done; 2191 } 2192 2193 txlen = len; 2194 2195 if (len & BIT(0)) { 2196 block_retry_cnt++; 2197 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) { 2198 mwifiex_dbg(adapter, ERROR, 2199 "FW download failure @ %d, over max\t" 2200 "retry count\n", offset); 2201 ret = -1; 2202 goto done; 2203 } 2204 mwifiex_dbg(adapter, ERROR, 2205 "FW CRC error indicated by the\t" 2206 "helper: len = 0x%04X, txlen = %d\n", 2207 len, txlen); 2208 len &= ~BIT(0); 2209 /* Setting this to 0 to resend from same offset */ 2210 txlen = 0; 2211 } else { 2212 block_retry_cnt = 0; 2213 /* Set blocksize to transfer - checking for 2214 last block */ 2215 if (firmware_len - offset < txlen) 2216 txlen = firmware_len - offset; 2217 2218 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) / 2219 card->pcie.blksz_fw_dl; 2220 2221 /* Copy payload to buffer */ 2222 memmove(skb->data, &firmware[offset], txlen); 2223 } 2224 2225 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 2226 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl); 2227 2228 /* Send the boot command to device */ 2229 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) { 2230 mwifiex_dbg(adapter, ERROR, 2231 "Failed to send firmware download command\n"); 2232 ret = -1; 2233 goto done; 2234 } 2235 2236 /* Wait for the command done interrupt */ 2237 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2238 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS, 2239 &ireg_intr)) { 2240 mwifiex_dbg(adapter, ERROR, 2241 "%s: Failed to read\t" 2242 "interrupt status during fw dnld.\n", 2243 __func__); 2244 mwifiex_unmap_pci_memory(adapter, skb, 2245 DMA_TO_DEVICE); 2246 ret = -1; 2247 goto done; 2248 } 2249 if (!(ireg_intr & CPU_INTR_DOOR_BELL)) 2250 break; 2251 usleep_range(10, 20); 2252 } 2253 if (ireg_intr & CPU_INTR_DOOR_BELL) { 2254 mwifiex_dbg(adapter, ERROR, "%s: Card failed to ACK download\n", 2255 __func__); 2256 mwifiex_unmap_pci_memory(adapter, skb, 2257 DMA_TO_DEVICE); 2258 ret = -1; 2259 goto done; 2260 } 2261 2262 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE); 2263 2264 offset += txlen; 2265 } while (true); 2266 2267 mwifiex_dbg(adapter, MSG, 2268 "info: FW download over, size %d bytes\n", offset); 2269 2270 ret = 0; 2271 2272 done: 2273 dev_kfree_skb_any(skb); 2274 return ret; 2275 } 2276 2277 /* 2278 * This function checks the firmware status in card. 2279 */ 2280 static int 2281 mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num) 2282 { 2283 int ret = 0; 2284 u32 firmware_stat; 2285 struct pcie_service_card *card = adapter->card; 2286 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2287 u32 tries; 2288 2289 /* Mask spurios interrupts */ 2290 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK, 2291 HOST_INTR_MASK)) { 2292 mwifiex_dbg(adapter, ERROR, 2293 "Write register failed\n"); 2294 return -1; 2295 } 2296 2297 mwifiex_dbg(adapter, INFO, 2298 "Setting driver ready signature\n"); 2299 if (mwifiex_write_reg(adapter, reg->drv_rdy, 2300 FIRMWARE_READY_PCIE)) { 2301 mwifiex_dbg(adapter, ERROR, 2302 "Failed to write driver ready signature\n"); 2303 return -1; 2304 } 2305 2306 /* Wait for firmware initialization event */ 2307 for (tries = 0; tries < poll_num; tries++) { 2308 if (mwifiex_read_reg(adapter, reg->fw_status, 2309 &firmware_stat)) 2310 ret = -1; 2311 else 2312 ret = 0; 2313 2314 mwifiex_dbg(adapter, INFO, "Try %d if FW is ready <%d,%#x>", 2315 tries, ret, firmware_stat); 2316 2317 if (ret) 2318 continue; 2319 if (firmware_stat == FIRMWARE_READY_PCIE) { 2320 ret = 0; 2321 break; 2322 } else { 2323 msleep(100); 2324 ret = -1; 2325 } 2326 } 2327 2328 return ret; 2329 } 2330 2331 /* This function checks if WLAN is the winner. 2332 */ 2333 static int 2334 mwifiex_check_winner_status(struct mwifiex_adapter *adapter) 2335 { 2336 u32 winner = 0; 2337 int ret = 0; 2338 struct pcie_service_card *card = adapter->card; 2339 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2340 2341 if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) { 2342 ret = -1; 2343 } else if (!winner) { 2344 mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n"); 2345 adapter->winner = 1; 2346 } else { 2347 mwifiex_dbg(adapter, ERROR, 2348 "PCI-E is not the winner <%#x>", winner); 2349 } 2350 2351 return ret; 2352 } 2353 2354 /* 2355 * This function reads the interrupt status from card. 2356 */ 2357 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter, 2358 int msg_id) 2359 { 2360 u32 pcie_ireg; 2361 unsigned long flags; 2362 struct pcie_service_card *card = adapter->card; 2363 2364 if (card->msi_enable) { 2365 spin_lock_irqsave(&adapter->int_lock, flags); 2366 adapter->int_status = 1; 2367 spin_unlock_irqrestore(&adapter->int_lock, flags); 2368 return; 2369 } 2370 2371 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 2372 return; 2373 2374 if (card->msix_enable && msg_id >= 0) { 2375 pcie_ireg = BIT(msg_id); 2376 } else { 2377 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2378 &pcie_ireg)) { 2379 mwifiex_dbg(adapter, ERROR, "Read register failed\n"); 2380 return; 2381 } 2382 2383 if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg) 2384 return; 2385 2386 2387 mwifiex_pcie_disable_host_int(adapter); 2388 2389 /* Clear the pending interrupts */ 2390 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS, 2391 ~pcie_ireg)) { 2392 mwifiex_dbg(adapter, ERROR, 2393 "Write register failed\n"); 2394 return; 2395 } 2396 } 2397 2398 if (!adapter->pps_uapsd_mode && 2399 adapter->ps_state == PS_STATE_SLEEP && 2400 mwifiex_pcie_ok_to_access_hw(adapter)) { 2401 /* Potentially for PCIe we could get other 2402 * interrupts like shared. Don't change power 2403 * state until cookie is set 2404 */ 2405 adapter->ps_state = PS_STATE_AWAKE; 2406 adapter->pm_wakeup_fw_try = false; 2407 del_timer(&adapter->wakeup_timer); 2408 } 2409 2410 spin_lock_irqsave(&adapter->int_lock, flags); 2411 adapter->int_status |= pcie_ireg; 2412 spin_unlock_irqrestore(&adapter->int_lock, flags); 2413 mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg); 2414 } 2415 2416 /* 2417 * Interrupt handler for PCIe root port 2418 * 2419 * This function reads the interrupt status from firmware and assigns 2420 * the main process in workqueue which will handle the interrupt. 2421 */ 2422 static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context) 2423 { 2424 struct mwifiex_msix_context *ctx = context; 2425 struct pci_dev *pdev = ctx->dev; 2426 struct pcie_service_card *card; 2427 struct mwifiex_adapter *adapter; 2428 2429 card = pci_get_drvdata(pdev); 2430 2431 if (!card->adapter) { 2432 pr_err("info: %s: card=%p adapter=%p\n", __func__, card, 2433 card ? card->adapter : NULL); 2434 goto exit; 2435 } 2436 adapter = card->adapter; 2437 2438 if (test_bit(MWIFIEX_SURPRISE_REMOVED, &adapter->work_flags)) 2439 goto exit; 2440 2441 if (card->msix_enable) 2442 mwifiex_interrupt_status(adapter, ctx->msg_id); 2443 else 2444 mwifiex_interrupt_status(adapter, -1); 2445 2446 mwifiex_queue_main_work(adapter); 2447 2448 exit: 2449 return IRQ_HANDLED; 2450 } 2451 2452 /* 2453 * This function checks the current interrupt status. 2454 * 2455 * The following interrupts are checked and handled by this function - 2456 * - Data sent 2457 * - Command sent 2458 * - Command received 2459 * - Packets received 2460 * - Events received 2461 * 2462 * In case of Rx packets received, the packets are uploaded from card to 2463 * host and processed accordingly. 2464 */ 2465 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter) 2466 { 2467 int ret; 2468 u32 pcie_ireg = 0; 2469 unsigned long flags; 2470 struct pcie_service_card *card = adapter->card; 2471 2472 spin_lock_irqsave(&adapter->int_lock, flags); 2473 if (!card->msi_enable) { 2474 /* Clear out unused interrupts */ 2475 pcie_ireg = adapter->int_status; 2476 } 2477 adapter->int_status = 0; 2478 spin_unlock_irqrestore(&adapter->int_lock, flags); 2479 2480 if (card->msi_enable) { 2481 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 2482 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2483 &pcie_ireg)) { 2484 mwifiex_dbg(adapter, ERROR, 2485 "Read register failed\n"); 2486 return -1; 2487 } 2488 2489 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) { 2490 if (mwifiex_write_reg(adapter, 2491 PCIE_HOST_INT_STATUS, 2492 ~pcie_ireg)) { 2493 mwifiex_dbg(adapter, ERROR, 2494 "Write register failed\n"); 2495 return -1; 2496 } 2497 if (!adapter->pps_uapsd_mode && 2498 adapter->ps_state == PS_STATE_SLEEP) { 2499 adapter->ps_state = PS_STATE_AWAKE; 2500 adapter->pm_wakeup_fw_try = false; 2501 del_timer(&adapter->wakeup_timer); 2502 } 2503 } 2504 } 2505 } 2506 2507 if (pcie_ireg & HOST_INTR_DNLD_DONE) { 2508 mwifiex_dbg(adapter, INTR, "info: TX DNLD Done\n"); 2509 ret = mwifiex_pcie_send_data_complete(adapter); 2510 if (ret) 2511 return ret; 2512 } 2513 if (pcie_ireg & HOST_INTR_UPLD_RDY) { 2514 mwifiex_dbg(adapter, INTR, "info: Rx DATA\n"); 2515 ret = mwifiex_pcie_process_recv_data(adapter); 2516 if (ret) 2517 return ret; 2518 } 2519 if (pcie_ireg & HOST_INTR_EVENT_RDY) { 2520 mwifiex_dbg(adapter, INTR, "info: Rx EVENT\n"); 2521 ret = mwifiex_pcie_process_event_ready(adapter); 2522 if (ret) 2523 return ret; 2524 } 2525 if (pcie_ireg & HOST_INTR_CMD_DONE) { 2526 if (adapter->cmd_sent) { 2527 mwifiex_dbg(adapter, INTR, 2528 "info: CMD sent Interrupt\n"); 2529 adapter->cmd_sent = false; 2530 } 2531 /* Handle command response */ 2532 ret = mwifiex_pcie_process_cmd_complete(adapter); 2533 if (ret) 2534 return ret; 2535 } 2536 2537 mwifiex_dbg(adapter, INTR, 2538 "info: cmd_sent=%d data_sent=%d\n", 2539 adapter->cmd_sent, adapter->data_sent); 2540 if (!card->msi_enable && !card->msix_enable && 2541 adapter->ps_state != PS_STATE_SLEEP) 2542 mwifiex_pcie_enable_host_int(adapter); 2543 2544 return 0; 2545 } 2546 2547 /* 2548 * This function downloads data from driver to card. 2549 * 2550 * Both commands and data packets are transferred to the card by this 2551 * function. 2552 * 2553 * This function adds the PCIE specific header to the front of the buffer 2554 * before transferring. The header contains the length of the packet and 2555 * the type. The firmware handles the packets based upon this set type. 2556 */ 2557 static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type, 2558 struct sk_buff *skb, 2559 struct mwifiex_tx_param *tx_param) 2560 { 2561 if (!skb) { 2562 mwifiex_dbg(adapter, ERROR, 2563 "Passed NULL skb to %s\n", __func__); 2564 return -1; 2565 } 2566 2567 if (type == MWIFIEX_TYPE_DATA) 2568 return mwifiex_pcie_send_data(adapter, skb, tx_param); 2569 else if (type == MWIFIEX_TYPE_CMD) 2570 return mwifiex_pcie_send_cmd(adapter, skb); 2571 2572 return 0; 2573 } 2574 2575 /* Function to dump PCIE scratch registers in case of FW crash 2576 */ 2577 static int 2578 mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf) 2579 { 2580 char *p = drv_buf; 2581 char buf[256], *ptr; 2582 int i; 2583 u32 value; 2584 struct pcie_service_card *card = adapter->card; 2585 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2586 int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG, 2587 PCIE_SCRATCH_14_REG, 2588 PCIE_SCRATCH_15_REG}; 2589 2590 if (!p) 2591 return 0; 2592 2593 mwifiex_dbg(adapter, MSG, "PCIE register dump start\n"); 2594 2595 if (mwifiex_read_reg(adapter, reg->fw_status, &value)) { 2596 mwifiex_dbg(adapter, ERROR, "failed to read firmware status"); 2597 return 0; 2598 } 2599 2600 ptr = buf; 2601 mwifiex_dbg(adapter, MSG, "pcie scratch register:"); 2602 for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) { 2603 mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value); 2604 ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n", 2605 pcie_scratch_reg[i], value); 2606 } 2607 2608 mwifiex_dbg(adapter, MSG, "%s\n", buf); 2609 p += sprintf(p, "%s\n", buf); 2610 2611 mwifiex_dbg(adapter, MSG, "PCIE register dump end\n"); 2612 2613 return p - drv_buf; 2614 } 2615 2616 /* This function read/write firmware */ 2617 static enum rdwr_status 2618 mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag) 2619 { 2620 int ret, tries; 2621 u8 ctrl_data; 2622 u32 fw_status; 2623 struct pcie_service_card *card = adapter->card; 2624 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2625 2626 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) 2627 return RDWR_STATUS_FAILURE; 2628 2629 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2630 reg->fw_dump_host_ready); 2631 if (ret) { 2632 mwifiex_dbg(adapter, ERROR, 2633 "PCIE write err\n"); 2634 return RDWR_STATUS_FAILURE; 2635 } 2636 2637 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2638 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data); 2639 if (ctrl_data == FW_DUMP_DONE) 2640 return RDWR_STATUS_SUCCESS; 2641 if (doneflag && ctrl_data == doneflag) 2642 return RDWR_STATUS_DONE; 2643 if (ctrl_data != reg->fw_dump_host_ready) { 2644 mwifiex_dbg(adapter, WARN, 2645 "The ctrl reg was changed, re-try again!\n"); 2646 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2647 reg->fw_dump_host_ready); 2648 if (ret) { 2649 mwifiex_dbg(adapter, ERROR, 2650 "PCIE write err\n"); 2651 return RDWR_STATUS_FAILURE; 2652 } 2653 } 2654 usleep_range(100, 200); 2655 } 2656 2657 mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n"); 2658 return RDWR_STATUS_FAILURE; 2659 } 2660 2661 /* This function dump firmware memory to file */ 2662 static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter) 2663 { 2664 struct pcie_service_card *card = adapter->card; 2665 const struct mwifiex_pcie_card_reg *creg = card->pcie.reg; 2666 unsigned int reg, reg_start, reg_end; 2667 u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num; 2668 u8 idx, i, read_reg, doneflag = 0; 2669 enum rdwr_status stat; 2670 u32 memory_size; 2671 int ret; 2672 2673 if (!card->pcie.can_dump_fw) 2674 return; 2675 2676 for (idx = 0; idx < adapter->num_mem_types; idx++) { 2677 struct memory_type_mapping *entry = 2678 &adapter->mem_type_mapping_tbl[idx]; 2679 2680 if (entry->mem_ptr) { 2681 vfree(entry->mem_ptr); 2682 entry->mem_ptr = NULL; 2683 } 2684 entry->mem_size = 0; 2685 } 2686 2687 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n"); 2688 2689 /* Read the number of the memories which will dump */ 2690 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2691 if (stat == RDWR_STATUS_FAILURE) 2692 return; 2693 2694 reg = creg->fw_dump_start; 2695 mwifiex_read_reg_byte(adapter, reg, &fw_dump_num); 2696 2697 /* W8997 chipset firmware dump will be restore in single region*/ 2698 if (fw_dump_num == 0) 2699 dump_num = 1; 2700 else 2701 dump_num = fw_dump_num; 2702 2703 /* Read the length of every memory which will dump */ 2704 for (idx = 0; idx < dump_num; idx++) { 2705 struct memory_type_mapping *entry = 2706 &adapter->mem_type_mapping_tbl[idx]; 2707 memory_size = 0; 2708 if (fw_dump_num != 0) { 2709 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2710 if (stat == RDWR_STATUS_FAILURE) 2711 return; 2712 2713 reg = creg->fw_dump_start; 2714 for (i = 0; i < 4; i++) { 2715 mwifiex_read_reg_byte(adapter, reg, &read_reg); 2716 memory_size |= (read_reg << (i * 8)); 2717 reg++; 2718 } 2719 } else { 2720 memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE; 2721 } 2722 2723 if (memory_size == 0) { 2724 mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n"); 2725 ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl, 2726 creg->fw_dump_read_done); 2727 if (ret) { 2728 mwifiex_dbg(adapter, ERROR, "PCIE write err\n"); 2729 return; 2730 } 2731 break; 2732 } 2733 2734 mwifiex_dbg(adapter, DUMP, 2735 "%s_SIZE=0x%x\n", entry->mem_name, memory_size); 2736 entry->mem_ptr = vmalloc(memory_size + 1); 2737 entry->mem_size = memory_size; 2738 if (!entry->mem_ptr) { 2739 mwifiex_dbg(adapter, ERROR, 2740 "Vmalloc %s failed\n", entry->mem_name); 2741 return; 2742 } 2743 dbg_ptr = entry->mem_ptr; 2744 end_ptr = dbg_ptr + memory_size; 2745 2746 doneflag = entry->done_flag; 2747 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n", 2748 entry->mem_name); 2749 2750 do { 2751 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2752 if (RDWR_STATUS_FAILURE == stat) 2753 return; 2754 2755 reg_start = creg->fw_dump_start; 2756 reg_end = creg->fw_dump_end; 2757 for (reg = reg_start; reg <= reg_end; reg++) { 2758 mwifiex_read_reg_byte(adapter, reg, dbg_ptr); 2759 if (dbg_ptr < end_ptr) { 2760 dbg_ptr++; 2761 continue; 2762 } 2763 mwifiex_dbg(adapter, ERROR, 2764 "pre-allocated buf not enough\n"); 2765 tmp_ptr = 2766 vzalloc(memory_size + MWIFIEX_SIZE_4K); 2767 if (!tmp_ptr) 2768 return; 2769 memcpy(tmp_ptr, entry->mem_ptr, memory_size); 2770 vfree(entry->mem_ptr); 2771 entry->mem_ptr = tmp_ptr; 2772 tmp_ptr = NULL; 2773 dbg_ptr = entry->mem_ptr + memory_size; 2774 memory_size += MWIFIEX_SIZE_4K; 2775 end_ptr = entry->mem_ptr + memory_size; 2776 } 2777 2778 if (stat != RDWR_STATUS_DONE) 2779 continue; 2780 2781 mwifiex_dbg(adapter, DUMP, 2782 "%s done: size=0x%tx\n", 2783 entry->mem_name, dbg_ptr - entry->mem_ptr); 2784 break; 2785 } while (true); 2786 } 2787 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n"); 2788 } 2789 2790 static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter) 2791 { 2792 adapter->devdump_data = vzalloc(MWIFIEX_FW_DUMP_SIZE); 2793 if (!adapter->devdump_data) { 2794 mwifiex_dbg(adapter, ERROR, 2795 "vzalloc devdump data failure!\n"); 2796 return; 2797 } 2798 2799 mwifiex_drv_info_dump(adapter); 2800 mwifiex_pcie_fw_dump(adapter); 2801 mwifiex_prepare_fw_dump_info(adapter); 2802 mwifiex_upload_device_dump(adapter); 2803 } 2804 2805 static void mwifiex_pcie_card_reset_work(struct mwifiex_adapter *adapter) 2806 { 2807 struct pcie_service_card *card = adapter->card; 2808 2809 /* We can't afford to wait here; remove() might be waiting on us. If we 2810 * can't grab the device lock, maybe we'll get another chance later. 2811 */ 2812 pci_try_reset_function(card->dev); 2813 } 2814 2815 static void mwifiex_pcie_work(struct work_struct *work) 2816 { 2817 struct pcie_service_card *card = 2818 container_of(work, struct pcie_service_card, work); 2819 2820 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 2821 &card->work_flags)) 2822 mwifiex_pcie_device_dump_work(card->adapter); 2823 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, 2824 &card->work_flags)) 2825 mwifiex_pcie_card_reset_work(card->adapter); 2826 } 2827 2828 /* This function dumps FW information */ 2829 static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter) 2830 { 2831 struct pcie_service_card *card = adapter->card; 2832 2833 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 2834 &card->work_flags)) 2835 schedule_work(&card->work); 2836 } 2837 2838 static void mwifiex_pcie_card_reset(struct mwifiex_adapter *adapter) 2839 { 2840 struct pcie_service_card *card = adapter->card; 2841 2842 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags)) 2843 schedule_work(&card->work); 2844 } 2845 2846 static int mwifiex_pcie_alloc_buffers(struct mwifiex_adapter *adapter) 2847 { 2848 struct pcie_service_card *card = adapter->card; 2849 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2850 int ret; 2851 2852 card->cmdrsp_buf = NULL; 2853 ret = mwifiex_pcie_create_txbd_ring(adapter); 2854 if (ret) { 2855 mwifiex_dbg(adapter, ERROR, "Failed to create txbd ring\n"); 2856 goto err_cre_txbd; 2857 } 2858 2859 ret = mwifiex_pcie_create_rxbd_ring(adapter); 2860 if (ret) { 2861 mwifiex_dbg(adapter, ERROR, "Failed to create rxbd ring\n"); 2862 goto err_cre_rxbd; 2863 } 2864 2865 ret = mwifiex_pcie_create_evtbd_ring(adapter); 2866 if (ret) { 2867 mwifiex_dbg(adapter, ERROR, "Failed to create evtbd ring\n"); 2868 goto err_cre_evtbd; 2869 } 2870 2871 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter); 2872 if (ret) { 2873 mwifiex_dbg(adapter, ERROR, "Failed to allocate cmdbuf buffer\n"); 2874 goto err_alloc_cmdbuf; 2875 } 2876 2877 if (reg->sleep_cookie) { 2878 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter); 2879 if (ret) { 2880 mwifiex_dbg(adapter, ERROR, "Failed to allocate sleep_cookie buffer\n"); 2881 goto err_alloc_cookie; 2882 } 2883 } else { 2884 card->sleep_cookie_vbase = NULL; 2885 } 2886 2887 return 0; 2888 2889 err_alloc_cookie: 2890 mwifiex_pcie_delete_cmdrsp_buf(adapter); 2891 err_alloc_cmdbuf: 2892 mwifiex_pcie_delete_evtbd_ring(adapter); 2893 err_cre_evtbd: 2894 mwifiex_pcie_delete_rxbd_ring(adapter); 2895 err_cre_rxbd: 2896 mwifiex_pcie_delete_txbd_ring(adapter); 2897 err_cre_txbd: 2898 return ret; 2899 } 2900 2901 static void mwifiex_pcie_free_buffers(struct mwifiex_adapter *adapter) 2902 { 2903 struct pcie_service_card *card = adapter->card; 2904 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2905 2906 if (reg->sleep_cookie) 2907 mwifiex_pcie_delete_sleep_cookie_buf(adapter); 2908 2909 mwifiex_pcie_delete_cmdrsp_buf(adapter); 2910 mwifiex_pcie_delete_evtbd_ring(adapter); 2911 mwifiex_pcie_delete_rxbd_ring(adapter); 2912 mwifiex_pcie_delete_txbd_ring(adapter); 2913 } 2914 2915 /* 2916 * This function initializes the PCI-E host memory space, WCB rings, etc. 2917 */ 2918 static int mwifiex_init_pcie(struct mwifiex_adapter *adapter) 2919 { 2920 struct pcie_service_card *card = adapter->card; 2921 int ret; 2922 struct pci_dev *pdev = card->dev; 2923 2924 pci_set_drvdata(pdev, card); 2925 2926 ret = pci_enable_device(pdev); 2927 if (ret) 2928 goto err_enable_dev; 2929 2930 pci_set_master(pdev); 2931 2932 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 2933 if (ret) { 2934 pr_err("dma_set_mask(32) failed: %d\n", ret); 2935 goto err_set_dma_mask; 2936 } 2937 2938 ret = pci_request_region(pdev, 0, DRV_NAME); 2939 if (ret) { 2940 pr_err("req_reg(0) error\n"); 2941 goto err_req_region0; 2942 } 2943 card->pci_mmap = pci_iomap(pdev, 0, 0); 2944 if (!card->pci_mmap) { 2945 pr_err("iomap(0) error\n"); 2946 ret = -EIO; 2947 goto err_iomap0; 2948 } 2949 ret = pci_request_region(pdev, 2, DRV_NAME); 2950 if (ret) { 2951 pr_err("req_reg(2) error\n"); 2952 goto err_req_region2; 2953 } 2954 card->pci_mmap1 = pci_iomap(pdev, 2, 0); 2955 if (!card->pci_mmap1) { 2956 pr_err("iomap(2) error\n"); 2957 ret = -EIO; 2958 goto err_iomap2; 2959 } 2960 2961 pr_notice("PCI memory map Virt0: %pK PCI memory map Virt2: %pK\n", 2962 card->pci_mmap, card->pci_mmap1); 2963 2964 ret = mwifiex_pcie_alloc_buffers(adapter); 2965 if (ret) 2966 goto err_alloc_buffers; 2967 2968 return 0; 2969 2970 err_alloc_buffers: 2971 pci_iounmap(pdev, card->pci_mmap1); 2972 err_iomap2: 2973 pci_release_region(pdev, 2); 2974 err_req_region2: 2975 pci_iounmap(pdev, card->pci_mmap); 2976 err_iomap0: 2977 pci_release_region(pdev, 0); 2978 err_req_region0: 2979 err_set_dma_mask: 2980 pci_disable_device(pdev); 2981 err_enable_dev: 2982 return ret; 2983 } 2984 2985 /* 2986 * This function cleans up the allocated card buffers. 2987 */ 2988 static void mwifiex_cleanup_pcie(struct mwifiex_adapter *adapter) 2989 { 2990 struct pcie_service_card *card = adapter->card; 2991 struct pci_dev *pdev = card->dev; 2992 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2993 int ret; 2994 u32 fw_status; 2995 2996 cancel_work_sync(&card->work); 2997 2998 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status); 2999 if (fw_status == FIRMWARE_READY_PCIE) { 3000 mwifiex_dbg(adapter, INFO, 3001 "Clearing driver ready signature\n"); 3002 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 3003 mwifiex_dbg(adapter, ERROR, 3004 "Failed to write driver not-ready signature\n"); 3005 } 3006 3007 pci_disable_device(pdev); 3008 3009 pci_iounmap(pdev, card->pci_mmap); 3010 pci_iounmap(pdev, card->pci_mmap1); 3011 pci_release_region(pdev, 2); 3012 pci_release_region(pdev, 0); 3013 3014 mwifiex_pcie_free_buffers(adapter); 3015 } 3016 3017 static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter) 3018 { 3019 int ret, i, j; 3020 struct pcie_service_card *card = adapter->card; 3021 struct pci_dev *pdev = card->dev; 3022 3023 if (card->pcie.reg->msix_support) { 3024 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3025 card->msix_entries[i].entry = i; 3026 ret = pci_enable_msix_exact(pdev, card->msix_entries, 3027 MWIFIEX_NUM_MSIX_VECTORS); 3028 if (!ret) { 3029 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) { 3030 card->msix_ctx[i].dev = pdev; 3031 card->msix_ctx[i].msg_id = i; 3032 3033 ret = request_irq(card->msix_entries[i].vector, 3034 mwifiex_pcie_interrupt, 0, 3035 "MWIFIEX_PCIE_MSIX", 3036 &card->msix_ctx[i]); 3037 if (ret) 3038 break; 3039 } 3040 3041 if (ret) { 3042 mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n", 3043 ret); 3044 for (j = 0; j < i; j++) 3045 free_irq(card->msix_entries[j].vector, 3046 &card->msix_ctx[i]); 3047 pci_disable_msix(pdev); 3048 } else { 3049 mwifiex_dbg(adapter, MSG, "MSIx enabled!"); 3050 card->msix_enable = 1; 3051 return 0; 3052 } 3053 } 3054 } 3055 3056 if (pci_enable_msi(pdev) != 0) 3057 pci_disable_msi(pdev); 3058 else 3059 card->msi_enable = 1; 3060 3061 mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable); 3062 3063 card->share_irq_ctx.dev = pdev; 3064 card->share_irq_ctx.msg_id = -1; 3065 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED, 3066 "MRVL_PCIE", &card->share_irq_ctx); 3067 if (ret) { 3068 pr_err("request_irq failed: ret=%d\n", ret); 3069 return -1; 3070 } 3071 3072 return 0; 3073 } 3074 3075 /* 3076 * This function gets the firmware name for downloading by revision id 3077 * 3078 * Read revision id register to get revision id 3079 */ 3080 static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter) 3081 { 3082 int revision_id = 0; 3083 int version, magic; 3084 struct pcie_service_card *card = adapter->card; 3085 3086 switch (card->dev->device) { 3087 case PCIE_DEVICE_ID_MARVELL_88W8766P: 3088 strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME); 3089 break; 3090 case PCIE_DEVICE_ID_MARVELL_88W8897: 3091 mwifiex_write_reg(adapter, 0x0c58, 0x80c00000); 3092 mwifiex_read_reg(adapter, 0x0c58, &revision_id); 3093 revision_id &= 0xff00; 3094 switch (revision_id) { 3095 case PCIE8897_A0: 3096 strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME); 3097 break; 3098 case PCIE8897_B0: 3099 strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME); 3100 break; 3101 default: 3102 strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME); 3103 3104 break; 3105 } 3106 break; 3107 case PCIE_DEVICE_ID_MARVELL_88W8997: 3108 mwifiex_read_reg(adapter, 0x8, &revision_id); 3109 mwifiex_read_reg(adapter, 0x0cd0, &version); 3110 mwifiex_read_reg(adapter, 0x0cd4, &magic); 3111 revision_id &= 0xff; 3112 version &= 0x7; 3113 magic &= 0xff; 3114 if (revision_id == PCIE8997_A1 && 3115 magic == CHIP_MAGIC_VALUE && 3116 version == CHIP_VER_PCIEUART) 3117 strcpy(adapter->fw_name, PCIEUART8997_FW_NAME_V4); 3118 else 3119 strcpy(adapter->fw_name, PCIEUSB8997_FW_NAME_V4); 3120 break; 3121 default: 3122 break; 3123 } 3124 } 3125 3126 /* 3127 * This function registers the PCIE device. 3128 * 3129 * PCIE IRQ is claimed, block size is set and driver data is initialized. 3130 */ 3131 static int mwifiex_register_dev(struct mwifiex_adapter *adapter) 3132 { 3133 struct pcie_service_card *card = adapter->card; 3134 3135 /* save adapter pointer in card */ 3136 card->adapter = adapter; 3137 3138 if (mwifiex_pcie_request_irq(adapter)) 3139 return -1; 3140 3141 adapter->tx_buf_size = card->pcie.tx_buf_size; 3142 adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl; 3143 adapter->num_mem_types = card->pcie.num_mem_types; 3144 adapter->ext_scan = card->pcie.can_ext_scan; 3145 mwifiex_pcie_get_fw_name(adapter); 3146 3147 return 0; 3148 } 3149 3150 /* 3151 * This function unregisters the PCIE device. 3152 * 3153 * The PCIE IRQ is released, the function is disabled and driver 3154 * data is set to null. 3155 */ 3156 static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter) 3157 { 3158 struct pcie_service_card *card = adapter->card; 3159 struct pci_dev *pdev = card->dev; 3160 int i; 3161 3162 if (card->msix_enable) { 3163 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3164 synchronize_irq(card->msix_entries[i].vector); 3165 3166 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3167 free_irq(card->msix_entries[i].vector, 3168 &card->msix_ctx[i]); 3169 3170 card->msix_enable = 0; 3171 pci_disable_msix(pdev); 3172 } else { 3173 mwifiex_dbg(adapter, INFO, 3174 "%s(): calling free_irq()\n", __func__); 3175 free_irq(card->dev->irq, &card->share_irq_ctx); 3176 3177 if (card->msi_enable) 3178 pci_disable_msi(pdev); 3179 } 3180 card->adapter = NULL; 3181 } 3182 3183 /* 3184 * This function initializes the PCI-E host memory space, WCB rings, etc., 3185 * similar to mwifiex_init_pcie(), but without resetting PCI-E state. 3186 */ 3187 static void mwifiex_pcie_up_dev(struct mwifiex_adapter *adapter) 3188 { 3189 struct pcie_service_card *card = adapter->card; 3190 struct pci_dev *pdev = card->dev; 3191 3192 /* tx_buf_size might be changed to 3584 by firmware during 3193 * data transfer, we should reset it to default size. 3194 */ 3195 adapter->tx_buf_size = card->pcie.tx_buf_size; 3196 3197 mwifiex_pcie_alloc_buffers(adapter); 3198 3199 pci_set_master(pdev); 3200 } 3201 3202 /* This function cleans up the PCI-E host memory space. */ 3203 static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter) 3204 { 3205 struct pcie_service_card *card = adapter->card; 3206 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 3207 struct pci_dev *pdev = card->dev; 3208 3209 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 3210 mwifiex_dbg(adapter, ERROR, "Failed to write driver not-ready signature\n"); 3211 3212 pci_clear_master(pdev); 3213 3214 adapter->seq_num = 0; 3215 3216 mwifiex_pcie_free_buffers(adapter); 3217 } 3218 3219 static struct mwifiex_if_ops pcie_ops = { 3220 .init_if = mwifiex_init_pcie, 3221 .cleanup_if = mwifiex_cleanup_pcie, 3222 .check_fw_status = mwifiex_check_fw_status, 3223 .check_winner_status = mwifiex_check_winner_status, 3224 .prog_fw = mwifiex_prog_fw_w_helper, 3225 .register_dev = mwifiex_register_dev, 3226 .unregister_dev = mwifiex_unregister_dev, 3227 .enable_int = mwifiex_pcie_enable_host_int, 3228 .disable_int = mwifiex_pcie_disable_host_int_noerr, 3229 .process_int_status = mwifiex_process_int_status, 3230 .host_to_card = mwifiex_pcie_host_to_card, 3231 .wakeup = mwifiex_pm_wakeup_card, 3232 .wakeup_complete = mwifiex_pm_wakeup_card_complete, 3233 3234 /* PCIE specific */ 3235 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete, 3236 .event_complete = mwifiex_pcie_event_complete, 3237 .update_mp_end_port = NULL, 3238 .cleanup_mpa_buf = NULL, 3239 .init_fw_port = mwifiex_pcie_init_fw_port, 3240 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf, 3241 .card_reset = mwifiex_pcie_card_reset, 3242 .reg_dump = mwifiex_pcie_reg_dump, 3243 .device_dump = mwifiex_pcie_device_dump, 3244 .down_dev = mwifiex_pcie_down_dev, 3245 .up_dev = mwifiex_pcie_up_dev, 3246 }; 3247 3248 module_pci_driver(mwifiex_pcie); 3249 3250 MODULE_AUTHOR("Marvell International Ltd."); 3251 MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION); 3252 MODULE_VERSION(PCIE_VERSION); 3253 MODULE_LICENSE("GPL v2"); 3254