1 /* 2 * Marvell Wireless LAN device driver: PCIE specific handling 3 * 4 * Copyright (C) 2011-2014, Marvell International Ltd. 5 * 6 * This software file (the "File") is distributed by Marvell International 7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991 8 * (the "License"). You may use, redistribute and/or modify this File in 9 * accordance with the terms and conditions of the License, a copy of which 10 * is available by writing to the Free Software Foundation, Inc., 11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the 12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. 13 * 14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about 17 * this warranty disclaimer. 18 */ 19 20 #include <linux/firmware.h> 21 22 #include "decl.h" 23 #include "ioctl.h" 24 #include "util.h" 25 #include "fw.h" 26 #include "main.h" 27 #include "wmm.h" 28 #include "11n.h" 29 #include "pcie.h" 30 31 #define PCIE_VERSION "1.0" 32 #define DRV_NAME "Marvell mwifiex PCIe" 33 34 static struct mwifiex_if_ops pcie_ops; 35 36 static const struct of_device_id mwifiex_pcie_of_match_table[] = { 37 { .compatible = "pci11ab,2b42" }, 38 { .compatible = "pci1b4b,2b42" }, 39 { } 40 }; 41 42 static int mwifiex_pcie_probe_of(struct device *dev) 43 { 44 if (!of_match_node(mwifiex_pcie_of_match_table, dev->of_node)) { 45 dev_err(dev, "required compatible string missing\n"); 46 return -EINVAL; 47 } 48 49 return 0; 50 } 51 52 static void mwifiex_pcie_work(struct work_struct *work); 53 54 static int 55 mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb, 56 size_t size, int flags) 57 { 58 struct pcie_service_card *card = adapter->card; 59 struct mwifiex_dma_mapping mapping; 60 61 mapping.addr = pci_map_single(card->dev, skb->data, size, flags); 62 if (pci_dma_mapping_error(card->dev, mapping.addr)) { 63 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n"); 64 return -1; 65 } 66 mapping.len = size; 67 mwifiex_store_mapping(skb, &mapping); 68 return 0; 69 } 70 71 static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter, 72 struct sk_buff *skb, int flags) 73 { 74 struct pcie_service_card *card = adapter->card; 75 struct mwifiex_dma_mapping mapping; 76 77 mwifiex_get_mapping(skb, &mapping); 78 pci_unmap_single(card->dev, mapping.addr, mapping.len, flags); 79 } 80 81 /* 82 * This function writes data into PCIE card register. 83 */ 84 static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data) 85 { 86 struct pcie_service_card *card = adapter->card; 87 88 iowrite32(data, card->pci_mmap1 + reg); 89 90 return 0; 91 } 92 93 /* This function reads data from PCIE card register. 94 */ 95 static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data) 96 { 97 struct pcie_service_card *card = adapter->card; 98 99 *data = ioread32(card->pci_mmap1 + reg); 100 if (*data == 0xffffffff) 101 return 0xffffffff; 102 103 return 0; 104 } 105 106 /* This function reads u8 data from PCIE card register. */ 107 static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter, 108 int reg, u8 *data) 109 { 110 struct pcie_service_card *card = adapter->card; 111 112 *data = ioread8(card->pci_mmap1 + reg); 113 114 return 0; 115 } 116 117 /* 118 * This function reads sleep cookie and checks if FW is ready 119 */ 120 static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter) 121 { 122 u32 cookie_value; 123 struct pcie_service_card *card = adapter->card; 124 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 125 126 if (!reg->sleep_cookie) 127 return true; 128 129 if (card->sleep_cookie_vbase) { 130 cookie_value = get_unaligned_le32(card->sleep_cookie_vbase); 131 mwifiex_dbg(adapter, INFO, 132 "info: ACCESS_HW: sleep cookie=0x%x\n", 133 cookie_value); 134 if (cookie_value == FW_AWAKE_COOKIE) 135 return true; 136 } 137 138 return false; 139 } 140 141 #ifdef CONFIG_PM_SLEEP 142 /* 143 * Kernel needs to suspend all functions separately. Therefore all 144 * registered functions must have drivers with suspend and resume 145 * methods. Failing that the kernel simply removes the whole card. 146 * 147 * If already not suspended, this function allocates and sends a host 148 * sleep activate request to the firmware and turns off the traffic. 149 */ 150 static int mwifiex_pcie_suspend(struct device *dev) 151 { 152 struct mwifiex_adapter *adapter; 153 struct pcie_service_card *card; 154 struct pci_dev *pdev = to_pci_dev(dev); 155 156 card = pci_get_drvdata(pdev); 157 158 /* Might still be loading firmware */ 159 wait_for_completion(&card->fw_done); 160 161 adapter = card->adapter; 162 if (!adapter) { 163 dev_err(dev, "adapter is not valid\n"); 164 return 0; 165 } 166 167 mwifiex_enable_wake(adapter); 168 169 /* Enable the Host Sleep */ 170 if (!mwifiex_enable_hs(adapter)) { 171 mwifiex_dbg(adapter, ERROR, 172 "cmd: failed to suspend\n"); 173 adapter->hs_enabling = false; 174 mwifiex_disable_wake(adapter); 175 return -EFAULT; 176 } 177 178 flush_workqueue(adapter->workqueue); 179 180 /* Indicate device suspended */ 181 adapter->is_suspended = true; 182 adapter->hs_enabling = false; 183 184 return 0; 185 } 186 187 /* 188 * Kernel needs to suspend all functions separately. Therefore all 189 * registered functions must have drivers with suspend and resume 190 * methods. Failing that the kernel simply removes the whole card. 191 * 192 * If already not resumed, this function turns on the traffic and 193 * sends a host sleep cancel request to the firmware. 194 */ 195 static int mwifiex_pcie_resume(struct device *dev) 196 { 197 struct mwifiex_adapter *adapter; 198 struct pcie_service_card *card; 199 struct pci_dev *pdev = to_pci_dev(dev); 200 201 card = pci_get_drvdata(pdev); 202 203 if (!card->adapter) { 204 dev_err(dev, "adapter structure is not valid\n"); 205 return 0; 206 } 207 208 adapter = card->adapter; 209 210 if (!adapter->is_suspended) { 211 mwifiex_dbg(adapter, WARN, 212 "Device already resumed\n"); 213 return 0; 214 } 215 216 adapter->is_suspended = false; 217 218 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA), 219 MWIFIEX_ASYNC_CMD); 220 mwifiex_disable_wake(adapter); 221 222 return 0; 223 } 224 #endif 225 226 /* 227 * This function probes an mwifiex device and registers it. It allocates 228 * the card structure, enables PCIE function number and initiates the 229 * device registration and initialization procedure by adding a logical 230 * interface. 231 */ 232 static int mwifiex_pcie_probe(struct pci_dev *pdev, 233 const struct pci_device_id *ent) 234 { 235 struct pcie_service_card *card; 236 int ret; 237 238 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n", 239 pdev->vendor, pdev->device, pdev->revision); 240 241 card = devm_kzalloc(&pdev->dev, sizeof(*card), GFP_KERNEL); 242 if (!card) 243 return -ENOMEM; 244 245 init_completion(&card->fw_done); 246 247 card->dev = pdev; 248 249 if (ent->driver_data) { 250 struct mwifiex_pcie_device *data = (void *)ent->driver_data; 251 card->pcie.reg = data->reg; 252 card->pcie.blksz_fw_dl = data->blksz_fw_dl; 253 card->pcie.tx_buf_size = data->tx_buf_size; 254 card->pcie.can_dump_fw = data->can_dump_fw; 255 card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl; 256 card->pcie.num_mem_types = data->num_mem_types; 257 card->pcie.can_ext_scan = data->can_ext_scan; 258 INIT_WORK(&card->work, mwifiex_pcie_work); 259 } 260 261 /* device tree node parsing and platform specific configuration*/ 262 if (pdev->dev.of_node) { 263 ret = mwifiex_pcie_probe_of(&pdev->dev); 264 if (ret) 265 return ret; 266 } 267 268 if (mwifiex_add_card(card, &card->fw_done, &pcie_ops, 269 MWIFIEX_PCIE, &pdev->dev)) { 270 pr_err("%s failed\n", __func__); 271 return -1; 272 } 273 274 return 0; 275 } 276 277 /* 278 * This function removes the interface and frees up the card structure. 279 */ 280 static void mwifiex_pcie_remove(struct pci_dev *pdev) 281 { 282 struct pcie_service_card *card; 283 struct mwifiex_adapter *adapter; 284 struct mwifiex_private *priv; 285 const struct mwifiex_pcie_card_reg *reg; 286 u32 fw_status; 287 int ret; 288 289 card = pci_get_drvdata(pdev); 290 291 wait_for_completion(&card->fw_done); 292 293 adapter = card->adapter; 294 if (!adapter || !adapter->priv_num) 295 return; 296 297 reg = card->pcie.reg; 298 if (reg) 299 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status); 300 else 301 fw_status = -1; 302 303 if (fw_status == FIRMWARE_READY_PCIE && !adapter->mfg_mode) { 304 mwifiex_deauthenticate_all(adapter); 305 306 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 307 308 mwifiex_disable_auto_ds(priv); 309 310 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN); 311 } 312 313 mwifiex_remove_card(adapter); 314 } 315 316 static void mwifiex_pcie_shutdown(struct pci_dev *pdev) 317 { 318 mwifiex_pcie_remove(pdev); 319 320 return; 321 } 322 323 static const struct pci_device_id mwifiex_ids[] = { 324 { 325 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P, 326 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 327 .driver_data = (unsigned long)&mwifiex_pcie8766, 328 }, 329 { 330 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897, 331 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 332 .driver_data = (unsigned long)&mwifiex_pcie8897, 333 }, 334 { 335 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 336 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 337 .driver_data = (unsigned long)&mwifiex_pcie8997, 338 }, 339 { 340 PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 341 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 342 .driver_data = (unsigned long)&mwifiex_pcie8997, 343 }, 344 {}, 345 }; 346 347 MODULE_DEVICE_TABLE(pci, mwifiex_ids); 348 349 static void mwifiex_pcie_reset_notify(struct pci_dev *pdev, bool prepare) 350 { 351 struct pcie_service_card *card = pci_get_drvdata(pdev); 352 struct mwifiex_adapter *adapter = card->adapter; 353 int ret; 354 355 if (!adapter) { 356 dev_err(&pdev->dev, "%s: adapter structure is not valid\n", 357 __func__); 358 return; 359 } 360 361 mwifiex_dbg(adapter, INFO, 362 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d %s\n", 363 __func__, pdev->vendor, pdev->device, 364 pdev->revision, 365 prepare ? "Pre-FLR" : "Post-FLR"); 366 367 if (prepare) { 368 /* Kernel would be performing FLR after this notification. 369 * Cleanup all software without cleaning anything related to 370 * PCIe and HW. 371 */ 372 mwifiex_shutdown_sw(adapter); 373 adapter->surprise_removed = true; 374 clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags); 375 clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags); 376 } else { 377 /* Kernel stores and restores PCIe function context before and 378 * after performing FLR respectively. Reconfigure the software 379 * and firmware including firmware redownload 380 */ 381 adapter->surprise_removed = false; 382 ret = mwifiex_reinit_sw(adapter); 383 if (ret) { 384 dev_err(&pdev->dev, "reinit failed: %d\n", ret); 385 return; 386 } 387 } 388 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__); 389 } 390 391 static const struct pci_error_handlers mwifiex_pcie_err_handler[] = { 392 { .reset_notify = mwifiex_pcie_reset_notify, }, 393 }; 394 395 #ifdef CONFIG_PM_SLEEP 396 /* Power Management Hooks */ 397 static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend, 398 mwifiex_pcie_resume); 399 #endif 400 401 /* PCI Device Driver */ 402 static struct pci_driver __refdata mwifiex_pcie = { 403 .name = "mwifiex_pcie", 404 .id_table = mwifiex_ids, 405 .probe = mwifiex_pcie_probe, 406 .remove = mwifiex_pcie_remove, 407 #ifdef CONFIG_PM_SLEEP 408 .driver = { 409 .pm = &mwifiex_pcie_pm_ops, 410 }, 411 #endif 412 .shutdown = mwifiex_pcie_shutdown, 413 .err_handler = mwifiex_pcie_err_handler, 414 }; 415 416 /* 417 * This function adds delay loop to ensure FW is awake before proceeding. 418 */ 419 static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter) 420 { 421 int i = 0; 422 423 while (mwifiex_pcie_ok_to_access_hw(adapter)) { 424 i++; 425 usleep_range(10, 20); 426 /* 50ms max wait */ 427 if (i == 5000) 428 break; 429 } 430 431 return; 432 } 433 434 static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter, 435 u32 max_delay_loop_cnt) 436 { 437 struct pcie_service_card *card = adapter->card; 438 u8 *buffer; 439 u32 sleep_cookie, count; 440 struct sk_buff *cmdrsp = card->cmdrsp_buf; 441 442 for (count = 0; count < max_delay_loop_cnt; count++) { 443 pci_dma_sync_single_for_cpu(card->dev, 444 MWIFIEX_SKB_DMA_ADDR(cmdrsp), 445 sizeof(sleep_cookie), 446 PCI_DMA_FROMDEVICE); 447 buffer = cmdrsp->data; 448 sleep_cookie = get_unaligned_le32(buffer); 449 450 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) { 451 mwifiex_dbg(adapter, INFO, 452 "sleep cookie found at count %d\n", count); 453 break; 454 } 455 pci_dma_sync_single_for_device(card->dev, 456 MWIFIEX_SKB_DMA_ADDR(cmdrsp), 457 sizeof(sleep_cookie), 458 PCI_DMA_FROMDEVICE); 459 usleep_range(20, 30); 460 } 461 462 if (count >= max_delay_loop_cnt) 463 mwifiex_dbg(adapter, INFO, 464 "max count reached while accessing sleep cookie\n"); 465 } 466 467 /* This function wakes up the card by reading fw_status register. */ 468 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) 469 { 470 struct pcie_service_card *card = adapter->card; 471 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 472 473 mwifiex_dbg(adapter, EVENT, 474 "event: Wakeup device...\n"); 475 476 if (reg->sleep_cookie) 477 mwifiex_pcie_dev_wakeup_delay(adapter); 478 479 /* Accessing fw_status register will wakeup device */ 480 if (mwifiex_write_reg(adapter, reg->fw_status, FIRMWARE_READY_PCIE)) { 481 mwifiex_dbg(adapter, ERROR, 482 "Writing fw_status register failed\n"); 483 return -1; 484 } 485 486 if (reg->sleep_cookie) { 487 mwifiex_pcie_dev_wakeup_delay(adapter); 488 mwifiex_dbg(adapter, INFO, 489 "PCIE wakeup: Setting PS_STATE_AWAKE\n"); 490 adapter->ps_state = PS_STATE_AWAKE; 491 } 492 493 return 0; 494 } 495 496 /* 497 * This function is called after the card has woken up. 498 * 499 * The card configuration register is reset. 500 */ 501 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter) 502 { 503 mwifiex_dbg(adapter, CMD, 504 "cmd: Wakeup device completed\n"); 505 506 return 0; 507 } 508 509 /* 510 * This function disables the host interrupt. 511 * 512 * The host interrupt mask is read, the disable bit is reset and 513 * written back to the card host interrupt mask register. 514 */ 515 static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter) 516 { 517 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 518 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 519 0x00000000)) { 520 mwifiex_dbg(adapter, ERROR, 521 "Disable host interrupt failed\n"); 522 return -1; 523 } 524 } 525 526 atomic_set(&adapter->tx_hw_pending, 0); 527 return 0; 528 } 529 530 static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter) 531 { 532 WARN_ON(mwifiex_pcie_disable_host_int(adapter)); 533 } 534 535 /* 536 * This function enables the host interrupt. 537 * 538 * The host interrupt enable mask is written to the card 539 * host interrupt mask register. 540 */ 541 static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter) 542 { 543 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 544 /* Simply write the mask to the register */ 545 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 546 HOST_INTR_MASK)) { 547 mwifiex_dbg(adapter, ERROR, 548 "Enable host interrupt failed\n"); 549 return -1; 550 } 551 } 552 553 return 0; 554 } 555 556 /* 557 * This function initializes TX buffer ring descriptors 558 */ 559 static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter) 560 { 561 struct pcie_service_card *card = adapter->card; 562 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 563 struct mwifiex_pcie_buf_desc *desc; 564 struct mwifiex_pfu_buf_desc *desc2; 565 int i; 566 567 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 568 card->tx_buf_list[i] = NULL; 569 if (reg->pfu_enabled) { 570 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 571 (sizeof(*desc2) * i); 572 desc2 = card->txbd_ring[i]; 573 memset(desc2, 0, sizeof(*desc2)); 574 } else { 575 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 576 (sizeof(*desc) * i); 577 desc = card->txbd_ring[i]; 578 memset(desc, 0, sizeof(*desc)); 579 } 580 } 581 582 return 0; 583 } 584 585 /* This function initializes RX buffer ring descriptors. Each SKB is allocated 586 * here and after mapping PCI memory, its physical address is assigned to 587 * PCIE Rx buffer descriptor's physical address. 588 */ 589 static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter) 590 { 591 struct pcie_service_card *card = adapter->card; 592 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 593 struct sk_buff *skb; 594 struct mwifiex_pcie_buf_desc *desc; 595 struct mwifiex_pfu_buf_desc *desc2; 596 dma_addr_t buf_pa; 597 int i; 598 599 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 600 /* Allocate skb here so that firmware can DMA data from it */ 601 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 602 GFP_KERNEL); 603 if (!skb) { 604 mwifiex_dbg(adapter, ERROR, 605 "Unable to allocate skb for RX ring.\n"); 606 kfree(card->rxbd_ring_vbase); 607 return -ENOMEM; 608 } 609 610 if (mwifiex_map_pci_memory(adapter, skb, 611 MWIFIEX_RX_DATA_BUF_SIZE, 612 PCI_DMA_FROMDEVICE)) 613 return -1; 614 615 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 616 617 mwifiex_dbg(adapter, INFO, 618 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 619 skb, skb->len, skb->data, (u32)buf_pa, 620 (u32)((u64)buf_pa >> 32)); 621 622 card->rx_buf_list[i] = skb; 623 if (reg->pfu_enabled) { 624 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase + 625 (sizeof(*desc2) * i); 626 desc2 = card->rxbd_ring[i]; 627 desc2->paddr = buf_pa; 628 desc2->len = (u16)skb->len; 629 desc2->frag_len = (u16)skb->len; 630 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop; 631 desc2->offset = 0; 632 } else { 633 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase + 634 (sizeof(*desc) * i)); 635 desc = card->rxbd_ring[i]; 636 desc->paddr = buf_pa; 637 desc->len = (u16)skb->len; 638 desc->flags = 0; 639 } 640 } 641 642 return 0; 643 } 644 645 /* This function initializes event buffer ring descriptors. Each SKB is 646 * allocated here and after mapping PCI memory, its physical address is assigned 647 * to PCIE Rx buffer descriptor's physical address 648 */ 649 static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter) 650 { 651 struct pcie_service_card *card = adapter->card; 652 struct mwifiex_evt_buf_desc *desc; 653 struct sk_buff *skb; 654 dma_addr_t buf_pa; 655 int i; 656 657 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 658 /* Allocate skb here so that firmware can DMA data from it */ 659 skb = dev_alloc_skb(MAX_EVENT_SIZE); 660 if (!skb) { 661 mwifiex_dbg(adapter, ERROR, 662 "Unable to allocate skb for EVENT buf.\n"); 663 kfree(card->evtbd_ring_vbase); 664 return -ENOMEM; 665 } 666 skb_put(skb, MAX_EVENT_SIZE); 667 668 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE, 669 PCI_DMA_FROMDEVICE)) 670 return -1; 671 672 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 673 674 mwifiex_dbg(adapter, EVENT, 675 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 676 skb, skb->len, skb->data, (u32)buf_pa, 677 (u32)((u64)buf_pa >> 32)); 678 679 card->evt_buf_list[i] = skb; 680 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase + 681 (sizeof(*desc) * i)); 682 desc = card->evtbd_ring[i]; 683 desc->paddr = buf_pa; 684 desc->len = (u16)skb->len; 685 desc->flags = 0; 686 } 687 688 return 0; 689 } 690 691 /* This function cleans up TX buffer rings. If any of the buffer list has valid 692 * SKB address, associated SKB is freed. 693 */ 694 static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter) 695 { 696 struct pcie_service_card *card = adapter->card; 697 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 698 struct sk_buff *skb; 699 struct mwifiex_pcie_buf_desc *desc; 700 struct mwifiex_pfu_buf_desc *desc2; 701 int i; 702 703 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 704 if (reg->pfu_enabled) { 705 desc2 = card->txbd_ring[i]; 706 if (card->tx_buf_list[i]) { 707 skb = card->tx_buf_list[i]; 708 mwifiex_unmap_pci_memory(adapter, skb, 709 PCI_DMA_TODEVICE); 710 dev_kfree_skb_any(skb); 711 } 712 memset(desc2, 0, sizeof(*desc2)); 713 } else { 714 desc = card->txbd_ring[i]; 715 if (card->tx_buf_list[i]) { 716 skb = card->tx_buf_list[i]; 717 mwifiex_unmap_pci_memory(adapter, skb, 718 PCI_DMA_TODEVICE); 719 dev_kfree_skb_any(skb); 720 } 721 memset(desc, 0, sizeof(*desc)); 722 } 723 card->tx_buf_list[i] = NULL; 724 } 725 726 atomic_set(&adapter->tx_hw_pending, 0); 727 return; 728 } 729 730 /* This function cleans up RX buffer rings. If any of the buffer list has valid 731 * SKB address, associated SKB is freed. 732 */ 733 static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter) 734 { 735 struct pcie_service_card *card = adapter->card; 736 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 737 struct mwifiex_pcie_buf_desc *desc; 738 struct mwifiex_pfu_buf_desc *desc2; 739 struct sk_buff *skb; 740 int i; 741 742 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 743 if (reg->pfu_enabled) { 744 desc2 = card->rxbd_ring[i]; 745 if (card->rx_buf_list[i]) { 746 skb = card->rx_buf_list[i]; 747 mwifiex_unmap_pci_memory(adapter, skb, 748 PCI_DMA_FROMDEVICE); 749 dev_kfree_skb_any(skb); 750 } 751 memset(desc2, 0, sizeof(*desc2)); 752 } else { 753 desc = card->rxbd_ring[i]; 754 if (card->rx_buf_list[i]) { 755 skb = card->rx_buf_list[i]; 756 mwifiex_unmap_pci_memory(adapter, skb, 757 PCI_DMA_FROMDEVICE); 758 dev_kfree_skb_any(skb); 759 } 760 memset(desc, 0, sizeof(*desc)); 761 } 762 card->rx_buf_list[i] = NULL; 763 } 764 765 return; 766 } 767 768 /* This function cleans up event buffer rings. If any of the buffer list has 769 * valid SKB address, associated SKB is freed. 770 */ 771 static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter) 772 { 773 struct pcie_service_card *card = adapter->card; 774 struct mwifiex_evt_buf_desc *desc; 775 struct sk_buff *skb; 776 int i; 777 778 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 779 desc = card->evtbd_ring[i]; 780 if (card->evt_buf_list[i]) { 781 skb = card->evt_buf_list[i]; 782 mwifiex_unmap_pci_memory(adapter, skb, 783 PCI_DMA_FROMDEVICE); 784 dev_kfree_skb_any(skb); 785 } 786 card->evt_buf_list[i] = NULL; 787 memset(desc, 0, sizeof(*desc)); 788 } 789 790 return; 791 } 792 793 /* This function creates buffer descriptor ring for TX 794 */ 795 static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter) 796 { 797 struct pcie_service_card *card = adapter->card; 798 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 799 800 /* 801 * driver maintaines the write pointer and firmware maintaines the read 802 * pointer. The write pointer starts at 0 (zero) while the read pointer 803 * starts at zero with rollover bit set 804 */ 805 card->txbd_wrptr = 0; 806 807 if (reg->pfu_enabled) 808 card->txbd_rdptr = 0; 809 else 810 card->txbd_rdptr |= reg->tx_rollover_ind; 811 812 /* allocate shared memory for the BD ring and divide the same in to 813 several descriptors */ 814 if (reg->pfu_enabled) 815 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 816 MWIFIEX_MAX_TXRX_BD; 817 else 818 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 819 MWIFIEX_MAX_TXRX_BD; 820 821 mwifiex_dbg(adapter, INFO, 822 "info: txbd_ring: Allocating %d bytes\n", 823 card->txbd_ring_size); 824 card->txbd_ring_vbase = pci_alloc_consistent(card->dev, 825 card->txbd_ring_size, 826 &card->txbd_ring_pbase); 827 if (!card->txbd_ring_vbase) { 828 mwifiex_dbg(adapter, ERROR, 829 "allocate consistent memory (%d bytes) failed!\n", 830 card->txbd_ring_size); 831 return -ENOMEM; 832 } 833 mwifiex_dbg(adapter, DATA, 834 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n", 835 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase, 836 (u32)((u64)card->txbd_ring_pbase >> 32), 837 card->txbd_ring_size); 838 839 return mwifiex_init_txq_ring(adapter); 840 } 841 842 static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter) 843 { 844 struct pcie_service_card *card = adapter->card; 845 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 846 847 mwifiex_cleanup_txq_ring(adapter); 848 849 if (card->txbd_ring_vbase) 850 pci_free_consistent(card->dev, card->txbd_ring_size, 851 card->txbd_ring_vbase, 852 card->txbd_ring_pbase); 853 card->txbd_ring_size = 0; 854 card->txbd_wrptr = 0; 855 card->txbd_rdptr = 0 | reg->tx_rollover_ind; 856 card->txbd_ring_vbase = NULL; 857 card->txbd_ring_pbase = 0; 858 859 return 0; 860 } 861 862 /* 863 * This function creates buffer descriptor ring for RX 864 */ 865 static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter) 866 { 867 struct pcie_service_card *card = adapter->card; 868 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 869 870 /* 871 * driver maintaines the read pointer and firmware maintaines the write 872 * pointer. The write pointer starts at 0 (zero) while the read pointer 873 * starts at zero with rollover bit set 874 */ 875 card->rxbd_wrptr = 0; 876 card->rxbd_rdptr = reg->rx_rollover_ind; 877 878 if (reg->pfu_enabled) 879 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 880 MWIFIEX_MAX_TXRX_BD; 881 else 882 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 883 MWIFIEX_MAX_TXRX_BD; 884 885 mwifiex_dbg(adapter, INFO, 886 "info: rxbd_ring: Allocating %d bytes\n", 887 card->rxbd_ring_size); 888 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev, 889 card->rxbd_ring_size, 890 &card->rxbd_ring_pbase); 891 if (!card->rxbd_ring_vbase) { 892 mwifiex_dbg(adapter, ERROR, 893 "allocate consistent memory (%d bytes) failed!\n", 894 card->rxbd_ring_size); 895 return -ENOMEM; 896 } 897 898 mwifiex_dbg(adapter, DATA, 899 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n", 900 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase, 901 (u32)((u64)card->rxbd_ring_pbase >> 32), 902 card->rxbd_ring_size); 903 904 return mwifiex_init_rxq_ring(adapter); 905 } 906 907 /* 908 * This function deletes Buffer descriptor ring for RX 909 */ 910 static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter) 911 { 912 struct pcie_service_card *card = adapter->card; 913 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 914 915 mwifiex_cleanup_rxq_ring(adapter); 916 917 if (card->rxbd_ring_vbase) 918 pci_free_consistent(card->dev, card->rxbd_ring_size, 919 card->rxbd_ring_vbase, 920 card->rxbd_ring_pbase); 921 card->rxbd_ring_size = 0; 922 card->rxbd_wrptr = 0; 923 card->rxbd_rdptr = 0 | reg->rx_rollover_ind; 924 card->rxbd_ring_vbase = NULL; 925 card->rxbd_ring_pbase = 0; 926 927 return 0; 928 } 929 930 /* 931 * This function creates buffer descriptor ring for Events 932 */ 933 static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter) 934 { 935 struct pcie_service_card *card = adapter->card; 936 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 937 938 /* 939 * driver maintaines the read pointer and firmware maintaines the write 940 * pointer. The write pointer starts at 0 (zero) while the read pointer 941 * starts at zero with rollover bit set 942 */ 943 card->evtbd_wrptr = 0; 944 card->evtbd_rdptr = reg->evt_rollover_ind; 945 946 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) * 947 MWIFIEX_MAX_EVT_BD; 948 949 mwifiex_dbg(adapter, INFO, 950 "info: evtbd_ring: Allocating %d bytes\n", 951 card->evtbd_ring_size); 952 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev, 953 card->evtbd_ring_size, 954 &card->evtbd_ring_pbase); 955 if (!card->evtbd_ring_vbase) { 956 mwifiex_dbg(adapter, ERROR, 957 "allocate consistent memory (%d bytes) failed!\n", 958 card->evtbd_ring_size); 959 return -ENOMEM; 960 } 961 962 mwifiex_dbg(adapter, EVENT, 963 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n", 964 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase, 965 (u32)((u64)card->evtbd_ring_pbase >> 32), 966 card->evtbd_ring_size); 967 968 return mwifiex_pcie_init_evt_ring(adapter); 969 } 970 971 /* 972 * This function deletes Buffer descriptor ring for Events 973 */ 974 static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter) 975 { 976 struct pcie_service_card *card = adapter->card; 977 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 978 979 mwifiex_cleanup_evt_ring(adapter); 980 981 if (card->evtbd_ring_vbase) 982 pci_free_consistent(card->dev, card->evtbd_ring_size, 983 card->evtbd_ring_vbase, 984 card->evtbd_ring_pbase); 985 card->evtbd_wrptr = 0; 986 card->evtbd_rdptr = 0 | reg->evt_rollover_ind; 987 card->evtbd_ring_size = 0; 988 card->evtbd_ring_vbase = NULL; 989 card->evtbd_ring_pbase = 0; 990 991 return 0; 992 } 993 994 /* 995 * This function allocates a buffer for CMDRSP 996 */ 997 static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter) 998 { 999 struct pcie_service_card *card = adapter->card; 1000 struct sk_buff *skb; 1001 1002 /* Allocate memory for receiving command response data */ 1003 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 1004 if (!skb) { 1005 mwifiex_dbg(adapter, ERROR, 1006 "Unable to allocate skb for command response data.\n"); 1007 return -ENOMEM; 1008 } 1009 skb_put(skb, MWIFIEX_UPLD_SIZE); 1010 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1011 PCI_DMA_FROMDEVICE)) 1012 return -1; 1013 1014 card->cmdrsp_buf = skb; 1015 1016 return 0; 1017 } 1018 1019 /* 1020 * This function deletes a buffer for CMDRSP 1021 */ 1022 static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter) 1023 { 1024 struct pcie_service_card *card; 1025 1026 if (!adapter) 1027 return 0; 1028 1029 card = adapter->card; 1030 1031 if (card && card->cmdrsp_buf) { 1032 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf, 1033 PCI_DMA_FROMDEVICE); 1034 dev_kfree_skb_any(card->cmdrsp_buf); 1035 } 1036 1037 if (card && card->cmd_buf) { 1038 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1039 PCI_DMA_TODEVICE); 1040 dev_kfree_skb_any(card->cmd_buf); 1041 } 1042 return 0; 1043 } 1044 1045 /* 1046 * This function allocates a buffer for sleep cookie 1047 */ 1048 static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter) 1049 { 1050 struct pcie_service_card *card = adapter->card; 1051 u32 tmp; 1052 1053 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32), 1054 &card->sleep_cookie_pbase); 1055 if (!card->sleep_cookie_vbase) { 1056 mwifiex_dbg(adapter, ERROR, 1057 "pci_alloc_consistent failed!\n"); 1058 return -ENOMEM; 1059 } 1060 /* Init val of Sleep Cookie */ 1061 tmp = FW_AWAKE_COOKIE; 1062 put_unaligned(tmp, card->sleep_cookie_vbase); 1063 1064 mwifiex_dbg(adapter, INFO, 1065 "alloc_scook: sleep cookie=0x%x\n", 1066 get_unaligned(card->sleep_cookie_vbase)); 1067 1068 return 0; 1069 } 1070 1071 /* 1072 * This function deletes buffer for sleep cookie 1073 */ 1074 static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter) 1075 { 1076 struct pcie_service_card *card; 1077 1078 if (!adapter) 1079 return 0; 1080 1081 card = adapter->card; 1082 1083 if (card && card->sleep_cookie_vbase) { 1084 pci_free_consistent(card->dev, sizeof(u32), 1085 card->sleep_cookie_vbase, 1086 card->sleep_cookie_pbase); 1087 card->sleep_cookie_vbase = NULL; 1088 } 1089 1090 return 0; 1091 } 1092 1093 /* This function flushes the TX buffer descriptor ring 1094 * This function defined as handler is also called while cleaning TXRX 1095 * during disconnect/ bss stop. 1096 */ 1097 static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter) 1098 { 1099 struct pcie_service_card *card = adapter->card; 1100 1101 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) { 1102 card->txbd_flush = 1; 1103 /* write pointer already set at last send 1104 * send dnld-rdy intr again, wait for completion. 1105 */ 1106 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1107 CPU_INTR_DNLD_RDY)) { 1108 mwifiex_dbg(adapter, ERROR, 1109 "failed to assert dnld-rdy interrupt.\n"); 1110 return -1; 1111 } 1112 } 1113 return 0; 1114 } 1115 1116 /* 1117 * This function unmaps and frees downloaded data buffer 1118 */ 1119 static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter) 1120 { 1121 struct sk_buff *skb; 1122 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0; 1123 struct mwifiex_pcie_buf_desc *desc; 1124 struct mwifiex_pfu_buf_desc *desc2; 1125 struct pcie_service_card *card = adapter->card; 1126 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1127 1128 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1129 mwifiex_pm_wakeup_card(adapter); 1130 1131 /* Read the TX ring read pointer set by firmware */ 1132 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) { 1133 mwifiex_dbg(adapter, ERROR, 1134 "SEND COMP: failed to read reg->tx_rdptr\n"); 1135 return -1; 1136 } 1137 1138 mwifiex_dbg(adapter, DATA, 1139 "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n", 1140 card->txbd_rdptr, rdptr); 1141 1142 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1143 /* free from previous txbd_rdptr to current txbd_rdptr */ 1144 while (((card->txbd_rdptr & reg->tx_mask) != 1145 (rdptr & reg->tx_mask)) || 1146 ((card->txbd_rdptr & reg->tx_rollover_ind) != 1147 (rdptr & reg->tx_rollover_ind))) { 1148 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >> 1149 reg->tx_start_ptr; 1150 1151 skb = card->tx_buf_list[wrdoneidx]; 1152 1153 if (skb) { 1154 mwifiex_dbg(adapter, DATA, 1155 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n", 1156 skb, wrdoneidx); 1157 mwifiex_unmap_pci_memory(adapter, skb, 1158 PCI_DMA_TODEVICE); 1159 1160 unmap_count++; 1161 1162 if (card->txbd_flush) 1163 mwifiex_write_data_complete(adapter, skb, 0, 1164 -1); 1165 else 1166 mwifiex_write_data_complete(adapter, skb, 0, 0); 1167 atomic_dec(&adapter->tx_hw_pending); 1168 } 1169 1170 card->tx_buf_list[wrdoneidx] = NULL; 1171 1172 if (reg->pfu_enabled) { 1173 desc2 = card->txbd_ring[wrdoneidx]; 1174 memset(desc2, 0, sizeof(*desc2)); 1175 } else { 1176 desc = card->txbd_ring[wrdoneidx]; 1177 memset(desc, 0, sizeof(*desc)); 1178 } 1179 switch (card->dev->device) { 1180 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1181 card->txbd_rdptr++; 1182 break; 1183 case PCIE_DEVICE_ID_MARVELL_88W8897: 1184 case PCIE_DEVICE_ID_MARVELL_88W8997: 1185 card->txbd_rdptr += reg->ring_tx_start_ptr; 1186 break; 1187 } 1188 1189 1190 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs) 1191 card->txbd_rdptr = ((card->txbd_rdptr & 1192 reg->tx_rollover_ind) ^ 1193 reg->tx_rollover_ind); 1194 } 1195 1196 if (unmap_count) 1197 adapter->data_sent = false; 1198 1199 if (card->txbd_flush) { 1200 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) 1201 card->txbd_flush = 0; 1202 else 1203 mwifiex_clean_pcie_ring_buf(adapter); 1204 } 1205 1206 return 0; 1207 } 1208 1209 /* This function sends data buffer to device. First 4 bytes of payload 1210 * are filled with payload length and payload type. Then this payload 1211 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly. 1212 * Download ready interrupt to FW is deffered if Tx ring is not full and 1213 * additional payload can be accomodated. 1214 * Caller must ensure tx_param parameter to this function is not NULL. 1215 */ 1216 static int 1217 mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb, 1218 struct mwifiex_tx_param *tx_param) 1219 { 1220 struct pcie_service_card *card = adapter->card; 1221 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1222 u32 wrindx, num_tx_buffs, rx_val; 1223 int ret; 1224 dma_addr_t buf_pa; 1225 struct mwifiex_pcie_buf_desc *desc = NULL; 1226 struct mwifiex_pfu_buf_desc *desc2 = NULL; 1227 1228 if (!(skb->data && skb->len)) { 1229 mwifiex_dbg(adapter, ERROR, 1230 "%s(): invalid parameter <%p, %#x>\n", 1231 __func__, skb->data, skb->len); 1232 return -1; 1233 } 1234 1235 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1236 mwifiex_pm_wakeup_card(adapter); 1237 1238 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1239 mwifiex_dbg(adapter, DATA, 1240 "info: SEND DATA: <Rd: %#x, Wr: %#x>\n", 1241 card->txbd_rdptr, card->txbd_wrptr); 1242 if (mwifiex_pcie_txbd_not_full(card)) { 1243 u8 *payload; 1244 1245 adapter->data_sent = true; 1246 payload = skb->data; 1247 put_unaligned_le16((u16)skb->len, payload + 0); 1248 put_unaligned_le16(MWIFIEX_TYPE_DATA, payload + 2); 1249 1250 if (mwifiex_map_pci_memory(adapter, skb, skb->len, 1251 PCI_DMA_TODEVICE)) 1252 return -1; 1253 1254 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr; 1255 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1256 card->tx_buf_list[wrindx] = skb; 1257 atomic_inc(&adapter->tx_hw_pending); 1258 1259 if (reg->pfu_enabled) { 1260 desc2 = card->txbd_ring[wrindx]; 1261 desc2->paddr = buf_pa; 1262 desc2->len = (u16)skb->len; 1263 desc2->frag_len = (u16)skb->len; 1264 desc2->offset = 0; 1265 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1266 MWIFIEX_BD_FLAG_LAST_DESC; 1267 } else { 1268 desc = card->txbd_ring[wrindx]; 1269 desc->paddr = buf_pa; 1270 desc->len = (u16)skb->len; 1271 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1272 MWIFIEX_BD_FLAG_LAST_DESC; 1273 } 1274 1275 switch (card->dev->device) { 1276 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1277 card->txbd_wrptr++; 1278 break; 1279 case PCIE_DEVICE_ID_MARVELL_88W8897: 1280 case PCIE_DEVICE_ID_MARVELL_88W8997: 1281 card->txbd_wrptr += reg->ring_tx_start_ptr; 1282 break; 1283 } 1284 1285 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs) 1286 card->txbd_wrptr = ((card->txbd_wrptr & 1287 reg->tx_rollover_ind) ^ 1288 reg->tx_rollover_ind); 1289 1290 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask; 1291 /* Write the TX ring write pointer in to reg->tx_wrptr */ 1292 if (mwifiex_write_reg(adapter, reg->tx_wrptr, 1293 card->txbd_wrptr | rx_val)) { 1294 mwifiex_dbg(adapter, ERROR, 1295 "SEND DATA: failed to write reg->tx_wrptr\n"); 1296 ret = -1; 1297 goto done_unmap; 1298 } 1299 if ((mwifiex_pcie_txbd_not_full(card)) && 1300 tx_param->next_pkt_len) { 1301 /* have more packets and TxBD still can hold more */ 1302 mwifiex_dbg(adapter, DATA, 1303 "SEND DATA: delay dnld-rdy interrupt.\n"); 1304 adapter->data_sent = false; 1305 } else { 1306 /* Send the TX ready interrupt */ 1307 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1308 CPU_INTR_DNLD_RDY)) { 1309 mwifiex_dbg(adapter, ERROR, 1310 "SEND DATA: failed to assert dnld-rdy interrupt.\n"); 1311 ret = -1; 1312 goto done_unmap; 1313 } 1314 } 1315 mwifiex_dbg(adapter, DATA, 1316 "info: SEND DATA: Updated <Rd: %#x, Wr:\t" 1317 "%#x> and sent packet to firmware successfully\n", 1318 card->txbd_rdptr, card->txbd_wrptr); 1319 } else { 1320 mwifiex_dbg(adapter, DATA, 1321 "info: TX Ring full, can't send packets to fw\n"); 1322 adapter->data_sent = true; 1323 /* Send the TX ready interrupt */ 1324 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1325 CPU_INTR_DNLD_RDY)) 1326 mwifiex_dbg(adapter, ERROR, 1327 "SEND DATA: failed to assert door-bell intr\n"); 1328 return -EBUSY; 1329 } 1330 1331 return -EINPROGRESS; 1332 done_unmap: 1333 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1334 card->tx_buf_list[wrindx] = NULL; 1335 atomic_dec(&adapter->tx_hw_pending); 1336 if (reg->pfu_enabled) 1337 memset(desc2, 0, sizeof(*desc2)); 1338 else 1339 memset(desc, 0, sizeof(*desc)); 1340 1341 return ret; 1342 } 1343 1344 /* 1345 * This function handles received buffer ring and 1346 * dispatches packets to upper 1347 */ 1348 static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter) 1349 { 1350 struct pcie_service_card *card = adapter->card; 1351 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1352 u32 wrptr, rd_index, tx_val; 1353 dma_addr_t buf_pa; 1354 int ret = 0; 1355 struct sk_buff *skb_tmp = NULL; 1356 struct mwifiex_pcie_buf_desc *desc; 1357 struct mwifiex_pfu_buf_desc *desc2; 1358 1359 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1360 mwifiex_pm_wakeup_card(adapter); 1361 1362 /* Read the RX ring Write pointer set by firmware */ 1363 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1364 mwifiex_dbg(adapter, ERROR, 1365 "RECV DATA: failed to read reg->rx_wrptr\n"); 1366 ret = -1; 1367 goto done; 1368 } 1369 card->rxbd_wrptr = wrptr; 1370 1371 while (((wrptr & reg->rx_mask) != 1372 (card->rxbd_rdptr & reg->rx_mask)) || 1373 ((wrptr & reg->rx_rollover_ind) == 1374 (card->rxbd_rdptr & reg->rx_rollover_ind))) { 1375 struct sk_buff *skb_data; 1376 u16 rx_len; 1377 1378 rd_index = card->rxbd_rdptr & reg->rx_mask; 1379 skb_data = card->rx_buf_list[rd_index]; 1380 1381 /* If skb allocation was failed earlier for Rx packet, 1382 * rx_buf_list[rd_index] would have been left with a NULL. 1383 */ 1384 if (!skb_data) 1385 return -ENOMEM; 1386 1387 mwifiex_unmap_pci_memory(adapter, skb_data, PCI_DMA_FROMDEVICE); 1388 card->rx_buf_list[rd_index] = NULL; 1389 1390 /* Get data length from interface header - 1391 * first 2 bytes for len, next 2 bytes is for type 1392 */ 1393 rx_len = get_unaligned_le16(skb_data->data); 1394 if (WARN_ON(rx_len <= INTF_HEADER_LEN || 1395 rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) { 1396 mwifiex_dbg(adapter, ERROR, 1397 "Invalid RX len %d, Rd=%#x, Wr=%#x\n", 1398 rx_len, card->rxbd_rdptr, wrptr); 1399 dev_kfree_skb_any(skb_data); 1400 } else { 1401 skb_put(skb_data, rx_len); 1402 mwifiex_dbg(adapter, DATA, 1403 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n", 1404 card->rxbd_rdptr, wrptr, rx_len); 1405 skb_pull(skb_data, INTF_HEADER_LEN); 1406 if (adapter->rx_work_enabled) { 1407 skb_queue_tail(&adapter->rx_data_q, skb_data); 1408 adapter->data_received = true; 1409 atomic_inc(&adapter->rx_pending); 1410 } else { 1411 mwifiex_handle_rx_packet(adapter, skb_data); 1412 } 1413 } 1414 1415 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 1416 GFP_KERNEL); 1417 if (!skb_tmp) { 1418 mwifiex_dbg(adapter, ERROR, 1419 "Unable to allocate skb.\n"); 1420 return -ENOMEM; 1421 } 1422 1423 if (mwifiex_map_pci_memory(adapter, skb_tmp, 1424 MWIFIEX_RX_DATA_BUF_SIZE, 1425 PCI_DMA_FROMDEVICE)) 1426 return -1; 1427 1428 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp); 1429 1430 mwifiex_dbg(adapter, INFO, 1431 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n", 1432 skb_tmp, rd_index); 1433 card->rx_buf_list[rd_index] = skb_tmp; 1434 1435 if (reg->pfu_enabled) { 1436 desc2 = card->rxbd_ring[rd_index]; 1437 desc2->paddr = buf_pa; 1438 desc2->len = skb_tmp->len; 1439 desc2->frag_len = skb_tmp->len; 1440 desc2->offset = 0; 1441 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop; 1442 } else { 1443 desc = card->rxbd_ring[rd_index]; 1444 desc->paddr = buf_pa; 1445 desc->len = skb_tmp->len; 1446 desc->flags = 0; 1447 } 1448 1449 if ((++card->rxbd_rdptr & reg->rx_mask) == 1450 MWIFIEX_MAX_TXRX_BD) { 1451 card->rxbd_rdptr = ((card->rxbd_rdptr & 1452 reg->rx_rollover_ind) ^ 1453 reg->rx_rollover_ind); 1454 } 1455 mwifiex_dbg(adapter, DATA, 1456 "info: RECV DATA: <Rd: %#x, Wr: %#x>\n", 1457 card->rxbd_rdptr, wrptr); 1458 1459 tx_val = card->txbd_wrptr & reg->tx_wrap_mask; 1460 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1461 if (mwifiex_write_reg(adapter, reg->rx_rdptr, 1462 card->rxbd_rdptr | tx_val)) { 1463 mwifiex_dbg(adapter, DATA, 1464 "RECV DATA: failed to write reg->rx_rdptr\n"); 1465 ret = -1; 1466 goto done; 1467 } 1468 1469 /* Read the RX ring Write pointer set by firmware */ 1470 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1471 mwifiex_dbg(adapter, ERROR, 1472 "RECV DATA: failed to read reg->rx_wrptr\n"); 1473 ret = -1; 1474 goto done; 1475 } 1476 mwifiex_dbg(adapter, DATA, 1477 "info: RECV DATA: Rcvd packet from fw successfully\n"); 1478 card->rxbd_wrptr = wrptr; 1479 } 1480 1481 done: 1482 return ret; 1483 } 1484 1485 /* 1486 * This function downloads the boot command to device 1487 */ 1488 static int 1489 mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1490 { 1491 dma_addr_t buf_pa; 1492 struct pcie_service_card *card = adapter->card; 1493 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1494 1495 if (!(skb->data && skb->len)) { 1496 mwifiex_dbg(adapter, ERROR, 1497 "Invalid parameter in %s <%p. len %d>\n", 1498 __func__, skb->data, skb->len); 1499 return -1; 1500 } 1501 1502 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE)) 1503 return -1; 1504 1505 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1506 1507 /* Write the lower 32bits of the physical address to low command 1508 * address scratch register 1509 */ 1510 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) { 1511 mwifiex_dbg(adapter, ERROR, 1512 "%s: failed to write download command to boot code.\n", 1513 __func__); 1514 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1515 return -1; 1516 } 1517 1518 /* Write the upper 32bits of the physical address to high command 1519 * address scratch register 1520 */ 1521 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1522 (u32)((u64)buf_pa >> 32))) { 1523 mwifiex_dbg(adapter, ERROR, 1524 "%s: failed to write download command to boot code.\n", 1525 __func__); 1526 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1527 return -1; 1528 } 1529 1530 /* Write the command length to cmd_size scratch register */ 1531 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) { 1532 mwifiex_dbg(adapter, ERROR, 1533 "%s: failed to write command len to cmd_size scratch reg\n", 1534 __func__); 1535 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1536 return -1; 1537 } 1538 1539 /* Ring the door bell */ 1540 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1541 CPU_INTR_DOOR_BELL)) { 1542 mwifiex_dbg(adapter, ERROR, 1543 "%s: failed to assert door-bell intr\n", __func__); 1544 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 1545 return -1; 1546 } 1547 1548 return 0; 1549 } 1550 1551 /* This function init rx port in firmware which in turn enables to receive data 1552 * from device before transmitting any packet. 1553 */ 1554 static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter) 1555 { 1556 struct pcie_service_card *card = adapter->card; 1557 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1558 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask; 1559 1560 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1561 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr | 1562 tx_wrap)) { 1563 mwifiex_dbg(adapter, ERROR, 1564 "RECV DATA: failed to write reg->rx_rdptr\n"); 1565 return -1; 1566 } 1567 return 0; 1568 } 1569 1570 /* This function downloads commands to the device 1571 */ 1572 static int 1573 mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1574 { 1575 struct pcie_service_card *card = adapter->card; 1576 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1577 int ret = 0; 1578 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa; 1579 u8 *payload = (u8 *)skb->data; 1580 1581 if (!(skb->data && skb->len)) { 1582 mwifiex_dbg(adapter, ERROR, 1583 "Invalid parameter in %s <%p, %#x>\n", 1584 __func__, skb->data, skb->len); 1585 return -1; 1586 } 1587 1588 /* Make sure a command response buffer is available */ 1589 if (!card->cmdrsp_buf) { 1590 mwifiex_dbg(adapter, ERROR, 1591 "No response buffer available, send command failed\n"); 1592 return -EBUSY; 1593 } 1594 1595 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1596 mwifiex_pm_wakeup_card(adapter); 1597 1598 adapter->cmd_sent = true; 1599 1600 put_unaligned_le16((u16)skb->len, &payload[0]); 1601 put_unaligned_le16(MWIFIEX_TYPE_CMD, &payload[2]); 1602 1603 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE)) 1604 return -1; 1605 1606 card->cmd_buf = skb; 1607 /* 1608 * Need to keep a reference, since core driver might free up this 1609 * buffer before we've unmapped it. 1610 */ 1611 skb_get(skb); 1612 1613 /* To send a command, the driver will: 1614 1. Write the 64bit physical address of the data buffer to 1615 cmd response address low + cmd response address high 1616 2. Ring the door bell (i.e. set the door bell interrupt) 1617 1618 In response to door bell interrupt, the firmware will perform 1619 the DMA of the command packet (first header to obtain the total 1620 length and then rest of the command). 1621 */ 1622 1623 if (card->cmdrsp_buf) { 1624 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf); 1625 /* Write the lower 32bits of the cmdrsp buffer physical 1626 address */ 1627 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 1628 (u32)cmdrsp_buf_pa)) { 1629 mwifiex_dbg(adapter, ERROR, 1630 "Failed to write download cmd to boot code.\n"); 1631 ret = -1; 1632 goto done; 1633 } 1634 /* Write the upper 32bits of the cmdrsp buffer physical 1635 address */ 1636 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 1637 (u32)((u64)cmdrsp_buf_pa >> 32))) { 1638 mwifiex_dbg(adapter, ERROR, 1639 "Failed to write download cmd to boot code.\n"); 1640 ret = -1; 1641 goto done; 1642 } 1643 } 1644 1645 cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf); 1646 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */ 1647 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, 1648 (u32)cmd_buf_pa)) { 1649 mwifiex_dbg(adapter, ERROR, 1650 "Failed to write download cmd to boot code.\n"); 1651 ret = -1; 1652 goto done; 1653 } 1654 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */ 1655 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1656 (u32)((u64)cmd_buf_pa >> 32))) { 1657 mwifiex_dbg(adapter, ERROR, 1658 "Failed to write download cmd to boot code.\n"); 1659 ret = -1; 1660 goto done; 1661 } 1662 1663 /* Write the command length to reg->cmd_size */ 1664 if (mwifiex_write_reg(adapter, reg->cmd_size, 1665 card->cmd_buf->len)) { 1666 mwifiex_dbg(adapter, ERROR, 1667 "Failed to write cmd len to reg->cmd_size\n"); 1668 ret = -1; 1669 goto done; 1670 } 1671 1672 /* Ring the door bell */ 1673 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1674 CPU_INTR_DOOR_BELL)) { 1675 mwifiex_dbg(adapter, ERROR, 1676 "Failed to assert door-bell intr\n"); 1677 ret = -1; 1678 goto done; 1679 } 1680 1681 done: 1682 if (ret) 1683 adapter->cmd_sent = false; 1684 1685 return 0; 1686 } 1687 1688 /* 1689 * This function handles command complete interrupt 1690 */ 1691 static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter) 1692 { 1693 struct pcie_service_card *card = adapter->card; 1694 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1695 struct sk_buff *skb = card->cmdrsp_buf; 1696 int count = 0; 1697 u16 rx_len; 1698 1699 mwifiex_dbg(adapter, CMD, 1700 "info: Rx CMD Response\n"); 1701 1702 if (adapter->curr_cmd) 1703 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_FROMDEVICE); 1704 else 1705 pci_dma_sync_single_for_cpu(card->dev, 1706 MWIFIEX_SKB_DMA_ADDR(skb), 1707 MWIFIEX_UPLD_SIZE, 1708 PCI_DMA_FROMDEVICE); 1709 1710 /* Unmap the command as a response has been received. */ 1711 if (card->cmd_buf) { 1712 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1713 PCI_DMA_TODEVICE); 1714 dev_kfree_skb_any(card->cmd_buf); 1715 card->cmd_buf = NULL; 1716 } 1717 1718 rx_len = get_unaligned_le16(skb->data); 1719 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 1720 skb_trim(skb, rx_len); 1721 1722 if (!adapter->curr_cmd) { 1723 if (adapter->ps_state == PS_STATE_SLEEP_CFM) { 1724 pci_dma_sync_single_for_device(card->dev, 1725 MWIFIEX_SKB_DMA_ADDR(skb), 1726 MWIFIEX_SLEEP_COOKIE_SIZE, 1727 PCI_DMA_FROMDEVICE); 1728 if (mwifiex_write_reg(adapter, 1729 PCIE_CPU_INT_EVENT, 1730 CPU_INTR_SLEEP_CFM_DONE)) { 1731 mwifiex_dbg(adapter, ERROR, 1732 "Write register failed\n"); 1733 return -1; 1734 } 1735 mwifiex_delay_for_sleep_cookie(adapter, 1736 MWIFIEX_MAX_DELAY_COUNT); 1737 mwifiex_unmap_pci_memory(adapter, skb, 1738 PCI_DMA_FROMDEVICE); 1739 skb_pull(skb, INTF_HEADER_LEN); 1740 while (reg->sleep_cookie && (count++ < 10) && 1741 mwifiex_pcie_ok_to_access_hw(adapter)) 1742 usleep_range(50, 60); 1743 mwifiex_pcie_enable_host_int(adapter); 1744 mwifiex_process_sleep_confirm_resp(adapter, skb->data, 1745 skb->len); 1746 } else { 1747 mwifiex_dbg(adapter, ERROR, 1748 "There is no command but got cmdrsp\n"); 1749 } 1750 memcpy(adapter->upld_buf, skb->data, 1751 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len)); 1752 skb_push(skb, INTF_HEADER_LEN); 1753 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1754 PCI_DMA_FROMDEVICE)) 1755 return -1; 1756 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) { 1757 skb_pull(skb, INTF_HEADER_LEN); 1758 adapter->curr_cmd->resp_skb = skb; 1759 adapter->cmd_resp_received = true; 1760 /* Take the pointer and set it to CMD node and will 1761 return in the response complete callback */ 1762 card->cmdrsp_buf = NULL; 1763 1764 /* Clear the cmd-rsp buffer address in scratch registers. This 1765 will prevent firmware from writing to the same response 1766 buffer again. */ 1767 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) { 1768 mwifiex_dbg(adapter, ERROR, 1769 "cmd_done: failed to clear cmd_rsp_addr_lo\n"); 1770 return -1; 1771 } 1772 /* Write the upper 32bits of the cmdrsp buffer physical 1773 address */ 1774 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) { 1775 mwifiex_dbg(adapter, ERROR, 1776 "cmd_done: failed to clear cmd_rsp_addr_hi\n"); 1777 return -1; 1778 } 1779 } 1780 1781 return 0; 1782 } 1783 1784 /* 1785 * Command Response processing complete handler 1786 */ 1787 static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter, 1788 struct sk_buff *skb) 1789 { 1790 struct pcie_service_card *card = adapter->card; 1791 1792 if (skb) { 1793 card->cmdrsp_buf = skb; 1794 skb_push(card->cmdrsp_buf, INTF_HEADER_LEN); 1795 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1796 PCI_DMA_FROMDEVICE)) 1797 return -1; 1798 } 1799 1800 return 0; 1801 } 1802 1803 /* 1804 * This function handles firmware event ready interrupt 1805 */ 1806 static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter) 1807 { 1808 struct pcie_service_card *card = adapter->card; 1809 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1810 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 1811 u32 wrptr, event; 1812 struct mwifiex_evt_buf_desc *desc; 1813 1814 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1815 mwifiex_pm_wakeup_card(adapter); 1816 1817 if (adapter->event_received) { 1818 mwifiex_dbg(adapter, EVENT, 1819 "info: Event being processed,\t" 1820 "do not process this interrupt just yet\n"); 1821 return 0; 1822 } 1823 1824 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 1825 mwifiex_dbg(adapter, ERROR, 1826 "info: Invalid read pointer...\n"); 1827 return -1; 1828 } 1829 1830 /* Read the event ring write pointer set by firmware */ 1831 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 1832 mwifiex_dbg(adapter, ERROR, 1833 "EventReady: failed to read reg->evt_wrptr\n"); 1834 return -1; 1835 } 1836 1837 mwifiex_dbg(adapter, EVENT, 1838 "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>", 1839 card->evtbd_rdptr, wrptr); 1840 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr 1841 & MWIFIEX_EVTBD_MASK)) || 1842 ((wrptr & reg->evt_rollover_ind) == 1843 (card->evtbd_rdptr & reg->evt_rollover_ind))) { 1844 struct sk_buff *skb_cmd; 1845 __le16 data_len = 0; 1846 u16 evt_len; 1847 1848 mwifiex_dbg(adapter, INFO, 1849 "info: Read Index: %d\n", rdptr); 1850 skb_cmd = card->evt_buf_list[rdptr]; 1851 mwifiex_unmap_pci_memory(adapter, skb_cmd, PCI_DMA_FROMDEVICE); 1852 1853 /* Take the pointer and set it to event pointer in adapter 1854 and will return back after event handling callback */ 1855 card->evt_buf_list[rdptr] = NULL; 1856 desc = card->evtbd_ring[rdptr]; 1857 memset(desc, 0, sizeof(*desc)); 1858 1859 event = get_unaligned_le32(&skb_cmd->data[INTF_HEADER_LEN]); 1860 adapter->event_cause = event; 1861 /* The first 4bytes will be the event transfer header 1862 len is 2 bytes followed by type which is 2 bytes */ 1863 memcpy(&data_len, skb_cmd->data, sizeof(__le16)); 1864 evt_len = le16_to_cpu(data_len); 1865 skb_trim(skb_cmd, evt_len); 1866 skb_pull(skb_cmd, INTF_HEADER_LEN); 1867 mwifiex_dbg(adapter, EVENT, 1868 "info: Event length: %d\n", evt_len); 1869 1870 if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE)) 1871 memcpy(adapter->event_body, skb_cmd->data + 1872 MWIFIEX_EVENT_HEADER_LEN, evt_len - 1873 MWIFIEX_EVENT_HEADER_LEN); 1874 1875 adapter->event_received = true; 1876 adapter->event_skb = skb_cmd; 1877 1878 /* Do not update the event read pointer here, wait till the 1879 buffer is released. This is just to make things simpler, 1880 we need to find a better method of managing these buffers. 1881 */ 1882 } else { 1883 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1884 CPU_INTR_EVENT_DONE)) { 1885 mwifiex_dbg(adapter, ERROR, 1886 "Write register failed\n"); 1887 return -1; 1888 } 1889 } 1890 1891 return 0; 1892 } 1893 1894 /* 1895 * Event processing complete handler 1896 */ 1897 static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter, 1898 struct sk_buff *skb) 1899 { 1900 struct pcie_service_card *card = adapter->card; 1901 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1902 int ret = 0; 1903 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 1904 u32 wrptr; 1905 struct mwifiex_evt_buf_desc *desc; 1906 1907 if (!skb) 1908 return 0; 1909 1910 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 1911 mwifiex_dbg(adapter, ERROR, 1912 "event_complete: Invalid rdptr 0x%x\n", 1913 rdptr); 1914 return -EINVAL; 1915 } 1916 1917 /* Read the event ring write pointer set by firmware */ 1918 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 1919 mwifiex_dbg(adapter, ERROR, 1920 "event_complete: failed to read reg->evt_wrptr\n"); 1921 return -1; 1922 } 1923 1924 if (!card->evt_buf_list[rdptr]) { 1925 skb_push(skb, INTF_HEADER_LEN); 1926 skb_put(skb, MAX_EVENT_SIZE - skb->len); 1927 if (mwifiex_map_pci_memory(adapter, skb, 1928 MAX_EVENT_SIZE, 1929 PCI_DMA_FROMDEVICE)) 1930 return -1; 1931 card->evt_buf_list[rdptr] = skb; 1932 desc = card->evtbd_ring[rdptr]; 1933 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb); 1934 desc->len = (u16)skb->len; 1935 desc->flags = 0; 1936 skb = NULL; 1937 } else { 1938 mwifiex_dbg(adapter, ERROR, 1939 "info: ERROR: buf still valid at index %d, <%p, %p>\n", 1940 rdptr, card->evt_buf_list[rdptr], skb); 1941 } 1942 1943 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) { 1944 card->evtbd_rdptr = ((card->evtbd_rdptr & 1945 reg->evt_rollover_ind) ^ 1946 reg->evt_rollover_ind); 1947 } 1948 1949 mwifiex_dbg(adapter, EVENT, 1950 "info: Updated <Rd: 0x%x, Wr: 0x%x>", 1951 card->evtbd_rdptr, wrptr); 1952 1953 /* Write the event ring read pointer in to reg->evt_rdptr */ 1954 if (mwifiex_write_reg(adapter, reg->evt_rdptr, 1955 card->evtbd_rdptr)) { 1956 mwifiex_dbg(adapter, ERROR, 1957 "event_complete: failed to read reg->evt_rdptr\n"); 1958 return -1; 1959 } 1960 1961 mwifiex_dbg(adapter, EVENT, 1962 "info: Check Events Again\n"); 1963 ret = mwifiex_pcie_process_event_ready(adapter); 1964 1965 return ret; 1966 } 1967 1968 /* Combo firmware image is a combination of 1969 * (1) combo crc heaer, start with CMD5 1970 * (2) bluetooth image, start with CMD7, end with CMD6, data wrapped in CMD1. 1971 * (3) wifi image. 1972 * 1973 * This function bypass the header and bluetooth part, return 1974 * the offset of tail wifi-only part. 1975 */ 1976 1977 static int mwifiex_extract_wifi_fw(struct mwifiex_adapter *adapter, 1978 const void *firmware, u32 firmware_len) { 1979 const struct mwifiex_fw_data *fwdata; 1980 u32 offset = 0, data_len, dnld_cmd; 1981 int ret = 0; 1982 bool cmd7_before = false; 1983 1984 while (1) { 1985 /* Check for integer and buffer overflow */ 1986 if (offset + sizeof(fwdata->header) < sizeof(fwdata->header) || 1987 offset + sizeof(fwdata->header) >= firmware_len) { 1988 mwifiex_dbg(adapter, ERROR, 1989 "extract wifi-only fw failure!\n"); 1990 ret = -1; 1991 goto done; 1992 } 1993 1994 fwdata = firmware + offset; 1995 dnld_cmd = le32_to_cpu(fwdata->header.dnld_cmd); 1996 data_len = le32_to_cpu(fwdata->header.data_length); 1997 1998 /* Skip past header */ 1999 offset += sizeof(fwdata->header); 2000 2001 switch (dnld_cmd) { 2002 case MWIFIEX_FW_DNLD_CMD_1: 2003 if (!cmd7_before) { 2004 mwifiex_dbg(adapter, ERROR, 2005 "no cmd7 before cmd1!\n"); 2006 ret = -1; 2007 goto done; 2008 } 2009 if (offset + data_len < data_len) { 2010 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2011 ret = -1; 2012 goto done; 2013 } 2014 offset += data_len; 2015 break; 2016 case MWIFIEX_FW_DNLD_CMD_5: 2017 /* Check for integer overflow */ 2018 if (offset + data_len < data_len) { 2019 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2020 ret = -1; 2021 goto done; 2022 } 2023 offset += data_len; 2024 break; 2025 case MWIFIEX_FW_DNLD_CMD_6: 2026 /* Check for integer overflow */ 2027 if (offset + data_len < data_len) { 2028 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2029 ret = -1; 2030 goto done; 2031 } 2032 offset += data_len; 2033 if (offset >= firmware_len) { 2034 mwifiex_dbg(adapter, ERROR, 2035 "extract wifi-only fw failure!\n"); 2036 ret = -1; 2037 } else { 2038 ret = offset; 2039 } 2040 goto done; 2041 case MWIFIEX_FW_DNLD_CMD_7: 2042 cmd7_before = true; 2043 break; 2044 default: 2045 mwifiex_dbg(adapter, ERROR, "unknown dnld_cmd %d\n", 2046 dnld_cmd); 2047 ret = -1; 2048 goto done; 2049 } 2050 } 2051 2052 done: 2053 return ret; 2054 } 2055 2056 /* 2057 * This function downloads the firmware to the card. 2058 * 2059 * Firmware is downloaded to the card in blocks. Every block download 2060 * is tested for CRC errors, and retried a number of times before 2061 * returning failure. 2062 */ 2063 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter, 2064 struct mwifiex_fw_image *fw) 2065 { 2066 int ret; 2067 u8 *firmware = fw->fw_buf; 2068 u32 firmware_len = fw->fw_len; 2069 u32 offset = 0; 2070 struct sk_buff *skb; 2071 u32 txlen, tx_blocks = 0, tries, len, val; 2072 u32 block_retry_cnt = 0; 2073 struct pcie_service_card *card = adapter->card; 2074 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2075 2076 if (!firmware || !firmware_len) { 2077 mwifiex_dbg(adapter, ERROR, 2078 "No firmware image found! Terminating download\n"); 2079 return -1; 2080 } 2081 2082 mwifiex_dbg(adapter, INFO, 2083 "info: Downloading FW image (%d bytes)\n", 2084 firmware_len); 2085 2086 if (mwifiex_pcie_disable_host_int(adapter)) { 2087 mwifiex_dbg(adapter, ERROR, 2088 "%s: Disabling interrupts failed.\n", __func__); 2089 return -1; 2090 } 2091 2092 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 2093 if (!skb) { 2094 ret = -ENOMEM; 2095 goto done; 2096 } 2097 2098 ret = mwifiex_read_reg(adapter, PCIE_SCRATCH_13_REG, &val); 2099 if (ret) { 2100 mwifiex_dbg(adapter, FATAL, "Failed to read scratch register 13\n"); 2101 goto done; 2102 } 2103 2104 /* PCIE FLR case: extract wifi part from combo firmware*/ 2105 if (val == MWIFIEX_PCIE_FLR_HAPPENS) { 2106 ret = mwifiex_extract_wifi_fw(adapter, firmware, firmware_len); 2107 if (ret < 0) { 2108 mwifiex_dbg(adapter, ERROR, "Failed to extract wifi fw\n"); 2109 goto done; 2110 } 2111 offset = ret; 2112 mwifiex_dbg(adapter, MSG, 2113 "info: dnld wifi firmware from %d bytes\n", offset); 2114 } 2115 2116 /* Perform firmware data transfer */ 2117 do { 2118 u32 ireg_intr = 0; 2119 2120 /* More data? */ 2121 if (offset >= firmware_len) 2122 break; 2123 2124 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2125 ret = mwifiex_read_reg(adapter, reg->cmd_size, 2126 &len); 2127 if (ret) { 2128 mwifiex_dbg(adapter, FATAL, 2129 "Failed reading len from boot code\n"); 2130 goto done; 2131 } 2132 if (len) 2133 break; 2134 usleep_range(10, 20); 2135 } 2136 2137 if (!len) { 2138 break; 2139 } else if (len > MWIFIEX_UPLD_SIZE) { 2140 mwifiex_dbg(adapter, ERROR, 2141 "FW download failure @ %d, invalid length %d\n", 2142 offset, len); 2143 ret = -1; 2144 goto done; 2145 } 2146 2147 txlen = len; 2148 2149 if (len & BIT(0)) { 2150 block_retry_cnt++; 2151 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) { 2152 mwifiex_dbg(adapter, ERROR, 2153 "FW download failure @ %d, over max\t" 2154 "retry count\n", offset); 2155 ret = -1; 2156 goto done; 2157 } 2158 mwifiex_dbg(adapter, ERROR, 2159 "FW CRC error indicated by the\t" 2160 "helper: len = 0x%04X, txlen = %d\n", 2161 len, txlen); 2162 len &= ~BIT(0); 2163 /* Setting this to 0 to resend from same offset */ 2164 txlen = 0; 2165 } else { 2166 block_retry_cnt = 0; 2167 /* Set blocksize to transfer - checking for 2168 last block */ 2169 if (firmware_len - offset < txlen) 2170 txlen = firmware_len - offset; 2171 2172 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) / 2173 card->pcie.blksz_fw_dl; 2174 2175 /* Copy payload to buffer */ 2176 memmove(skb->data, &firmware[offset], txlen); 2177 } 2178 2179 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 2180 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl); 2181 2182 /* Send the boot command to device */ 2183 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) { 2184 mwifiex_dbg(adapter, ERROR, 2185 "Failed to send firmware download command\n"); 2186 ret = -1; 2187 goto done; 2188 } 2189 2190 /* Wait for the command done interrupt */ 2191 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2192 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS, 2193 &ireg_intr)) { 2194 mwifiex_dbg(adapter, ERROR, 2195 "%s: Failed to read\t" 2196 "interrupt status during fw dnld.\n", 2197 __func__); 2198 mwifiex_unmap_pci_memory(adapter, skb, 2199 PCI_DMA_TODEVICE); 2200 ret = -1; 2201 goto done; 2202 } 2203 if (!(ireg_intr & CPU_INTR_DOOR_BELL)) 2204 break; 2205 usleep_range(10, 20); 2206 } 2207 if (ireg_intr & CPU_INTR_DOOR_BELL) { 2208 mwifiex_dbg(adapter, ERROR, "%s: Card failed to ACK download\n", 2209 __func__); 2210 mwifiex_unmap_pci_memory(adapter, skb, 2211 PCI_DMA_TODEVICE); 2212 ret = -1; 2213 goto done; 2214 } 2215 2216 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE); 2217 2218 offset += txlen; 2219 } while (true); 2220 2221 mwifiex_dbg(adapter, MSG, 2222 "info: FW download over, size %d bytes\n", offset); 2223 2224 ret = 0; 2225 2226 done: 2227 dev_kfree_skb_any(skb); 2228 return ret; 2229 } 2230 2231 /* 2232 * This function checks the firmware status in card. 2233 */ 2234 static int 2235 mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num) 2236 { 2237 int ret = 0; 2238 u32 firmware_stat; 2239 struct pcie_service_card *card = adapter->card; 2240 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2241 u32 tries; 2242 2243 /* Mask spurios interrupts */ 2244 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK, 2245 HOST_INTR_MASK)) { 2246 mwifiex_dbg(adapter, ERROR, 2247 "Write register failed\n"); 2248 return -1; 2249 } 2250 2251 mwifiex_dbg(adapter, INFO, 2252 "Setting driver ready signature\n"); 2253 if (mwifiex_write_reg(adapter, reg->drv_rdy, 2254 FIRMWARE_READY_PCIE)) { 2255 mwifiex_dbg(adapter, ERROR, 2256 "Failed to write driver ready signature\n"); 2257 return -1; 2258 } 2259 2260 /* Wait for firmware initialization event */ 2261 for (tries = 0; tries < poll_num; tries++) { 2262 if (mwifiex_read_reg(adapter, reg->fw_status, 2263 &firmware_stat)) 2264 ret = -1; 2265 else 2266 ret = 0; 2267 2268 mwifiex_dbg(adapter, INFO, "Try %d if FW is ready <%d,%#x>", 2269 tries, ret, firmware_stat); 2270 2271 if (ret) 2272 continue; 2273 if (firmware_stat == FIRMWARE_READY_PCIE) { 2274 ret = 0; 2275 break; 2276 } else { 2277 msleep(100); 2278 ret = -1; 2279 } 2280 } 2281 2282 return ret; 2283 } 2284 2285 /* This function checks if WLAN is the winner. 2286 */ 2287 static int 2288 mwifiex_check_winner_status(struct mwifiex_adapter *adapter) 2289 { 2290 u32 winner = 0; 2291 int ret = 0; 2292 struct pcie_service_card *card = adapter->card; 2293 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2294 2295 if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) { 2296 ret = -1; 2297 } else if (!winner) { 2298 mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n"); 2299 adapter->winner = 1; 2300 } else { 2301 mwifiex_dbg(adapter, ERROR, 2302 "PCI-E is not the winner <%#x>", winner); 2303 } 2304 2305 return ret; 2306 } 2307 2308 /* 2309 * This function reads the interrupt status from card. 2310 */ 2311 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter, 2312 int msg_id) 2313 { 2314 u32 pcie_ireg; 2315 unsigned long flags; 2316 struct pcie_service_card *card = adapter->card; 2317 2318 if (card->msi_enable) { 2319 spin_lock_irqsave(&adapter->int_lock, flags); 2320 adapter->int_status = 1; 2321 spin_unlock_irqrestore(&adapter->int_lock, flags); 2322 return; 2323 } 2324 2325 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 2326 return; 2327 2328 if (card->msix_enable && msg_id >= 0) { 2329 pcie_ireg = BIT(msg_id); 2330 } else { 2331 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2332 &pcie_ireg)) { 2333 mwifiex_dbg(adapter, ERROR, "Read register failed\n"); 2334 return; 2335 } 2336 2337 if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg) 2338 return; 2339 2340 2341 mwifiex_pcie_disable_host_int(adapter); 2342 2343 /* Clear the pending interrupts */ 2344 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS, 2345 ~pcie_ireg)) { 2346 mwifiex_dbg(adapter, ERROR, 2347 "Write register failed\n"); 2348 return; 2349 } 2350 } 2351 2352 if (!adapter->pps_uapsd_mode && 2353 adapter->ps_state == PS_STATE_SLEEP && 2354 mwifiex_pcie_ok_to_access_hw(adapter)) { 2355 /* Potentially for PCIe we could get other 2356 * interrupts like shared. Don't change power 2357 * state until cookie is set 2358 */ 2359 adapter->ps_state = PS_STATE_AWAKE; 2360 adapter->pm_wakeup_fw_try = false; 2361 del_timer(&adapter->wakeup_timer); 2362 } 2363 2364 spin_lock_irqsave(&adapter->int_lock, flags); 2365 adapter->int_status |= pcie_ireg; 2366 spin_unlock_irqrestore(&adapter->int_lock, flags); 2367 mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg); 2368 } 2369 2370 /* 2371 * Interrupt handler for PCIe root port 2372 * 2373 * This function reads the interrupt status from firmware and assigns 2374 * the main process in workqueue which will handle the interrupt. 2375 */ 2376 static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context) 2377 { 2378 struct mwifiex_msix_context *ctx = context; 2379 struct pci_dev *pdev = ctx->dev; 2380 struct pcie_service_card *card; 2381 struct mwifiex_adapter *adapter; 2382 2383 if (!pdev) { 2384 pr_err("info: %s: pdev is NULL\n", __func__); 2385 goto exit; 2386 } 2387 2388 card = pci_get_drvdata(pdev); 2389 2390 if (!card->adapter) { 2391 pr_err("info: %s: card=%p adapter=%p\n", __func__, card, 2392 card ? card->adapter : NULL); 2393 goto exit; 2394 } 2395 adapter = card->adapter; 2396 2397 if (adapter->surprise_removed) 2398 goto exit; 2399 2400 if (card->msix_enable) 2401 mwifiex_interrupt_status(adapter, ctx->msg_id); 2402 else 2403 mwifiex_interrupt_status(adapter, -1); 2404 2405 mwifiex_queue_main_work(adapter); 2406 2407 exit: 2408 return IRQ_HANDLED; 2409 } 2410 2411 /* 2412 * This function checks the current interrupt status. 2413 * 2414 * The following interrupts are checked and handled by this function - 2415 * - Data sent 2416 * - Command sent 2417 * - Command received 2418 * - Packets received 2419 * - Events received 2420 * 2421 * In case of Rx packets received, the packets are uploaded from card to 2422 * host and processed accordingly. 2423 */ 2424 static int mwifiex_process_pcie_int(struct mwifiex_adapter *adapter) 2425 { 2426 int ret; 2427 u32 pcie_ireg = 0; 2428 unsigned long flags; 2429 struct pcie_service_card *card = adapter->card; 2430 2431 spin_lock_irqsave(&adapter->int_lock, flags); 2432 if (!card->msi_enable) { 2433 /* Clear out unused interrupts */ 2434 pcie_ireg = adapter->int_status; 2435 } 2436 adapter->int_status = 0; 2437 spin_unlock_irqrestore(&adapter->int_lock, flags); 2438 2439 if (card->msi_enable) { 2440 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 2441 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2442 &pcie_ireg)) { 2443 mwifiex_dbg(adapter, ERROR, 2444 "Read register failed\n"); 2445 return -1; 2446 } 2447 2448 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) { 2449 if (mwifiex_write_reg(adapter, 2450 PCIE_HOST_INT_STATUS, 2451 ~pcie_ireg)) { 2452 mwifiex_dbg(adapter, ERROR, 2453 "Write register failed\n"); 2454 return -1; 2455 } 2456 if (!adapter->pps_uapsd_mode && 2457 adapter->ps_state == PS_STATE_SLEEP) { 2458 adapter->ps_state = PS_STATE_AWAKE; 2459 adapter->pm_wakeup_fw_try = false; 2460 del_timer(&adapter->wakeup_timer); 2461 } 2462 } 2463 } 2464 } 2465 2466 if (pcie_ireg & HOST_INTR_DNLD_DONE) { 2467 pcie_ireg &= ~HOST_INTR_DNLD_DONE; 2468 mwifiex_dbg(adapter, INTR, "info: TX DNLD Done\n"); 2469 ret = mwifiex_pcie_send_data_complete(adapter); 2470 if (ret) 2471 return ret; 2472 } 2473 if (pcie_ireg & HOST_INTR_UPLD_RDY) { 2474 pcie_ireg &= ~HOST_INTR_UPLD_RDY; 2475 mwifiex_dbg(adapter, INTR, "info: Rx DATA\n"); 2476 ret = mwifiex_pcie_process_recv_data(adapter); 2477 if (ret) 2478 return ret; 2479 } 2480 if (pcie_ireg & HOST_INTR_EVENT_RDY) { 2481 pcie_ireg &= ~HOST_INTR_EVENT_RDY; 2482 mwifiex_dbg(adapter, INTR, "info: Rx EVENT\n"); 2483 ret = mwifiex_pcie_process_event_ready(adapter); 2484 if (ret) 2485 return ret; 2486 } 2487 if (pcie_ireg & HOST_INTR_CMD_DONE) { 2488 pcie_ireg &= ~HOST_INTR_CMD_DONE; 2489 if (adapter->cmd_sent) { 2490 mwifiex_dbg(adapter, INTR, 2491 "info: CMD sent Interrupt\n"); 2492 adapter->cmd_sent = false; 2493 } 2494 /* Handle command response */ 2495 ret = mwifiex_pcie_process_cmd_complete(adapter); 2496 if (ret) 2497 return ret; 2498 } 2499 2500 mwifiex_dbg(adapter, INTR, 2501 "info: cmd_sent=%d data_sent=%d\n", 2502 adapter->cmd_sent, adapter->data_sent); 2503 if (!card->msi_enable && adapter->ps_state != PS_STATE_SLEEP) 2504 mwifiex_pcie_enable_host_int(adapter); 2505 2506 return 0; 2507 } 2508 2509 static int mwifiex_process_msix_int(struct mwifiex_adapter *adapter) 2510 { 2511 int ret; 2512 u32 pcie_ireg; 2513 unsigned long flags; 2514 2515 spin_lock_irqsave(&adapter->int_lock, flags); 2516 /* Clear out unused interrupts */ 2517 pcie_ireg = adapter->int_status; 2518 adapter->int_status = 0; 2519 spin_unlock_irqrestore(&adapter->int_lock, flags); 2520 2521 if (pcie_ireg & HOST_INTR_DNLD_DONE) { 2522 mwifiex_dbg(adapter, INTR, 2523 "info: TX DNLD Done\n"); 2524 ret = mwifiex_pcie_send_data_complete(adapter); 2525 if (ret) 2526 return ret; 2527 } 2528 if (pcie_ireg & HOST_INTR_UPLD_RDY) { 2529 mwifiex_dbg(adapter, INTR, 2530 "info: Rx DATA\n"); 2531 ret = mwifiex_pcie_process_recv_data(adapter); 2532 if (ret) 2533 return ret; 2534 } 2535 if (pcie_ireg & HOST_INTR_EVENT_RDY) { 2536 mwifiex_dbg(adapter, INTR, 2537 "info: Rx EVENT\n"); 2538 ret = mwifiex_pcie_process_event_ready(adapter); 2539 if (ret) 2540 return ret; 2541 } 2542 2543 if (pcie_ireg & HOST_INTR_CMD_DONE) { 2544 if (adapter->cmd_sent) { 2545 mwifiex_dbg(adapter, INTR, 2546 "info: CMD sent Interrupt\n"); 2547 adapter->cmd_sent = false; 2548 } 2549 /* Handle command response */ 2550 ret = mwifiex_pcie_process_cmd_complete(adapter); 2551 if (ret) 2552 return ret; 2553 } 2554 2555 mwifiex_dbg(adapter, INTR, 2556 "info: cmd_sent=%d data_sent=%d\n", 2557 adapter->cmd_sent, adapter->data_sent); 2558 2559 return 0; 2560 } 2561 2562 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter) 2563 { 2564 struct pcie_service_card *card = adapter->card; 2565 2566 if (card->msix_enable) 2567 return mwifiex_process_msix_int(adapter); 2568 else 2569 return mwifiex_process_pcie_int(adapter); 2570 } 2571 2572 /* 2573 * This function downloads data from driver to card. 2574 * 2575 * Both commands and data packets are transferred to the card by this 2576 * function. 2577 * 2578 * This function adds the PCIE specific header to the front of the buffer 2579 * before transferring. The header contains the length of the packet and 2580 * the type. The firmware handles the packets based upon this set type. 2581 */ 2582 static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type, 2583 struct sk_buff *skb, 2584 struct mwifiex_tx_param *tx_param) 2585 { 2586 if (!skb) { 2587 mwifiex_dbg(adapter, ERROR, 2588 "Passed NULL skb to %s\n", __func__); 2589 return -1; 2590 } 2591 2592 if (type == MWIFIEX_TYPE_DATA) 2593 return mwifiex_pcie_send_data(adapter, skb, tx_param); 2594 else if (type == MWIFIEX_TYPE_CMD) 2595 return mwifiex_pcie_send_cmd(adapter, skb); 2596 2597 return 0; 2598 } 2599 2600 /* Function to dump PCIE scratch registers in case of FW crash 2601 */ 2602 static int 2603 mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf) 2604 { 2605 char *p = drv_buf; 2606 char buf[256], *ptr; 2607 int i; 2608 u32 value; 2609 struct pcie_service_card *card = adapter->card; 2610 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2611 int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG, 2612 PCIE_SCRATCH_14_REG, 2613 PCIE_SCRATCH_15_REG}; 2614 2615 if (!p) 2616 return 0; 2617 2618 mwifiex_dbg(adapter, MSG, "PCIE register dump start\n"); 2619 2620 if (mwifiex_read_reg(adapter, reg->fw_status, &value)) { 2621 mwifiex_dbg(adapter, ERROR, "failed to read firmware status"); 2622 return 0; 2623 } 2624 2625 ptr = buf; 2626 mwifiex_dbg(adapter, MSG, "pcie scratch register:"); 2627 for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) { 2628 mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value); 2629 ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n", 2630 pcie_scratch_reg[i], value); 2631 } 2632 2633 mwifiex_dbg(adapter, MSG, "%s\n", buf); 2634 p += sprintf(p, "%s\n", buf); 2635 2636 mwifiex_dbg(adapter, MSG, "PCIE register dump end\n"); 2637 2638 return p - drv_buf; 2639 } 2640 2641 /* This function read/write firmware */ 2642 static enum rdwr_status 2643 mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag) 2644 { 2645 int ret, tries; 2646 u8 ctrl_data; 2647 u32 fw_status; 2648 struct pcie_service_card *card = adapter->card; 2649 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2650 2651 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) 2652 return RDWR_STATUS_FAILURE; 2653 2654 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2655 reg->fw_dump_host_ready); 2656 if (ret) { 2657 mwifiex_dbg(adapter, ERROR, 2658 "PCIE write err\n"); 2659 return RDWR_STATUS_FAILURE; 2660 } 2661 2662 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2663 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data); 2664 if (ctrl_data == FW_DUMP_DONE) 2665 return RDWR_STATUS_SUCCESS; 2666 if (doneflag && ctrl_data == doneflag) 2667 return RDWR_STATUS_DONE; 2668 if (ctrl_data != reg->fw_dump_host_ready) { 2669 mwifiex_dbg(adapter, WARN, 2670 "The ctrl reg was changed, re-try again!\n"); 2671 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2672 reg->fw_dump_host_ready); 2673 if (ret) { 2674 mwifiex_dbg(adapter, ERROR, 2675 "PCIE write err\n"); 2676 return RDWR_STATUS_FAILURE; 2677 } 2678 } 2679 usleep_range(100, 200); 2680 } 2681 2682 mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n"); 2683 return RDWR_STATUS_FAILURE; 2684 } 2685 2686 /* This function dump firmware memory to file */ 2687 static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter) 2688 { 2689 struct pcie_service_card *card = adapter->card; 2690 const struct mwifiex_pcie_card_reg *creg = card->pcie.reg; 2691 unsigned int reg, reg_start, reg_end; 2692 u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num; 2693 u8 idx, i, read_reg, doneflag = 0; 2694 enum rdwr_status stat; 2695 u32 memory_size; 2696 int ret; 2697 2698 if (!card->pcie.can_dump_fw) 2699 return; 2700 2701 for (idx = 0; idx < adapter->num_mem_types; idx++) { 2702 struct memory_type_mapping *entry = 2703 &adapter->mem_type_mapping_tbl[idx]; 2704 2705 if (entry->mem_ptr) { 2706 vfree(entry->mem_ptr); 2707 entry->mem_ptr = NULL; 2708 } 2709 entry->mem_size = 0; 2710 } 2711 2712 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n"); 2713 2714 /* Read the number of the memories which will dump */ 2715 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2716 if (stat == RDWR_STATUS_FAILURE) 2717 return; 2718 2719 reg = creg->fw_dump_start; 2720 mwifiex_read_reg_byte(adapter, reg, &fw_dump_num); 2721 2722 /* W8997 chipset firmware dump will be restore in single region*/ 2723 if (fw_dump_num == 0) 2724 dump_num = 1; 2725 else 2726 dump_num = fw_dump_num; 2727 2728 /* Read the length of every memory which will dump */ 2729 for (idx = 0; idx < dump_num; idx++) { 2730 struct memory_type_mapping *entry = 2731 &adapter->mem_type_mapping_tbl[idx]; 2732 memory_size = 0; 2733 if (fw_dump_num != 0) { 2734 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2735 if (stat == RDWR_STATUS_FAILURE) 2736 return; 2737 2738 reg = creg->fw_dump_start; 2739 for (i = 0; i < 4; i++) { 2740 mwifiex_read_reg_byte(adapter, reg, &read_reg); 2741 memory_size |= (read_reg << (i * 8)); 2742 reg++; 2743 } 2744 } else { 2745 memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE; 2746 } 2747 2748 if (memory_size == 0) { 2749 mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n"); 2750 ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl, 2751 creg->fw_dump_read_done); 2752 if (ret) { 2753 mwifiex_dbg(adapter, ERROR, "PCIE write err\n"); 2754 return; 2755 } 2756 break; 2757 } 2758 2759 mwifiex_dbg(adapter, DUMP, 2760 "%s_SIZE=0x%x\n", entry->mem_name, memory_size); 2761 entry->mem_ptr = vmalloc(memory_size + 1); 2762 entry->mem_size = memory_size; 2763 if (!entry->mem_ptr) { 2764 mwifiex_dbg(adapter, ERROR, 2765 "Vmalloc %s failed\n", entry->mem_name); 2766 return; 2767 } 2768 dbg_ptr = entry->mem_ptr; 2769 end_ptr = dbg_ptr + memory_size; 2770 2771 doneflag = entry->done_flag; 2772 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n", 2773 entry->mem_name); 2774 2775 do { 2776 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2777 if (RDWR_STATUS_FAILURE == stat) 2778 return; 2779 2780 reg_start = creg->fw_dump_start; 2781 reg_end = creg->fw_dump_end; 2782 for (reg = reg_start; reg <= reg_end; reg++) { 2783 mwifiex_read_reg_byte(adapter, reg, dbg_ptr); 2784 if (dbg_ptr < end_ptr) { 2785 dbg_ptr++; 2786 continue; 2787 } 2788 mwifiex_dbg(adapter, ERROR, 2789 "pre-allocated buf not enough\n"); 2790 tmp_ptr = 2791 vzalloc(memory_size + MWIFIEX_SIZE_4K); 2792 if (!tmp_ptr) 2793 return; 2794 memcpy(tmp_ptr, entry->mem_ptr, memory_size); 2795 vfree(entry->mem_ptr); 2796 entry->mem_ptr = tmp_ptr; 2797 tmp_ptr = NULL; 2798 dbg_ptr = entry->mem_ptr + memory_size; 2799 memory_size += MWIFIEX_SIZE_4K; 2800 end_ptr = entry->mem_ptr + memory_size; 2801 } 2802 2803 if (stat != RDWR_STATUS_DONE) 2804 continue; 2805 2806 mwifiex_dbg(adapter, DUMP, 2807 "%s done: size=0x%tx\n", 2808 entry->mem_name, dbg_ptr - entry->mem_ptr); 2809 break; 2810 } while (true); 2811 } 2812 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n"); 2813 } 2814 2815 static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter) 2816 { 2817 int drv_info_size; 2818 void *drv_info; 2819 2820 drv_info_size = mwifiex_drv_info_dump(adapter, &drv_info); 2821 mwifiex_pcie_fw_dump(adapter); 2822 mwifiex_upload_device_dump(adapter, drv_info, drv_info_size); 2823 } 2824 2825 static void mwifiex_pcie_work(struct work_struct *work) 2826 { 2827 struct pcie_service_card *card = 2828 container_of(work, struct pcie_service_card, work); 2829 2830 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 2831 &card->work_flags)) 2832 mwifiex_pcie_device_dump_work(card->adapter); 2833 } 2834 2835 /* This function dumps FW information */ 2836 static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter) 2837 { 2838 struct pcie_service_card *card = adapter->card; 2839 2840 if (test_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags)) 2841 return; 2842 2843 set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags); 2844 2845 schedule_work(&card->work); 2846 } 2847 2848 static void mwifiex_pcie_free_buffers(struct mwifiex_adapter *adapter) 2849 { 2850 struct pcie_service_card *card = adapter->card; 2851 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2852 2853 if (reg->sleep_cookie) 2854 mwifiex_pcie_delete_sleep_cookie_buf(adapter); 2855 2856 mwifiex_pcie_delete_cmdrsp_buf(adapter); 2857 mwifiex_pcie_delete_evtbd_ring(adapter); 2858 mwifiex_pcie_delete_rxbd_ring(adapter); 2859 mwifiex_pcie_delete_txbd_ring(adapter); 2860 card->cmdrsp_buf = NULL; 2861 } 2862 2863 /* 2864 * This function initializes the PCI-E host memory space, WCB rings, etc. 2865 * 2866 * The following initializations steps are followed - 2867 * - Allocate TXBD ring buffers 2868 * - Allocate RXBD ring buffers 2869 * - Allocate event BD ring buffers 2870 * - Allocate command response ring buffer 2871 * - Allocate sleep cookie buffer 2872 */ 2873 static int mwifiex_init_pcie(struct mwifiex_adapter *adapter) 2874 { 2875 struct pcie_service_card *card = adapter->card; 2876 int ret; 2877 struct pci_dev *pdev = card->dev; 2878 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2879 2880 pci_set_drvdata(pdev, card); 2881 2882 ret = pci_enable_device(pdev); 2883 if (ret) 2884 goto err_enable_dev; 2885 2886 pci_set_master(pdev); 2887 2888 pr_notice("try set_consistent_dma_mask(32)\n"); 2889 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2890 if (ret) { 2891 pr_err("set_dma_mask(32) failed\n"); 2892 goto err_set_dma_mask; 2893 } 2894 2895 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 2896 if (ret) { 2897 pr_err("set_consistent_dma_mask(64) failed\n"); 2898 goto err_set_dma_mask; 2899 } 2900 2901 ret = pci_request_region(pdev, 0, DRV_NAME); 2902 if (ret) { 2903 pr_err("req_reg(0) error\n"); 2904 goto err_req_region0; 2905 } 2906 card->pci_mmap = pci_iomap(pdev, 0, 0); 2907 if (!card->pci_mmap) { 2908 pr_err("iomap(0) error\n"); 2909 ret = -EIO; 2910 goto err_iomap0; 2911 } 2912 ret = pci_request_region(pdev, 2, DRV_NAME); 2913 if (ret) { 2914 pr_err("req_reg(2) error\n"); 2915 goto err_req_region2; 2916 } 2917 card->pci_mmap1 = pci_iomap(pdev, 2, 0); 2918 if (!card->pci_mmap1) { 2919 pr_err("iomap(2) error\n"); 2920 ret = -EIO; 2921 goto err_iomap2; 2922 } 2923 2924 pr_notice("PCI memory map Virt0: %p PCI memory map Virt2: %p\n", 2925 card->pci_mmap, card->pci_mmap1); 2926 2927 card->cmdrsp_buf = NULL; 2928 ret = mwifiex_pcie_create_txbd_ring(adapter); 2929 if (ret) 2930 goto err_cre_txbd; 2931 ret = mwifiex_pcie_create_rxbd_ring(adapter); 2932 if (ret) 2933 goto err_cre_rxbd; 2934 ret = mwifiex_pcie_create_evtbd_ring(adapter); 2935 if (ret) 2936 goto err_cre_evtbd; 2937 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter); 2938 if (ret) 2939 goto err_alloc_cmdbuf; 2940 if (reg->sleep_cookie) { 2941 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter); 2942 if (ret) 2943 goto err_alloc_cookie; 2944 } else { 2945 card->sleep_cookie_vbase = NULL; 2946 } 2947 return ret; 2948 2949 err_alloc_cookie: 2950 mwifiex_pcie_delete_cmdrsp_buf(adapter); 2951 err_alloc_cmdbuf: 2952 mwifiex_pcie_delete_evtbd_ring(adapter); 2953 err_cre_evtbd: 2954 mwifiex_pcie_delete_rxbd_ring(adapter); 2955 err_cre_rxbd: 2956 mwifiex_pcie_delete_txbd_ring(adapter); 2957 err_cre_txbd: 2958 pci_iounmap(pdev, card->pci_mmap1); 2959 err_iomap2: 2960 pci_release_region(pdev, 2); 2961 err_req_region2: 2962 pci_iounmap(pdev, card->pci_mmap); 2963 err_iomap0: 2964 pci_release_region(pdev, 0); 2965 err_req_region0: 2966 err_set_dma_mask: 2967 pci_disable_device(pdev); 2968 err_enable_dev: 2969 return ret; 2970 } 2971 2972 /* 2973 * This function cleans up the allocated card buffers. 2974 */ 2975 static void mwifiex_cleanup_pcie(struct mwifiex_adapter *adapter) 2976 { 2977 struct pcie_service_card *card = adapter->card; 2978 struct pci_dev *pdev = card->dev; 2979 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2980 int ret; 2981 u32 fw_status; 2982 2983 cancel_work_sync(&card->work); 2984 2985 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status); 2986 if (fw_status == FIRMWARE_READY_PCIE) { 2987 mwifiex_dbg(adapter, INFO, 2988 "Clearing driver ready signature\n"); 2989 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 2990 mwifiex_dbg(adapter, ERROR, 2991 "Failed to write driver not-ready signature\n"); 2992 } 2993 2994 mwifiex_pcie_free_buffers(adapter); 2995 2996 if (pdev) { 2997 pci_iounmap(pdev, card->pci_mmap); 2998 pci_iounmap(pdev, card->pci_mmap1); 2999 pci_disable_device(pdev); 3000 pci_release_region(pdev, 2); 3001 pci_release_region(pdev, 0); 3002 } 3003 } 3004 3005 static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter) 3006 { 3007 int ret, i, j; 3008 struct pcie_service_card *card = adapter->card; 3009 struct pci_dev *pdev = card->dev; 3010 3011 if (card->pcie.reg->msix_support) { 3012 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3013 card->msix_entries[i].entry = i; 3014 ret = pci_enable_msix_exact(pdev, card->msix_entries, 3015 MWIFIEX_NUM_MSIX_VECTORS); 3016 if (!ret) { 3017 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) { 3018 card->msix_ctx[i].dev = pdev; 3019 card->msix_ctx[i].msg_id = i; 3020 3021 ret = request_irq(card->msix_entries[i].vector, 3022 mwifiex_pcie_interrupt, 0, 3023 "MWIFIEX_PCIE_MSIX", 3024 &card->msix_ctx[i]); 3025 if (ret) 3026 break; 3027 } 3028 3029 if (ret) { 3030 mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n", 3031 ret); 3032 for (j = 0; j < i; j++) 3033 free_irq(card->msix_entries[j].vector, 3034 &card->msix_ctx[i]); 3035 pci_disable_msix(pdev); 3036 } else { 3037 mwifiex_dbg(adapter, MSG, "MSIx enabled!"); 3038 card->msix_enable = 1; 3039 return 0; 3040 } 3041 } 3042 } 3043 3044 if (pci_enable_msi(pdev) != 0) 3045 pci_disable_msi(pdev); 3046 else 3047 card->msi_enable = 1; 3048 3049 mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable); 3050 3051 card->share_irq_ctx.dev = pdev; 3052 card->share_irq_ctx.msg_id = -1; 3053 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED, 3054 "MRVL_PCIE", &card->share_irq_ctx); 3055 if (ret) { 3056 pr_err("request_irq failed: ret=%d\n", ret); 3057 return -1; 3058 } 3059 3060 return 0; 3061 } 3062 3063 /* 3064 * This function gets the firmware name for downloading by revision id 3065 * 3066 * Read revision id register to get revision id 3067 */ 3068 static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter) 3069 { 3070 int revision_id = 0; 3071 int version, magic; 3072 struct pcie_service_card *card = adapter->card; 3073 3074 switch (card->dev->device) { 3075 case PCIE_DEVICE_ID_MARVELL_88W8766P: 3076 strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME); 3077 break; 3078 case PCIE_DEVICE_ID_MARVELL_88W8897: 3079 mwifiex_write_reg(adapter, 0x0c58, 0x80c00000); 3080 mwifiex_read_reg(adapter, 0x0c58, &revision_id); 3081 revision_id &= 0xff00; 3082 switch (revision_id) { 3083 case PCIE8897_A0: 3084 strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME); 3085 break; 3086 case PCIE8897_B0: 3087 strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME); 3088 break; 3089 default: 3090 strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME); 3091 3092 break; 3093 } 3094 break; 3095 case PCIE_DEVICE_ID_MARVELL_88W8997: 3096 mwifiex_read_reg(adapter, 0x8, &revision_id); 3097 mwifiex_read_reg(adapter, 0x0cd0, &version); 3098 mwifiex_read_reg(adapter, 0x0cd4, &magic); 3099 revision_id &= 0xff; 3100 version &= 0x7; 3101 magic &= 0xff; 3102 if (revision_id == PCIE8997_A1 && 3103 magic == CHIP_MAGIC_VALUE && 3104 version == CHIP_VER_PCIEUART) 3105 strcpy(adapter->fw_name, PCIEUART8997_FW_NAME_V4); 3106 else 3107 strcpy(adapter->fw_name, PCIEUSB8997_FW_NAME_V4); 3108 break; 3109 default: 3110 break; 3111 } 3112 } 3113 3114 /* 3115 * This function registers the PCIE device. 3116 * 3117 * PCIE IRQ is claimed, block size is set and driver data is initialized. 3118 */ 3119 static int mwifiex_register_dev(struct mwifiex_adapter *adapter) 3120 { 3121 struct pcie_service_card *card = adapter->card; 3122 3123 /* save adapter pointer in card */ 3124 card->adapter = adapter; 3125 3126 if (mwifiex_pcie_request_irq(adapter)) 3127 return -1; 3128 3129 adapter->tx_buf_size = card->pcie.tx_buf_size; 3130 adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl; 3131 adapter->num_mem_types = card->pcie.num_mem_types; 3132 adapter->ext_scan = card->pcie.can_ext_scan; 3133 mwifiex_pcie_get_fw_name(adapter); 3134 3135 return 0; 3136 } 3137 3138 /* 3139 * This function unregisters the PCIE device. 3140 * 3141 * The PCIE IRQ is released, the function is disabled and driver 3142 * data is set to null. 3143 */ 3144 static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter) 3145 { 3146 struct pcie_service_card *card = adapter->card; 3147 struct pci_dev *pdev = card->dev; 3148 int i; 3149 3150 if (card->msix_enable) { 3151 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3152 synchronize_irq(card->msix_entries[i].vector); 3153 3154 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3155 free_irq(card->msix_entries[i].vector, 3156 &card->msix_ctx[i]); 3157 3158 card->msix_enable = 0; 3159 pci_disable_msix(pdev); 3160 } else { 3161 mwifiex_dbg(adapter, INFO, 3162 "%s(): calling free_irq()\n", __func__); 3163 free_irq(card->dev->irq, &card->share_irq_ctx); 3164 3165 if (card->msi_enable) 3166 pci_disable_msi(pdev); 3167 } 3168 card->adapter = NULL; 3169 } 3170 3171 /* This function initializes the PCI-E host memory space, WCB rings, etc. 3172 * 3173 * The following initializations steps are followed - 3174 * - Allocate TXBD ring buffers 3175 * - Allocate RXBD ring buffers 3176 * - Allocate event BD ring buffers 3177 * - Allocate command response ring buffer 3178 * - Allocate sleep cookie buffer 3179 * Part of mwifiex_init_pcie(), not reset the PCIE registers 3180 */ 3181 static void mwifiex_pcie_up_dev(struct mwifiex_adapter *adapter) 3182 { 3183 struct pcie_service_card *card = adapter->card; 3184 int ret; 3185 struct pci_dev *pdev = card->dev; 3186 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 3187 3188 /* tx_buf_size might be changed to 3584 by firmware during 3189 * data transfer, we should reset it to default size. 3190 */ 3191 adapter->tx_buf_size = card->pcie.tx_buf_size; 3192 3193 card->cmdrsp_buf = NULL; 3194 ret = mwifiex_pcie_create_txbd_ring(adapter); 3195 if (ret) { 3196 mwifiex_dbg(adapter, ERROR, "Failed to create txbd ring\n"); 3197 goto err_cre_txbd; 3198 } 3199 3200 ret = mwifiex_pcie_create_rxbd_ring(adapter); 3201 if (ret) { 3202 mwifiex_dbg(adapter, ERROR, "Failed to create rxbd ring\n"); 3203 goto err_cre_rxbd; 3204 } 3205 3206 ret = mwifiex_pcie_create_evtbd_ring(adapter); 3207 if (ret) { 3208 mwifiex_dbg(adapter, ERROR, "Failed to create evtbd ring\n"); 3209 goto err_cre_evtbd; 3210 } 3211 3212 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter); 3213 if (ret) { 3214 mwifiex_dbg(adapter, ERROR, "Failed to allocate cmdbuf buffer\n"); 3215 goto err_alloc_cmdbuf; 3216 } 3217 3218 if (reg->sleep_cookie) { 3219 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter); 3220 if (ret) { 3221 mwifiex_dbg(adapter, ERROR, "Failed to allocate sleep_cookie buffer\n"); 3222 goto err_alloc_cookie; 3223 } 3224 } else { 3225 card->sleep_cookie_vbase = NULL; 3226 } 3227 return; 3228 3229 err_alloc_cookie: 3230 mwifiex_pcie_delete_cmdrsp_buf(adapter); 3231 err_alloc_cmdbuf: 3232 mwifiex_pcie_delete_evtbd_ring(adapter); 3233 err_cre_evtbd: 3234 mwifiex_pcie_delete_rxbd_ring(adapter); 3235 err_cre_rxbd: 3236 mwifiex_pcie_delete_txbd_ring(adapter); 3237 err_cre_txbd: 3238 pci_iounmap(pdev, card->pci_mmap1); 3239 } 3240 3241 /* This function cleans up the PCI-E host memory space. */ 3242 static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter) 3243 { 3244 struct pcie_service_card *card = adapter->card; 3245 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 3246 3247 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 3248 mwifiex_dbg(adapter, ERROR, "Failed to write driver not-ready signature\n"); 3249 3250 adapter->seq_num = 0; 3251 3252 mwifiex_pcie_free_buffers(adapter); 3253 } 3254 3255 static struct mwifiex_if_ops pcie_ops = { 3256 .init_if = mwifiex_init_pcie, 3257 .cleanup_if = mwifiex_cleanup_pcie, 3258 .check_fw_status = mwifiex_check_fw_status, 3259 .check_winner_status = mwifiex_check_winner_status, 3260 .prog_fw = mwifiex_prog_fw_w_helper, 3261 .register_dev = mwifiex_register_dev, 3262 .unregister_dev = mwifiex_unregister_dev, 3263 .enable_int = mwifiex_pcie_enable_host_int, 3264 .disable_int = mwifiex_pcie_disable_host_int_noerr, 3265 .process_int_status = mwifiex_process_int_status, 3266 .host_to_card = mwifiex_pcie_host_to_card, 3267 .wakeup = mwifiex_pm_wakeup_card, 3268 .wakeup_complete = mwifiex_pm_wakeup_card_complete, 3269 3270 /* PCIE specific */ 3271 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete, 3272 .event_complete = mwifiex_pcie_event_complete, 3273 .update_mp_end_port = NULL, 3274 .cleanup_mpa_buf = NULL, 3275 .init_fw_port = mwifiex_pcie_init_fw_port, 3276 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf, 3277 .reg_dump = mwifiex_pcie_reg_dump, 3278 .device_dump = mwifiex_pcie_device_dump, 3279 .down_dev = mwifiex_pcie_down_dev, 3280 .up_dev = mwifiex_pcie_up_dev, 3281 }; 3282 3283 module_pci_driver(mwifiex_pcie); 3284 3285 MODULE_AUTHOR("Marvell International Ltd."); 3286 MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION); 3287 MODULE_VERSION(PCIE_VERSION); 3288 MODULE_LICENSE("GPL v2"); 3289