1828c91f7SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2277b024eSKalle Valo /*
3932183aaSGanapathi Bhat  * NXP Wireless LAN device driver: 802.11n RX Re-ordering
4277b024eSKalle Valo  *
5932183aaSGanapathi Bhat  * Copyright 2011-2020 NXP
6277b024eSKalle Valo  */
7277b024eSKalle Valo 
8277b024eSKalle Valo #include "decl.h"
9277b024eSKalle Valo #include "ioctl.h"
10277b024eSKalle Valo #include "util.h"
11277b024eSKalle Valo #include "fw.h"
12277b024eSKalle Valo #include "main.h"
13277b024eSKalle Valo #include "wmm.h"
14277b024eSKalle Valo #include "11n.h"
15277b024eSKalle Valo #include "11n_rxreorder.h"
16277b024eSKalle Valo 
17277b024eSKalle Valo /* This function will dispatch amsdu packet and forward it to kernel/upper
18277b024eSKalle Valo  * layer.
19277b024eSKalle Valo  */
mwifiex_11n_dispatch_amsdu_pkt(struct mwifiex_private * priv,struct sk_buff * skb)20277b024eSKalle Valo static int mwifiex_11n_dispatch_amsdu_pkt(struct mwifiex_private *priv,
21277b024eSKalle Valo 					  struct sk_buff *skb)
22277b024eSKalle Valo {
23277b024eSKalle Valo 	struct rxpd *local_rx_pd = (struct rxpd *)(skb->data);
24277b024eSKalle Valo 	int ret;
25277b024eSKalle Valo 
26277b024eSKalle Valo 	if (le16_to_cpu(local_rx_pd->rx_pkt_type) == PKT_TYPE_AMSDU) {
27277b024eSKalle Valo 		struct sk_buff_head list;
28277b024eSKalle Valo 		struct sk_buff *rx_skb;
29277b024eSKalle Valo 
30277b024eSKalle Valo 		__skb_queue_head_init(&list);
31277b024eSKalle Valo 
32277b024eSKalle Valo 		skb_pull(skb, le16_to_cpu(local_rx_pd->rx_pkt_offset));
33277b024eSKalle Valo 		skb_trim(skb, le16_to_cpu(local_rx_pd->rx_pkt_length));
34277b024eSKalle Valo 
35277b024eSKalle Valo 		ieee80211_amsdu_to_8023s(skb, &list, priv->curr_addr,
36986e43b1SFelix Fietkau 					 priv->wdev.iftype, 0, NULL, NULL, false);
37277b024eSKalle Valo 
38277b024eSKalle Valo 		while (!skb_queue_empty(&list)) {
39776f7420SAmitkumar Karwar 			struct rx_packet_hdr *rx_hdr;
40776f7420SAmitkumar Karwar 
41277b024eSKalle Valo 			rx_skb = __skb_dequeue(&list);
42776f7420SAmitkumar Karwar 			rx_hdr = (struct rx_packet_hdr *)rx_skb->data;
43776f7420SAmitkumar Karwar 			if (ISSUPP_TDLS_ENABLED(priv->adapter->fw_cap_info) &&
44776f7420SAmitkumar Karwar 			    ntohs(rx_hdr->eth803_hdr.h_proto) == ETH_P_TDLS) {
45776f7420SAmitkumar Karwar 				mwifiex_process_tdls_action_frame(priv,
46776f7420SAmitkumar Karwar 								  (u8 *)rx_hdr,
47776f7420SAmitkumar Karwar 								  skb->len);
48776f7420SAmitkumar Karwar 			}
49776f7420SAmitkumar Karwar 
50bf00dc22SXinming Hu 			if (priv->bss_role == MWIFIEX_BSS_ROLE_UAP)
51bf00dc22SXinming Hu 				ret = mwifiex_uap_recv_packet(priv, rx_skb);
52bf00dc22SXinming Hu 			else
53277b024eSKalle Valo 				ret = mwifiex_recv_packet(priv, rx_skb);
54277b024eSKalle Valo 			if (ret == -1)
55277b024eSKalle Valo 				mwifiex_dbg(priv->adapter, ERROR,
56277b024eSKalle Valo 					    "Rx of A-MSDU failed");
57277b024eSKalle Valo 		}
58277b024eSKalle Valo 		return 0;
59277b024eSKalle Valo 	}
60277b024eSKalle Valo 
61277b024eSKalle Valo 	return -1;
62277b024eSKalle Valo }
63277b024eSKalle Valo 
64277b024eSKalle Valo /* This function will process the rx packet and forward it to kernel/upper
65277b024eSKalle Valo  * layer.
66277b024eSKalle Valo  */
mwifiex_11n_dispatch_pkt(struct mwifiex_private * priv,struct sk_buff * payload)67ce2e942eSBrian Norris static int mwifiex_11n_dispatch_pkt(struct mwifiex_private *priv,
68ce2e942eSBrian Norris 				    struct sk_buff *payload)
69277b024eSKalle Valo {
70277b024eSKalle Valo 
7199ffe72cSXinming Hu 	int ret;
7299ffe72cSXinming Hu 
7399ffe72cSXinming Hu 	if (!payload) {
7499ffe72cSXinming Hu 		mwifiex_dbg(priv->adapter, INFO, "info: fw drop data\n");
7599ffe72cSXinming Hu 		return 0;
7699ffe72cSXinming Hu 	}
7799ffe72cSXinming Hu 
7899ffe72cSXinming Hu 	ret = mwifiex_11n_dispatch_amsdu_pkt(priv, payload);
79277b024eSKalle Valo 	if (!ret)
80277b024eSKalle Valo 		return 0;
81277b024eSKalle Valo 
82277b024eSKalle Valo 	if (priv->bss_role == MWIFIEX_BSS_ROLE_UAP)
83277b024eSKalle Valo 		return mwifiex_handle_uap_rx_forward(priv, payload);
84277b024eSKalle Valo 
85277b024eSKalle Valo 	return mwifiex_process_rx_packet(priv, payload);
86277b024eSKalle Valo }
87277b024eSKalle Valo 
88277b024eSKalle Valo /*
89277b024eSKalle Valo  * This function dispatches all packets in the Rx reorder table until the
90277b024eSKalle Valo  * start window.
91277b024eSKalle Valo  *
92277b024eSKalle Valo  * There could be holes in the buffer, which are skipped by the function.
93277b024eSKalle Valo  * Since the buffer is linear, the function uses rotation to simulate
94277b024eSKalle Valo  * circular buffer.
95277b024eSKalle Valo  */
96277b024eSKalle Valo static void
mwifiex_11n_dispatch_pkt_until_start_win(struct mwifiex_private * priv,struct mwifiex_rx_reorder_tbl * tbl,int start_win)97277b024eSKalle Valo mwifiex_11n_dispatch_pkt_until_start_win(struct mwifiex_private *priv,
98277b024eSKalle Valo 					 struct mwifiex_rx_reorder_tbl *tbl,
99277b024eSKalle Valo 					 int start_win)
100277b024eSKalle Valo {
101ce2e942eSBrian Norris 	struct sk_buff_head list;
102ce2e942eSBrian Norris 	struct sk_buff *skb;
103277b024eSKalle Valo 	int pkt_to_send, i;
104277b024eSKalle Valo 
105ce2e942eSBrian Norris 	__skb_queue_head_init(&list);
1068a7f9fd8SBrian Norris 	spin_lock_bh(&priv->rx_reorder_tbl_lock);
107ce2e942eSBrian Norris 
108277b024eSKalle Valo 	pkt_to_send = (start_win > tbl->start_win) ?
109277b024eSKalle Valo 		      min((start_win - tbl->start_win), tbl->win_size) :
110277b024eSKalle Valo 		      tbl->win_size;
111277b024eSKalle Valo 
112277b024eSKalle Valo 	for (i = 0; i < pkt_to_send; ++i) {
113277b024eSKalle Valo 		if (tbl->rx_reorder_ptr[i]) {
114ce2e942eSBrian Norris 			skb = tbl->rx_reorder_ptr[i];
115ce2e942eSBrian Norris 			__skb_queue_tail(&list, skb);
116277b024eSKalle Valo 			tbl->rx_reorder_ptr[i] = NULL;
117277b024eSKalle Valo 		}
118277b024eSKalle Valo 	}
119277b024eSKalle Valo 
120277b024eSKalle Valo 	/*
121277b024eSKalle Valo 	 * We don't have a circular buffer, hence use rotation to simulate
122277b024eSKalle Valo 	 * circular buffer
123277b024eSKalle Valo 	 */
124277b024eSKalle Valo 	for (i = 0; i < tbl->win_size - pkt_to_send; ++i) {
125277b024eSKalle Valo 		tbl->rx_reorder_ptr[i] = tbl->rx_reorder_ptr[pkt_to_send + i];
126277b024eSKalle Valo 		tbl->rx_reorder_ptr[pkt_to_send + i] = NULL;
127277b024eSKalle Valo 	}
128277b024eSKalle Valo 
129277b024eSKalle Valo 	tbl->start_win = start_win;
1308a7f9fd8SBrian Norris 	spin_unlock_bh(&priv->rx_reorder_tbl_lock);
131ce2e942eSBrian Norris 
132ce2e942eSBrian Norris 	while ((skb = __skb_dequeue(&list)))
133ce2e942eSBrian Norris 		mwifiex_11n_dispatch_pkt(priv, skb);
134277b024eSKalle Valo }
135277b024eSKalle Valo 
136277b024eSKalle Valo /*
137277b024eSKalle Valo  * This function dispatches all packets in the Rx reorder table until
138277b024eSKalle Valo  * a hole is found.
139277b024eSKalle Valo  *
140277b024eSKalle Valo  * The start window is adjusted automatically when a hole is located.
141277b024eSKalle Valo  * Since the buffer is linear, the function uses rotation to simulate
142277b024eSKalle Valo  * circular buffer.
143277b024eSKalle Valo  */
144277b024eSKalle Valo static void
mwifiex_11n_scan_and_dispatch(struct mwifiex_private * priv,struct mwifiex_rx_reorder_tbl * tbl)145277b024eSKalle Valo mwifiex_11n_scan_and_dispatch(struct mwifiex_private *priv,
146277b024eSKalle Valo 			      struct mwifiex_rx_reorder_tbl *tbl)
147277b024eSKalle Valo {
148ce2e942eSBrian Norris 	struct sk_buff_head list;
149ce2e942eSBrian Norris 	struct sk_buff *skb;
150277b024eSKalle Valo 	int i, j, xchg;
151277b024eSKalle Valo 
152ce2e942eSBrian Norris 	__skb_queue_head_init(&list);
1538a7f9fd8SBrian Norris 	spin_lock_bh(&priv->rx_reorder_tbl_lock);
154ce2e942eSBrian Norris 
155ce2e942eSBrian Norris 	for (i = 0; i < tbl->win_size; ++i) {
156ce2e942eSBrian Norris 		if (!tbl->rx_reorder_ptr[i])
157277b024eSKalle Valo 			break;
158ce2e942eSBrian Norris 		skb = tbl->rx_reorder_ptr[i];
159ce2e942eSBrian Norris 		__skb_queue_tail(&list, skb);
160277b024eSKalle Valo 		tbl->rx_reorder_ptr[i] = NULL;
161277b024eSKalle Valo 	}
162277b024eSKalle Valo 
163277b024eSKalle Valo 	/*
164277b024eSKalle Valo 	 * We don't have a circular buffer, hence use rotation to simulate
165277b024eSKalle Valo 	 * circular buffer
166277b024eSKalle Valo 	 */
167277b024eSKalle Valo 	if (i > 0) {
168277b024eSKalle Valo 		xchg = tbl->win_size - i;
169277b024eSKalle Valo 		for (j = 0; j < xchg; ++j) {
170277b024eSKalle Valo 			tbl->rx_reorder_ptr[j] = tbl->rx_reorder_ptr[i + j];
171277b024eSKalle Valo 			tbl->rx_reorder_ptr[i + j] = NULL;
172277b024eSKalle Valo 		}
173277b024eSKalle Valo 	}
174277b024eSKalle Valo 	tbl->start_win = (tbl->start_win + i) & (MAX_TID_VALUE - 1);
175ce2e942eSBrian Norris 
1768a7f9fd8SBrian Norris 	spin_unlock_bh(&priv->rx_reorder_tbl_lock);
177ce2e942eSBrian Norris 
178ce2e942eSBrian Norris 	while ((skb = __skb_dequeue(&list)))
179ce2e942eSBrian Norris 		mwifiex_11n_dispatch_pkt(priv, skb);
180277b024eSKalle Valo }
181277b024eSKalle Valo 
182277b024eSKalle Valo /*
183277b024eSKalle Valo  * This function deletes the Rx reorder table and frees the memory.
184277b024eSKalle Valo  *
185277b024eSKalle Valo  * The function stops the associated timer and dispatches all the
186277b024eSKalle Valo  * pending packets in the Rx reorder table before deletion.
187277b024eSKalle Valo  */
188277b024eSKalle Valo static void
mwifiex_del_rx_reorder_entry(struct mwifiex_private * priv,struct mwifiex_rx_reorder_tbl * tbl)189277b024eSKalle Valo mwifiex_del_rx_reorder_entry(struct mwifiex_private *priv,
190277b024eSKalle Valo 			     struct mwifiex_rx_reorder_tbl *tbl)
191277b024eSKalle Valo {
192277b024eSKalle Valo 	int start_win;
193277b024eSKalle Valo 
194277b024eSKalle Valo 	if (!tbl)
195277b024eSKalle Valo 		return;
196277b024eSKalle Valo 
1978a7f9fd8SBrian Norris 	spin_lock_bh(&priv->adapter->rx_proc_lock);
198277b024eSKalle Valo 	priv->adapter->rx_locked = true;
199277b024eSKalle Valo 	if (priv->adapter->rx_processing) {
2008a7f9fd8SBrian Norris 		spin_unlock_bh(&priv->adapter->rx_proc_lock);
201277b024eSKalle Valo 		flush_workqueue(priv->adapter->rx_workqueue);
202277b024eSKalle Valo 	} else {
2038a7f9fd8SBrian Norris 		spin_unlock_bh(&priv->adapter->rx_proc_lock);
204277b024eSKalle Valo 	}
205277b024eSKalle Valo 
206277b024eSKalle Valo 	start_win = (tbl->start_win + tbl->win_size) & (MAX_TID_VALUE - 1);
207277b024eSKalle Valo 	mwifiex_11n_dispatch_pkt_until_start_win(priv, tbl, start_win);
208277b024eSKalle Valo 
209277b024eSKalle Valo 	del_timer_sync(&tbl->timer_context.timer);
210277b024eSKalle Valo 	tbl->timer_context.timer_is_set = false;
2111aa48f08SBrian Norris 
2128a7f9fd8SBrian Norris 	spin_lock_bh(&priv->rx_reorder_tbl_lock);
213277b024eSKalle Valo 	list_del(&tbl->list);
2148a7f9fd8SBrian Norris 	spin_unlock_bh(&priv->rx_reorder_tbl_lock);
2151aa48f08SBrian Norris 
216277b024eSKalle Valo 	kfree(tbl->rx_reorder_ptr);
217277b024eSKalle Valo 	kfree(tbl);
218277b024eSKalle Valo 
2198a7f9fd8SBrian Norris 	spin_lock_bh(&priv->adapter->rx_proc_lock);
220277b024eSKalle Valo 	priv->adapter->rx_locked = false;
2218a7f9fd8SBrian Norris 	spin_unlock_bh(&priv->adapter->rx_proc_lock);
222277b024eSKalle Valo 
223277b024eSKalle Valo }
224277b024eSKalle Valo 
225277b024eSKalle Valo /*
226277b024eSKalle Valo  * This function returns the pointer to an entry in Rx reordering
227277b024eSKalle Valo  * table which matches the given TA/TID pair.
228277b024eSKalle Valo  */
229277b024eSKalle Valo struct mwifiex_rx_reorder_tbl *
mwifiex_11n_get_rx_reorder_tbl(struct mwifiex_private * priv,int tid,u8 * ta)230277b024eSKalle Valo mwifiex_11n_get_rx_reorder_tbl(struct mwifiex_private *priv, int tid, u8 *ta)
231277b024eSKalle Valo {
232277b024eSKalle Valo 	struct mwifiex_rx_reorder_tbl *tbl;
233277b024eSKalle Valo 
2348a7f9fd8SBrian Norris 	spin_lock_bh(&priv->rx_reorder_tbl_lock);
2351aa48f08SBrian Norris 	list_for_each_entry(tbl, &priv->rx_reorder_tbl_ptr, list) {
2361aa48f08SBrian Norris 		if (!memcmp(tbl->ta, ta, ETH_ALEN) && tbl->tid == tid) {
2378a7f9fd8SBrian Norris 			spin_unlock_bh(&priv->rx_reorder_tbl_lock);
238277b024eSKalle Valo 			return tbl;
2391aa48f08SBrian Norris 		}
2401aa48f08SBrian Norris 	}
2418a7f9fd8SBrian Norris 	spin_unlock_bh(&priv->rx_reorder_tbl_lock);
242277b024eSKalle Valo 
243277b024eSKalle Valo 	return NULL;
244277b024eSKalle Valo }
245277b024eSKalle Valo 
246277b024eSKalle Valo /* This function retrieves the pointer to an entry in Rx reordering
247277b024eSKalle Valo  * table which matches the given TA and deletes it.
248277b024eSKalle Valo  */
mwifiex_11n_del_rx_reorder_tbl_by_ta(struct mwifiex_private * priv,u8 * ta)249277b024eSKalle Valo void mwifiex_11n_del_rx_reorder_tbl_by_ta(struct mwifiex_private *priv, u8 *ta)
250277b024eSKalle Valo {
251277b024eSKalle Valo 	struct mwifiex_rx_reorder_tbl *tbl, *tmp;
252277b024eSKalle Valo 
253277b024eSKalle Valo 	if (!ta)
254277b024eSKalle Valo 		return;
255277b024eSKalle Valo 
2568a7f9fd8SBrian Norris 	spin_lock_bh(&priv->rx_reorder_tbl_lock);
2571aa48f08SBrian Norris 	list_for_each_entry_safe(tbl, tmp, &priv->rx_reorder_tbl_ptr, list) {
2581aa48f08SBrian Norris 		if (!memcmp(tbl->ta, ta, ETH_ALEN)) {
2598a7f9fd8SBrian Norris 			spin_unlock_bh(&priv->rx_reorder_tbl_lock);
260277b024eSKalle Valo 			mwifiex_del_rx_reorder_entry(priv, tbl);
2618a7f9fd8SBrian Norris 			spin_lock_bh(&priv->rx_reorder_tbl_lock);
2621aa48f08SBrian Norris 		}
2631aa48f08SBrian Norris 	}
2648a7f9fd8SBrian Norris 	spin_unlock_bh(&priv->rx_reorder_tbl_lock);
265277b024eSKalle Valo 
266277b024eSKalle Valo 	return;
267277b024eSKalle Valo }
268277b024eSKalle Valo 
269277b024eSKalle Valo /*
270277b024eSKalle Valo  * This function finds the last sequence number used in the packets
271277b024eSKalle Valo  * buffered in Rx reordering table.
272277b024eSKalle Valo  */
273277b024eSKalle Valo static int
mwifiex_11n_find_last_seq_num(struct reorder_tmr_cnxt * ctx)274277b024eSKalle Valo mwifiex_11n_find_last_seq_num(struct reorder_tmr_cnxt *ctx)
275277b024eSKalle Valo {
276277b024eSKalle Valo 	struct mwifiex_rx_reorder_tbl *rx_reorder_tbl_ptr = ctx->ptr;
2771aa48f08SBrian Norris 	struct mwifiex_private *priv = ctx->priv;
278277b024eSKalle Valo 	int i;
279277b024eSKalle Valo 
2808a7f9fd8SBrian Norris 	spin_lock_bh(&priv->rx_reorder_tbl_lock);
2811aa48f08SBrian Norris 	for (i = rx_reorder_tbl_ptr->win_size - 1; i >= 0; --i) {
2821aa48f08SBrian Norris 		if (rx_reorder_tbl_ptr->rx_reorder_ptr[i]) {
2838a7f9fd8SBrian Norris 			spin_unlock_bh(&priv->rx_reorder_tbl_lock);
284277b024eSKalle Valo 			return i;
2851aa48f08SBrian Norris 		}
2861aa48f08SBrian Norris 	}
2878a7f9fd8SBrian Norris 	spin_unlock_bh(&priv->rx_reorder_tbl_lock);
288277b024eSKalle Valo 
289277b024eSKalle Valo 	return -1;
290277b024eSKalle Valo }
291277b024eSKalle Valo 
292277b024eSKalle Valo /*
293277b024eSKalle Valo  * This function flushes all the packets in Rx reordering table.
294277b024eSKalle Valo  *
295277b024eSKalle Valo  * The function checks if any packets are currently buffered in the
296277b024eSKalle Valo  * table or not. In case there are packets available, it dispatches
297277b024eSKalle Valo  * them and then dumps the Rx reordering table.
298277b024eSKalle Valo  */
299277b024eSKalle Valo static void
mwifiex_flush_data(struct timer_list * t)30008c2eb8eSKees Cook mwifiex_flush_data(struct timer_list *t)
301277b024eSKalle Valo {
302277b024eSKalle Valo 	struct reorder_tmr_cnxt *ctx =
30308c2eb8eSKees Cook 		from_timer(ctx, t, timer);
304277b024eSKalle Valo 	int start_win, seq_num;
305277b024eSKalle Valo 
306277b024eSKalle Valo 	ctx->timer_is_set = false;
307277b024eSKalle Valo 	seq_num = mwifiex_11n_find_last_seq_num(ctx);
308277b024eSKalle Valo 
3091aa48f08SBrian Norris 	if (seq_num < 0)
310277b024eSKalle Valo 		return;
311277b024eSKalle Valo 
312277b024eSKalle Valo 	mwifiex_dbg(ctx->priv->adapter, INFO, "info: flush data %d\n", seq_num);
313277b024eSKalle Valo 	start_win = (ctx->ptr->start_win + seq_num + 1) & (MAX_TID_VALUE - 1);
314277b024eSKalle Valo 	mwifiex_11n_dispatch_pkt_until_start_win(ctx->priv, ctx->ptr,
315277b024eSKalle Valo 						 start_win);
316277b024eSKalle Valo }
317277b024eSKalle Valo 
318277b024eSKalle Valo /*
319277b024eSKalle Valo  * This function creates an entry in Rx reordering table for the
320277b024eSKalle Valo  * given TA/TID.
321277b024eSKalle Valo  *
322277b024eSKalle Valo  * The function also initializes the entry with sequence number, window
323277b024eSKalle Valo  * size as well as initializes the timer.
324277b024eSKalle Valo  *
325277b024eSKalle Valo  * If the received TA/TID pair is already present, all the packets are
326277b024eSKalle Valo  * dispatched and the window size is moved until the SSN.
327277b024eSKalle Valo  */
328277b024eSKalle Valo static void
mwifiex_11n_create_rx_reorder_tbl(struct mwifiex_private * priv,u8 * ta,int tid,int win_size,int seq_num)329277b024eSKalle Valo mwifiex_11n_create_rx_reorder_tbl(struct mwifiex_private *priv, u8 *ta,
330277b024eSKalle Valo 				  int tid, int win_size, int seq_num)
331277b024eSKalle Valo {
332277b024eSKalle Valo 	int i;
333277b024eSKalle Valo 	struct mwifiex_rx_reorder_tbl *tbl, *new_node;
334277b024eSKalle Valo 	u16 last_seq = 0;
335277b024eSKalle Valo 	struct mwifiex_sta_node *node;
336277b024eSKalle Valo 
337277b024eSKalle Valo 	/*
338ed03a2afSJason Wang 	 * If we get a TID, ta pair which is already present dispatch all
339277b024eSKalle Valo 	 * the packets and move the window size until the ssn
340277b024eSKalle Valo 	 */
341277b024eSKalle Valo 	tbl = mwifiex_11n_get_rx_reorder_tbl(priv, tid, ta);
342277b024eSKalle Valo 	if (tbl) {
343277b024eSKalle Valo 		mwifiex_11n_dispatch_pkt_until_start_win(priv, tbl, seq_num);
344277b024eSKalle Valo 		return;
345277b024eSKalle Valo 	}
346277b024eSKalle Valo 	/* if !tbl then create one */
347277b024eSKalle Valo 	new_node = kzalloc(sizeof(struct mwifiex_rx_reorder_tbl), GFP_KERNEL);
348277b024eSKalle Valo 	if (!new_node)
349277b024eSKalle Valo 		return;
350277b024eSKalle Valo 
351277b024eSKalle Valo 	INIT_LIST_HEAD(&new_node->list);
352277b024eSKalle Valo 	new_node->tid = tid;
353277b024eSKalle Valo 	memcpy(new_node->ta, ta, ETH_ALEN);
354277b024eSKalle Valo 	new_node->start_win = seq_num;
355277b024eSKalle Valo 	new_node->init_win = seq_num;
356277b024eSKalle Valo 	new_node->flags = 0;
357277b024eSKalle Valo 
3588a7f9fd8SBrian Norris 	spin_lock_bh(&priv->sta_list_spinlock);
359277b024eSKalle Valo 	if (mwifiex_queuing_ra_based(priv)) {
360277b024eSKalle Valo 		if (priv->bss_role == MWIFIEX_BSS_ROLE_UAP) {
361277b024eSKalle Valo 			node = mwifiex_get_sta_entry(priv, ta);
362277b024eSKalle Valo 			if (node)
363277b024eSKalle Valo 				last_seq = node->rx_seq[tid];
364277b024eSKalle Valo 		}
365277b024eSKalle Valo 	} else {
366277b024eSKalle Valo 		node = mwifiex_get_sta_entry(priv, ta);
367277b024eSKalle Valo 		if (node)
368277b024eSKalle Valo 			last_seq = node->rx_seq[tid];
369277b024eSKalle Valo 		else
370277b024eSKalle Valo 			last_seq = priv->rx_seq[tid];
371277b024eSKalle Valo 	}
3728a7f9fd8SBrian Norris 	spin_unlock_bh(&priv->sta_list_spinlock);
373277b024eSKalle Valo 
374277b024eSKalle Valo 	mwifiex_dbg(priv->adapter, INFO,
375277b024eSKalle Valo 		    "info: last_seq=%d start_win=%d\n",
376277b024eSKalle Valo 		    last_seq, new_node->start_win);
377277b024eSKalle Valo 
378277b024eSKalle Valo 	if (last_seq != MWIFIEX_DEF_11N_RX_SEQ_NUM &&
379277b024eSKalle Valo 	    last_seq >= new_node->start_win) {
380277b024eSKalle Valo 		new_node->start_win = last_seq + 1;
381277b024eSKalle Valo 		new_node->flags |= RXREOR_INIT_WINDOW_SHIFT;
382277b024eSKalle Valo 	}
383277b024eSKalle Valo 
384277b024eSKalle Valo 	new_node->win_size = win_size;
385277b024eSKalle Valo 
3866396bb22SKees Cook 	new_node->rx_reorder_ptr = kcalloc(win_size, sizeof(void *),
387277b024eSKalle Valo 					   GFP_KERNEL);
388277b024eSKalle Valo 	if (!new_node->rx_reorder_ptr) {
38961494648SXu Wang 		kfree(new_node);
390277b024eSKalle Valo 		mwifiex_dbg(priv->adapter, ERROR,
391277b024eSKalle Valo 			    "%s: failed to alloc reorder_ptr\n", __func__);
392277b024eSKalle Valo 		return;
393277b024eSKalle Valo 	}
394277b024eSKalle Valo 
395277b024eSKalle Valo 	new_node->timer_context.ptr = new_node;
396277b024eSKalle Valo 	new_node->timer_context.priv = priv;
397277b024eSKalle Valo 	new_node->timer_context.timer_is_set = false;
398277b024eSKalle Valo 
39908c2eb8eSKees Cook 	timer_setup(&new_node->timer_context.timer, mwifiex_flush_data, 0);
400277b024eSKalle Valo 
401277b024eSKalle Valo 	for (i = 0; i < win_size; ++i)
402277b024eSKalle Valo 		new_node->rx_reorder_ptr[i] = NULL;
403277b024eSKalle Valo 
4048a7f9fd8SBrian Norris 	spin_lock_bh(&priv->rx_reorder_tbl_lock);
405277b024eSKalle Valo 	list_add_tail(&new_node->list, &priv->rx_reorder_tbl_ptr);
4068a7f9fd8SBrian Norris 	spin_unlock_bh(&priv->rx_reorder_tbl_lock);
407277b024eSKalle Valo }
408277b024eSKalle Valo 
409277b024eSKalle Valo static void
mwifiex_11n_rxreorder_timer_restart(struct mwifiex_rx_reorder_tbl * tbl)410277b024eSKalle Valo mwifiex_11n_rxreorder_timer_restart(struct mwifiex_rx_reorder_tbl *tbl)
411277b024eSKalle Valo {
412277b024eSKalle Valo 	u32 min_flush_time;
413277b024eSKalle Valo 
414277b024eSKalle Valo 	if (tbl->win_size >= MWIFIEX_BA_WIN_SIZE_32)
415277b024eSKalle Valo 		min_flush_time = MIN_FLUSH_TIMER_15_MS;
416277b024eSKalle Valo 	else
417277b024eSKalle Valo 		min_flush_time = MIN_FLUSH_TIMER_MS;
418277b024eSKalle Valo 
419277b024eSKalle Valo 	mod_timer(&tbl->timer_context.timer,
420277b024eSKalle Valo 		  jiffies + msecs_to_jiffies(min_flush_time * tbl->win_size));
421277b024eSKalle Valo 
422277b024eSKalle Valo 	tbl->timer_context.timer_is_set = true;
423277b024eSKalle Valo }
424277b024eSKalle Valo 
425277b024eSKalle Valo /*
426277b024eSKalle Valo  * This function prepares command for adding a BA request.
427277b024eSKalle Valo  *
428277b024eSKalle Valo  * Preparation includes -
429277b024eSKalle Valo  *      - Setting command ID and proper size
430277b024eSKalle Valo  *      - Setting add BA request buffer
431277b024eSKalle Valo  *      - Ensuring correct endian-ness
432277b024eSKalle Valo  */
mwifiex_cmd_11n_addba_req(struct host_cmd_ds_command * cmd,void * data_buf)433277b024eSKalle Valo int mwifiex_cmd_11n_addba_req(struct host_cmd_ds_command *cmd, void *data_buf)
434277b024eSKalle Valo {
435277b024eSKalle Valo 	struct host_cmd_ds_11n_addba_req *add_ba_req = &cmd->params.add_ba_req;
436277b024eSKalle Valo 
437277b024eSKalle Valo 	cmd->command = cpu_to_le16(HostCmd_CMD_11N_ADDBA_REQ);
438277b024eSKalle Valo 	cmd->size = cpu_to_le16(sizeof(*add_ba_req) + S_DS_GEN);
439277b024eSKalle Valo 	memcpy(add_ba_req, data_buf, sizeof(*add_ba_req));
440277b024eSKalle Valo 
441277b024eSKalle Valo 	return 0;
442277b024eSKalle Valo }
443277b024eSKalle Valo 
444277b024eSKalle Valo /*
445277b024eSKalle Valo  * This function prepares command for adding a BA response.
446277b024eSKalle Valo  *
447277b024eSKalle Valo  * Preparation includes -
448277b024eSKalle Valo  *      - Setting command ID and proper size
449277b024eSKalle Valo  *      - Setting add BA response buffer
450277b024eSKalle Valo  *      - Ensuring correct endian-ness
451277b024eSKalle Valo  */
mwifiex_cmd_11n_addba_rsp_gen(struct mwifiex_private * priv,struct host_cmd_ds_command * cmd,struct host_cmd_ds_11n_addba_req * cmd_addba_req)452277b024eSKalle Valo int mwifiex_cmd_11n_addba_rsp_gen(struct mwifiex_private *priv,
453277b024eSKalle Valo 				  struct host_cmd_ds_command *cmd,
454277b024eSKalle Valo 				  struct host_cmd_ds_11n_addba_req
455277b024eSKalle Valo 				  *cmd_addba_req)
456277b024eSKalle Valo {
457277b024eSKalle Valo 	struct host_cmd_ds_11n_addba_rsp *add_ba_rsp = &cmd->params.add_ba_rsp;
458277b024eSKalle Valo 	struct mwifiex_sta_node *sta_ptr;
459277b024eSKalle Valo 	u32 rx_win_size = priv->add_ba_param.rx_win_size;
460277b024eSKalle Valo 	u8 tid;
461277b024eSKalle Valo 	int win_size;
462277b024eSKalle Valo 	uint16_t block_ack_param_set;
463277b024eSKalle Valo 
464277b024eSKalle Valo 	if ((GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_STA) &&
465277b024eSKalle Valo 	    ISSUPP_TDLS_ENABLED(priv->adapter->fw_cap_info) &&
466277b024eSKalle Valo 	    priv->adapter->is_hw_11ac_capable &&
467277b024eSKalle Valo 	    memcmp(priv->cfg_bssid, cmd_addba_req->peer_mac_addr, ETH_ALEN)) {
4688a7f9fd8SBrian Norris 		spin_lock_bh(&priv->sta_list_spinlock);
469277b024eSKalle Valo 		sta_ptr = mwifiex_get_sta_entry(priv,
470277b024eSKalle Valo 						cmd_addba_req->peer_mac_addr);
471277b024eSKalle Valo 		if (!sta_ptr) {
4728a7f9fd8SBrian Norris 			spin_unlock_bh(&priv->sta_list_spinlock);
473277b024eSKalle Valo 			mwifiex_dbg(priv->adapter, ERROR,
474277b024eSKalle Valo 				    "BA setup with unknown TDLS peer %pM!\n",
475277b024eSKalle Valo 				    cmd_addba_req->peer_mac_addr);
476277b024eSKalle Valo 			return -1;
477277b024eSKalle Valo 		}
478277b024eSKalle Valo 		if (sta_ptr->is_11ac_enabled)
479277b024eSKalle Valo 			rx_win_size = MWIFIEX_11AC_STA_AMPDU_DEF_RXWINSIZE;
4808a7f9fd8SBrian Norris 		spin_unlock_bh(&priv->sta_list_spinlock);
481277b024eSKalle Valo 	}
482277b024eSKalle Valo 
483277b024eSKalle Valo 	cmd->command = cpu_to_le16(HostCmd_CMD_11N_ADDBA_RSP);
484277b024eSKalle Valo 	cmd->size = cpu_to_le16(sizeof(*add_ba_rsp) + S_DS_GEN);
485277b024eSKalle Valo 
486277b024eSKalle Valo 	memcpy(add_ba_rsp->peer_mac_addr, cmd_addba_req->peer_mac_addr,
487277b024eSKalle Valo 	       ETH_ALEN);
488277b024eSKalle Valo 	add_ba_rsp->dialog_token = cmd_addba_req->dialog_token;
489277b024eSKalle Valo 	add_ba_rsp->block_ack_tmo = cmd_addba_req->block_ack_tmo;
490277b024eSKalle Valo 	add_ba_rsp->ssn = cmd_addba_req->ssn;
491277b024eSKalle Valo 
492277b024eSKalle Valo 	block_ack_param_set = le16_to_cpu(cmd_addba_req->block_ack_param_set);
493277b024eSKalle Valo 	tid = (block_ack_param_set & IEEE80211_ADDBA_PARAM_TID_MASK)
494277b024eSKalle Valo 		>> BLOCKACKPARAM_TID_POS;
495277b024eSKalle Valo 	add_ba_rsp->status_code = cpu_to_le16(ADDBA_RSP_STATUS_ACCEPT);
496277b024eSKalle Valo 	block_ack_param_set &= ~IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK;
497277b024eSKalle Valo 
498277b024eSKalle Valo 	/* If we don't support AMSDU inside AMPDU, reset the bit */
499277b024eSKalle Valo 	if (!priv->add_ba_param.rx_amsdu ||
500277b024eSKalle Valo 	    (priv->aggr_prio_tbl[tid].amsdu == BA_STREAM_NOT_ALLOWED))
501277b024eSKalle Valo 		block_ack_param_set &= ~BLOCKACKPARAM_AMSDU_SUPP_MASK;
502277b024eSKalle Valo 	block_ack_param_set |= rx_win_size << BLOCKACKPARAM_WINSIZE_POS;
503277b024eSKalle Valo 	add_ba_rsp->block_ack_param_set = cpu_to_le16(block_ack_param_set);
504277b024eSKalle Valo 	win_size = (le16_to_cpu(add_ba_rsp->block_ack_param_set)
505277b024eSKalle Valo 					& IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK)
506277b024eSKalle Valo 					>> BLOCKACKPARAM_WINSIZE_POS;
507277b024eSKalle Valo 	cmd_addba_req->block_ack_param_set = cpu_to_le16(block_ack_param_set);
508277b024eSKalle Valo 
509277b024eSKalle Valo 	mwifiex_11n_create_rx_reorder_tbl(priv, cmd_addba_req->peer_mac_addr,
510277b024eSKalle Valo 					  tid, win_size,
511277b024eSKalle Valo 					  le16_to_cpu(cmd_addba_req->ssn));
512277b024eSKalle Valo 	return 0;
513277b024eSKalle Valo }
514277b024eSKalle Valo 
515277b024eSKalle Valo /*
516277b024eSKalle Valo  * This function prepares command for deleting a BA request.
517277b024eSKalle Valo  *
518277b024eSKalle Valo  * Preparation includes -
519277b024eSKalle Valo  *      - Setting command ID and proper size
520277b024eSKalle Valo  *      - Setting del BA request buffer
521277b024eSKalle Valo  *      - Ensuring correct endian-ness
522277b024eSKalle Valo  */
mwifiex_cmd_11n_delba(struct host_cmd_ds_command * cmd,void * data_buf)523277b024eSKalle Valo int mwifiex_cmd_11n_delba(struct host_cmd_ds_command *cmd, void *data_buf)
524277b024eSKalle Valo {
525277b024eSKalle Valo 	struct host_cmd_ds_11n_delba *del_ba = &cmd->params.del_ba;
526277b024eSKalle Valo 
527277b024eSKalle Valo 	cmd->command = cpu_to_le16(HostCmd_CMD_11N_DELBA);
528277b024eSKalle Valo 	cmd->size = cpu_to_le16(sizeof(*del_ba) + S_DS_GEN);
529277b024eSKalle Valo 	memcpy(del_ba, data_buf, sizeof(*del_ba));
530277b024eSKalle Valo 
531277b024eSKalle Valo 	return 0;
532277b024eSKalle Valo }
533277b024eSKalle Valo 
534277b024eSKalle Valo /*
535277b024eSKalle Valo  * This function identifies if Rx reordering is needed for a received packet.
536277b024eSKalle Valo  *
537277b024eSKalle Valo  * In case reordering is required, the function will do the reordering
538277b024eSKalle Valo  * before sending it to kernel.
539277b024eSKalle Valo  *
540277b024eSKalle Valo  * The Rx reorder table is checked first with the received TID/TA pair. If
541277b024eSKalle Valo  * not found, the received packet is dispatched immediately. But if found,
542277b024eSKalle Valo  * the packet is reordered and all the packets in the updated Rx reordering
543277b024eSKalle Valo  * table is dispatched until a hole is found.
544277b024eSKalle Valo  *
545277b024eSKalle Valo  * For sequence number less than the starting window, the packet is dropped.
546277b024eSKalle Valo  */
mwifiex_11n_rx_reorder_pkt(struct mwifiex_private * priv,u16 seq_num,u16 tid,u8 * ta,u8 pkt_type,void * payload)547277b024eSKalle Valo int mwifiex_11n_rx_reorder_pkt(struct mwifiex_private *priv,
548277b024eSKalle Valo 				u16 seq_num, u16 tid,
549277b024eSKalle Valo 				u8 *ta, u8 pkt_type, void *payload)
550277b024eSKalle Valo {
551277b024eSKalle Valo 	struct mwifiex_rx_reorder_tbl *tbl;
552277b024eSKalle Valo 	int prev_start_win, start_win, end_win, win_size;
553277b024eSKalle Valo 	u16 pkt_index;
554277b024eSKalle Valo 	bool init_window_shift = false;
555277b024eSKalle Valo 	int ret = 0;
556277b024eSKalle Valo 
557277b024eSKalle Valo 	tbl = mwifiex_11n_get_rx_reorder_tbl(priv, tid, ta);
558277b024eSKalle Valo 	if (!tbl) {
559277b024eSKalle Valo 		if (pkt_type != PKT_TYPE_BAR)
560277b024eSKalle Valo 			mwifiex_11n_dispatch_pkt(priv, payload);
561277b024eSKalle Valo 		return ret;
562277b024eSKalle Valo 	}
563277b024eSKalle Valo 
564277b024eSKalle Valo 	if ((pkt_type == PKT_TYPE_AMSDU) && !tbl->amsdu) {
565277b024eSKalle Valo 		mwifiex_11n_dispatch_pkt(priv, payload);
566277b024eSKalle Valo 		return ret;
567277b024eSKalle Valo 	}
568277b024eSKalle Valo 
569277b024eSKalle Valo 	start_win = tbl->start_win;
570277b024eSKalle Valo 	prev_start_win = start_win;
571277b024eSKalle Valo 	win_size = tbl->win_size;
572277b024eSKalle Valo 	end_win = ((start_win + win_size) - 1) & (MAX_TID_VALUE - 1);
573277b024eSKalle Valo 	if (tbl->flags & RXREOR_INIT_WINDOW_SHIFT) {
574277b024eSKalle Valo 		init_window_shift = true;
575277b024eSKalle Valo 		tbl->flags &= ~RXREOR_INIT_WINDOW_SHIFT;
576277b024eSKalle Valo 	}
577277b024eSKalle Valo 
578277b024eSKalle Valo 	if (tbl->flags & RXREOR_FORCE_NO_DROP) {
579277b024eSKalle Valo 		mwifiex_dbg(priv->adapter, INFO,
580277b024eSKalle Valo 			    "RXREOR_FORCE_NO_DROP when HS is activated\n");
581277b024eSKalle Valo 		tbl->flags &= ~RXREOR_FORCE_NO_DROP;
582277b024eSKalle Valo 	} else if (init_window_shift && seq_num < start_win &&
583277b024eSKalle Valo 		   seq_num >= tbl->init_win) {
584277b024eSKalle Valo 		mwifiex_dbg(priv->adapter, INFO,
585277b024eSKalle Valo 			    "Sender TID sequence number reset %d->%d for SSN %d\n",
586277b024eSKalle Valo 			    start_win, seq_num, tbl->init_win);
587277b024eSKalle Valo 		tbl->start_win = start_win = seq_num;
588277b024eSKalle Valo 		end_win = ((start_win + win_size) - 1) & (MAX_TID_VALUE - 1);
589277b024eSKalle Valo 	} else {
590277b024eSKalle Valo 		/*
591277b024eSKalle Valo 		 * If seq_num is less then starting win then ignore and drop
592277b024eSKalle Valo 		 * the packet
593277b024eSKalle Valo 		 */
594277b024eSKalle Valo 		if ((start_win + TWOPOW11) > (MAX_TID_VALUE - 1)) {
595277b024eSKalle Valo 			if (seq_num >= ((start_win + TWOPOW11) &
596277b024eSKalle Valo 					(MAX_TID_VALUE - 1)) &&
597277b024eSKalle Valo 			    seq_num < start_win) {
598277b024eSKalle Valo 				ret = -1;
599277b024eSKalle Valo 				goto done;
600277b024eSKalle Valo 			}
601277b024eSKalle Valo 		} else if ((seq_num < start_win) ||
602277b024eSKalle Valo 			   (seq_num >= (start_win + TWOPOW11))) {
603277b024eSKalle Valo 			ret = -1;
604277b024eSKalle Valo 			goto done;
605277b024eSKalle Valo 		}
606277b024eSKalle Valo 	}
607277b024eSKalle Valo 
608277b024eSKalle Valo 	/*
609277b024eSKalle Valo 	 * If this packet is a BAR we adjust seq_num as
610277b024eSKalle Valo 	 * WinStart = seq_num
611277b024eSKalle Valo 	 */
612277b024eSKalle Valo 	if (pkt_type == PKT_TYPE_BAR)
613277b024eSKalle Valo 		seq_num = ((seq_num + win_size) - 1) & (MAX_TID_VALUE - 1);
614277b024eSKalle Valo 
615277b024eSKalle Valo 	if (((end_win < start_win) &&
616277b024eSKalle Valo 	     (seq_num < start_win) && (seq_num > end_win)) ||
617277b024eSKalle Valo 	    ((end_win > start_win) && ((seq_num > end_win) ||
618277b024eSKalle Valo 				       (seq_num < start_win)))) {
619277b024eSKalle Valo 		end_win = seq_num;
620277b024eSKalle Valo 		if (((end_win - win_size) + 1) >= 0)
621277b024eSKalle Valo 			start_win = (end_win - win_size) + 1;
622277b024eSKalle Valo 		else
623277b024eSKalle Valo 			start_win = (MAX_TID_VALUE - (win_size - end_win)) + 1;
624277b024eSKalle Valo 		mwifiex_11n_dispatch_pkt_until_start_win(priv, tbl, start_win);
625277b024eSKalle Valo 	}
626277b024eSKalle Valo 
627277b024eSKalle Valo 	if (pkt_type != PKT_TYPE_BAR) {
628277b024eSKalle Valo 		if (seq_num >= start_win)
629277b024eSKalle Valo 			pkt_index = seq_num - start_win;
630277b024eSKalle Valo 		else
631277b024eSKalle Valo 			pkt_index = (seq_num+MAX_TID_VALUE) - start_win;
632277b024eSKalle Valo 
633277b024eSKalle Valo 		if (tbl->rx_reorder_ptr[pkt_index]) {
634277b024eSKalle Valo 			ret = -1;
635277b024eSKalle Valo 			goto done;
636277b024eSKalle Valo 		}
637277b024eSKalle Valo 
638277b024eSKalle Valo 		tbl->rx_reorder_ptr[pkt_index] = payload;
639277b024eSKalle Valo 	}
640277b024eSKalle Valo 
641277b024eSKalle Valo 	/*
642277b024eSKalle Valo 	 * Dispatch all packets sequentially from start_win until a
643277b024eSKalle Valo 	 * hole is found and adjust the start_win appropriately
644277b024eSKalle Valo 	 */
645277b024eSKalle Valo 	mwifiex_11n_scan_and_dispatch(priv, tbl);
646277b024eSKalle Valo 
647277b024eSKalle Valo done:
648277b024eSKalle Valo 	if (!tbl->timer_context.timer_is_set ||
649277b024eSKalle Valo 	    prev_start_win != tbl->start_win)
650277b024eSKalle Valo 		mwifiex_11n_rxreorder_timer_restart(tbl);
651277b024eSKalle Valo 	return ret;
652277b024eSKalle Valo }
653277b024eSKalle Valo 
654277b024eSKalle Valo /*
655277b024eSKalle Valo  * This function deletes an entry for a given TID/TA pair.
656277b024eSKalle Valo  *
657277b024eSKalle Valo  * The TID/TA are taken from del BA event body.
658277b024eSKalle Valo  */
659277b024eSKalle Valo void
mwifiex_del_ba_tbl(struct mwifiex_private * priv,int tid,u8 * peer_mac,u8 type,int initiator)660277b024eSKalle Valo mwifiex_del_ba_tbl(struct mwifiex_private *priv, int tid, u8 *peer_mac,
661277b024eSKalle Valo 		   u8 type, int initiator)
662277b024eSKalle Valo {
663277b024eSKalle Valo 	struct mwifiex_rx_reorder_tbl *tbl;
664277b024eSKalle Valo 	struct mwifiex_tx_ba_stream_tbl *ptx_tbl;
665277b024eSKalle Valo 	struct mwifiex_ra_list_tbl *ra_list;
666277b024eSKalle Valo 	u8 cleanup_rx_reorder_tbl;
667277b024eSKalle Valo 	int tid_down;
668277b024eSKalle Valo 
669277b024eSKalle Valo 	if (type == TYPE_DELBA_RECEIVE)
670277b024eSKalle Valo 		cleanup_rx_reorder_tbl = (initiator) ? true : false;
671277b024eSKalle Valo 	else
672277b024eSKalle Valo 		cleanup_rx_reorder_tbl = (initiator) ? false : true;
673277b024eSKalle Valo 
674277b024eSKalle Valo 	mwifiex_dbg(priv->adapter, EVENT, "event: DELBA: %pM tid=%d initiator=%d\n",
675277b024eSKalle Valo 		    peer_mac, tid, initiator);
676277b024eSKalle Valo 
677277b024eSKalle Valo 	if (cleanup_rx_reorder_tbl) {
678277b024eSKalle Valo 		tbl = mwifiex_11n_get_rx_reorder_tbl(priv, tid,
679277b024eSKalle Valo 								 peer_mac);
680277b024eSKalle Valo 		if (!tbl) {
681277b024eSKalle Valo 			mwifiex_dbg(priv->adapter, EVENT,
682277b024eSKalle Valo 				    "event: TID, TA not found in table\n");
683277b024eSKalle Valo 			return;
684277b024eSKalle Valo 		}
685277b024eSKalle Valo 		mwifiex_del_rx_reorder_entry(priv, tbl);
686277b024eSKalle Valo 	} else {
687277b024eSKalle Valo 		ptx_tbl = mwifiex_get_ba_tbl(priv, tid, peer_mac);
688277b024eSKalle Valo 		if (!ptx_tbl) {
689277b024eSKalle Valo 			mwifiex_dbg(priv->adapter, EVENT,
690277b024eSKalle Valo 				    "event: TID, RA not found in table\n");
691277b024eSKalle Valo 			return;
692277b024eSKalle Valo 		}
693277b024eSKalle Valo 
694277b024eSKalle Valo 		tid_down = mwifiex_wmm_downgrade_tid(priv, tid);
695277b024eSKalle Valo 		ra_list = mwifiex_wmm_get_ralist_node(priv, tid_down, peer_mac);
696277b024eSKalle Valo 		if (ra_list) {
697277b024eSKalle Valo 			ra_list->amsdu_in_ampdu = false;
698277b024eSKalle Valo 			ra_list->ba_status = BA_SETUP_NONE;
699277b024eSKalle Valo 		}
7008a7f9fd8SBrian Norris 		spin_lock_bh(&priv->tx_ba_stream_tbl_lock);
701277b024eSKalle Valo 		mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, ptx_tbl);
7028a7f9fd8SBrian Norris 		spin_unlock_bh(&priv->tx_ba_stream_tbl_lock);
703277b024eSKalle Valo 	}
704277b024eSKalle Valo }
705277b024eSKalle Valo 
706277b024eSKalle Valo /*
707277b024eSKalle Valo  * This function handles the command response of an add BA response.
708277b024eSKalle Valo  *
709277b024eSKalle Valo  * Handling includes changing the header fields into CPU format and
710277b024eSKalle Valo  * creating the stream, provided the add BA is accepted.
711277b024eSKalle Valo  */
mwifiex_ret_11n_addba_resp(struct mwifiex_private * priv,struct host_cmd_ds_command * resp)712277b024eSKalle Valo int mwifiex_ret_11n_addba_resp(struct mwifiex_private *priv,
713277b024eSKalle Valo 			       struct host_cmd_ds_command *resp)
714277b024eSKalle Valo {
715277b024eSKalle Valo 	struct host_cmd_ds_11n_addba_rsp *add_ba_rsp = &resp->params.add_ba_rsp;
716277b024eSKalle Valo 	int tid, win_size;
717277b024eSKalle Valo 	struct mwifiex_rx_reorder_tbl *tbl;
718277b024eSKalle Valo 	uint16_t block_ack_param_set;
719277b024eSKalle Valo 
720277b024eSKalle Valo 	block_ack_param_set = le16_to_cpu(add_ba_rsp->block_ack_param_set);
721277b024eSKalle Valo 
722277b024eSKalle Valo 	tid = (block_ack_param_set & IEEE80211_ADDBA_PARAM_TID_MASK)
723277b024eSKalle Valo 		>> BLOCKACKPARAM_TID_POS;
724277b024eSKalle Valo 	/*
725277b024eSKalle Valo 	 * Check if we had rejected the ADDBA, if yes then do not create
726277b024eSKalle Valo 	 * the stream
727277b024eSKalle Valo 	 */
728277b024eSKalle Valo 	if (le16_to_cpu(add_ba_rsp->status_code) != BA_RESULT_SUCCESS) {
729277b024eSKalle Valo 		mwifiex_dbg(priv->adapter, ERROR, "ADDBA RSP: failed %pM tid=%d)\n",
730277b024eSKalle Valo 			    add_ba_rsp->peer_mac_addr, tid);
731277b024eSKalle Valo 
732277b024eSKalle Valo 		tbl = mwifiex_11n_get_rx_reorder_tbl(priv, tid,
733277b024eSKalle Valo 						     add_ba_rsp->peer_mac_addr);
734277b024eSKalle Valo 		if (tbl)
735277b024eSKalle Valo 			mwifiex_del_rx_reorder_entry(priv, tbl);
736277b024eSKalle Valo 
737277b024eSKalle Valo 		return 0;
738277b024eSKalle Valo 	}
739277b024eSKalle Valo 
740277b024eSKalle Valo 	win_size = (block_ack_param_set & IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK)
741277b024eSKalle Valo 		    >> BLOCKACKPARAM_WINSIZE_POS;
742277b024eSKalle Valo 
743277b024eSKalle Valo 	tbl = mwifiex_11n_get_rx_reorder_tbl(priv, tid,
744277b024eSKalle Valo 					     add_ba_rsp->peer_mac_addr);
745277b024eSKalle Valo 	if (tbl) {
746277b024eSKalle Valo 		if ((block_ack_param_set & BLOCKACKPARAM_AMSDU_SUPP_MASK) &&
747277b024eSKalle Valo 		    priv->add_ba_param.rx_amsdu &&
748277b024eSKalle Valo 		    (priv->aggr_prio_tbl[tid].amsdu != BA_STREAM_NOT_ALLOWED))
749277b024eSKalle Valo 			tbl->amsdu = true;
750277b024eSKalle Valo 		else
751277b024eSKalle Valo 			tbl->amsdu = false;
752277b024eSKalle Valo 	}
753277b024eSKalle Valo 
754277b024eSKalle Valo 	mwifiex_dbg(priv->adapter, CMD,
755277b024eSKalle Valo 		    "cmd: ADDBA RSP: %pM tid=%d ssn=%d win_size=%d\n",
756277b024eSKalle Valo 		add_ba_rsp->peer_mac_addr, tid, add_ba_rsp->ssn, win_size);
757277b024eSKalle Valo 
758277b024eSKalle Valo 	return 0;
759277b024eSKalle Valo }
760277b024eSKalle Valo 
761277b024eSKalle Valo /*
762277b024eSKalle Valo  * This function handles BA stream timeout event by preparing and sending
763277b024eSKalle Valo  * a command to the firmware.
764277b024eSKalle Valo  */
mwifiex_11n_ba_stream_timeout(struct mwifiex_private * priv,struct host_cmd_ds_11n_batimeout * event)765277b024eSKalle Valo void mwifiex_11n_ba_stream_timeout(struct mwifiex_private *priv,
766277b024eSKalle Valo 				   struct host_cmd_ds_11n_batimeout *event)
767277b024eSKalle Valo {
768277b024eSKalle Valo 	struct host_cmd_ds_11n_delba delba;
769277b024eSKalle Valo 
770277b024eSKalle Valo 	memset(&delba, 0, sizeof(struct host_cmd_ds_11n_delba));
771277b024eSKalle Valo 	memcpy(delba.peer_mac_addr, event->peer_mac_addr, ETH_ALEN);
772277b024eSKalle Valo 
773277b024eSKalle Valo 	delba.del_ba_param_set |=
774277b024eSKalle Valo 		cpu_to_le16((u16) event->tid << DELBA_TID_POS);
775277b024eSKalle Valo 	delba.del_ba_param_set |= cpu_to_le16(
776277b024eSKalle Valo 		(u16) event->origninator << DELBA_INITIATOR_POS);
777277b024eSKalle Valo 	delba.reason_code = cpu_to_le16(WLAN_REASON_QSTA_TIMEOUT);
778277b024eSKalle Valo 	mwifiex_send_cmd(priv, HostCmd_CMD_11N_DELBA, 0, 0, &delba, false);
779277b024eSKalle Valo }
780277b024eSKalle Valo 
781277b024eSKalle Valo /*
782277b024eSKalle Valo  * This function cleans up the Rx reorder table by deleting all the entries
783277b024eSKalle Valo  * and re-initializing.
784277b024eSKalle Valo  */
mwifiex_11n_cleanup_reorder_tbl(struct mwifiex_private * priv)785277b024eSKalle Valo void mwifiex_11n_cleanup_reorder_tbl(struct mwifiex_private *priv)
786277b024eSKalle Valo {
787277b024eSKalle Valo 	struct mwifiex_rx_reorder_tbl *del_tbl_ptr, *tmp_node;
788277b024eSKalle Valo 
7898a7f9fd8SBrian Norris 	spin_lock_bh(&priv->rx_reorder_tbl_lock);
790277b024eSKalle Valo 	list_for_each_entry_safe(del_tbl_ptr, tmp_node,
7911aa48f08SBrian Norris 				 &priv->rx_reorder_tbl_ptr, list) {
7928a7f9fd8SBrian Norris 		spin_unlock_bh(&priv->rx_reorder_tbl_lock);
793277b024eSKalle Valo 		mwifiex_del_rx_reorder_entry(priv, del_tbl_ptr);
7948a7f9fd8SBrian Norris 		spin_lock_bh(&priv->rx_reorder_tbl_lock);
7951aa48f08SBrian Norris 	}
796277b024eSKalle Valo 	INIT_LIST_HEAD(&priv->rx_reorder_tbl_ptr);
7978a7f9fd8SBrian Norris 	spin_unlock_bh(&priv->rx_reorder_tbl_lock);
798277b024eSKalle Valo 
799277b024eSKalle Valo 	mwifiex_reset_11n_rx_seq_num(priv);
800277b024eSKalle Valo }
801277b024eSKalle Valo 
802277b024eSKalle Valo /*
803277b024eSKalle Valo  * This function updates all rx_reorder_tbl's flags.
804277b024eSKalle Valo  */
mwifiex_update_rxreor_flags(struct mwifiex_adapter * adapter,u8 flags)805277b024eSKalle Valo void mwifiex_update_rxreor_flags(struct mwifiex_adapter *adapter, u8 flags)
806277b024eSKalle Valo {
807277b024eSKalle Valo 	struct mwifiex_private *priv;
808277b024eSKalle Valo 	struct mwifiex_rx_reorder_tbl *tbl;
809277b024eSKalle Valo 	int i;
810277b024eSKalle Valo 
811277b024eSKalle Valo 	for (i = 0; i < adapter->priv_num; i++) {
812277b024eSKalle Valo 		priv = adapter->priv[i];
813277b024eSKalle Valo 		if (!priv)
814277b024eSKalle Valo 			continue;
815277b024eSKalle Valo 
8168a7f9fd8SBrian Norris 		spin_lock_bh(&priv->rx_reorder_tbl_lock);
817277b024eSKalle Valo 		list_for_each_entry(tbl, &priv->rx_reorder_tbl_ptr, list)
818277b024eSKalle Valo 			tbl->flags = flags;
8198a7f9fd8SBrian Norris 		spin_unlock_bh(&priv->rx_reorder_tbl_lock);
820277b024eSKalle Valo 	}
821277b024eSKalle Valo 
822277b024eSKalle Valo 	return;
823277b024eSKalle Valo }
824277b024eSKalle Valo 
825277b024eSKalle Valo /* This function update all the rx_win_size based on coex flag
826277b024eSKalle Valo  */
mwifiex_update_ampdu_rxwinsize(struct mwifiex_adapter * adapter,bool coex_flag)827277b024eSKalle Valo static void mwifiex_update_ampdu_rxwinsize(struct mwifiex_adapter *adapter,
828277b024eSKalle Valo 					   bool coex_flag)
829277b024eSKalle Valo {
830277b024eSKalle Valo 	u8 i;
831277b024eSKalle Valo 	u32 rx_win_size;
832277b024eSKalle Valo 	struct mwifiex_private *priv;
833277b024eSKalle Valo 
834277b024eSKalle Valo 	dev_dbg(adapter->dev, "Update rxwinsize %d\n", coex_flag);
835277b024eSKalle Valo 
836277b024eSKalle Valo 	for (i = 0; i < adapter->priv_num; i++) {
837277b024eSKalle Valo 		if (!adapter->priv[i])
838277b024eSKalle Valo 			continue;
839277b024eSKalle Valo 		priv = adapter->priv[i];
840277b024eSKalle Valo 		rx_win_size = priv->add_ba_param.rx_win_size;
841277b024eSKalle Valo 		if (coex_flag) {
842277b024eSKalle Valo 			if (priv->bss_type == MWIFIEX_BSS_TYPE_STA)
843277b024eSKalle Valo 				priv->add_ba_param.rx_win_size =
844277b024eSKalle Valo 					MWIFIEX_STA_COEX_AMPDU_DEF_RXWINSIZE;
845277b024eSKalle Valo 			if (priv->bss_type == MWIFIEX_BSS_TYPE_P2P)
846277b024eSKalle Valo 				priv->add_ba_param.rx_win_size =
847277b024eSKalle Valo 					MWIFIEX_STA_COEX_AMPDU_DEF_RXWINSIZE;
848277b024eSKalle Valo 			if (priv->bss_type == MWIFIEX_BSS_TYPE_UAP)
849277b024eSKalle Valo 				priv->add_ba_param.rx_win_size =
850277b024eSKalle Valo 					MWIFIEX_UAP_COEX_AMPDU_DEF_RXWINSIZE;
851277b024eSKalle Valo 		} else {
852277b024eSKalle Valo 			if (priv->bss_type == MWIFIEX_BSS_TYPE_STA)
853277b024eSKalle Valo 				priv->add_ba_param.rx_win_size =
854277b024eSKalle Valo 					MWIFIEX_STA_AMPDU_DEF_RXWINSIZE;
855277b024eSKalle Valo 			if (priv->bss_type == MWIFIEX_BSS_TYPE_P2P)
856277b024eSKalle Valo 				priv->add_ba_param.rx_win_size =
857277b024eSKalle Valo 					MWIFIEX_STA_AMPDU_DEF_RXWINSIZE;
858277b024eSKalle Valo 			if (priv->bss_type == MWIFIEX_BSS_TYPE_UAP)
859277b024eSKalle Valo 				priv->add_ba_param.rx_win_size =
860277b024eSKalle Valo 					MWIFIEX_UAP_AMPDU_DEF_RXWINSIZE;
861277b024eSKalle Valo 		}
862277b024eSKalle Valo 
863277b024eSKalle Valo 		if (adapter->coex_win_size && adapter->coex_rx_win_size)
864277b024eSKalle Valo 			priv->add_ba_param.rx_win_size =
865277b024eSKalle Valo 					adapter->coex_rx_win_size;
866277b024eSKalle Valo 
867277b024eSKalle Valo 		if (rx_win_size != priv->add_ba_param.rx_win_size) {
868277b024eSKalle Valo 			if (!priv->media_connected)
869277b024eSKalle Valo 				continue;
870277b024eSKalle Valo 			for (i = 0; i < MAX_NUM_TID; i++)
871277b024eSKalle Valo 				mwifiex_11n_delba(priv, i);
872277b024eSKalle Valo 		}
873277b024eSKalle Valo 	}
874277b024eSKalle Valo }
875277b024eSKalle Valo 
876277b024eSKalle Valo /* This function check coex for RX BA
877277b024eSKalle Valo  */
mwifiex_coex_ampdu_rxwinsize(struct mwifiex_adapter * adapter)878277b024eSKalle Valo void mwifiex_coex_ampdu_rxwinsize(struct mwifiex_adapter *adapter)
879277b024eSKalle Valo {
880277b024eSKalle Valo 	u8 i;
881277b024eSKalle Valo 	struct mwifiex_private *priv;
882277b024eSKalle Valo 	u8 count = 0;
883277b024eSKalle Valo 
884277b024eSKalle Valo 	for (i = 0; i < adapter->priv_num; i++) {
885277b024eSKalle Valo 		if (adapter->priv[i]) {
886277b024eSKalle Valo 			priv = adapter->priv[i];
887277b024eSKalle Valo 			if (GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_STA) {
888277b024eSKalle Valo 				if (priv->media_connected)
889277b024eSKalle Valo 					count++;
890277b024eSKalle Valo 			}
891277b024eSKalle Valo 			if (GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_UAP) {
892277b024eSKalle Valo 				if (priv->bss_started)
893277b024eSKalle Valo 					count++;
894277b024eSKalle Valo 			}
895277b024eSKalle Valo 		}
896277b024eSKalle Valo 		if (count >= MWIFIEX_BSS_COEX_COUNT)
897277b024eSKalle Valo 			break;
898277b024eSKalle Valo 	}
899277b024eSKalle Valo 	if (count >= MWIFIEX_BSS_COEX_COUNT)
900277b024eSKalle Valo 		mwifiex_update_ampdu_rxwinsize(adapter, true);
901277b024eSKalle Valo 	else
902277b024eSKalle Valo 		mwifiex_update_ampdu_rxwinsize(adapter, false);
903277b024eSKalle Valo }
90499ffe72cSXinming Hu 
90599ffe72cSXinming Hu /* This function handles rxba_sync event
90699ffe72cSXinming Hu  */
mwifiex_11n_rxba_sync_event(struct mwifiex_private * priv,u8 * event_buf,u16 len)90799ffe72cSXinming Hu void mwifiex_11n_rxba_sync_event(struct mwifiex_private *priv,
90899ffe72cSXinming Hu 				 u8 *event_buf, u16 len)
90999ffe72cSXinming Hu {
91099ffe72cSXinming Hu 	struct mwifiex_ie_types_rxba_sync *tlv_rxba = (void *)event_buf;
91199ffe72cSXinming Hu 	u16 tlv_type, tlv_len;
91299ffe72cSXinming Hu 	struct mwifiex_rx_reorder_tbl *rx_reor_tbl_ptr;
91399ffe72cSXinming Hu 	u8 i, j;
91499ffe72cSXinming Hu 	u16 seq_num, tlv_seq_num, tlv_bitmap_len;
91599ffe72cSXinming Hu 	int tlv_buf_left = len;
91699ffe72cSXinming Hu 	int ret;
91799ffe72cSXinming Hu 	u8 *tmp;
91899ffe72cSXinming Hu 
91999ffe72cSXinming Hu 	mwifiex_dbg_dump(priv->adapter, EVT_D, "RXBA_SYNC event:",
92099ffe72cSXinming Hu 			 event_buf, len);
921c7847241SGustavo A. R. Silva 	while (tlv_buf_left > sizeof(*tlv_rxba)) {
92299ffe72cSXinming Hu 		tlv_type = le16_to_cpu(tlv_rxba->header.type);
92399ffe72cSXinming Hu 		tlv_len  = le16_to_cpu(tlv_rxba->header.len);
924*d5a93b7dSGustavo A. R. Silva 		if (size_add(sizeof(tlv_rxba->header), tlv_len) > tlv_buf_left) {
925*d5a93b7dSGustavo A. R. Silva 			mwifiex_dbg(priv->adapter, WARN,
926*d5a93b7dSGustavo A. R. Silva 				    "TLV size (%zu) overflows event_buf buf_left=%d\n",
927*d5a93b7dSGustavo A. R. Silva 				    size_add(sizeof(tlv_rxba->header), tlv_len),
928*d5a93b7dSGustavo A. R. Silva 				    tlv_buf_left);
929*d5a93b7dSGustavo A. R. Silva 			return;
930*d5a93b7dSGustavo A. R. Silva 		}
931*d5a93b7dSGustavo A. R. Silva 
93299ffe72cSXinming Hu 		if (tlv_type != TLV_TYPE_RXBA_SYNC) {
93399ffe72cSXinming Hu 			mwifiex_dbg(priv->adapter, ERROR,
93499ffe72cSXinming Hu 				    "Wrong TLV id=0x%x\n", tlv_type);
93599ffe72cSXinming Hu 			return;
93699ffe72cSXinming Hu 		}
93799ffe72cSXinming Hu 
93899ffe72cSXinming Hu 		tlv_seq_num = le16_to_cpu(tlv_rxba->seq_num);
93999ffe72cSXinming Hu 		tlv_bitmap_len = le16_to_cpu(tlv_rxba->bitmap_len);
940*d5a93b7dSGustavo A. R. Silva 		if (size_add(sizeof(*tlv_rxba), tlv_bitmap_len) > tlv_buf_left) {
941*d5a93b7dSGustavo A. R. Silva 			mwifiex_dbg(priv->adapter, WARN,
942*d5a93b7dSGustavo A. R. Silva 				    "TLV size (%zu) overflows event_buf buf_left=%d\n",
943*d5a93b7dSGustavo A. R. Silva 				    size_add(sizeof(*tlv_rxba), tlv_bitmap_len),
944*d5a93b7dSGustavo A. R. Silva 				    tlv_buf_left);
945*d5a93b7dSGustavo A. R. Silva 			return;
946*d5a93b7dSGustavo A. R. Silva 		}
947*d5a93b7dSGustavo A. R. Silva 
94899ffe72cSXinming Hu 		mwifiex_dbg(priv->adapter, INFO,
94999ffe72cSXinming Hu 			    "%pM tid=%d seq_num=%d bitmap_len=%d\n",
95099ffe72cSXinming Hu 			    tlv_rxba->mac, tlv_rxba->tid, tlv_seq_num,
95199ffe72cSXinming Hu 			    tlv_bitmap_len);
95299ffe72cSXinming Hu 
95399ffe72cSXinming Hu 		rx_reor_tbl_ptr =
95499ffe72cSXinming Hu 			mwifiex_11n_get_rx_reorder_tbl(priv, tlv_rxba->tid,
95599ffe72cSXinming Hu 						       tlv_rxba->mac);
95699ffe72cSXinming Hu 		if (!rx_reor_tbl_ptr) {
95799ffe72cSXinming Hu 			mwifiex_dbg(priv->adapter, ERROR,
95899ffe72cSXinming Hu 				    "Can not find rx_reorder_tbl!");
95999ffe72cSXinming Hu 			return;
96099ffe72cSXinming Hu 		}
96199ffe72cSXinming Hu 
96299ffe72cSXinming Hu 		for (i = 0; i < tlv_bitmap_len; i++) {
96399ffe72cSXinming Hu 			for (j = 0 ; j < 8; j++) {
96499ffe72cSXinming Hu 				if (tlv_rxba->bitmap[i] & (1 << j)) {
96599ffe72cSXinming Hu 					seq_num = (MAX_TID_VALUE - 1) &
96699ffe72cSXinming Hu 						(tlv_seq_num + i * 8 + j);
96799ffe72cSXinming Hu 
96899ffe72cSXinming Hu 					mwifiex_dbg(priv->adapter, ERROR,
96999ffe72cSXinming Hu 						    "drop packet,seq=%d\n",
97099ffe72cSXinming Hu 						    seq_num);
97199ffe72cSXinming Hu 
97299ffe72cSXinming Hu 					ret = mwifiex_11n_rx_reorder_pkt
97399ffe72cSXinming Hu 					(priv, seq_num, tlv_rxba->tid,
97499ffe72cSXinming Hu 					 tlv_rxba->mac, 0, NULL);
97599ffe72cSXinming Hu 
97699ffe72cSXinming Hu 					if (ret)
97799ffe72cSXinming Hu 						mwifiex_dbg(priv->adapter,
97899ffe72cSXinming Hu 							    ERROR,
97999ffe72cSXinming Hu 							    "Fail to drop packet");
98099ffe72cSXinming Hu 				}
98199ffe72cSXinming Hu 			}
98299ffe72cSXinming Hu 		}
98399ffe72cSXinming Hu 
984eec679e4SGustavo A. R. Silva 		tlv_buf_left -= (sizeof(tlv_rxba->header) + tlv_len);
985eec679e4SGustavo A. R. Silva 		tmp = (u8 *)tlv_rxba  + sizeof(tlv_rxba->header) + tlv_len;
98699ffe72cSXinming Hu 		tlv_rxba = (struct mwifiex_ie_types_rxba_sync *)tmp;
98799ffe72cSXinming Hu 	}
98899ffe72cSXinming Hu }
989