1 /*
2  * Copyright (C) 2008 Christian Lamparter <chunkeey@web.de>
3  * Copyright 2008       Johannes Berg <johannes@sipsolutions.net>
4  *
5  * This driver is a port from stlc45xx:
6  *	Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * version 2 as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but
13  * WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20  * 02110-1301 USA
21  */
22 
23 #include <linux/module.h>
24 #include <linux/platform_device.h>
25 #include <linux/interrupt.h>
26 #include <linux/firmware.h>
27 #include <linux/delay.h>
28 #include <linux/irq.h>
29 #include <linux/spi/spi.h>
30 #include <linux/etherdevice.h>
31 #include <linux/gpio.h>
32 #include <linux/slab.h>
33 
34 #include "p54spi.h"
35 #include "p54.h"
36 
37 #include "lmac.h"
38 
39 #ifdef CONFIG_P54_SPI_DEFAULT_EEPROM
40 #include "p54spi_eeprom.h"
41 #endif /* CONFIG_P54_SPI_DEFAULT_EEPROM */
42 
43 MODULE_FIRMWARE("3826.arm");
44 
45 /* gpios should be handled in board files and provided via platform data,
46  * but because it's currently impossible for p54spi to have a header file
47  * in include/linux, let's use module paramaters for now
48  */
49 
50 static int p54spi_gpio_power = 97;
51 module_param(p54spi_gpio_power, int, 0444);
52 MODULE_PARM_DESC(p54spi_gpio_power, "gpio number for power line");
53 
54 static int p54spi_gpio_irq = 87;
55 module_param(p54spi_gpio_irq, int, 0444);
56 MODULE_PARM_DESC(p54spi_gpio_irq, "gpio number for irq line");
57 
58 static void p54spi_spi_read(struct p54s_priv *priv, u8 address,
59 			      void *buf, size_t len)
60 {
61 	struct spi_transfer t[2];
62 	struct spi_message m;
63 	__le16 addr;
64 
65 	/* We first push the address */
66 	addr = cpu_to_le16(address << 8 | SPI_ADRS_READ_BIT_15);
67 
68 	spi_message_init(&m);
69 	memset(t, 0, sizeof(t));
70 
71 	t[0].tx_buf = &addr;
72 	t[0].len = sizeof(addr);
73 	spi_message_add_tail(&t[0], &m);
74 
75 	t[1].rx_buf = buf;
76 	t[1].len = len;
77 	spi_message_add_tail(&t[1], &m);
78 
79 	spi_sync(priv->spi, &m);
80 }
81 
82 
83 static void p54spi_spi_write(struct p54s_priv *priv, u8 address,
84 			     const void *buf, size_t len)
85 {
86 	struct spi_transfer t[3];
87 	struct spi_message m;
88 	__le16 addr;
89 
90 	/* We first push the address */
91 	addr = cpu_to_le16(address << 8);
92 
93 	spi_message_init(&m);
94 	memset(t, 0, sizeof(t));
95 
96 	t[0].tx_buf = &addr;
97 	t[0].len = sizeof(addr);
98 	spi_message_add_tail(&t[0], &m);
99 
100 	t[1].tx_buf = buf;
101 	t[1].len = len & ~1;
102 	spi_message_add_tail(&t[1], &m);
103 
104 	if (len % 2) {
105 		__le16 last_word;
106 		last_word = cpu_to_le16(((u8 *)buf)[len - 1]);
107 
108 		t[2].tx_buf = &last_word;
109 		t[2].len = sizeof(last_word);
110 		spi_message_add_tail(&t[2], &m);
111 	}
112 
113 	spi_sync(priv->spi, &m);
114 }
115 
116 static u32 p54spi_read32(struct p54s_priv *priv, u8 addr)
117 {
118 	__le32 val;
119 
120 	p54spi_spi_read(priv, addr, &val, sizeof(val));
121 
122 	return le32_to_cpu(val);
123 }
124 
125 static inline void p54spi_write16(struct p54s_priv *priv, u8 addr, __le16 val)
126 {
127 	p54spi_spi_write(priv, addr, &val, sizeof(val));
128 }
129 
130 static inline void p54spi_write32(struct p54s_priv *priv, u8 addr, __le32 val)
131 {
132 	p54spi_spi_write(priv, addr, &val, sizeof(val));
133 }
134 
135 static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, u32 bits)
136 {
137 	int i;
138 
139 	for (i = 0; i < 2000; i++) {
140 		u32 buffer = p54spi_read32(priv, reg);
141 		if ((buffer & bits) == bits)
142 			return 1;
143 	}
144 	return 0;
145 }
146 
147 static int p54spi_spi_write_dma(struct p54s_priv *priv, __le32 base,
148 				const void *buf, size_t len)
149 {
150 	if (!p54spi_wait_bit(priv, SPI_ADRS_DMA_WRITE_CTRL, HOST_ALLOWED)) {
151 		dev_err(&priv->spi->dev, "spi_write_dma not allowed "
152 			"to DMA write.\n");
153 		return -EAGAIN;
154 	}
155 
156 	p54spi_write16(priv, SPI_ADRS_DMA_WRITE_CTRL,
157 		       cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE));
158 
159 	p54spi_write16(priv, SPI_ADRS_DMA_WRITE_LEN, cpu_to_le16(len));
160 	p54spi_write32(priv, SPI_ADRS_DMA_WRITE_BASE, base);
161 	p54spi_spi_write(priv, SPI_ADRS_DMA_DATA, buf, len);
162 	return 0;
163 }
164 
165 static int p54spi_request_firmware(struct ieee80211_hw *dev)
166 {
167 	struct p54s_priv *priv = dev->priv;
168 	int ret;
169 
170 	/* FIXME: should driver use it's own struct device? */
171 	ret = request_firmware(&priv->firmware, "3826.arm", &priv->spi->dev);
172 
173 	if (ret < 0) {
174 		dev_err(&priv->spi->dev, "request_firmware() failed: %d", ret);
175 		return ret;
176 	}
177 
178 	ret = p54_parse_firmware(dev, priv->firmware);
179 	if (ret) {
180 		release_firmware(priv->firmware);
181 		return ret;
182 	}
183 
184 	return 0;
185 }
186 
187 static int p54spi_request_eeprom(struct ieee80211_hw *dev)
188 {
189 	struct p54s_priv *priv = dev->priv;
190 	const struct firmware *eeprom;
191 	int ret;
192 
193 	/* allow users to customize their eeprom.
194 	 */
195 
196 	ret = request_firmware_direct(&eeprom, "3826.eeprom", &priv->spi->dev);
197 	if (ret < 0) {
198 #ifdef CONFIG_P54_SPI_DEFAULT_EEPROM
199 		dev_info(&priv->spi->dev, "loading default eeprom...\n");
200 		ret = p54_parse_eeprom(dev, (void *) p54spi_eeprom,
201 				       sizeof(p54spi_eeprom));
202 #else
203 		dev_err(&priv->spi->dev, "Failed to request user eeprom\n");
204 #endif /* CONFIG_P54_SPI_DEFAULT_EEPROM */
205 	} else {
206 		dev_info(&priv->spi->dev, "loading user eeprom...\n");
207 		ret = p54_parse_eeprom(dev, (void *) eeprom->data,
208 				       (int)eeprom->size);
209 		release_firmware(eeprom);
210 	}
211 	return ret;
212 }
213 
214 static int p54spi_upload_firmware(struct ieee80211_hw *dev)
215 {
216 	struct p54s_priv *priv = dev->priv;
217 	unsigned long fw_len, _fw_len;
218 	unsigned int offset = 0;
219 	int err = 0;
220 	u8 *fw;
221 
222 	fw_len = priv->firmware->size;
223 	fw = kmemdup(priv->firmware->data, fw_len, GFP_KERNEL);
224 	if (!fw)
225 		return -ENOMEM;
226 
227 	/* stop the device */
228 	p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
229 		       SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
230 		       SPI_CTRL_STAT_START_HALTED));
231 
232 	msleep(TARGET_BOOT_SLEEP);
233 
234 	p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
235 		       SPI_CTRL_STAT_HOST_OVERRIDE |
236 		       SPI_CTRL_STAT_START_HALTED));
237 
238 	msleep(TARGET_BOOT_SLEEP);
239 
240 	while (fw_len > 0) {
241 		_fw_len = min_t(long, fw_len, SPI_MAX_PACKET_SIZE);
242 
243 		err = p54spi_spi_write_dma(priv, cpu_to_le32(
244 					   ISL38XX_DEV_FIRMWARE_ADDR + offset),
245 					   (fw + offset), _fw_len);
246 		if (err < 0)
247 			goto out;
248 
249 		fw_len -= _fw_len;
250 		offset += _fw_len;
251 	}
252 
253 	BUG_ON(fw_len != 0);
254 
255 	/* enable host interrupts */
256 	p54spi_write32(priv, SPI_ADRS_HOST_INT_EN,
257 		       cpu_to_le32(SPI_HOST_INTS_DEFAULT));
258 
259 	/* boot the device */
260 	p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
261 		       SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
262 		       SPI_CTRL_STAT_RAM_BOOT));
263 
264 	msleep(TARGET_BOOT_SLEEP);
265 
266 	p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
267 		       SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT));
268 	msleep(TARGET_BOOT_SLEEP);
269 
270 out:
271 	kfree(fw);
272 	return err;
273 }
274 
275 static void p54spi_power_off(struct p54s_priv *priv)
276 {
277 	disable_irq(gpio_to_irq(p54spi_gpio_irq));
278 	gpio_set_value(p54spi_gpio_power, 0);
279 }
280 
281 static void p54spi_power_on(struct p54s_priv *priv)
282 {
283 	gpio_set_value(p54spi_gpio_power, 1);
284 	enable_irq(gpio_to_irq(p54spi_gpio_irq));
285 
286 	/* need to wait a while before device can be accessed, the length
287 	 * is just a guess
288 	 */
289 	msleep(10);
290 }
291 
292 static inline void p54spi_int_ack(struct p54s_priv *priv, u32 val)
293 {
294 	p54spi_write32(priv, SPI_ADRS_HOST_INT_ACK, cpu_to_le32(val));
295 }
296 
297 static int p54spi_wakeup(struct p54s_priv *priv)
298 {
299 	/* wake the chip */
300 	p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
301 		       cpu_to_le32(SPI_TARGET_INT_WAKEUP));
302 
303 	/* And wait for the READY interrupt */
304 	if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
305 			     SPI_HOST_INT_READY)) {
306 		dev_err(&priv->spi->dev, "INT_READY timeout\n");
307 		return -EBUSY;
308 	}
309 
310 	p54spi_int_ack(priv, SPI_HOST_INT_READY);
311 	return 0;
312 }
313 
314 static inline void p54spi_sleep(struct p54s_priv *priv)
315 {
316 	p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
317 		       cpu_to_le32(SPI_TARGET_INT_SLEEP));
318 }
319 
320 static void p54spi_int_ready(struct p54s_priv *priv)
321 {
322 	p54spi_write32(priv, SPI_ADRS_HOST_INT_EN, cpu_to_le32(
323 		       SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE));
324 
325 	switch (priv->fw_state) {
326 	case FW_STATE_BOOTING:
327 		priv->fw_state = FW_STATE_READY;
328 		complete(&priv->fw_comp);
329 		break;
330 	case FW_STATE_RESETTING:
331 		priv->fw_state = FW_STATE_READY;
332 		/* TODO: reinitialize state */
333 		break;
334 	default:
335 		break;
336 	}
337 }
338 
339 static int p54spi_rx(struct p54s_priv *priv)
340 {
341 	struct sk_buff *skb;
342 	u16 len;
343 	u16 rx_head[2];
344 #define READAHEAD_SZ (sizeof(rx_head)-sizeof(u16))
345 
346 	if (p54spi_wakeup(priv) < 0)
347 		return -EBUSY;
348 
349 	/* Read data size and first data word in one SPI transaction
350 	 * This is workaround for firmware/DMA bug,
351 	 * when first data word gets lost under high load.
352 	 */
353 	p54spi_spi_read(priv, SPI_ADRS_DMA_DATA, rx_head, sizeof(rx_head));
354 	len = rx_head[0];
355 
356 	if (len == 0) {
357 		p54spi_sleep(priv);
358 		dev_err(&priv->spi->dev, "rx request of zero bytes\n");
359 		return 0;
360 	}
361 
362 	/* Firmware may insert up to 4 padding bytes after the lmac header,
363 	 * but it does not amend the size of SPI data transfer.
364 	 * Such packets has correct data size in header, thus referencing
365 	 * past the end of allocated skb. Reserve extra 4 bytes for this case
366 	 */
367 	skb = dev_alloc_skb(len + 4);
368 	if (!skb) {
369 		p54spi_sleep(priv);
370 		dev_err(&priv->spi->dev, "could not alloc skb");
371 		return -ENOMEM;
372 	}
373 
374 	if (len <= READAHEAD_SZ) {
375 		skb_put_data(skb, rx_head + 1, len);
376 	} else {
377 		skb_put_data(skb, rx_head + 1, READAHEAD_SZ);
378 		p54spi_spi_read(priv, SPI_ADRS_DMA_DATA,
379 				skb_put(skb, len - READAHEAD_SZ),
380 				len - READAHEAD_SZ);
381 	}
382 	p54spi_sleep(priv);
383 	/* Put additional bytes to compensate for the possible
384 	 * alignment-caused truncation
385 	 */
386 	skb_put(skb, 4);
387 
388 	if (p54_rx(priv->hw, skb) == 0)
389 		dev_kfree_skb(skb);
390 
391 	return 0;
392 }
393 
394 
395 static irqreturn_t p54spi_interrupt(int irq, void *config)
396 {
397 	struct spi_device *spi = config;
398 	struct p54s_priv *priv = spi_get_drvdata(spi);
399 
400 	ieee80211_queue_work(priv->hw, &priv->work);
401 
402 	return IRQ_HANDLED;
403 }
404 
405 static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb)
406 {
407 	struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
408 	int ret = 0;
409 
410 	if (p54spi_wakeup(priv) < 0)
411 		return -EBUSY;
412 
413 	ret = p54spi_spi_write_dma(priv, hdr->req_id, skb->data, skb->len);
414 	if (ret < 0)
415 		goto out;
416 
417 	if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
418 			     SPI_HOST_INT_WR_READY)) {
419 		dev_err(&priv->spi->dev, "WR_READY timeout\n");
420 		ret = -EAGAIN;
421 		goto out;
422 	}
423 
424 	p54spi_int_ack(priv, SPI_HOST_INT_WR_READY);
425 
426 	if (FREE_AFTER_TX(skb))
427 		p54_free_skb(priv->hw, skb);
428 out:
429 	p54spi_sleep(priv);
430 	return ret;
431 }
432 
433 static int p54spi_wq_tx(struct p54s_priv *priv)
434 {
435 	struct p54s_tx_info *entry;
436 	struct sk_buff *skb;
437 	struct ieee80211_tx_info *info;
438 	struct p54_tx_info *minfo;
439 	struct p54s_tx_info *dinfo;
440 	unsigned long flags;
441 	int ret = 0;
442 
443 	spin_lock_irqsave(&priv->tx_lock, flags);
444 
445 	while (!list_empty(&priv->tx_pending)) {
446 		entry = list_entry(priv->tx_pending.next,
447 				   struct p54s_tx_info, tx_list);
448 
449 		list_del_init(&entry->tx_list);
450 
451 		spin_unlock_irqrestore(&priv->tx_lock, flags);
452 
453 		dinfo = container_of((void *) entry, struct p54s_tx_info,
454 				     tx_list);
455 		minfo = container_of((void *) dinfo, struct p54_tx_info,
456 				     data);
457 		info = container_of((void *) minfo, struct ieee80211_tx_info,
458 				    rate_driver_data);
459 		skb = container_of((void *) info, struct sk_buff, cb);
460 
461 		ret = p54spi_tx_frame(priv, skb);
462 
463 		if (ret < 0) {
464 			p54_free_skb(priv->hw, skb);
465 			return ret;
466 		}
467 
468 		spin_lock_irqsave(&priv->tx_lock, flags);
469 	}
470 	spin_unlock_irqrestore(&priv->tx_lock, flags);
471 	return ret;
472 }
473 
474 static void p54spi_op_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
475 {
476 	struct p54s_priv *priv = dev->priv;
477 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
478 	struct p54_tx_info *mi = (struct p54_tx_info *) info->rate_driver_data;
479 	struct p54s_tx_info *di = (struct p54s_tx_info *) mi->data;
480 	unsigned long flags;
481 
482 	BUILD_BUG_ON(sizeof(*di) > sizeof((mi->data)));
483 
484 	spin_lock_irqsave(&priv->tx_lock, flags);
485 	list_add_tail(&di->tx_list, &priv->tx_pending);
486 	spin_unlock_irqrestore(&priv->tx_lock, flags);
487 
488 	ieee80211_queue_work(priv->hw, &priv->work);
489 }
490 
491 static void p54spi_work(struct work_struct *work)
492 {
493 	struct p54s_priv *priv = container_of(work, struct p54s_priv, work);
494 	u32 ints;
495 	int ret;
496 
497 	mutex_lock(&priv->mutex);
498 
499 	if (priv->fw_state == FW_STATE_OFF)
500 		goto out;
501 
502 	ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
503 
504 	if (ints & SPI_HOST_INT_READY) {
505 		p54spi_int_ready(priv);
506 		p54spi_int_ack(priv, SPI_HOST_INT_READY);
507 	}
508 
509 	if (priv->fw_state != FW_STATE_READY)
510 		goto out;
511 
512 	if (ints & SPI_HOST_INT_UPDATE) {
513 		p54spi_int_ack(priv, SPI_HOST_INT_UPDATE);
514 		ret = p54spi_rx(priv);
515 		if (ret < 0)
516 			goto out;
517 	}
518 	if (ints & SPI_HOST_INT_SW_UPDATE) {
519 		p54spi_int_ack(priv, SPI_HOST_INT_SW_UPDATE);
520 		ret = p54spi_rx(priv);
521 		if (ret < 0)
522 			goto out;
523 	}
524 
525 	ret = p54spi_wq_tx(priv);
526 out:
527 	mutex_unlock(&priv->mutex);
528 }
529 
530 static int p54spi_op_start(struct ieee80211_hw *dev)
531 {
532 	struct p54s_priv *priv = dev->priv;
533 	unsigned long timeout;
534 	int ret = 0;
535 
536 	if (mutex_lock_interruptible(&priv->mutex)) {
537 		ret = -EINTR;
538 		goto out;
539 	}
540 
541 	priv->fw_state = FW_STATE_BOOTING;
542 
543 	p54spi_power_on(priv);
544 
545 	ret = p54spi_upload_firmware(dev);
546 	if (ret < 0) {
547 		p54spi_power_off(priv);
548 		goto out_unlock;
549 	}
550 
551 	mutex_unlock(&priv->mutex);
552 
553 	timeout = msecs_to_jiffies(2000);
554 	timeout = wait_for_completion_interruptible_timeout(&priv->fw_comp,
555 							    timeout);
556 	if (!timeout) {
557 		dev_err(&priv->spi->dev, "firmware boot failed");
558 		p54spi_power_off(priv);
559 		ret = -1;
560 		goto out;
561 	}
562 
563 	if (mutex_lock_interruptible(&priv->mutex)) {
564 		ret = -EINTR;
565 		p54spi_power_off(priv);
566 		goto out;
567 	}
568 
569 	WARN_ON(priv->fw_state != FW_STATE_READY);
570 
571 out_unlock:
572 	mutex_unlock(&priv->mutex);
573 
574 out:
575 	return ret;
576 }
577 
578 static void p54spi_op_stop(struct ieee80211_hw *dev)
579 {
580 	struct p54s_priv *priv = dev->priv;
581 	unsigned long flags;
582 
583 	mutex_lock(&priv->mutex);
584 	WARN_ON(priv->fw_state != FW_STATE_READY);
585 
586 	p54spi_power_off(priv);
587 	spin_lock_irqsave(&priv->tx_lock, flags);
588 	INIT_LIST_HEAD(&priv->tx_pending);
589 	spin_unlock_irqrestore(&priv->tx_lock, flags);
590 
591 	priv->fw_state = FW_STATE_OFF;
592 	mutex_unlock(&priv->mutex);
593 
594 	cancel_work_sync(&priv->work);
595 }
596 
597 static int p54spi_probe(struct spi_device *spi)
598 {
599 	struct p54s_priv *priv = NULL;
600 	struct ieee80211_hw *hw;
601 	int ret = -EINVAL;
602 
603 	hw = p54_init_common(sizeof(*priv));
604 	if (!hw) {
605 		dev_err(&spi->dev, "could not alloc ieee80211_hw");
606 		return -ENOMEM;
607 	}
608 
609 	priv = hw->priv;
610 	priv->hw = hw;
611 	spi_set_drvdata(spi, priv);
612 	priv->spi = spi;
613 
614 	spi->bits_per_word = 16;
615 	spi->max_speed_hz = 24000000;
616 
617 	ret = spi_setup(spi);
618 	if (ret < 0) {
619 		dev_err(&priv->spi->dev, "spi_setup failed");
620 		goto err_free;
621 	}
622 
623 	ret = gpio_request(p54spi_gpio_power, "p54spi power");
624 	if (ret < 0) {
625 		dev_err(&priv->spi->dev, "power GPIO request failed: %d", ret);
626 		goto err_free;
627 	}
628 
629 	ret = gpio_request(p54spi_gpio_irq, "p54spi irq");
630 	if (ret < 0) {
631 		dev_err(&priv->spi->dev, "irq GPIO request failed: %d", ret);
632 		goto err_free_gpio_power;
633 	}
634 
635 	gpio_direction_output(p54spi_gpio_power, 0);
636 	gpio_direction_input(p54spi_gpio_irq);
637 
638 	ret = request_irq(gpio_to_irq(p54spi_gpio_irq),
639 			  p54spi_interrupt, 0, "p54spi",
640 			  priv->spi);
641 	if (ret < 0) {
642 		dev_err(&priv->spi->dev, "request_irq() failed");
643 		goto err_free_gpio_irq;
644 	}
645 
646 	irq_set_irq_type(gpio_to_irq(p54spi_gpio_irq), IRQ_TYPE_EDGE_RISING);
647 
648 	disable_irq(gpio_to_irq(p54spi_gpio_irq));
649 
650 	INIT_WORK(&priv->work, p54spi_work);
651 	init_completion(&priv->fw_comp);
652 	INIT_LIST_HEAD(&priv->tx_pending);
653 	mutex_init(&priv->mutex);
654 	spin_lock_init(&priv->tx_lock);
655 	SET_IEEE80211_DEV(hw, &spi->dev);
656 	priv->common.open = p54spi_op_start;
657 	priv->common.stop = p54spi_op_stop;
658 	priv->common.tx = p54spi_op_tx;
659 
660 	ret = p54spi_request_firmware(hw);
661 	if (ret < 0)
662 		goto err_free_common;
663 
664 	ret = p54spi_request_eeprom(hw);
665 	if (ret)
666 		goto err_free_common;
667 
668 	ret = p54_register_common(hw, &priv->spi->dev);
669 	if (ret)
670 		goto err_free_common;
671 
672 	return 0;
673 
674 err_free_common:
675 	free_irq(gpio_to_irq(p54spi_gpio_irq), spi);
676 err_free_gpio_irq:
677 	gpio_free(p54spi_gpio_irq);
678 err_free_gpio_power:
679 	gpio_free(p54spi_gpio_power);
680 err_free:
681 	p54_free_common(priv->hw);
682 	return ret;
683 }
684 
685 static int p54spi_remove(struct spi_device *spi)
686 {
687 	struct p54s_priv *priv = spi_get_drvdata(spi);
688 
689 	p54_unregister_common(priv->hw);
690 
691 	free_irq(gpio_to_irq(p54spi_gpio_irq), spi);
692 
693 	gpio_free(p54spi_gpio_power);
694 	gpio_free(p54spi_gpio_irq);
695 	release_firmware(priv->firmware);
696 
697 	mutex_destroy(&priv->mutex);
698 
699 	p54_free_common(priv->hw);
700 
701 	return 0;
702 }
703 
704 
705 static struct spi_driver p54spi_driver = {
706 	.driver = {
707 		.name		= "p54spi",
708 	},
709 
710 	.probe		= p54spi_probe,
711 	.remove		= p54spi_remove,
712 };
713 
714 module_spi_driver(p54spi_driver);
715 
716 MODULE_LICENSE("GPL");
717 MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>");
718 MODULE_ALIAS("spi:cx3110x");
719 MODULE_ALIAS("spi:p54spi");
720 MODULE_ALIAS("spi:stlc45xx");
721